2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
20 * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
21 * 2003/02/24 show registers in sysfs (Kevin Brosius)
23 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
24 * bandwidth accounting; if debugging, show schedules in driverfs
25 * 2002/07/19 fixes to management of ED and schedule state.
26 * 2002/06/09 SA-1111 support (Christopher Hoover)
27 * 2002/06/01 remember frame when HC won't see EDs any more; use that info
28 * to fix urb unlink races caused by interrupt latency assumptions;
29 * minor ED field and function naming updates
30 * 2002/01/18 package as a patch for 2.5.3; this should match the
31 * 2.4.17 kernel modulo some bugs being fixed.
33 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
34 * from post-2.4.5 patches.
35 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
36 * 2001/09/07 match PCI PM changes, errnos from Linus' tree
37 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
38 * pbook pci quirks gone (please fix pbook pci sw!) (db)
40 * 2001/04/08 Identify version on module load (gb)
41 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
43 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
44 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
46 * 2000/09/26 fixed races in removing the private portion of the urb
47 * 2000/09/07 disable bulk and control lists when unlinking the last
48 * endpoint descriptor in order to avoid unrecoverable errors on
49 * the Lucent chips. (rwc@sgi)
50 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
51 * urb unlink probs, indentation fixes
52 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
54 * 2000/06/28 use PCI hotplug framework, for better power management
55 * and for Cardbus support (David Brownell)
56 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
57 * when the controller loses power; handle UE; cleanup; ...
59 * v5.2 1999/12/07 URB 3rd preview,
60 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
61 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
62 * i386: HUB, Keyboard, Mouse, Printer
64 * v4.3 1999/10/27 multiple HCs, bulk_request
65 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
66 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
69 * v2.1 1999/05/09 code clean up
71 * v1.0 1999/04/27 initial release
73 * This file is licenced under the GPL.
76 #include <linux/config.h>
78 #ifdef CONFIG_USB_DEBUG
84 #include <linux/module.h>
85 #include <linux/moduleparam.h>
86 #include <linux/pci.h>
87 #include <linux/kernel.h>
88 #include <linux/delay.h>
89 #include <linux/ioport.h>
90 #include <linux/sched.h>
91 #include <linux/slab.h>
92 #include <linux/smp_lock.h>
93 #include <linux/errno.h>
94 #include <linux/init.h>
95 #include <linux/timer.h>
96 #include <linux/list.h>
97 #include <linux/interrupt.h> /* for in_interrupt () */
98 #include <linux/usb.h>
99 #include "../core/hcd.h"
100 #include <linux/dma-mapping.h>
101 #include <linux/dmapool.h> /* needed by ohci-mem.c when no PCI */
105 #include <asm/system.h>
106 #include <asm/unaligned.h>
107 #include <asm/byteorder.h>
110 #define DRIVER_VERSION "2004 Feb 02"
111 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
112 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
114 /*-------------------------------------------------------------------------*/
116 // #define OHCI_VERBOSE_DEBUG /* not always helpful */
118 /* For initializing controller (mask in an HCFS mode too) */
119 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
121 #define OHCI_UNLINK_TIMEOUT (HZ / 10)
123 /*-------------------------------------------------------------------------*/
125 static const char hcd_name [] = "ohci_hcd";
129 static inline void disable (struct ohci_hcd *ohci)
131 ohci->hcd.state = USB_STATE_HALT;
134 #include "ohci-hub.c"
135 #include "ohci-dbg.c"
136 #include "ohci-mem.c"
140 /* Some boards don't support per-port power switching */
141 static int power_switching = 0;
142 module_param (power_switching, bool, 0);
143 MODULE_PARM_DESC (power_switching, "true (not default) to switch port power");
145 /*-------------------------------------------------------------------------*/
148 * queue up an urb for anything except the root hub
150 static int ohci_urb_enqueue (
155 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
157 urb_priv_t *urb_priv;
158 unsigned int pipe = urb->pipe;
163 #ifdef OHCI_VERBOSE_DEBUG
164 urb_print (urb, "SUB", usb_pipein (pipe));
167 /* every endpoint has a ed, locate and maybe (re)initialize it */
168 if (! (ed = ed_get (ohci, urb->dev, pipe, urb->interval)))
171 /* for the private part of the URB we need the number of TDs (size) */
174 /* td_submit_urb() doesn't yet handle these */
175 if (urb->transfer_buffer_length > 4096)
178 /* 1 TD for setup, 1 for ACK, plus ... */
181 // case PIPE_INTERRUPT:
184 /* one TD for every 4096 Bytes (can be upto 8K) */
185 size += urb->transfer_buffer_length / 4096;
186 /* ... and for any remaining bytes ... */
187 if ((urb->transfer_buffer_length % 4096) != 0)
189 /* ... and maybe a zero length packet to wrap it up */
192 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
193 && (urb->transfer_buffer_length
194 % usb_maxpacket (urb->dev, pipe,
195 usb_pipeout (pipe))) == 0)
198 case PIPE_ISOCHRONOUS: /* number of packets from URB */
199 size = urb->number_of_packets;
203 /* allocate the private part of the URB */
204 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
208 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
210 /* fill the private part of the URB */
211 urb_priv->length = size;
214 /* allocate the TDs (deferring hash chain updates) */
215 for (i = 0; i < size; i++) {
216 urb_priv->td [i] = td_alloc (ohci, mem_flags);
217 if (!urb_priv->td [i]) {
218 urb_priv->length = i;
219 urb_free_priv (ohci, urb_priv);
224 spin_lock_irqsave (&ohci->lock, flags);
226 /* don't submit to a dead HC */
227 if (!HCD_IS_RUNNING(ohci->hcd.state)) {
232 /* in case of unlink-during-submit */
233 spin_lock (&urb->lock);
234 if (urb->status != -EINPROGRESS) {
235 spin_unlock (&urb->lock);
236 urb->hcpriv = urb_priv;
237 finish_urb (ohci, urb, 0);
242 /* schedule the ed if needed */
243 if (ed->state == ED_IDLE) {
244 retval = ed_schedule (ohci, ed);
247 if (ed->type == PIPE_ISOCHRONOUS) {
248 u16 frame = OHCI_FRAME_NO(ohci->hcca);
250 /* delay a few frames before the first TD */
251 frame += max_t (u16, 8, ed->interval);
252 frame &= ~(ed->interval - 1);
254 urb->start_frame = frame;
256 /* yes, only URB_ISO_ASAP is supported, and
257 * urb->start_frame is never used as input.
260 } else if (ed->type == PIPE_ISOCHRONOUS)
261 urb->start_frame = ed->last_iso + ed->interval;
263 /* fill the TDs and link them to the ed; and
264 * enable that part of the schedule, if needed
265 * and update count of queued periodic urbs
267 urb->hcpriv = urb_priv;
268 td_submit_urb (ohci, urb);
271 spin_unlock (&urb->lock);
274 urb_free_priv (ohci, urb_priv);
275 spin_unlock_irqrestore (&ohci->lock, flags);
280 * decouple the URB from the HC queues (TDs, urb_priv); it's
281 * already marked using urb->status. reporting is always done
282 * asynchronously, and we might be dealing with an urb that's
283 * partially transferred, or an ED with other urbs being unlinked.
285 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
287 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
290 #ifdef OHCI_VERBOSE_DEBUG
291 urb_print (urb, "UNLINK", 1);
294 spin_lock_irqsave (&ohci->lock, flags);
295 if (HCD_IS_RUNNING(ohci->hcd.state)) {
296 urb_priv_t *urb_priv;
298 /* Unless an IRQ completed the unlink while it was being
299 * handed to us, flag it for unlink and giveback, and force
300 * some upcoming INTR_SF to call finish_unlinks()
302 urb_priv = urb->hcpriv;
304 if (urb_priv->ed->state == ED_OPER)
305 start_ed_unlink (ohci, urb_priv->ed);
309 * with HC dead, we won't respect hc queue pointers
310 * any more ... just clean up every urb's memory.
313 finish_urb (ohci, urb, NULL);
315 spin_unlock_irqrestore (&ohci->lock, flags);
319 /*-------------------------------------------------------------------------*/
321 /* frees config/altsetting state for endpoints,
322 * including ED memory, dummy TD, and bulk/intr data toggle
326 ohci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep)
328 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
329 int epnum = ep & USB_ENDPOINT_NUMBER_MASK;
332 unsigned limit = 1000;
334 /* ASSERT: any requests/urbs are being unlinked */
335 /* ASSERT: nobody can be submitting urbs for this any more */
338 if (epnum != 0 && !(ep & USB_DIR_IN))
342 spin_lock_irqsave (&ohci->lock, flags);
343 ed = dev->ep [epnum];
347 if (!HCD_IS_RUNNING (ohci->hcd.state)) {
349 finish_unlinks (ohci, 0, 0);
353 case ED_UNLINK: /* wait for hw to finish? */
354 /* major IRQ delivery trouble loses INTR_SF too... */
355 WARN_ON (limit-- == 0);
356 spin_unlock_irqrestore (&ohci->lock, flags);
357 set_current_state (TASK_UNINTERRUPTIBLE);
358 schedule_timeout (1);
360 case ED_IDLE: /* fully unlinked */
361 if (list_empty (&ed->td_list)) {
362 td_free (ohci, ed->dummy);
366 /* else FALL THROUGH */
368 /* caller was supposed to have unlinked any requests;
369 * that's not our job. can't recover; must leak ed.
371 ohci_err (ohci, "leak ed %p (#%d) state %d%s\n",
372 ed, epnum, ed->state,
373 list_empty (&ed->td_list) ? "" : " (has tds)");
374 td_free (ohci, ed->dummy);
379 spin_unlock_irqrestore (&ohci->lock, flags);
383 static int ohci_get_frame (struct usb_hcd *hcd)
385 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
387 return OHCI_FRAME_NO(ohci->hcca);
390 /*-------------------------------------------------------------------------*
392 *-------------------------------------------------------------------------*/
394 /* reset the HC and BUS */
396 static int hc_reset (struct ohci_hcd *ohci)
400 /* SMM owns the HC? not for long!
401 * On PA-RISC, PDC can leave IR set incorrectly; ignore it there.
404 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
405 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
407 /* this timeout is arbitrary. we make it long, so systems
408 * depending on usb keyboards may be usable even if the
409 * BIOS/SMM code seems pretty broken.
411 temp = 500; /* arbitrary: five seconds */
413 writel (OHCI_INTR_OC, &ohci->regs->intrenable);
414 writel (OHCI_OCR, &ohci->regs->cmdstatus);
415 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
418 ohci_err (ohci, "USB HC TakeOver failed!\n");
425 /* Disable HC interrupts */
426 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
428 ohci_dbg (ohci, "reset, control = 0x%x\n",
429 readl (&ohci->regs->control));
431 /* Reset USB (needed by some controllers); RemoteWakeupConnected
432 * saved if boot firmware (BIOS/SMM/...) told us it's connected
434 ohci->hc_control = readl (&ohci->regs->control);
435 ohci->hc_control &= OHCI_CTRL_RWC; /* hcfs 0 = RESET */
436 writel (ohci->hc_control, &ohci->regs->control);
437 if (power_switching) {
438 unsigned ports = roothub_a (ohci) & RH_A_NDP;
440 /* power down each port */
441 for (temp = 0; temp < ports; temp++)
443 &ohci->regs->roothub.portstatus [temp]);
445 // flush those pci writes
446 (void) readl (&ohci->regs->control);
449 /* HC Reset requires max 10 us delay */
450 writel (OHCI_HCR, &ohci->regs->cmdstatus);
451 temp = 30; /* ... allow extra time */
452 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
454 ohci_err (ohci, "USB HC reset timed out!\n");
460 /* now we're in the SUSPEND state ... must go OPERATIONAL
461 * within 2msec else HC enters RESUME
463 * ... but some hardware won't init fmInterval "by the book"
464 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
465 * this if we write fmInterval after we're OPERATIONAL.
467 writel (ohci->hc_control, &ohci->regs->control);
468 // flush those pci writes
469 (void) readl (&ohci->regs->control);
474 /*-------------------------------------------------------------------------*/
476 #define FI 0x2edf /* 12000 bits per frame (-1) */
477 #define LSTHRESH 0x628 /* lowspeed bit threshold */
479 /* Start an OHCI controller, set the BUS operational
481 * connect the virtual root hub
483 static int hc_start (struct ohci_hcd *ohci)
486 struct usb_device *udev;
489 spin_lock_init (&ohci->lock);
492 /* Tell the controller where the control and bulk lists are
493 * The lists are empty now. */
494 writel (0, &ohci->regs->ed_controlhead);
495 writel (0, &ohci->regs->ed_bulkhead);
497 /* a reset clears this */
498 writel ((u32) ohci->hcca_dma, &ohci->regs->hcca);
500 /* force default fmInterval (we won't adjust it); init thresholds
501 * for last FS and LS packets, reserve 90% for periodic.
503 writel ((((6 * (FI - 210)) / 7) << 16) | FI, &ohci->regs->fminterval);
504 writel (((9 * FI) / 10) & 0x3fff, &ohci->regs->periodicstart);
505 writel (LSTHRESH, &ohci->regs->lsthresh);
507 /* some OHCI implementations are finicky about how they init.
508 * bogus values here mean not even enumeration could work.
510 if ((readl (&ohci->regs->fminterval) & 0x3fff0000) == 0
511 || !readl (&ohci->regs->periodicstart)) {
512 ohci_err (ohci, "init err\n");
516 /* start controller operations */
517 ohci->hc_control &= OHCI_CTRL_RWC;
518 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
519 writel (ohci->hc_control, &ohci->regs->control);
520 ohci->hcd.state = USB_STATE_RUNNING;
522 /* Choose the interrupts we care about now, others later on demand */
523 mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH;
524 writel (mask, &ohci->regs->intrstatus);
525 writel (mask, &ohci->regs->intrenable);
527 /* handle root hub init quirks ... */
528 tmp = roothub_a (ohci);
529 tmp &= ~(RH_A_PSM | RH_A_OCPM);
530 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
531 /* NSC 87560 and maybe others */
533 tmp &= ~(RH_A_POTPGT | RH_A_NPS);
534 } else if (power_switching) {
535 /* act like most external hubs: use per-port power
536 * switching and overcurrent reporting.
538 tmp &= ~(RH_A_NPS | RH_A_NOCP);
539 tmp |= RH_A_PSM | RH_A_OCPM;
541 /* hub power always on; required for AMD-756 and some
542 * Mac platforms. ganged overcurrent reporting, if any.
546 writel (tmp, &ohci->regs->roothub.a);
547 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
548 writel (power_switching ? RH_B_PPCM : 0, &ohci->regs->roothub.b);
549 // flush those pci writes
550 (void) readl (&ohci->regs->control);
552 // POTPGT delay is bits 24-31, in 2 ms units.
553 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
555 /* connect the virtual root hub */
556 bus = hcd_to_bus (&ohci->hcd);
557 bus->root_hub = udev = usb_alloc_dev (NULL, bus, 0);
558 ohci->hcd.state = USB_STATE_RUNNING;
561 ohci->hc_control &= ~OHCI_CTRL_HCFS;
562 writel (ohci->hc_control, &ohci->regs->control);
566 udev->speed = USB_SPEED_FULL;
567 if (hcd_register_root (&ohci->hcd) != 0) {
569 bus->root_hub = NULL;
571 ohci->hc_control &= ~OHCI_CTRL_HCFS;
572 writel (ohci->hc_control, &ohci->regs->control);
579 /*-------------------------------------------------------------------------*/
581 /* an interrupt happens */
583 static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
585 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
586 struct ohci_regs *regs = ohci->regs;
589 /* we can eliminate a (slow) readl() if _only_ WDH caused this irq */
590 if ((ohci->hcca->done_head != 0)
591 && ! (le32_to_cpup (&ohci->hcca->done_head) & 0x01)) {
592 ints = OHCI_INTR_WDH;
594 /* cardbus/... hardware gone before remove() */
595 } else if ((ints = readl (®s->intrstatus)) == ~(u32)0) {
597 ohci_dbg (ohci, "device removed!\n");
600 /* interrupt for some other device? */
601 } else if ((ints &= readl (®s->intrenable)) == 0) {
605 if (ints & OHCI_INTR_UE) {
607 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
608 // e.g. due to PCI Master/Target Abort
614 if (ints & OHCI_INTR_WDH) {
615 if (HCD_IS_RUNNING(hcd->state))
616 writel (OHCI_INTR_WDH, ®s->intrdisable);
617 dl_done_list (ohci, dl_reverse_done_list (ohci), ptregs);
618 if (HCD_IS_RUNNING(hcd->state))
619 writel (OHCI_INTR_WDH, ®s->intrenable);
622 /* could track INTR_SO to reduce available PCI/... bandwidth */
624 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
625 * when there's still unlinking to be done (next frame).
627 spin_lock (&ohci->lock);
628 if (ohci->ed_rm_list)
629 finish_unlinks (ohci, OHCI_FRAME_NO(ohci->hcca),
631 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
632 && HCD_IS_RUNNING(ohci->hcd.state))
633 writel (OHCI_INTR_SF, ®s->intrdisable);
634 spin_unlock (&ohci->lock);
636 if (HCD_IS_RUNNING(ohci->hcd.state)) {
637 writel (ints, ®s->intrstatus);
638 writel (OHCI_INTR_MIE, ®s->intrenable);
639 // flush those pci writes
640 (void) readl (&ohci->regs->control);
646 /*-------------------------------------------------------------------------*/
648 static void ohci_stop (struct usb_hcd *hcd)
650 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
652 ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
653 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
657 if (HCD_IS_RUNNING(ohci->hcd.state))
660 remove_debug_files (ohci);
661 ohci_mem_cleanup (ohci);
663 dma_free_coherent (ohci->hcd.self.controller,
665 ohci->hcca, ohci->hcca_dma);
671 /*-------------------------------------------------------------------------*/
673 // FIXME: this restart logic should be generic,
674 // and handle full hcd state cleanup
676 /* controller died; cleanup debris, then restart */
677 /* must not be called from interrupt context */
680 static int hc_restart (struct ohci_hcd *ohci)
686 if (hcd_to_bus (&ohci->hcd)->root_hub)
687 usb_disconnect (&hcd_to_bus (&ohci->hcd)->root_hub);
689 /* empty the interrupt branches */
690 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
691 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
693 /* no EDs to remove */
694 ohci->ed_rm_list = NULL;
696 /* empty control and bulk lists */
697 ohci->ed_controltail = NULL;
698 ohci->ed_bulktail = NULL;
700 if ((temp = hc_reset (ohci)) < 0 || (temp = hc_start (ohci)) < 0) {
701 ohci_err (ohci, "can't restart, %d\n", temp);
704 ohci_dbg (ohci, "restart complete\n");
709 /*-------------------------------------------------------------------------*/
711 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
713 MODULE_AUTHOR (DRIVER_AUTHOR);
714 MODULE_DESCRIPTION (DRIVER_INFO);
715 MODULE_LICENSE ("GPL");
718 #include "ohci-pci.c"
722 #include "ohci-sa1111.c"
725 #ifdef CONFIG_ARCH_OMAP
726 #include "ohci-omap.c"
729 #if !(defined(CONFIG_PCI) || defined(CONFIG_SA1111) || defined(CONFIG_ARCH_OMAP))
730 #error "missing bus glue for ohci-hcd"