ftp://ftp.kernel.org/pub/linux/kernel/v2.6/linux-2.6.6.tar.bz2
[linux-2.6.git] / drivers / usb / host / ohci-omap.c
1 /*
2  * OHCI HCD (Host Controller Driver) for USB.
3  *
4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5  * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6  * (C) Copyright 2002 Hewlett-Packard Company
7  * 
8  * OMAP Bus Glue
9  *
10  * Written by Christopher Hoover <ch@hpl.hp.com>
11  * Based on fragments of previous driver by Rusell King et al.
12  *
13  * Modified for OMAP from ohci-sa1111.c by Tony Lindgren <tony@atomide.com>
14  * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
15  *
16  * This file is licenced under the GPL.
17  */
18  
19 #include <asm/hardware.h>
20 #include <asm/mach-types.h>
21 #include <asm/io.h>
22
23 #include <asm/arch/bus.h>
24 #include <asm/arch/hardware.h>
25 #include <asm/arch/mux.h>
26 #include <asm/arch/irqs.h>
27
28 #include "ohci-omap.h"
29
30 #ifndef CONFIG_ARCH_OMAP
31 #error "This file is OMAP bus glue.  CONFIG_OMAP must be defined."
32 #endif
33
34 extern int usb_disabled(void);
35 extern int ocpi_enable(void);
36
37 /*
38  * Use the first port only by default. Override with hmc_mode option.
39  *
40  * NOTE: Many OMAP-1510 Innovators supposedly have bad wiring for the USB ports
41  *       1 & 2, so only port 0 will work. To use the OHCI on the first port, use 
42  *       the Innovator USB client cable with a client-to-client connector and modify
43  *       either the cable or the hub to feed 5V VBUS back to Innovator. VBUS should
44  *       be the red lead in the cable.
45  *
46  *       To mount USB hard disk as root, see the patch for do_mounts.c that tries 
47  *       remounting the root, and use root=0801 if your root is on sda1. Does not 
48  *       work with devfs.
49  */
50 static int default_hmc_mode = 16;
51 static int hmc_mode = 1234;
52
53 /*
54  * Set the USB host pin multiplexing and the selected HMC mode
55  */
56 static int omap_usb_set_hmc_mode(int hmc_mode)
57 {
58         unsigned int val;
59
60         switch (hmc_mode) {
61         case 0:
62                 /* 0: function, 1: disabled, 2: disabled */
63                 omap_cfg_reg(W4_USB_PUEN);
64                 omap_cfg_reg(R18_1510_USB_GPIO0);
65                 break;
66         case 4:
67                 /* 0: function 1: host 2: host */
68                 omap_cfg_reg(usb1_speed);
69                 omap_cfg_reg(usb1_susp);
70                 omap_cfg_reg(usb1_seo);
71                 omap_cfg_reg(usb1_txen);
72                 omap_cfg_reg(usb1_txd);
73                 omap_cfg_reg(usb1_vp);
74                 omap_cfg_reg(usb1_vm);
75                 omap_cfg_reg(usb1_rcv);
76                 omap_cfg_reg(usb2_susp);
77                 omap_cfg_reg(usb2_seo);
78                 omap_cfg_reg(usb2_txen);
79                 omap_cfg_reg(usb2_txd);
80                 omap_cfg_reg(usb2_vp);
81                 omap_cfg_reg(usb2_vm);
82                 omap_cfg_reg(usb2_rcv);
83                 break;
84         case 16:
85                 /* 0: host, 1: disabled, 2: disabled */
86                 omap_cfg_reg(W9_USB0_TXEN);
87                 omap_cfg_reg(AA9_USB0_VP);
88                 omap_cfg_reg(Y5_USB0_RCV);
89                 omap_cfg_reg(R9_USB0_VM);
90                 omap_cfg_reg(V6_USB0_TXD);
91                 omap_cfg_reg(W5_USB0_SE0);
92                 break;
93         default:
94                 printk("Unknown USB host configuration: %i\n", hmc_mode);
95                 return -ENODEV;
96         }
97
98         /* Write the selected HMC mode */
99         val = readl(MOD_CONF_CTRL_0) & ~HMC_CLEAR;
100         val |= (hmc_mode << 1);
101         writel(val, MOD_CONF_CTRL_0);
102
103         return 0;
104 }
105
106 /*
107  * OHCI clock initialization for OMAP-1510 and 1610
108  */
109 static int omap_ohci_clock_power(int on)
110 {
111         if (on) {
112                 if (cpu_is_omap_1510()) {
113                         /* Use DPLL, not APLL */
114                         writel(readl(ULPD_APLL_CTRL_REG) & ~APLL_NDPLL_SWITCH,
115                                ULPD_APLL_CTRL_REG);
116
117                         /* Enable DPLL */
118                         writel(readl(ULPD_DPLL_CTRL_REG) | DPLL_PLL_ENABLE,
119                                ULPD_DPLL_CTRL_REG);
120
121                         /* Software request for USB 48MHz clock */
122                         writel(readl(ULPD_SOFT_REQ_REG) | SOFT_REQ_REG_REQ,
123                                ULPD_SOFT_REQ_REG);
124
125                         while (!(readl(ULPD_DPLL_CTRL_REG) & DPLL_LOCK));
126                 }
127
128                 if (cpu_is_omap_1610()) {
129                         /* Enable OHCI */
130                         writel(readl(ULPD_SOFT_REQ_REG) | SOFT_USB_OTG_REQ,
131                                 ULPD_SOFT_REQ_REG);
132
133                         /* USB host clock request if not using OTG */
134                         writel(readl(ULPD_SOFT_REQ_REG) | SOFT_USB_REQ,
135                                 ULPD_SOFT_REQ_REG);
136
137                         writel(readl(ULPD_STATUS_REQ_REG) | USB_HOST_DPLL_REQ,
138                              ULPD_STATUS_REQ_REG);
139                 }
140
141                 /* Enable 48MHz clock to USB */
142                 writel(readl(ULPD_CLOCK_CTRL_REG) | USB_MCLK_EN,
143                        ULPD_CLOCK_CTRL_REG);
144
145                 writel(readl(ARM_IDLECT2) | (1 << EN_LBFREECK) | (1 << EN_LBCK),
146                        ARM_IDLECT2);
147
148                 writel(readl(MOD_CONF_CTRL_0) | USB_HOST_HHC_UHOST_EN,
149                        MOD_CONF_CTRL_0);
150         } else {
151                 /* Disable 48MHz clock to USB */
152                 writel(readl(ULPD_CLOCK_CTRL_REG) & ~USB_MCLK_EN,
153                        ULPD_CLOCK_CTRL_REG);
154
155                 /* FIXME: The DPLL stays on for now */
156         }
157
158         return 0;
159 }
160
161 /*
162  * Hardware specific transceiver power on/off
163  */
164 static int omap_ohci_transceiver_power(int on)
165 {
166         if (on) {
167                 if (omap_is_innovator())
168                         writel(readl(OMAP1510_FPGA_HOST_CTRL) | 0x20, 
169                                OMAP1510_FPGA_HOST_CTRL);
170         } else {
171                 if (omap_is_innovator())
172                         writel(readl(OMAP1510_FPGA_HOST_CTRL) & ~0x20, 
173                                OMAP1510_FPGA_HOST_CTRL);
174         }
175
176         return 0;
177 }
178
179 /*
180  * OMAP-1510 specific Local Bus clock on/off
181  */
182 static int omap_1510_local_bus_power(int on)
183 {
184         if (on) {
185                 writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
186                 udelay(200);
187         } else {
188                 writel(0, OMAP1510_LB_MMU_CTL);
189         }
190
191         return 0;
192 }
193
194 /*
195  * OMAP-1510 specific Local Bus initialization
196  * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
197  *       See also arch/mach-omap/memory.h for __virt_to_bus() and 
198  *       __bus_to_virt() which need to match with the physical 
199  *       Local Bus address below.
200  */
201 static int omap_1510_local_bus_init(void)
202 {
203         unsigned int tlb;
204         unsigned long lbaddr, physaddr;
205
206         writel((readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, 
207                OMAP1510_LB_CLOCK_DIV);
208
209         /* Configure the Local Bus MMU table */
210         for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
211                 lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
212                 physaddr = tlb * 0x00100000 + PHYS_OFFSET;
213                 writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
214                 writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, 
215                        OMAP1510_LB_MMU_CAM_L);
216                 writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
217                 writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
218                 writel(tlb << 4, OMAP1510_LB_MMU_LCK);
219                 writel(0x1, OMAP1510_LB_MMU_LD_TLB);
220         }
221
222         /* Enable the walking table */
223         writel(readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
224         udelay(200);
225
226         return 0;
227 }
228
229 /*
230  * OMAP-1610 specific hardware initialization
231  *
232  * Intended to configure OMAP-1610 USB host and OTG ports depending on 
233  * the HMC mode selected.
234  *
235  * FIXME: Currently only supports alternate ping group 2 mode, should
236  *        be easy to modify for other configurations once there is some
237  *        hardware to test with.
238  */
239 static int omap_1610_usb_init(int mode)
240 {
241         u_int val = 0;
242
243         /* Configure the OMAP transceiver settings */
244         val |= (1 << 8); /* CONF_USB2_UNI TRM p 15-205*/
245         val |= (4 << 4); /* TRM p 5-59, p 15-157 (1224) */
246
247         //val |= (1 << 3); /* Isolate integrated transceiver from port 0 */
248         val |= (1 << 2); /* Disable pulldown on integrated transceiver DM */
249         val |= (1 << 1); /* Disable pulldown on integraded transceiver DP */
250
251         writel(val, USB_TRANSCEIVER_CTRL);
252
253         /* Set the USB0_TRX_MODE */
254         val = 0;
255         val &= ~OTG_IDLE_EN;
256         val &= ~DEV_IDLE_EN;
257         val &= ~(7 << 16);      /* Clear USB0_TRX_MODE */
258         val |= (3 << 16);       /* 0 or 3, 6-wire DAT/SE0, TRM p 15-159 */
259         writel(val, OTG_SYSCON_1);
260
261         /* 
262          * Control via OTG, see TRM p 15-163
263          */
264         val = 0;
265         //val |= 1;             /* REVISIT: Enable OTG = 1 */
266
267         /* Control via OTG */
268         val &= ~HMC_PADEN;
269         val &= ~OTG_PADEN;
270         val |= UHOST_EN;        
271
272         val &= ~0x3f;           /* Clear HMC mode */
273         val |= mode;            /* Set HMC mode */
274         val &= ~(7 << 16);      /* Clear ASE0_BRST */
275         val |= (4 << 16);       /* Must be 4 */
276         val |= USBX_SYNCHRO;    /* Must be set */
277         val |= SRP_VBUS;
278         writel(val, OTG_SYSCON_2);
279
280         /* Enable OTG idle */
281         //writel(readl(OTG_SYSCON_1) | OTG_IDLE_EN, OTG_SYSCON_1);
282
283         return 0;
284 }
285
286 /*-------------------------------------------------------------------------*/
287
288 static void omap_start_hc(struct omap_dev *dev)
289 {
290         printk(KERN_DEBUG __FILE__ 
291                ": starting OMAP OHCI USB Controller\n");
292
293         /* 
294          * Set the HMC mode for the USB ports
295          */
296 #if 0
297         /* See note about the Innovator wiring above */
298         if (omap_is_innovator())
299                 hmc_mode = 4;   /* 0: function 1: host 2: host */
300 #endif
301
302         if (cpu_is_omap_1610())
303                 ocpi_enable();
304
305         omap_usb_set_hmc_mode(hmc_mode);
306
307         omap_ohci_clock_power(1);
308         omap_ohci_transceiver_power(1);
309
310         if (cpu_is_omap_1510()) {
311                 omap_1510_local_bus_power(1);
312                 omap_1510_local_bus_init();
313         }
314
315         if (cpu_is_omap_1610())
316                 omap_1610_usb_init(hmc_mode);
317
318         //omap_enable_device(dev);
319 }
320
321 static void omap_stop_hc(struct omap_dev *dev)
322 {
323         printk(KERN_DEBUG __FILE__ 
324                ": stopping OMAP OHCI USB Controller\n");
325
326         /*
327          * FIXME: Put the USB host controller into reset.
328          */
329
330         /*
331          * FIXME: Stop the USB clock.
332          */
333         //omap_disable_device(dev);
334
335 }
336
337
338 /*-------------------------------------------------------------------------*/
339
340 static irqreturn_t usb_hcd_omap_hcim_irq (int irq, void *__hcd, struct pt_regs * r)
341 {
342         struct usb_hcd *hcd = __hcd;
343
344         return usb_hcd_irq(irq, hcd, r);
345 }
346
347 /*-------------------------------------------------------------------------*/
348
349 void usb_hcd_omap_remove (struct usb_hcd *, struct omap_dev *);
350
351 /* configure so an HC device and id are always provided */
352 /* always called with process context; sleeping is OK */
353
354
355 /**
356  * usb_hcd_omap_probe - initialize OMAP-based HCDs
357  * Context: !in_interrupt()
358  *
359  * Allocates basic resources for this USB host controller, and
360  * then invokes the start() method for the HCD associated with it
361  * through the hotplug entry's driver_data.
362  *
363  * Store this function in the HCD's struct pci_driver as probe().
364  */
365 int usb_hcd_omap_probe (const struct hc_driver *driver,
366                           struct usb_hcd **hcd_out,
367                           struct omap_dev *dev)
368 {
369         int retval;
370         struct usb_hcd *hcd = 0;
371
372         if (!request_mem_region(dev->res.start, 
373                                 dev->res.end - dev->res.start + 1, hcd_name)) {
374                 dbg("request_mem_region failed");
375                 return -EBUSY;
376         }
377
378         omap_start_hc(dev);
379
380         hcd = driver->hcd_alloc ();
381         if (hcd == NULL){
382                 dbg ("hcd_alloc failed");
383                 retval = -ENOMEM;
384                 goto err1;
385         }
386
387         hcd->driver = (struct hc_driver *) driver;
388         hcd->description = driver->description;
389         hcd->irq = dev->irq[0];
390         hcd->regs = dev->mapbase;
391         hcd->self.controller = &dev->dev;
392
393         retval = hcd_buffer_create (hcd);
394         if (retval != 0) {
395                 dbg ("pool alloc fail");
396                 goto err1;
397         }
398
399         retval = request_irq (hcd->irq, 
400                               usb_hcd_omap_hcim_irq, 
401                               SA_INTERRUPT, hcd->description, hcd);
402         if (retval != 0) {
403                 dbg("request_irq failed");
404                 retval = -EBUSY;
405                 goto err2;
406         }
407
408         info ("%s (OMAP) at 0x%p, irq %d\n",
409               hcd->description, hcd->regs, hcd->irq);
410
411         usb_bus_init (&hcd->self);
412         hcd->self.op = &usb_hcd_operations;
413         hcd->self.hcpriv = (void *) hcd;
414         hcd->self.bus_name = "omap";
415         hcd->product_desc = "OMAP OHCI";
416
417         INIT_LIST_HEAD (&hcd->dev_list);
418         usb_register_bus (&hcd->self);
419
420         if ((retval = driver->start (hcd)) < 0) 
421         {
422                 usb_hcd_omap_remove(hcd, dev);
423                 return retval;
424         }
425
426         *hcd_out = hcd;
427         return 0;
428
429  err2:
430         hcd_buffer_destroy (hcd);
431         if (hcd)
432                 driver->hcd_free(hcd);
433  err1:
434         omap_stop_hc(dev);
435
436         release_mem_region(dev->res.start, dev->res.end - dev->res.start + 1);
437
438         return retval;
439 }
440
441
442 /* may be called without controller electrically present */
443 /* may be called with controller, bus, and devices active */
444
445 /**
446  * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs
447  * @dev: USB Host Controller being removed
448  * Context: !in_interrupt()
449  *
450  * Reverses the effect of usb_hcd_omap_probe(), first invoking
451  * the HCD's stop() method.  It is always called from a thread
452  * context, normally "rmmod", "apmd", or something similar.
453  *
454  */
455 void usb_hcd_omap_remove (struct usb_hcd *hcd, struct omap_dev *dev)
456 {
457         struct usb_device       *hub;
458         void *base;
459
460         info ("remove: %s, state %x", hcd->self.bus_name, hcd->state);
461
462         if (in_interrupt ())
463                 BUG ();
464
465         hub = hcd->self.root_hub;
466         hcd->state = USB_STATE_QUIESCING;
467
468         dbg ("%s: roothub graceful disconnect", hcd->self.bus_name);
469         usb_disconnect (&hub);
470
471         hcd->driver->stop (hcd);
472         hcd_buffer_destroy (hcd);
473         hcd->state = USB_STATE_HALT;
474
475         free_irq (hcd->irq, hcd);
476
477         usb_deregister_bus (&hcd->self);
478
479         base = hcd->regs;
480         hcd->driver->hcd_free (hcd);
481
482         omap_stop_hc(dev);
483
484         release_mem_region(dev->res.start, dev->res.end - dev->res.start + 1);
485 }
486
487 /*-------------------------------------------------------------------------*/
488
489 static int __devinit
490 ohci_omap_start (struct usb_hcd *hcd)
491 {
492         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
493         int             ret;
494
495         ohci->hcca = dma_alloc_consistent (hcd->self.controller,
496                         sizeof *ohci->hcca, &ohci->hcca_dma);
497         if (!ohci->hcca)
498                 return -ENOMEM;
499
500         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
501         if ((ret = ohci_mem_init (ohci)) < 0) {
502                 ohci_stop (hcd);
503                 return ret;
504         }
505         ohci->regs = hcd->regs;
506         if (hc_reset (ohci) < 0) {
507                 ohci_stop (hcd);
508                 return -ENODEV;
509         }
510
511         if (hc_start (ohci) < 0) {
512                 err ("can't start %s", ohci->hcd.self.bus_name);
513                 ohci_stop (hcd);
514                 return -EBUSY;
515         }
516         create_debug_files (ohci);
517
518 #ifdef  DEBUG
519         ohci_dump (ohci, 1);
520 #endif
521         return 0;
522 }
523
524 /*-------------------------------------------------------------------------*/
525
526 static const struct hc_driver ohci_omap_hc_driver = {
527         .description =          hcd_name,
528
529         /*
530          * generic hardware linkage
531          */
532         .irq =                  ohci_irq,
533         .flags =                HCD_USB11,
534
535         /*
536          * basic lifecycle operations
537          */
538         .start =                ohci_omap_start,
539 #ifdef  CONFIG_PM
540         /* suspend:             ohci_omap_suspend,  -- tbd */
541         /* resume:              ohci_omap_resume,   -- tbd */
542 #endif
543         .stop =                 ohci_stop,
544
545         /*
546          * memory lifecycle (except per-request)
547          */
548         .hcd_alloc =            ohci_hcd_alloc,
549         .hcd_free =             ohci_hcd_free,
550
551         /*
552          * managing i/o requests and associated device resources
553          */
554         .urb_enqueue =          ohci_urb_enqueue,
555         .urb_dequeue =          ohci_urb_dequeue,
556         .endpoint_disable =     ohci_endpoint_disable,
557
558         /*
559          * scheduling support
560          */
561         .get_frame_number =     ohci_get_frame,
562
563         /*
564          * root hub support
565          */
566         .hub_status_data =      ohci_hub_status_data,
567         .hub_control =          ohci_hub_control,
568 };
569
570 /*-------------------------------------------------------------------------*/
571
572 static int ohci_hcd_omap_drv_probe(struct omap_dev *dev)
573 {
574         struct usb_hcd *hcd = NULL;
575         int ret;
576
577         if (usb_disabled())
578                 return -ENODEV;
579
580         ret = usb_hcd_omap_probe(&ohci_omap_hc_driver, &hcd, dev);
581
582         if (ret == 0)
583                 omap_set_drvdata(dev, hcd);
584
585         return ret;
586 }
587
588 static int ohci_hcd_omap_drv_remove(struct omap_dev *dev)
589 {
590         struct usb_hcd *hcd = omap_get_drvdata(dev);
591
592         usb_hcd_omap_remove(hcd, dev);
593
594         omap_set_drvdata(dev, NULL);
595
596         return 0;
597 }
598
599 /*
600  * Driver definition to register with the OMAP bus
601  */
602 static struct omap_driver ohci_hcd_omap_driver = {
603         .drv = {
604                 .name   = OMAP_OHCI_NAME,
605         },
606         .devid          = OMAP_OCP_DEVID_USB,
607         .busid          = OMAP_BUS_OCP,
608         .clocks         = 0,
609         .probe          = ohci_hcd_omap_drv_probe,
610         .remove         = ohci_hcd_omap_drv_remove,
611 };
612
613 /* Any dma_mask must be set for OHCI to work */
614 static u64 omap_dmamask = 0xffffffffUL; 
615
616 /*
617  * Device definition to match the driver above
618  */
619 static struct omap_dev ohci_hcd_omap_device = {
620         .name           = OMAP_OHCI_NAME,
621         .devid          = OMAP_OCP_DEVID_USB,
622         .busid          = OMAP_BUS_OCP,
623         .mapbase        = (void *)OMAP_OHCI_BASE,
624         .dma_mask       = &omap_dmamask,        /* Needed only for OHCI */
625         .res = {
626                 .start  = OMAP_OHCI_BASE,
627                 .end    = OMAP_OHCI_BASE + OMAP_OHCI_SIZE,
628         },
629         .irq = {
630                 INT_USB_HHC_1,
631         },
632 };
633
634 static int __init ohci_hcd_omap_init (void)
635 {
636         int ret;
637
638         dbg (DRIVER_INFO " (OMAP)");
639         dbg ("block sizes: ed %d td %d\n",
640                 sizeof (struct ed), sizeof (struct td));
641
642         if (hmc_mode < 0 || hmc_mode > 25)
643                 hmc_mode = default_hmc_mode;
644
645         /* Register the driver with OMAP bus */
646         ret = omap_driver_register(&ohci_hcd_omap_driver);
647         if (ret != 0)
648                 return -ENODEV;
649
650         /* Register the device with OMAP bus */
651         ret = omap_device_register(&ohci_hcd_omap_device);
652         if (ret != 0) {
653                 omap_driver_unregister(&ohci_hcd_omap_driver);
654                 return -ENODEV;
655         }
656
657         return ret;
658 }
659
660 MODULE_PARM(hmc_mode, "hmc_mode");
661
662 static void __exit ohci_hcd_omap_cleanup (void)
663 {
664         omap_device_unregister(&ohci_hcd_omap_device);
665         omap_driver_unregister(&ohci_hcd_omap_driver);
666 }
667
668 module_init (ohci_hcd_omap_init);
669 module_exit (ohci_hcd_omap_cleanup);