drivers/usb/host/ohci-pci.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  * PCI Bus Glue
  13  *
  14  * This file is licenced under the GPL.
  15  */
  16
  17 #ifdef CONFIG_PMAC_PBOOK
  18 #include <asm/machdep.h>
  19 #include <asm/pmac_feature.h>
  20 #include <asm/pci-bridge.h>
  21 #include <asm/prom.h>
  22 #ifndef CONFIG_PM
  23 #       define CONFIG_PM
  24 #endif
  25 #endif
  26
  27 #ifndef CONFIG_PCI
  28 #error "This file is PCI bus glue.  CONFIG_PCI must be defined."
  29 #endif
  30
  31 /*-------------------------------------------------------------------------*/
  32
  33 static int
  34 ohci_pci_reset (struct usb_hcd *hcd)
  35 {
  36         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  37
  38         ohci->regs = hcd->regs;
  39         return hc_reset (ohci);
  40 }
  41
  42 static int __devinit
  43 ohci_pci_start (struct usb_hcd *hcd)
  44 {
  45         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  46         int             ret;
  47
  48         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
  49                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
  50         if (!ohci->hcca)
  51                 return -ENOMEM;
  52
  53         if(hcd->self.controller && hcd->self.controller->bus == &pci_bus_type) {
  54                 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  55
  56                 /* AMD 756, for most chips (early revs), corrupts register
  57                  * values on read ... so enable the vendor workaround.
  58                  */
  59                 if (pdev->vendor == PCI_VENDOR_ID_AMD
  60                                 && pdev->device == 0x740c) {
  61                         ohci->flags = OHCI_QUIRK_AMD756;
  62                         ohci_info (ohci, "AMD756 erratum 4 workaround\n");
  63                 }
  64
  65                 /* FIXME for some of the early AMD 760 southbridges, OHCI
  66                  * won't work at all.  blacklist them.
  67                  */
  68
  69                 /* Apple's OHCI driver has a lot of bizarre workarounds
  70                  * for this chip.  Evidently control and bulk lists
  71                  * can get confused.  (B&W G3 models, and ...)
  72                  */
  73                 else if (pdev->vendor == PCI_VENDOR_ID_OPTI
  74                                 && pdev->device == 0xc861) {
  75                         ohci_info (ohci,
  76                                 "WARNING: OPTi workarounds unavailable\n");
  77                 }
  78
  79                 /* Check for NSC87560. We have to look at the bridge (fn1) to
  80                  * identify the USB (fn2). This quirk might apply to more or
  81                  * even all NSC stuff.
  82                  */
  83                 else if (pdev->vendor == PCI_VENDOR_ID_NS) {
  84                         struct pci_dev  *b;
  85
  86                         b  = pci_find_slot (pdev->bus->number,
  87                                         PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
  88                         if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
  89                                         && b->vendor == PCI_VENDOR_ID_NS) {
  90                                 ohci->flags |= OHCI_QUIRK_SUPERIO;
  91                                 ohci_info (ohci, "Using NSC SuperIO setup\n");
  92                         }
  93                 }
  94
  95         }
  96
  97         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
  98         if ((ret = ohci_mem_init (ohci)) < 0) {
  99                 ohci_stop (hcd);
 100                 return ret;
 101         }
 102
 103         if (hc_start (ohci) < 0) {
 104                 ohci_err (ohci, "can't start\n");
 105                 ohci_stop (hcd);
 106                 return -EBUSY;
 107         }
 108         create_debug_files (ohci);
 109
 110 #ifdef  DEBUG
 111         ohci_dump (ohci, 1);
 112 #endif
 113         return 0;
 114 }
 115
 116 #ifdef  CONFIG_PM
 117
 118 static int ohci_pci_suspend (struct usb_hcd *hcd, u32 state)
 119 {
 120         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 121         u16                     cmd;
 122         u32                     tmp;
 123
 124         if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER) {
 125                 ohci_dbg (ohci, "can't suspend (state is %s)\n",
 126                         hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS));
 127                 return -EIO;
 128         }
 129
 130         /* act as if usb suspend can always be used */
 131         ohci_dbg (ohci, "suspend to %d\n", state);
 132
 133         /* First stop processing */
 134         spin_lock_irq (&ohci->lock);
 135         ohci->hc_control &=
 136                 ~(OHCI_CTRL_PLE|OHCI_CTRL_CLE|OHCI_CTRL_BLE|OHCI_CTRL_IE);
 137         writel (ohci->hc_control, &ohci->regs->control);
 138         writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
 139         (void) readl (&ohci->regs->intrstatus);
 140         spin_unlock_irq (&ohci->lock);
 141
 142         /* Wait a frame or two */
 143         mdelay (1);
 144         if (!readl (&ohci->regs->intrstatus) & OHCI_INTR_SF)
 145                 mdelay (1);
 146
 147 #ifdef CONFIG_PMAC_PBOOK
 148         if (_machine == _MACH_Pmac)
 149                 disable_irq ((to_pci_dev(hcd->self.controller))->irq);
 150         /* else, 2.4 assumes shared irqs -- don't disable */
 151 #endif
 152
 153         /* Enable remote wakeup */
 154         writel (readl (&ohci->regs->intrenable) | OHCI_INTR_RD,
 155                 &ohci->regs->intrenable);
 156
 157         /* Suspend chip and let things settle down a bit */
 158         spin_lock_irq (&ohci->lock);
 159         ohci->hc_control = OHCI_USB_SUSPEND;
 160         writel (ohci->hc_control, &ohci->regs->control);
 161         (void) readl (&ohci->regs->control);
 162         spin_unlock_irq (&ohci->lock);
 163
 164         set_current_state (TASK_UNINTERRUPTIBLE);
 165         schedule_timeout (HZ/2);
 166
 167         tmp = readl (&ohci->regs->control) | OHCI_CTRL_HCFS;
 168         switch (tmp) {
 169                 case OHCI_USB_RESET:
 170                 case OHCI_USB_RESUME:
 171                 case OHCI_USB_OPER:
 172                         ohci_err (ohci, "can't suspend; hcfs %d\n", tmp);
 173                         break;
 174                 case OHCI_USB_SUSPEND:
 175                         ohci_dbg (ohci, "suspended\n");
 176                         break;
 177         }
 178
 179         /* In some rare situations, Apple's OHCI have happily trashed
 180          * memory during sleep. We disable its bus master bit during
 181          * suspend
 182          */
 183         pci_read_config_word (to_pci_dev(hcd->self.controller), PCI_COMMAND,
 184                                 &cmd);
 185         cmd &= ~PCI_COMMAND_MASTER;
 186         pci_write_config_word (to_pci_dev(hcd->self.controller), PCI_COMMAND,
 187                                 cmd);
 188 #ifdef CONFIG_PMAC_PBOOK
 189         {
 190                 struct device_node      *of_node;
 191
 192                 /* Disable USB PAD & cell clock */
 193                 of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller));
 194                 if (of_node)
 195                         pmac_call_feature(PMAC_FTR_USB_ENABLE, of_node, 0, 0);
 196         }
 197 #endif
 198         return 0;
 199 }
 200
 201
 202 static int ohci_pci_resume (struct usb_hcd *hcd)
 203 {
 204         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 205         int                     temp;
 206         int                     retval = 0;
 207
 208 #ifdef CONFIG_PMAC_PBOOK
 209         {
 210                 struct device_node *of_node;
 211
 212                 /* Re-enable USB PAD & cell clock */
 213                 of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller));
 214                 if (of_node)
 215                         pmac_call_feature (PMAC_FTR_USB_ENABLE, of_node, 0, 1);
 216         }
 217 #endif
 218         /* did we suspend, or were we powered off? */
 219         ohci->hc_control = readl (&ohci->regs->control);
 220         temp = ohci->hc_control & OHCI_CTRL_HCFS;
 221
 222 #ifdef DEBUG
 223         /* the registers may look crazy here */
 224         ohci_dump_status (ohci, 0, 0);
 225 #endif
 226
 227         /* Re-enable bus mastering */
 228         pci_set_master (to_pci_dev(ohci->hcd.self.controller));
 229
 230         switch (temp) {
 231
 232         case OHCI_USB_RESET:    // lost power
 233 restart:
 234                 ohci_info (ohci, "USB restart\n");
 235                 retval = hc_restart (ohci);
 236                 break;
 237
 238         case OHCI_USB_SUSPEND:  // host wakeup
 239         case OHCI_USB_RESUME:   // remote wakeup
 240                 ohci_info (ohci, "USB continue from %s wakeup\n",
 241                          (temp == OHCI_USB_SUSPEND)
 242                                 ? "host" : "remote");
 243
 244                 /* we "should" only need RESUME if we're SUSPENDed ... */
 245                 ohci->hc_control = OHCI_USB_RESUME;
 246                 writel (ohci->hc_control, &ohci->regs->control);
 247                 (void) readl (&ohci->regs->control);
 248                 /* Some controllers (lucent) need extra-long delays */
 249                 mdelay (35); /* no schedule here ! */
 250
 251                 temp = readl (&ohci->regs->control);
 252                 temp = ohci->hc_control & OHCI_CTRL_HCFS;
 253                 if (temp != OHCI_USB_RESUME) {
 254                         ohci_err (ohci, "controller won't resume\n");
 255                         /* maybe we can reset */
 256                         goto restart;
 257                 }
 258
 259                 /* Then re-enable operations */
 260                 writel (OHCI_USB_OPER, &ohci->regs->control);
 261                 (void) readl (&ohci->regs->control);
 262                 mdelay (3);
 263
 264                 spin_lock_irq (&ohci->lock);
 265                 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
 266                 if (!ohci->ed_rm_list) {
 267                         if (ohci->ed_controltail)
 268                                 ohci->hc_control |= OHCI_CTRL_CLE;
 269                         if (ohci->ed_bulktail)
 270                                 ohci->hc_control |= OHCI_CTRL_BLE;
 271                 }
 272                 if (hcd_to_bus (&ohci->hcd)->bandwidth_isoc_reqs
 273                                 || hcd_to_bus (&ohci->hcd)->bandwidth_int_reqs)
 274                         ohci->hc_control |= OHCI_CTRL_PLE|OHCI_CTRL_IE;
 275                 hcd->state = USB_STATE_RUNNING;
 276                 writel (ohci->hc_control, &ohci->regs->control);
 277
 278                 /* trigger a start-frame interrupt (why?) */
 279                 writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
 280                 writel (OHCI_INTR_SF, &ohci->regs->intrenable);
 281
 282                 writel (OHCI_INTR_WDH, &ohci->regs->intrdisable);
 283                 (void) readl (&ohci->regs->intrdisable);
 284                 spin_unlock_irq (&ohci->lock);
 285
 286 #ifdef CONFIG_PMAC_PBOOK
 287                 if (_machine == _MACH_Pmac)
 288                         enable_irq (to_pci_dev(hcd->self.controller)->irq);
 289 #endif
 290
 291                 /* Check for a pending done list */
 292                 if (ohci->hcca->done_head)
 293                         dl_done_list (ohci, dl_reverse_done_list (ohci), NULL);
 294                 writel (OHCI_INTR_WDH, &ohci->regs->intrenable);
 295
 296                 /* assume there are TDs on the bulk and control lists */
 297                 writel (OHCI_BLF | OHCI_CLF, &ohci->regs->cmdstatus);
 298                 break;
 299
 300         default:
 301                 ohci_warn (ohci, "odd PCI resume\n");
 302         }
 303         return retval;
 304 }
 305
 306 #endif  /* CONFIG_PM */
 307
 308
 309 /*-------------------------------------------------------------------------*/
 310
 311 static const struct hc_driver ohci_pci_hc_driver = {
 312         .description =          hcd_name,
 313
 314         /*
 315          * generic hardware linkage
 316          */
 317         .irq =                  ohci_irq,
 318         .flags =                HCD_MEMORY | HCD_USB11,
 319
 320         /*
 321          * basic lifecycle operations
 322          */
 323         .reset =                ohci_pci_reset,
 324         .start =                ohci_pci_start,
 325 #ifdef  CONFIG_PM
 326         .suspend =              ohci_pci_suspend,
 327         .resume =               ohci_pci_resume,
 328 #endif
 329         .stop =                 ohci_stop,
 330
 331         /*
 332          * memory lifecycle (except per-request)
 333          */
 334         .hcd_alloc =            ohci_hcd_alloc,
 335         .hcd_free =             ohci_hcd_free,
 336
 337         /*
 338          * managing i/o requests and associated device resources
 339          */
 340         .urb_enqueue =          ohci_urb_enqueue,
 341         .urb_dequeue =          ohci_urb_dequeue,
 342         .endpoint_disable =     ohci_endpoint_disable,
 343
 344         /*
 345          * scheduling support
 346          */
 347         .get_frame_number =     ohci_get_frame,
 348
 349         /*
 350          * root hub support
 351          */
 352         .hub_status_data =      ohci_hub_status_data,
 353         .hub_control =          ohci_hub_control,
 354 };
 355
 356 /*-------------------------------------------------------------------------*/
 357
 358
 359 static const struct pci_device_id pci_ids [] = { {
 360         /* handle any USB OHCI controller */
 361         PCI_DEVICE_CLASS((PCI_CLASS_SERIAL_USB << 8) | 0x10, ~0),
 362         .driver_data =  (unsigned long) &ohci_pci_hc_driver,
 363         }, { /* end: all zeroes */ }
 364 };
 365 MODULE_DEVICE_TABLE (pci, pci_ids);
 366
 367 /* pci driver glue; this is a "new style" PCI driver module */
 368 static struct pci_driver ohci_pci_driver = {
 369         .name =         (char *) hcd_name,
 370         .id_table =     pci_ids,
 371
 372         .probe =        usb_hcd_pci_probe,
 373         .remove =       usb_hcd_pci_remove,
 374
 375 #ifdef  CONFIG_PM
 376         .suspend =      usb_hcd_pci_suspend,
 377         .resume =       usb_hcd_pci_resume,
 378 #endif
 379 };
 380
 381
 382 static int __init ohci_hcd_pci_init (void)
 383 {
 384         printk (KERN_DEBUG "%s: " DRIVER_INFO " (PCI)\n", hcd_name);
 385         if (usb_disabled())
 386                 return -ENODEV;
 387
 388         printk (KERN_DEBUG "%s: block sizes: ed %Zd td %Zd\n", hcd_name,
 389                 sizeof (struct ed), sizeof (struct td));
 390         return pci_module_init (&ohci_pci_driver);
 391 }
 392 module_init (ohci_hcd_pci_init);
 393
 394 /*-------------------------------------------------------------------------*/
 395
 396 static void __exit ohci_hcd_pci_cleanup (void)
 397 {
 398         pci_unregister_driver (&ohci_pci_driver);
 399 }
 400 module_exit (ohci_hcd_pci_cleanup);