drivers/video/cg14.c

   1 /* cg14.c: CGFOURTEEN frame buffer driver
   2  *
   3  * Copyright (C) 2003 David S. Miller (davem@redhat.com)
   4  * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
   5  * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
   6  *
   7  * Driver layout based loosely on tgafb.c, see that file for credits.
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/kernel.h>
  12 #include <linux/errno.h>
  13 #include <linux/string.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/init.h>
  17 #include <linux/fb.h>
  18 #include <linux/mm.h>
  19
  20 #include <asm/io.h>
  21 #include <asm/sbus.h>
  22 #include <asm/oplib.h>
  23 #include <asm/fbio.h>
  24
  25 #include "sbuslib.h"
  26
  27 /*
  28  * Local functions.
  29  */
  30
  31 static int cg14_setcolreg(unsigned, unsigned, unsigned, unsigned,
  32                          unsigned, struct fb_info *);
  33
  34 static int cg14_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
  35 static int cg14_ioctl(struct inode *, struct file *, unsigned int,
  36                       unsigned long, struct fb_info *);
  37 static int cg14_pan_display(struct fb_var_screeninfo *, struct fb_info *);
  38
  39 /*
  40  *  Frame buffer operations
  41  */
  42
  43 static struct fb_ops cg14_ops = {
  44         .owner                  = THIS_MODULE,
  45         .fb_setcolreg           = cg14_setcolreg,
  46         .fb_pan_display         = cg14_pan_display,
  47         .fb_fillrect            = cfb_fillrect,
  48         .fb_copyarea            = cfb_copyarea,
  49         .fb_imageblit           = cfb_imageblit,
  50         .fb_mmap                = cg14_mmap,
  51         .fb_ioctl               = cg14_ioctl,
  52         .fb_cursor              = soft_cursor,
  53 };
  54
  55 #define CG14_MCR_INTENABLE_SHIFT        7
  56 #define CG14_MCR_INTENABLE_MASK         0x80
  57 #define CG14_MCR_VIDENABLE_SHIFT        6
  58 #define CG14_MCR_VIDENABLE_MASK         0x40
  59 #define CG14_MCR_PIXMODE_SHIFT          4
  60 #define CG14_MCR_PIXMODE_MASK           0x30
  61 #define CG14_MCR_TMR_SHIFT              2
  62 #define CG14_MCR_TMR_MASK               0x0c
  63 #define CG14_MCR_TMENABLE_SHIFT         1
  64 #define CG14_MCR_TMENABLE_MASK          0x02
  65 #define CG14_MCR_RESET_SHIFT            0
  66 #define CG14_MCR_RESET_MASK             0x01
  67 #define CG14_REV_REVISION_SHIFT         4
  68 #define CG14_REV_REVISION_MASK          0xf0
  69 #define CG14_REV_IMPL_SHIFT             0
  70 #define CG14_REV_IMPL_MASK              0x0f
  71 #define CG14_VBR_FRAMEBASE_SHIFT        12
  72 #define CG14_VBR_FRAMEBASE_MASK         0x00fff000
  73 #define CG14_VMCR1_SETUP_SHIFT          0
  74 #define CG14_VMCR1_SETUP_MASK           0x000001ff
  75 #define CG14_VMCR1_VCONFIG_SHIFT        9
  76 #define CG14_VMCR1_VCONFIG_MASK         0x00000e00
  77 #define CG14_VMCR2_REFRESH_SHIFT        0
  78 #define CG14_VMCR2_REFRESH_MASK         0x00000001
  79 #define CG14_VMCR2_TESTROWCNT_SHIFT     1
  80 #define CG14_VMCR2_TESTROWCNT_MASK      0x00000002
  81 #define CG14_VMCR2_FBCONFIG_SHIFT       2
  82 #define CG14_VMCR2_FBCONFIG_MASK        0x0000000c
  83 #define CG14_VCR_REFRESHREQ_SHIFT       0
  84 #define CG14_VCR_REFRESHREQ_MASK        0x000003ff
  85 #define CG14_VCR1_REFRESHENA_SHIFT      10
  86 #define CG14_VCR1_REFRESHENA_MASK       0x00000400
  87 #define CG14_VCA_CAD_SHIFT              0
  88 #define CG14_VCA_CAD_MASK               0x000003ff
  89 #define CG14_VCA_VERS_SHIFT             10
  90 #define CG14_VCA_VERS_MASK              0x00000c00
  91 #define CG14_VCA_RAMSPEED_SHIFT         12
  92 #define CG14_VCA_RAMSPEED_MASK          0x00001000
  93 #define CG14_VCA_8MB_SHIFT              13
  94 #define CG14_VCA_8MB_MASK               0x00002000
  95
  96 #define CG14_MCR_PIXMODE_8              0
  97 #define CG14_MCR_PIXMODE_16             2
  98 #define CG14_MCR_PIXMODE_32             3
  99
 100 struct cg14_regs{
 101         volatile u8 mcr;        /* Master Control Reg */
 102         volatile u8 ppr;        /* Packed Pixel Reg */
 103         volatile u8 tms[2];     /* Test Mode Status Regs */
 104         volatile u8 msr;        /* Master Status Reg */
 105         volatile u8 fsr;        /* Fault Status Reg */
 106         volatile u8 rev;        /* Revision & Impl */
 107         volatile u8 ccr;        /* Clock Control Reg */
 108         volatile u32 tmr;       /* Test Mode Read Back */
 109         volatile u8 mod;        /* Monitor Operation Data Reg */
 110         volatile u8 acr;        /* Aux Control */
 111         u8 xxx0[6];
 112         volatile u16 hct;       /* Hor Counter */
 113         volatile u16 vct;       /* Vert Counter */
 114         volatile u16 hbs;       /* Hor Blank Start */
 115         volatile u16 hbc;       /* Hor Blank Clear */
 116         volatile u16 hss;       /* Hor Sync Start */
 117         volatile u16 hsc;       /* Hor Sync Clear */
 118         volatile u16 csc;       /* Composite Sync Clear */
 119         volatile u16 vbs;       /* Vert Blank Start */
 120         volatile u16 vbc;       /* Vert Blank Clear */
 121         volatile u16 vss;       /* Vert Sync Start */
 122         volatile u16 vsc;       /* Vert Sync Clear */
 123         volatile u16 xcs;
 124         volatile u16 xcc;
 125         volatile u16 fsa;       /* Fault Status Address */
 126         volatile u16 adr;       /* Address Registers */
 127         u8 xxx1[0xce];
 128         volatile u8 pcg[0x100]; /* Pixel Clock Generator */
 129         volatile u32 vbr;       /* Frame Base Row */
 130         volatile u32 vmcr;      /* VBC Master Control */
 131         volatile u32 vcr;       /* VBC refresh */
 132         volatile u32 vca;       /* VBC Config */
 133 };
 134
 135 #define CG14_CCR_ENABLE 0x04
 136 #define CG14_CCR_SELECT 0x02    /* HW/Full screen */
 137
 138 struct cg14_cursor {
 139         volatile u32 cpl0[32];  /* Enable plane 0 */
 140         volatile u32 cpl1[32];  /* Color selection plane */
 141         volatile u8 ccr;        /* Cursor Control Reg */
 142         u8 xxx0[3];
 143         volatile u16 cursx;     /* Cursor x,y position */
 144         volatile u16 cursy;     /* Cursor x,y position */
 145         volatile u32 color0;
 146         volatile u32 color1;
 147         u32 xxx1[0x1bc];
 148         volatile u32 cpl0i[32]; /* Enable plane 0 autoinc */
 149         volatile u32 cpl1i[32]; /* Color selection autoinc */
 150 };
 151
 152 struct cg14_dac {
 153         volatile u8 addr;       /* Address Register */
 154         u8 xxx0[255];
 155         volatile u8 glut;       /* Gamma table */
 156         u8 xxx1[255];
 157         volatile u8 select;     /* Register Select */
 158         u8 xxx2[255];
 159         volatile u8 mode;       /* Mode Register */
 160 };
 161
 162 struct cg14_xlut{
 163         volatile u8 x_xlut [256];
 164         volatile u8 x_xlutd [256];
 165         u8 xxx0[0x600];
 166         volatile u8 x_xlut_inc [256];
 167         volatile u8 x_xlutd_inc [256];
 168 };
 169
 170 /* Color look up table (clut) */
 171 /* Each one of these arrays hold the color lookup table (for 256
 172  * colors) for each MDI page (I assume then there should be 4 MDI
 173  * pages, I still wonder what they are.  I have seen NeXTStep split
 174  * the screen in four parts, while operating in 24 bits mode.  Each
 175  * integer holds 4 values: alpha value (transparency channel, thanks
 176  * go to John Stone (johns@umr.edu) from OpenBSD), red, green and blue
 177  *
 178  * I currently use the clut instead of the Xlut
 179  */
 180 struct cg14_clut {
 181         u32 c_clut [256];
 182         u32 c_clutd [256];    /* i wonder what the 'd' is for */
 183         u32 c_clut_inc [256];
 184         u32 c_clutd_inc [256];
 185 };
 186
 187 #define CG14_MMAP_ENTRIES       16
 188
 189 struct cg14_par {
 190         spinlock_t              lock;
 191         struct cg14_regs        *regs;
 192         struct cg14_clut        *clut;
 193         struct cg14_cursor      *cursor;
 194
 195         u32                     flags;
 196 #define CG14_FLAG_BLANKED       0x00000001
 197
 198         unsigned long           physbase;
 199         unsigned long           iospace;
 200         unsigned long           fbsize;
 201
 202         struct sbus_mmap_map    mmap_map[CG14_MMAP_ENTRIES];
 203
 204         int                     mode;
 205         int                     ramsize;
 206         struct sbus_dev         *sdev;
 207         struct list_head        list;
 208 };
 209
 210 static void __cg14_reset(struct cg14_par *par)
 211 {
 212         struct cg14_regs *regs = par->regs;
 213         u8 val;
 214
 215         val = sbus_readb(&regs->mcr);
 216         val &= ~(CG14_MCR_PIXMODE_MASK);
 217         sbus_writeb(val, &regs->mcr);
 218 }
 219
 220 static int cg14_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 221 {
 222         struct cg14_par *par = (struct cg14_par *) info->par;
 223         unsigned long flags;
 224
 225         /* We just use this to catch switches out of
 226          * graphics mode.
 227          */
 228         spin_lock_irqsave(&par->lock, flags);
 229         __cg14_reset(par);
 230         spin_unlock_irqrestore(&par->lock, flags);
 231
 232         if (var->xoffset || var->yoffset || var->vmode)
 233                 return -EINVAL;
 234         return 0;
 235 }
 236
 237 /**
 238  *      cg14_setcolreg - Optional function. Sets a color register.
 239  *      @regno: boolean, 0 copy local, 1 get_user() function
 240  *      @red: frame buffer colormap structure
 241  *      @green: The green value which can be up to 16 bits wide
 242  *      @blue:  The blue value which can be up to 16 bits wide.
 243  *      @transp: If supported the alpha value which can be up to 16 bits wide.
 244  *      @info: frame buffer info structure
 245  */
 246 static int cg14_setcolreg(unsigned regno,
 247                           unsigned red, unsigned green, unsigned blue,
 248                           unsigned transp, struct fb_info *info)
 249 {
 250         struct cg14_par *par = (struct cg14_par *) info->par;
 251         struct cg14_clut *clut = par->clut;
 252         unsigned long flags;
 253         u32 val;
 254
 255         if (regno >= 256)
 256                 return 1;
 257
 258         val = (red | (green << 8) | (blue << 16));
 259
 260         spin_lock_irqsave(&par->lock, flags);
 261         sbus_writel(val, &clut->c_clut[regno]);
 262         spin_unlock_irqrestore(&par->lock, flags);
 263
 264         return 0;
 265 }
 266
 267 static int cg14_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma)
 268 {
 269         struct cg14_par *par = (struct cg14_par *) info->par;
 270
 271         return sbusfb_mmap_helper(par->mmap_map,
 272                                   par->physbase, par->fbsize,
 273                                   par->iospace, vma);
 274 }
 275
 276 static int cg14_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 277                       unsigned long arg, struct fb_info *info)
 278 {
 279         struct cg14_par *par = (struct cg14_par *) info->par;
 280         struct cg14_regs *regs = par->regs;
 281         struct mdi_cfginfo kmdi, __user *mdii;
 282         unsigned long flags;
 283         int cur_mode, mode, ret = 0;
 284
 285         switch (cmd) {
 286         case MDI_RESET:
 287                 spin_lock_irqsave(&par->lock, flags);
 288                 __cg14_reset(par);
 289                 spin_unlock_irqrestore(&par->lock, flags);
 290                 break;
 291
 292         case MDI_GET_CFGINFO:
 293                 memset(&kmdi, 0, sizeof(kmdi));
 294
 295                 spin_lock_irqsave(&par->lock, flags);
 296                 kmdi.mdi_type = FBTYPE_MDICOLOR;
 297                 kmdi.mdi_height = info->var.yres;
 298                 kmdi.mdi_width = info->var.xres;
 299                 kmdi.mdi_mode = par->mode;
 300                 kmdi.mdi_pixfreq = 72; /* FIXME */
 301                 kmdi.mdi_size = par->ramsize;
 302                 spin_unlock_irqrestore(&par->lock, flags);
 303
 304                 mdii = (struct mdi_cfginfo __user *) arg;
 305                 if (copy_to_user(mdii, &kmdi, sizeof(kmdi)))
 306                         ret = -EFAULT;
 307                 break;
 308
 309         case MDI_SET_PIXELMODE:
 310                 if (get_user(mode, (int __user *) arg)) {
 311                         ret = -EFAULT;
 312                         break;
 313                 }
 314
 315                 spin_lock_irqsave(&par->lock, flags);
 316                 cur_mode = sbus_readb(&regs->mcr);
 317                 cur_mode &= ~CG14_MCR_PIXMODE_MASK;
 318                 switch(mode) {
 319                 case MDI_32_PIX:
 320                         cur_mode |= (CG14_MCR_PIXMODE_32 <<
 321                                      CG14_MCR_PIXMODE_SHIFT);
 322                         break;
 323
 324                 case MDI_16_PIX:
 325                         cur_mode |= 0x20;
 326                         break;
 327
 328                 case MDI_8_PIX:
 329                         break;
 330
 331                 default:
 332                         ret = -ENOSYS;
 333                         break;
 334                 };
 335                 if (!ret) {
 336                         sbus_writeb(cur_mode, &regs->mcr);
 337                         par->mode = mode;
 338                 }
 339                 spin_unlock_irqrestore(&par->lock, flags);
 340                 break;
 341
 342         default:
 343                 ret = sbusfb_ioctl_helper(cmd, arg, info,
 344                                           FBTYPE_MDICOLOR, 24, par->fbsize);
 345                 break;
 346         };
 347
 348         return ret;
 349 }
 350
 351 /*
 352  *  Initialisation
 353  */
 354
 355 static void cg14_init_fix(struct fb_info *info, int linebytes)
 356 {
 357         struct cg14_par *par = (struct cg14_par *)info->par;
 358
 359         strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
 360
 361         info->fix.type = FB_TYPE_PACKED_PIXELS;
 362         info->fix.visual = FB_VISUAL_TRUECOLOR;
 363
 364         info->fix.line_length = linebytes;
 365
 366         info->fix.accel = FB_ACCEL_SUN_CG14;
 367 }
 368
 369 static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __initdata = {
 370         {
 371                 .voff   = CG14_REGS,
 372                 .poff   = 0x80000000,
 373                 .size   = 0x1000
 374         },
 375         {
 376                 .voff   = CG14_XLUT,
 377                 .poff   = 0x80003000,
 378                 .size   = 0x1000
 379         },
 380         {
 381                 .voff   = CG14_CLUT1,
 382                 .poff   = 0x80004000,
 383                 .size   = 0x1000
 384         },
 385         {
 386                 .voff   = CG14_CLUT2,
 387                 .poff   = 0x80005000,
 388                 .size   = 0x1000
 389         },
 390         {
 391                 .voff   = CG14_CLUT3,
 392                 .poff   = 0x80006000,
 393                 .size   = 0x1000
 394         },
 395         {
 396                 .voff   = CG3_MMAP_OFFSET - 0x7000,
 397                 .poff   = 0x80000000,
 398                 .size   = 0x7000
 399         },
 400         {
 401                 .voff   = CG3_MMAP_OFFSET,
 402                 .poff   = 0x00000000,
 403                 .size   = SBUS_MMAP_FBSIZE(1)
 404         },
 405         {
 406                 .voff   = MDI_CURSOR_MAP,
 407                 .poff   = 0x80001000,
 408                 .size   = 0x1000
 409         },
 410         {
 411                 .voff   = MDI_CHUNKY_BGR_MAP,
 412                 .poff   = 0x01000000,
 413                 .size   = 0x400000
 414         },
 415         {
 416                 .voff   = MDI_PLANAR_X16_MAP,
 417                 .poff   = 0x02000000,
 418                 .size   = 0x200000
 419         },
 420         {
 421                 .voff   = MDI_PLANAR_C16_MAP,
 422                 .poff   = 0x02800000,
 423                 .size   = 0x200000
 424         },
 425         {
 426                 .voff   = MDI_PLANAR_X32_MAP,
 427                 .poff   = 0x03000000,
 428                 .size   = 0x100000
 429         },
 430         {
 431                 .voff   = MDI_PLANAR_B32_MAP,
 432                 .poff   = 0x03400000,
 433                 .size   = 0x100000
 434         },
 435         {
 436                 .voff   = MDI_PLANAR_G32_MAP,
 437                 .poff   = 0x03800000,
 438                 .size   = 0x100000
 439         },
 440         {
 441                 .voff   = MDI_PLANAR_R32_MAP,
 442                 .poff   = 0x03c00000,
 443                 .size   = 0x100000
 444         },
 445         { .size = 0 }
 446 };
 447
 448 struct all_info {
 449         struct fb_info info;
 450         struct cg14_par par;
 451         struct list_head list;
 452 };
 453 static LIST_HEAD(cg14_list);
 454
 455 static void cg14_init_one(struct sbus_dev *sdev, int node, int parent_node)
 456 {
 457         struct all_info *all;
 458         unsigned long phys, rphys;
 459         u32 bases[6];
 460         int is_8mb, linebytes, i;
 461
 462         if (!sdev) {
 463                 prom_getproperty(node, "address",
 464                                  (char *) &bases[0], sizeof(bases));
 465                 if (!bases[0]) {
 466                         printk(KERN_ERR "cg14: Device is not mapped.\n");
 467                         return;
 468                 }
 469                 if (__get_iospace(bases[0]) != __get_iospace(bases[1])) {
 470                         printk(KERN_ERR "cg14: I/O spaces don't match.\n");
 471                         return;
 472                 }
 473         }
 474
 475         all = kmalloc(sizeof(*all), GFP_KERNEL);
 476         if (!all) {
 477                 printk(KERN_ERR "cg14: Cannot allocate memory.\n");
 478                 return;
 479         }
 480         memset(all, 0, sizeof(*all));
 481
 482         INIT_LIST_HEAD(&all->list);
 483
 484         spin_lock_init(&all->par.lock);
 485
 486         sbusfb_fill_var(&all->info.var, node, 8);
 487
 488         linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
 489                                        all->info.var.xres);
 490         all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
 491
 492         all->par.sdev = sdev;
 493         if (sdev) {
 494                 rphys = sdev->reg_addrs[0].phys_addr;
 495                 all->par.physbase = phys = sdev->reg_addrs[1].phys_addr;
 496                 all->par.iospace = sdev->reg_addrs[0].which_io;
 497
 498                 all->par.regs = (struct cg14_regs *)
 499                         sbus_ioremap(&sdev->resource[0], 0,
 500                                      sizeof(struct cg14_regs),
 501                                      "cg14 regs");
 502                 all->par.clut = (struct cg14_clut *)
 503                         sbus_ioremap(&sdev->resource[0], CG14_CLUT1,
 504                                      sizeof(struct cg14_clut),
 505                                      "cg14 clut");
 506                 all->par.cursor = (struct cg14_cursor *)
 507                         sbus_ioremap(&sdev->resource[0], CG14_CURSORREGS,
 508                                      sizeof(struct cg14_cursor),
 509                                      "cg14 cursor");
 510                 all->info.screen_base = (char *)
 511                         sbus_ioremap(&sdev->resource[1], 0,
 512                                      all->par.fbsize, "cg14 ram");
 513         } else {
 514                 rphys = __get_phys(bases[0]);
 515                 all->par.physbase = phys = __get_phys(bases[1]);
 516                 all->par.iospace = __get_iospace(bases[0]);
 517                 all->par.regs = (struct cg14_regs *)(unsigned long)bases[0];
 518                 all->par.clut = (struct cg14_clut *)((unsigned long)bases[0] +
 519                                                      CG14_CLUT1);
 520                 all->par.cursor =
 521                         (struct cg14_cursor *)((unsigned long)bases[0] +
 522                                                CG14_CURSORREGS);
 523
 524                 all->info.screen_base = (char *)(unsigned long)bases[1];
 525         }
 526
 527         prom_getproperty(node, "reg", (char *) &bases[0], sizeof(bases));
 528         is_8mb = (bases[5] == 0x800000);
 529
 530         if (sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map)) {
 531                 extern void __cg14_mmap_sized_wrongly(void);
 532
 533                 __cg14_mmap_sized_wrongly();
 534         }
 535
 536         memcpy(&all->par.mmap_map, &__cg14_mmap_map, sizeof(all->par.mmap_map));
 537         for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
 538                 struct sbus_mmap_map *map = &all->par.mmap_map[i];
 539
 540                 if (!map->size)
 541                         break;
 542                 if (map->poff & 0x80000000)
 543                         map->poff = (map->poff & 0x7fffffff) + rphys - phys;
 544                 if (is_8mb &&
 545                     map->size >= 0x100000 &&
 546                     map->size <= 0x400000)
 547                         map->size *= 2;
 548         }
 549
 550         all->par.mode = MDI_8_PIX;
 551         all->par.ramsize = (is_8mb ? 0x800000 : 0x400000);
 552
 553         all->info.flags = FBINFO_FLAG_DEFAULT;
 554         all->info.fbops = &cg14_ops;
 555         all->info.currcon = -1;
 556         all->info.par = &all->par;
 557
 558         __cg14_reset(&all->par);
 559
 560         if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
 561                 printk(KERN_ERR "cg14: Could not allocate color map.\n");
 562                 kfree(all);
 563                 return;
 564         }
 565
 566         cg14_init_fix(&all->info, linebytes);
 567
 568         if (register_framebuffer(&all->info) < 0) {
 569                 printk(KERN_ERR "cg14: Could not register framebuffer.\n");
 570                 fb_dealloc_cmap(&all->info.cmap);
 571                 kfree(all);
 572                 return;
 573         }
 574
 575         list_add(&all->list, &cg14_list);
 576
 577         printk("cg14: cgfourteen at %lx:%lx\n",
 578                all->par.physbase, all->par.iospace);
 579
 580 }
 581
 582 int __init cg14_init(void)
 583 {
 584         struct sbus_bus *sbus;
 585         struct sbus_dev *sdev;
 586
 587 #ifdef CONFIG_SPARC32
 588         {
 589                 int root, node;
 590
 591                 root = prom_getchild(prom_root_node);
 592                 root = prom_searchsiblings(root, "obio");
 593                 if (root) {
 594                         node = prom_searchsiblings(prom_getchild(root),
 595                                                    "cgfourteen");
 596                         if (node)
 597                                 cg14_init_one(NULL, node, root);
 598                 }
 599         }
 600 #endif
 601         for_all_sbusdev(sdev, sbus) {
 602                 if (!strcmp(sdev->prom_name, "cgfourteen"))
 603                         cg14_init_one(sdev, sdev->prom_node, sbus->prom_node);
 604         }
 605
 606         return 0;
 607 }
 608
 609 void __exit cg14_exit(void)
 610 {
 611         struct list_head *pos, *tmp;
 612
 613         list_for_each_safe(pos, tmp, &cg14_list) {
 614                 struct all_info *all = list_entry(pos, typeof(*all), list);
 615
 616                 unregister_framebuffer(&all->info);
 617                 fb_dealloc_cmap(&all->info.cmap);
 618                 kfree(all);
 619         }
 620 }
 621
 622 int __init
 623 cg14_setup(char *arg)
 624 {
 625         /* No cmdline options yet... */
 626         return 0;
 627 }
 628
 629 #ifdef MODULE
 630 module_init(cg14_init);
 631 module_exit(cg14_exit);
 632 #endif
 633
 634 MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets");
 635 MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
 636 MODULE_LICENSE("GPL");