drivers/video/ffb.c

   1 /* ffb.c: Creator/Elite3D frame buffer driver
   2  *
   3  * Copyright (C) 2003 David S. Miller (davem@redhat.com)
   4  * Copyright (C) 1997,1998,1999 Jakub Jelinek (jj@ultra.linux.cz)
   5  *
   6  * Driver layout based loosely on tgafb.c, see that file for credits.
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/kernel.h>
  11 #include <linux/errno.h>
  12 #include <linux/string.h>
  13 #include <linux/slab.h>
  14 #include <linux/delay.h>
  15 #include <linux/init.h>
  16 #include <linux/fb.h>
  17 #include <linux/mm.h>
  18 #include <linux/timer.h>
  19
  20 #include <asm/io.h>
  21 #include <asm/upa.h>
  22 #include <asm/oplib.h>
  23 #include <asm/fbio.h>
  24
  25 #include "sbuslib.h"
  26
  27 /*
  28  * Local functions.
  29  */
  30
  31 static int ffb_setcolreg(unsigned, unsigned, unsigned, unsigned,
  32                          unsigned, struct fb_info *);
  33 static int ffb_blank(int, struct fb_info *);
  34 static void ffb_init_fix(struct fb_info *);
  35
  36 static void ffb_imageblit(struct fb_info *, const struct fb_image *);
  37 static void ffb_fillrect(struct fb_info *, const struct fb_fillrect *);
  38 static void ffb_copyarea(struct fb_info *, const struct fb_copyarea *);
  39 static int ffb_sync(struct fb_info *);
  40 static int ffb_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
  41 static int ffb_ioctl(struct inode *, struct file *, unsigned int,
  42                      unsigned long, struct fb_info *);
  43 static int ffb_pan_display(struct fb_var_screeninfo *, struct fb_info *);
  44
  45 /*
  46  *  Frame buffer operations
  47  */
  48
  49 static struct fb_ops ffb_ops = {
  50         .owner                  = THIS_MODULE,
  51         .fb_setcolreg           = ffb_setcolreg,
  52         .fb_blank               = ffb_blank,
  53         .fb_pan_display         = ffb_pan_display,
  54         .fb_fillrect            = ffb_fillrect,
  55         .fb_copyarea            = ffb_copyarea,
  56         .fb_imageblit           = ffb_imageblit,
  57         .fb_sync                = ffb_sync,
  58         .fb_mmap                = ffb_mmap,
  59         .fb_ioctl               = ffb_ioctl,
  60
  61         /* XXX Use FFB hw cursor once fb cursor API is better understood... */
  62         .fb_cursor              = soft_cursor,
  63 };
  64
  65 /* Register layout and definitions */
  66 #define FFB_SFB8R_VOFF          0x00000000
  67 #define FFB_SFB8G_VOFF          0x00400000
  68 #define FFB_SFB8B_VOFF          0x00800000
  69 #define FFB_SFB8X_VOFF          0x00c00000
  70 #define FFB_SFB32_VOFF          0x01000000
  71 #define FFB_SFB64_VOFF          0x02000000
  72 #define FFB_FBC_REGS_VOFF       0x04000000
  73 #define FFB_BM_FBC_REGS_VOFF    0x04002000
  74 #define FFB_DFB8R_VOFF          0x04004000
  75 #define FFB_DFB8G_VOFF          0x04404000
  76 #define FFB_DFB8B_VOFF          0x04804000
  77 #define FFB_DFB8X_VOFF          0x04c04000
  78 #define FFB_DFB24_VOFF          0x05004000
  79 #define FFB_DFB32_VOFF          0x06004000
  80 #define FFB_DFB422A_VOFF        0x07004000      /* DFB 422 mode write to A */
  81 #define FFB_DFB422AD_VOFF       0x07804000      /* DFB 422 mode with line doubling */
  82 #define FFB_DFB24B_VOFF         0x08004000      /* DFB 24bit mode write to B */
  83 #define FFB_DFB422B_VOFF        0x09004000      /* DFB 422 mode write to B */
  84 #define FFB_DFB422BD_VOFF       0x09804000      /* DFB 422 mode with line doubling */
  85 #define FFB_SFB16Z_VOFF         0x0a004000      /* 16bit mode Z planes */
  86 #define FFB_SFB8Z_VOFF          0x0a404000      /* 8bit mode Z planes */
  87 #define FFB_SFB422_VOFF         0x0ac04000      /* SFB 422 mode write to A/B */
  88 #define FFB_SFB422D_VOFF        0x0b404000      /* SFB 422 mode with line doubling */
  89 #define FFB_FBC_KREGS_VOFF      0x0bc04000
  90 #define FFB_DAC_VOFF            0x0bc06000
  91 #define FFB_PROM_VOFF           0x0bc08000
  92 #define FFB_EXP_VOFF            0x0bc18000
  93
  94 #define FFB_SFB8R_POFF          0x04000000UL
  95 #define FFB_SFB8G_POFF          0x04400000UL
  96 #define FFB_SFB8B_POFF          0x04800000UL
  97 #define FFB_SFB8X_POFF          0x04c00000UL
  98 #define FFB_SFB32_POFF          0x05000000UL
  99 #define FFB_SFB64_POFF          0x06000000UL
 100 #define FFB_FBC_REGS_POFF       0x00600000UL
 101 #define FFB_BM_FBC_REGS_POFF    0x00600000UL
 102 #define FFB_DFB8R_POFF          0x01000000UL
 103 #define FFB_DFB8G_POFF          0x01400000UL
 104 #define FFB_DFB8B_POFF          0x01800000UL
 105 #define FFB_DFB8X_POFF          0x01c00000UL
 106 #define FFB_DFB24_POFF          0x02000000UL
 107 #define FFB_DFB32_POFF          0x03000000UL
 108 #define FFB_FBC_KREGS_POFF      0x00610000UL
 109 #define FFB_DAC_POFF            0x00400000UL
 110 #define FFB_PROM_POFF           0x00000000UL
 111 #define FFB_EXP_POFF            0x00200000UL
 112 #define FFB_DFB422A_POFF        0x09000000UL
 113 #define FFB_DFB422AD_POFF       0x09800000UL
 114 #define FFB_DFB24B_POFF         0x0a000000UL
 115 #define FFB_DFB422B_POFF        0x0b000000UL
 116 #define FFB_DFB422BD_POFF       0x0b800000UL
 117 #define FFB_SFB16Z_POFF         0x0c800000UL
 118 #define FFB_SFB8Z_POFF          0x0c000000UL
 119 #define FFB_SFB422_POFF         0x0d000000UL
 120 #define FFB_SFB422D_POFF        0x0d800000UL
 121
 122 /* Draw operations */
 123 #define FFB_DRAWOP_DOT          0x00
 124 #define FFB_DRAWOP_AADOT        0x01
 125 #define FFB_DRAWOP_BRLINECAP    0x02
 126 #define FFB_DRAWOP_BRLINEOPEN   0x03
 127 #define FFB_DRAWOP_DDLINE       0x04
 128 #define FFB_DRAWOP_AALINE       0x05
 129 #define FFB_DRAWOP_TRIANGLE     0x06
 130 #define FFB_DRAWOP_POLYGON      0x07
 131 #define FFB_DRAWOP_RECTANGLE    0x08
 132 #define FFB_DRAWOP_FASTFILL     0x09
 133 #define FFB_DRAWOP_BCOPY        0x0a
 134 #define FFB_DRAWOP_VSCROLL      0x0b
 135
 136 /* Pixel processor control */
 137 /* Force WID */
 138 #define FFB_PPC_FW_DISABLE      0x800000
 139 #define FFB_PPC_FW_ENABLE       0xc00000
 140 /* Auxiliary clip */
 141 #define FFB_PPC_ACE_DISABLE     0x040000
 142 #define FFB_PPC_ACE_AUX_SUB     0x080000
 143 #define FFB_PPC_ACE_AUX_ADD     0x0c0000
 144 /* Depth cue */
 145 #define FFB_PPC_DCE_DISABLE     0x020000
 146 #define FFB_PPC_DCE_ENABLE      0x030000
 147 /* Alpha blend */
 148 #define FFB_PPC_ABE_DISABLE     0x008000
 149 #define FFB_PPC_ABE_ENABLE      0x00c000
 150 /* View clip */
 151 #define FFB_PPC_VCE_DISABLE     0x001000
 152 #define FFB_PPC_VCE_2D          0x002000
 153 #define FFB_PPC_VCE_3D          0x003000
 154 /* Area pattern */
 155 #define FFB_PPC_APE_DISABLE     0x000800
 156 #define FFB_PPC_APE_ENABLE      0x000c00
 157 /* Transparent background */
 158 #define FFB_PPC_TBE_OPAQUE      0x000200
 159 #define FFB_PPC_TBE_TRANSPARENT 0x000300
 160 /* Z source */
 161 #define FFB_PPC_ZS_VAR          0x000080
 162 #define FFB_PPC_ZS_CONST        0x0000c0
 163 /* Y source */
 164 #define FFB_PPC_YS_VAR          0x000020
 165 #define FFB_PPC_YS_CONST        0x000030
 166 /* X source */
 167 #define FFB_PPC_XS_WID          0x000004
 168 #define FFB_PPC_XS_VAR          0x000008
 169 #define FFB_PPC_XS_CONST        0x00000c
 170 /* Color (BGR) source */
 171 #define FFB_PPC_CS_VAR          0x000002
 172 #define FFB_PPC_CS_CONST        0x000003
 173
 174 #define FFB_ROP_NEW                  0x83
 175 #define FFB_ROP_OLD                  0x85
 176 #define FFB_ROP_NEW_XOR_OLD          0x86
 177
 178 #define FFB_UCSR_FIFO_MASK     0x00000fff
 179 #define FFB_UCSR_FB_BUSY       0x01000000
 180 #define FFB_UCSR_RP_BUSY       0x02000000
 181 #define FFB_UCSR_ALL_BUSY      (FFB_UCSR_RP_BUSY|FFB_UCSR_FB_BUSY)
 182 #define FFB_UCSR_READ_ERR      0x40000000
 183 #define FFB_UCSR_FIFO_OVFL     0x80000000
 184 #define FFB_UCSR_ALL_ERRORS    (FFB_UCSR_READ_ERR|FFB_UCSR_FIFO_OVFL)
 185
 186 struct ffb_fbc {
 187         /* Next vertex registers */
 188         u32             xxx1[3];
 189         volatile u32    alpha;
 190         volatile u32    red;
 191         volatile u32    green;
 192         volatile u32    blue;
 193         volatile u32    depth;
 194         volatile u32    y;
 195         volatile u32    x;
 196         u32             xxx2[2];
 197         volatile u32    ryf;
 198         volatile u32    rxf;
 199         u32             xxx3[2];
 200
 201         volatile u32    dmyf;
 202         volatile u32    dmxf;
 203         u32             xxx4[2];
 204         volatile u32    ebyi;
 205         volatile u32    ebxi;
 206         u32             xxx5[2];
 207         volatile u32    by;
 208         volatile u32    bx;
 209         u32             dy;
 210         u32             dx;
 211         volatile u32    bh;
 212         volatile u32    bw;
 213         u32             xxx6[2];
 214
 215         u32             xxx7[32];
 216
 217         /* Setup unit vertex state register */
 218         volatile u32    suvtx;
 219         u32             xxx8[63];
 220
 221         /* Control registers */
 222         volatile u32    ppc;
 223         volatile u32    wid;
 224         volatile u32    fg;
 225         volatile u32    bg;
 226         volatile u32    consty;
 227         volatile u32    constz;
 228         volatile u32    xclip;
 229         volatile u32    dcss;
 230         volatile u32    vclipmin;
 231         volatile u32    vclipmax;
 232         volatile u32    vclipzmin;
 233         volatile u32    vclipzmax;
 234         volatile u32    dcsf;
 235         volatile u32    dcsb;
 236         volatile u32    dczf;
 237         volatile u32    dczb;
 238
 239         u32             xxx9;
 240         volatile u32    blendc;
 241         volatile u32    blendc1;
 242         volatile u32    blendc2;
 243         volatile u32    fbramitc;
 244         volatile u32    fbc;
 245         volatile u32    rop;
 246         volatile u32    cmp;
 247         volatile u32    matchab;
 248         volatile u32    matchc;
 249         volatile u32    magnab;
 250         volatile u32    magnc;
 251         volatile u32    fbcfg0;
 252         volatile u32    fbcfg1;
 253         volatile u32    fbcfg2;
 254         volatile u32    fbcfg3;
 255
 256         u32             ppcfg;
 257         volatile u32    pick;
 258         volatile u32    fillmode;
 259         volatile u32    fbramwac;
 260         volatile u32    pmask;
 261         volatile u32    xpmask;
 262         volatile u32    ypmask;
 263         volatile u32    zpmask;
 264         volatile u32    clip0min;
 265         volatile u32    clip0max;
 266         volatile u32    clip1min;
 267         volatile u32    clip1max;
 268         volatile u32    clip2min;
 269         volatile u32    clip2max;
 270         volatile u32    clip3min;
 271         volatile u32    clip3max;
 272
 273         /* New 3dRAM III support regs */
 274         volatile u32    rawblend2;
 275         volatile u32    rawpreblend;
 276         volatile u32    rawstencil;
 277         volatile u32    rawstencilctl;
 278         volatile u32    threedram1;
 279         volatile u32    threedram2;
 280         volatile u32    passin;
 281         volatile u32    rawclrdepth;
 282         volatile u32    rawpmask;
 283         volatile u32    rawcsrc;
 284         volatile u32    rawmatch;
 285         volatile u32    rawmagn;
 286         volatile u32    rawropblend;
 287         volatile u32    rawcmp;
 288         volatile u32    rawwac;
 289         volatile u32    fbramid;
 290
 291         volatile u32    drawop;
 292         u32             xxx10[2];
 293         volatile u32    fontlpat;
 294         u32             xxx11;
 295         volatile u32    fontxy;
 296         volatile u32    fontw;
 297         volatile u32    fontinc;
 298         volatile u32    font;
 299         u32             xxx12[3];
 300         volatile u32    blend2;
 301         volatile u32    preblend;
 302         volatile u32    stencil;
 303         volatile u32    stencilctl;
 304
 305         u32             xxx13[4];
 306         volatile u32    dcss1;
 307         volatile u32    dcss2;
 308         volatile u32    dcss3;
 309         volatile u32    widpmask;
 310         volatile u32    dcs2;
 311         volatile u32    dcs3;
 312         volatile u32    dcs4;
 313         u32             xxx14;
 314         volatile u32    dcd2;
 315         volatile u32    dcd3;
 316         volatile u32    dcd4;
 317         u32             xxx15;
 318
 319         volatile u32    pattern[32];
 320
 321         u32             xxx16[256];
 322
 323         volatile u32    devid;
 324         u32             xxx17[63];
 325
 326         volatile u32    ucsr;
 327         u32             xxx18[31];
 328
 329         volatile u32    mer;
 330 };
 331
 332 struct ffb_dac {
 333         volatile u32    type;
 334         volatile u32    value;
 335         volatile u32    type2;
 336         volatile u32    value2;
 337 };
 338
 339 struct ffb_par {
 340         spinlock_t              lock;
 341         struct ffb_fbc          *fbc;
 342         struct ffb_dac          *dac;
 343
 344         u32                     flags;
 345 #define FFB_FLAG_AFB            0x00000001
 346 #define FFB_FLAG_BLANKED        0x00000002
 347
 348         u32                     fg_cache __attribute__((aligned (8)));
 349         u32                     bg_cache;
 350         u32                     rop_cache;
 351
 352         int                     fifo_cache;
 353
 354         unsigned long           physbase;
 355         unsigned long           fbsize;
 356
 357         char                    name[64];
 358         int                     prom_node;
 359         int                     prom_parent_node;
 360         int                     dac_rev;
 361         int                     board_type;
 362         struct list_head        list;
 363 };
 364
 365 #undef FFB_DO_DEBUG_LOG
 366
 367 #ifdef FFB_DO_DEBUG_LOG
 368 #define FFB_DEBUG_LOG_ENTS      32
 369 static struct ffb_log {
 370         int op;
 371 #define OP_FILLRECT     1
 372 #define OP_IMAGEBLIT    2
 373
 374         int depth, x, y, w, h;
 375 } ffb_debug_log[FFB_DEBUG_LOG_ENTS];
 376 static int ffb_debug_log_ent;
 377
 378 static void ffb_do_log(unsigned long unused)
 379 {
 380         int i;
 381
 382         for (i = 0; i < FFB_DEBUG_LOG_ENTS; i++) {
 383                 struct ffb_log *p = &ffb_debug_log[i];
 384
 385                 printk("FFB_LOG: OP[%s] depth(%d) x(%d) y(%d) w(%d) h(%d)\n",
 386                        (p->op == OP_FILLRECT ? "FILLRECT" : "IMAGEBLIT"),
 387                        p->depth, p->x, p->y, p->w, p->h);
 388         }
 389 }
 390 static struct timer_list ffb_log_timer =
 391         TIMER_INITIALIZER(ffb_do_log, 0, 0);
 392
 393 static void ffb_log(int op, int depth, int x, int y, int w, int h)
 394 {
 395         if (ffb_debug_log_ent < FFB_DEBUG_LOG_ENTS) {
 396                 struct ffb_log *p = &ffb_debug_log[ffb_debug_log_ent];
 397
 398                 if (ffb_debug_log_ent != 0 &&
 399                     p[-1].op == op && p[-1].depth == depth)
 400                         return;
 401                 p->op = op;
 402                 p->depth = depth;
 403                 p->x = x;
 404                 p->y = y;
 405                 p->w = w;
 406                 p->h = h;
 407
 408                 if (++ffb_debug_log_ent == FFB_DEBUG_LOG_ENTS) {
 409                         ffb_log_timer.expires = jiffies + 2;
 410                         add_timer(&ffb_log_timer);
 411                 }
 412         }
 413 }
 414 #else
 415 #define ffb_log(a,b,c,d,e,f)    do { } while(0)
 416 #endif
 417
 418 #undef FORCE_WAIT_EVERY_ROP
 419
 420 static void FFBFifo(struct ffb_par *par, int n)
 421 {
 422         struct ffb_fbc *fbc;
 423         int cache = par->fifo_cache;
 424
 425         if (cache - n < 0) {
 426                 fbc = par->fbc;
 427                 do {    cache = (upa_readl(&fbc->ucsr) & FFB_UCSR_FIFO_MASK) - 8;
 428                 } while (cache - n < 0);
 429         }
 430         par->fifo_cache = cache - n;
 431 }
 432
 433 static void FFBWait(struct ffb_par *par)
 434 {
 435         struct ffb_fbc *fbc;
 436         int limit = 10000;
 437
 438         fbc = par->fbc;
 439         do {
 440                 if ((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_BUSY) == 0)
 441                         break;
 442                 if ((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0) {
 443                         upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr);
 444                 }
 445                 udelay(10);
 446         } while(--limit > 0);
 447 }
 448
 449 static int ffb_sync(struct fb_info *p)
 450 {
 451         struct ffb_par *par = (struct ffb_par *) p->par;
 452
 453         FFBWait(par);
 454         return 0;
 455 }
 456
 457 static __inline__ void ffb_rop(struct ffb_par *par, u32 rop)
 458 {
 459         if (par->rop_cache != rop) {
 460                 FFBFifo(par, 1);
 461                 upa_writel(rop, &par->fbc->rop);
 462                 par->rop_cache = rop;
 463         }
 464 }
 465
 466 static void ffb_switch_from_graph(struct ffb_par *par)
 467 {
 468         struct ffb_fbc *fbc = par->fbc;
 469         struct ffb_dac *dac = par->dac;
 470         unsigned long flags;
 471
 472         spin_lock_irqsave(&par->lock, flags);
 473         FFBWait(par);
 474         par->fifo_cache = 0;
 475         FFBFifo(par, 7);
 476         upa_writel(FFB_PPC_VCE_DISABLE|FFB_PPC_TBE_OPAQUE|
 477                    FFB_PPC_APE_DISABLE|FFB_PPC_CS_CONST,
 478                    &fbc->ppc);
 479         upa_writel(0x2000707f, &fbc->fbc);
 480         upa_writel(par->rop_cache, &fbc->rop);
 481         upa_writel(0xffffffff, &fbc->pmask);
 482         upa_writel((0 << 16) | (32 << 0), &fbc->fontinc);
 483         upa_writel(par->fg_cache, &fbc->fg);
 484         upa_writel(par->bg_cache, &fbc->bg);
 485         FFBWait(par);
 486
 487         /* Disable cursor.  */
 488         upa_writel(0x100, &dac->type2);
 489         if (par->dac_rev <= 2)
 490                 upa_writel(0, &dac->value2);
 491         else
 492                 upa_writel(3, &dac->value2);
 493
 494         spin_unlock_irqrestore(&par->lock, flags);
 495 }
 496
 497 static int ffb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 498 {
 499         struct ffb_par *par = (struct ffb_par *) info->par;
 500
 501         /* We just use this to catch switches out of
 502          * graphics mode.
 503          */
 504         ffb_switch_from_graph(par);
 505
 506         if (var->xoffset || var->yoffset || var->vmode)
 507                 return -EINVAL;
 508         return 0;
 509 }
 510
 511 /**
 512  *      ffb_fillrect - REQUIRED function. Can use generic routines if
 513  *                     non acclerated hardware and packed pixel based.
 514  *                     Draws a rectangle on the screen.
 515  *
 516  *      @info: frame buffer structure that represents a single frame buffer
 517  *      @rect: structure defining the rectagle and operation.
 518  */
 519 static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 520 {
 521         struct ffb_par *par = (struct ffb_par *) info->par;
 522         struct ffb_fbc *fbc = par->fbc;
 523         unsigned long flags;
 524         u32 fg;
 525
 526         if (rect->rop != ROP_COPY && rect->rop != ROP_XOR)
 527                 BUG();
 528
 529         ffb_log(OP_FILLRECT, 0, rect->dx, rect->dy, rect->width, rect->height);
 530
 531         fg = ((u32 *)info->pseudo_palette)[rect->color];
 532
 533         spin_lock_irqsave(&par->lock, flags);
 534
 535         if (fg != par->fg_cache) {
 536                 FFBFifo(par, 1);
 537                 upa_writel(fg, &fbc->fg);
 538                 par->fg_cache = fg;
 539         }
 540
 541         ffb_rop(par, (rect->rop == ROP_COPY ?
 542                       FFB_ROP_NEW :
 543                       FFB_ROP_NEW_XOR_OLD));
 544
 545         FFBFifo(par, 5);
 546         upa_writel(FFB_DRAWOP_RECTANGLE, &fbc->drawop);
 547         upa_writel(rect->dy, &fbc->by);
 548         upa_writel(rect->dx, &fbc->bx);
 549         upa_writel(rect->height, &fbc->bh);
 550         upa_writel(rect->width, &fbc->bw);
 551 #ifdef FORCE_WAIT_EVERY_ROP
 552         FFBWait(par);
 553 #endif
 554
 555         spin_unlock_irqrestore(&par->lock, flags);
 556 }
 557
 558 /**
 559  *      ffb_copyarea - REQUIRED function. Can use generic routines if
 560  *                     non acclerated hardware and packed pixel based.
 561  *                     Copies on area of the screen to another area.
 562  *
 563  *      @info: frame buffer structure that represents a single frame buffer
 564  *      @area: structure defining the source and destination.
 565  */
 566
 567 static void
 568 ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 569 {
 570         struct ffb_par *par = (struct ffb_par *) info->par;
 571         struct ffb_fbc *fbc = par->fbc;
 572         unsigned long flags;
 573
 574         if (area->dx != area->sx ||
 575             area->dy == area->dy) {
 576                 cfb_copyarea(info, area);
 577                 return;
 578         }
 579
 580         spin_lock_irqsave(&par->lock, flags);
 581
 582         ffb_rop(par, FFB_ROP_OLD);
 583
 584         FFBFifo(par, 7);
 585         upa_writel(FFB_DRAWOP_VSCROLL, &fbc->drawop);
 586         upa_writel(area->sy, &fbc->by);
 587         upa_writel(area->sx, &fbc->bx);
 588         upa_writel(area->dy, &fbc->dy);
 589         upa_writel(area->dx, &fbc->dx);
 590         upa_writel(area->height, &fbc->bh);
 591         upa_writel(area->width, &fbc->bw);
 592
 593         spin_unlock_irqrestore(&par->lock, flags);
 594 }
 595
 596 /**
 597  *      ffb_imageblit - REQUIRED function. Can use generic routines if
 598  *                      non acclerated hardware and packed pixel based.
 599  *                      Copies a image from system memory to the screen.
 600  *
 601  *      @info: frame buffer structure that represents a single frame buffer
 602  *      @image: structure defining the image.
 603  */
 604 static void ffb_imageblit(struct fb_info *info, const struct fb_image *image)
 605 {
 606         struct ffb_par *par = (struct ffb_par *) info->par;
 607         struct ffb_fbc *fbc = par->fbc;
 608         const u8 *data = image->data;
 609         unsigned long flags;
 610         u32 fg, bg, xy;
 611         u64 fgbg;
 612         int i, width;
 613
 614         ffb_log(OP_IMAGEBLIT, image->depth,
 615                 image->dx, image->dy, image->width, image->height);
 616
 617         if (image->depth > 1) {
 618                 cfb_imageblit(info, image);
 619                 return;
 620         }
 621
 622         fg = ((u32 *)info->pseudo_palette)[image->fg_color];
 623         bg = ((u32 *)info->pseudo_palette)[image->bg_color];
 624         fgbg = ((u64) fg << 32) | (u64) bg;
 625         xy = (image->dy << 16) | image->dx;
 626
 627         spin_lock_irqsave(&par->lock, flags);
 628
 629         if (fgbg != *(u64 *)&par->fg_cache) {
 630                 FFBFifo(par, 2);
 631                 upa_writeq(fgbg, &fbc->fg);
 632                 *(u64 *)&par->fg_cache = fgbg;
 633         }
 634
 635         ffb_rop(par, FFB_ROP_NEW);
 636
 637         for (i = 0; i < image->height; i++) {
 638                 width = image->width;
 639
 640                 FFBFifo(par, 1);
 641                 upa_writel(xy, &fbc->fontxy);
 642                 xy += (1 << 16);
 643
 644                 while (width >= 32) {
 645                         u32 val;
 646
 647                         FFBFifo(par, 2);
 648                         upa_writel(32, &fbc->fontw);
 649
 650                         val = ((u32)data[0] << 24) |
 651                               ((u32)data[1] << 16) |
 652                               ((u32)data[2] <<  8) |
 653                               ((u32)data[3] <<  0);
 654                         upa_writel(val, &fbc->font);
 655
 656                         data += 4;
 657                         width -= 32;
 658                 }
 659
 660                 if (width) {
 661                         u32 val;
 662
 663                         FFBFifo(par, 2);
 664                         upa_writel(width, &fbc->fontw);
 665                         if (width <= 8) {
 666                                 val = (u32) data[0] << 24;
 667                                 data += 1;
 668                         } else if (width <= 16) {
 669                                 val = ((u32) data[0] << 24) |
 670                                       ((u32) data[1] << 16);
 671                                 data += 2;
 672                         } else {
 673                                 val = ((u32) data[0] << 24) |
 674                                       ((u32) data[1] << 16) |
 675                                       ((u32) data[2] <<  8);
 676                                 data += 3;
 677                         }
 678                         upa_writel(val, &fbc->font);
 679                 }
 680         }
 681 #ifdef FORCE_WAIT_EVERY_ROP
 682         FFBWait(par);
 683 #endif
 684
 685         spin_unlock_irqrestore(&par->lock, flags);
 686 }
 687
 688 static void ffb_fixup_var_rgb(struct fb_var_screeninfo *var)
 689 {
 690         var->red.offset = 0;
 691         var->red.length = 8;
 692         var->green.offset = 8;
 693         var->green.length = 8;
 694         var->blue.offset = 16;
 695         var->blue.length = 8;
 696         var->transp.offset = 0;
 697         var->transp.length = 0;
 698 }
 699
 700 /**
 701  *      ffb_setcolreg - Optional function. Sets a color register.
 702  *      @regno: boolean, 0 copy local, 1 get_user() function
 703  *      @red: frame buffer colormap structure
 704  *      @green: The green value which can be up to 16 bits wide
 705  *      @blue:  The blue value which can be up to 16 bits wide.
 706  *      @transp: If supported the alpha value which can be up to 16 bits wide.
 707  *      @info: frame buffer info structure
 708  */
 709 static int ffb_setcolreg(unsigned regno,
 710                          unsigned red, unsigned green, unsigned blue,
 711                          unsigned transp, struct fb_info *info)
 712 {
 713         u32 value;
 714
 715         if (regno >= 256)
 716                 return 1;
 717
 718         red >>= 8;
 719         green >>= 8;
 720         blue >>= 8;
 721
 722         value = (blue << 16) | (green << 8) | red;
 723         ((u32 *)info->pseudo_palette)[regno] = value;
 724
 725         return 0;
 726 }
 727
 728 /**
 729  *      ffb_blank - Optional function.  Blanks the display.
 730  *      @blank_mode: the blank mode we want.
 731  *      @info: frame buffer structure that represents a single frame buffer
 732  */
 733 static int
 734 ffb_blank(int blank, struct fb_info *info)
 735 {
 736         struct ffb_par *par = (struct ffb_par *) info->par;
 737         struct ffb_dac *dac = par->dac;
 738         unsigned long flags;
 739         u32 tmp;
 740
 741         spin_lock_irqsave(&par->lock, flags);
 742
 743         FFBWait(par);
 744
 745         switch (blank) {
 746         case 0: /* Unblanking */
 747                 upa_writel(0x6000, &dac->type);
 748                 tmp = (upa_readl(&dac->value) | 0x1);
 749                 upa_writel(0x6000, &dac->type);
 750                 upa_writel(tmp, &dac->value);
 751                 par->flags &= ~FFB_FLAG_BLANKED;
 752                 break;
 753
 754         case 1: /* Normal blanking */
 755         case 2: /* VESA blank (vsync off) */
 756         case 3: /* VESA blank (hsync off) */
 757         case 4: /* Poweroff */
 758                 upa_writel(0x6000, &dac->type);
 759                 tmp = (upa_readl(&dac->value) & ~0x1);
 760                 upa_writel(0x6000, &dac->type);
 761                 upa_writel(tmp, &dac->value);
 762                 par->flags |= FFB_FLAG_BLANKED;
 763                 break;
 764         }
 765
 766         spin_unlock_irqrestore(&par->lock, flags);
 767
 768         return 0;
 769 }
 770
 771 static struct sbus_mmap_map ffb_mmap_map[] = {
 772         {
 773                 .voff   = FFB_SFB8R_VOFF,
 774                 .poff   = FFB_SFB8R_POFF,
 775                 .size   = 0x0400000
 776         },
 777         {
 778                 .voff   = FFB_SFB8G_VOFF,
 779                 .poff   = FFB_SFB8G_POFF,
 780                 .size   = 0x0400000
 781         },
 782         {
 783                 .voff   = FFB_SFB8B_VOFF,
 784                 .poff   = FFB_SFB8B_POFF,
 785                 .size   = 0x0400000
 786         },
 787         {
 788                 .voff   = FFB_SFB8X_VOFF,
 789                 .poff   = FFB_SFB8X_POFF,
 790                 .size   = 0x0400000
 791         },
 792         {
 793                 .voff   = FFB_SFB32_VOFF,
 794                 .poff   = FFB_SFB32_POFF,
 795                 .size   = 0x1000000
 796         },
 797         {
 798                 .voff   = FFB_SFB64_VOFF,
 799                 .poff   = FFB_SFB64_POFF,
 800                 .size   = 0x2000000
 801         },
 802         {
 803                 .voff   = FFB_FBC_REGS_VOFF,
 804                 .poff   = FFB_FBC_REGS_POFF,
 805                 .size   = 0x0002000
 806         },
 807         {
 808                 .voff   = FFB_BM_FBC_REGS_VOFF,
 809                 .poff   = FFB_BM_FBC_REGS_POFF,
 810                 .size   = 0x0002000
 811         },
 812         {
 813                 .voff   = FFB_DFB8R_VOFF,
 814                 .poff   = FFB_DFB8R_POFF,
 815                 .size   = 0x0400000
 816         },
 817         {
 818                 .voff   = FFB_DFB8G_VOFF,
 819                 .poff   = FFB_DFB8G_POFF,
 820                 .size   = 0x0400000
 821         },
 822         {
 823                 .voff   = FFB_DFB8B_VOFF,
 824                 .poff   = FFB_DFB8B_POFF,
 825                 .size   = 0x0400000
 826         },
 827         {
 828                 .voff   = FFB_DFB8X_VOFF,
 829                 .poff   = FFB_DFB8X_POFF,
 830                 .size   = 0x0400000
 831         },
 832         {
 833                 .voff   = FFB_DFB24_VOFF,
 834                 .poff   = FFB_DFB24_POFF,
 835                 .size   = 0x1000000
 836         },
 837         {
 838                 .voff   = FFB_DFB32_VOFF,
 839                 .poff   = FFB_DFB32_POFF,
 840                 .size   = 0x1000000
 841         },
 842         {
 843                 .voff   = FFB_FBC_KREGS_VOFF,
 844                 .poff   = FFB_FBC_KREGS_POFF,
 845                 .size   = 0x0002000
 846         },
 847         {
 848                 .voff   = FFB_DAC_VOFF,
 849                 .poff   = FFB_DAC_POFF,
 850                 .size   = 0x0002000
 851         },
 852         {
 853                 .voff   = FFB_PROM_VOFF,
 854                 .poff   = FFB_PROM_POFF,
 855                 .size   = 0x0010000
 856         },
 857         {
 858                 .voff   = FFB_EXP_VOFF,
 859                 .poff   = FFB_EXP_POFF,
 860                 .size   = 0x0002000
 861         },
 862         {
 863                 .voff   = FFB_DFB422A_VOFF,
 864                 .poff   = FFB_DFB422A_POFF,
 865                 .size   = 0x0800000
 866         },
 867         {
 868                 .voff   = FFB_DFB422AD_VOFF,
 869                 .poff   = FFB_DFB422AD_POFF,
 870                 .size   = 0x0800000
 871         },
 872         {
 873                 .voff   = FFB_DFB24B_VOFF,
 874                 .poff   = FFB_DFB24B_POFF,
 875                 .size   = 0x1000000
 876         },
 877         {
 878                 .voff   = FFB_DFB422B_VOFF,
 879                 .poff   = FFB_DFB422B_POFF,
 880                 .size   = 0x0800000
 881         },
 882         {
 883                 .voff   = FFB_DFB422BD_VOFF,
 884                 .poff   = FFB_DFB422BD_POFF,
 885                 .size   = 0x0800000
 886         },
 887         {
 888                 .voff   = FFB_SFB16Z_VOFF,
 889                 .poff   = FFB_SFB16Z_POFF,
 890                 .size   = 0x0800000
 891         },
 892         {
 893                 .voff   = FFB_SFB8Z_VOFF,
 894                 .poff   = FFB_SFB8Z_POFF,
 895                 .size   = 0x0800000
 896         },
 897         {
 898                 .voff   = FFB_SFB422_VOFF,
 899                 .poff   = FFB_SFB422_POFF,
 900                 .size   = 0x0800000
 901         },
 902         {
 903                 .voff   = FFB_SFB422D_VOFF,
 904                 .poff   = FFB_SFB422D_POFF,
 905                 .size   = 0x0800000
 906         },
 907         { .size = 0 }
 908 };
 909
 910 static int ffb_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma)
 911 {
 912         struct ffb_par *par = (struct ffb_par *)info->par;
 913
 914         return sbusfb_mmap_helper(ffb_mmap_map,
 915                                   par->physbase, par->fbsize,
 916                                   0, vma);
 917 }
 918
 919 static int ffb_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 920                      unsigned long arg, struct fb_info *info)
 921 {
 922         struct ffb_par *par = (struct ffb_par *) info->par;
 923
 924         return sbusfb_ioctl_helper(cmd, arg, info,
 925                                    FBTYPE_CREATOR, 24, par->fbsize);
 926 }
 927
 928 /*
 929  *  Initialisation
 930  */
 931
 932 static void
 933 ffb_init_fix(struct fb_info *info)
 934 {
 935         struct ffb_par *par = (struct ffb_par *)info->par;
 936         const char *ffb_type_name;
 937
 938         if (!(par->flags & FFB_FLAG_AFB)) {
 939                 if ((par->board_type & 0x7) == 0x3)
 940                         ffb_type_name = "Creator 3D";
 941                 else
 942                         ffb_type_name = "Creator";
 943         } else
 944                 ffb_type_name = "Elite 3D";
 945
 946         strlcpy(info->fix.id, ffb_type_name, sizeof(info->fix.id));
 947
 948         info->fix.type = FB_TYPE_PACKED_PIXELS;
 949         info->fix.visual = FB_VISUAL_TRUECOLOR;
 950
 951         /* Framebuffer length is the same regardless of resolution. */
 952         info->fix.line_length = 8192;
 953
 954         info->fix.accel = FB_ACCEL_SUN_CREATOR;
 955 }
 956
 957 static int ffb_apply_upa_parent_ranges(int parent,
 958                                        struct linux_prom64_registers *regs)
 959 {
 960         struct linux_prom64_ranges ranges[PROMREG_MAX];
 961         char name[128];
 962         int len, i;
 963
 964         prom_getproperty(parent, "name", name, sizeof(name));
 965         if (strcmp(name, "upa") != 0)
 966                 return 0;
 967
 968         len = prom_getproperty(parent, "ranges", (void *) ranges, sizeof(ranges));
 969         if (len <= 0)
 970                 return 1;
 971
 972         len /= sizeof(struct linux_prom64_ranges);
 973         for (i = 0; i < len; i++) {
 974                 struct linux_prom64_ranges *rng = &ranges[i];
 975                 u64 phys_addr = regs->phys_addr;
 976
 977                 if (phys_addr >= rng->ot_child_base &&
 978                     phys_addr < (rng->ot_child_base + rng->or_size)) {
 979                         regs->phys_addr -= rng->ot_child_base;
 980                         regs->phys_addr += rng->ot_parent_base;
 981                         return 0;
 982                 }
 983         }
 984
 985         return 1;
 986 }
 987
 988 struct all_info {
 989         struct fb_info info;
 990         struct ffb_par par;
 991         u32 pseudo_palette[256];
 992         struct list_head list;
 993 };
 994 static LIST_HEAD(ffb_list);
 995
 996 static void ffb_init_one(int node, int parent)
 997 {
 998         struct linux_prom64_registers regs[2*PROMREG_MAX];
 999         struct ffb_fbc *fbc;
1000         struct ffb_dac *dac;
1001         struct all_info *all;
1002
1003         if (prom_getproperty(node, "reg", (void *) regs, sizeof(regs)) <= 0) {
1004                 printk("ffb: Cannot get reg device node property.\n");
1005                 return;
1006         }
1007
1008         if (ffb_apply_upa_parent_ranges(parent, &regs[0])) {
1009                 printk("ffb: Cannot apply parent ranges to regs.\n");
1010                 return;
1011         }
1012
1013         all = kmalloc(sizeof(*all), GFP_KERNEL);
1014         if (!all) {
1015                 printk(KERN_ERR "ffb: Cannot allocate memory.\n");
1016                 return;
1017         }
1018         memset(all, 0, sizeof(*all));
1019
1020         INIT_LIST_HEAD(&all->list);
1021
1022         spin_lock_init(&all->par.lock);
1023         all->par.fbc = (struct ffb_fbc *)(regs[0].phys_addr + FFB_FBC_REGS_POFF);
1024         all->par.dac = (struct ffb_dac *)(regs[0].phys_addr + FFB_DAC_POFF);
1025         all->par.rop_cache = FFB_ROP_NEW;
1026         all->par.physbase = regs[0].phys_addr;
1027         all->par.prom_node = node;
1028         all->par.prom_parent_node = parent;
1029
1030         all->info.flags = FBINFO_FLAG_DEFAULT;
1031         all->info.fbops = &ffb_ops;
1032         all->info.screen_base = (char *) all->par.physbase + FFB_DFB24_POFF;
1033         all->info.currcon = -1;
1034         all->info.par = &all->par;
1035         all->info.pseudo_palette = all->pseudo_palette;
1036
1037         sbusfb_fill_var(&all->info.var, all->par.prom_node, 32);
1038         all->par.fbsize = PAGE_ALIGN(all->info.var.xres *
1039                                      all->info.var.yres *
1040                                      4);
1041         ffb_fixup_var_rgb(&all->info.var);
1042
1043         all->info.var.accel_flags = FB_ACCELF_TEXT;
1044
1045         prom_getstring(node, "name", all->par.name, sizeof(all->par.name));
1046         if (!strcmp(all->par.name, "SUNW,afb"))
1047                 all->par.flags |= FFB_FLAG_AFB;
1048
1049         all->par.board_type = prom_getintdefault(node, "board_type", 0);
1050
1051         fbc = all->par.fbc;
1052         if((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0)
1053                 upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr);
1054
1055         ffb_switch_from_graph(&all->par);
1056
1057         dac = all->par.dac;
1058         upa_writel(0x8000, &dac->type);
1059         all->par.dac_rev = upa_readl(&dac->value) >> 0x1c;
1060
1061         /* Elite3D has different DAC revision numbering, and no DAC revisions
1062          * have the reversed meaning of cursor enable.
1063          */
1064         if (all->par.flags & FFB_FLAG_AFB)
1065                 all->par.dac_rev = 10;
1066
1067         /* Unblank it just to be sure.  When there are multiple
1068          * FFB/AFB cards in the system, or it is not the OBP
1069          * chosen console, it will have video outputs off in
1070          * the DAC.
1071          */
1072         ffb_blank(0, &all->info);
1073
1074         if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
1075                 printk(KERN_ERR "ffb: Could not allocate color map.\n");
1076                 kfree(all);
1077                 return;
1078         }
1079
1080         ffb_init_fix(&all->info);
1081
1082         if (register_framebuffer(&all->info) < 0) {
1083                 printk(KERN_ERR "ffb: Could not register framebuffer.\n");
1084                 fb_dealloc_cmap(&all->info.cmap);
1085                 kfree(all);
1086                 return;
1087         }
1088
1089         list_add(&all->list, &ffb_list);
1090
1091         printk("ffb: %s at %016lx type %d DAC %d\n",
1092                ((all->par.flags & FFB_FLAG_AFB) ? "AFB" : "FFB"),
1093                regs[0].phys_addr, all->par.board_type, all->par.dac_rev);
1094 }
1095
1096 static void ffb_scan_siblings(int root)
1097 {
1098         int node, child;
1099
1100         child = prom_getchild(root);
1101         for (node = prom_searchsiblings(child, "SUNW,ffb"); node;
1102              node = prom_searchsiblings(prom_getsibling(node), "SUNW,ffb"))
1103                 ffb_init_one(node, root);
1104         for (node = prom_searchsiblings(child, "SUNW,afb"); node;
1105              node = prom_searchsiblings(prom_getsibling(node), "SUNW,afb"))
1106                 ffb_init_one(node, root);
1107 }
1108
1109 int __init ffb_init(void)
1110 {
1111         int root;
1112
1113         ffb_scan_siblings(prom_root_node);
1114
1115         root = prom_getchild(prom_root_node);
1116         for (root = prom_searchsiblings(root, "upa"); root;
1117              root = prom_searchsiblings(prom_getsibling(root), "upa"))
1118                 ffb_scan_siblings(root);
1119
1120         return 0;
1121 }
1122
1123 void __exit ffb_exit(void)
1124 {
1125         struct list_head *pos, *tmp;
1126
1127         list_for_each_safe(pos, tmp, &ffb_list) {
1128                 struct all_info *all = list_entry(pos, typeof(*all), list);
1129
1130                 unregister_framebuffer(&all->info);
1131                 fb_dealloc_cmap(&all->info.cmap);
1132                 kfree(all);
1133         }
1134 }
1135
1136 int __init
1137 ffb_setup(char *arg)
1138 {
1139         /* No cmdline options yet... */
1140         return 0;
1141 }
1142
1143 #ifdef MODULE
1144 module_init(ffb_init);
1145 module_exit(ffb_exit);
1146 #endif
1147
1148 MODULE_DESCRIPTION("framebuffer driver for Creator/Elite3D chipsets");
1149 MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
1150 MODULE_LICENSE("GPL");