2 * linux/drivers/video/kyro/STG4000Ramdac.c
4 * Copyright (C) 2002 STMicroelectronics
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/types.h>
14 #include <video/kyro.h>
16 #include "STG4000Reg.h"
17 #include "STG4000Interface.h"
19 static u32 STG_PIXEL_BUS_WIDTH = 128; /* 128 bit bus width */
20 static u32 REF_CLOCK = 14318;
23 int InitialiseRamdac(volatile STG4000REG * pSTGReg,
28 s32 VSyncPolarity, u32 * pixelClock)
31 u32 F = 0, R = 0, P = 0;
34 u32 physicalPixelDepth = 0;
35 /* Make sure DAC is in Reset */
36 tmp = STG_READ_REG(SoftwareReset);
40 STG_WRITE_REG(SoftwareReset, tmp);
43 /* Set Pixel Format */
44 tmp = STG_READ_REG(DACPixelFormat);
45 CLEAR_BITS_FRM_TO(0, 2);
47 /* Set LUT not used from 16bpp to 32 bpp ??? */
48 CLEAR_BITS_FRM_TO(8, 9);
50 switch (displayDepth) {
53 physicalPixelDepth = 16;
59 /* Set for 32 bits per pixel */
60 physicalPixelDepth = 32;
68 STG_WRITE_REG(DACPixelFormat, tmp);
70 /* Workout Bus transfer bandwidth according to pixel format */
71 ulPdiv = STG_PIXEL_BUS_WIDTH / physicalPixelDepth;
73 /* Get Screen Stride in pixels */
74 stride = displayWidth;
76 /* Set Primary size info */
77 tmp = STG_READ_REG(DACPrimSize);
78 CLEAR_BITS_FRM_TO(0, 10);
79 CLEAR_BITS_FRM_TO(12, 31);
81 ((((displayHeight - 1) << 12) | (((displayWidth / ulPdiv) -
84 STG_WRITE_REG(DACPrimSize, tmp);
88 *pixelClock = ProgramClock(REF_CLOCK, *pixelClock, &F, &R, &P);
90 /* Set DAC PLL Mode */
91 tmp = STG_READ_REG(DACPLLMode);
92 CLEAR_BITS_FRM_TO(0, 15);
93 /* tmp |= ((P-1) | ((F-2) << 2) | ((R-2) << 11)); */
94 tmp |= ((P) | ((F - 2) << 2) | ((R - 2) << 11));
95 STG_WRITE_REG(DACPLLMode, tmp);
97 /* Set Prim Address */
98 tmp = STG_READ_REG(DACPrimAddress);
99 CLEAR_BITS_FRM_TO(0, 20);
100 CLEAR_BITS_FRM_TO(20, 31);
101 STG_WRITE_REG(DACPrimAddress, tmp);
103 /* Set Cursor details with HW Cursor disabled */
104 tmp = STG_READ_REG(DACCursorCtrl);
106 STG_WRITE_REG(DACCursorCtrl, tmp);
108 tmp = STG_READ_REG(DACCursorAddr);
109 CLEAR_BITS_FRM_TO(0, 20);
110 STG_WRITE_REG(DACCursorAddr, tmp);
112 /* Set Video Window */
113 tmp = STG_READ_REG(DACVidWinStart);
114 CLEAR_BITS_FRM_TO(0, 10);
115 CLEAR_BITS_FRM_TO(16, 26);
116 STG_WRITE_REG(DACVidWinStart, tmp);
118 tmp = STG_READ_REG(DACVidWinEnd);
119 CLEAR_BITS_FRM_TO(0, 10);
120 CLEAR_BITS_FRM_TO(16, 26);
121 STG_WRITE_REG(DACVidWinEnd, tmp);
123 /* Set DAC Border Color to default */
124 tmp = STG_READ_REG(DACBorderColor);
125 CLEAR_BITS_FRM_TO(0, 23);
126 STG_WRITE_REG(DACBorderColor, tmp);
128 /* Set Graphics and Overlay Burst Control */
129 STG_WRITE_REG(DACBurstCtrl, 0x0404);
131 /* Set CRC Trigger to default */
132 tmp = STG_READ_REG(DACCrcTrigger);
134 STG_WRITE_REG(DACCrcTrigger, tmp);
136 /* Set Video Port Control to default */
137 tmp = STG_READ_REG(DigVidPortCtrl);
139 CLEAR_BITS_FRM_TO(16, 27);
140 CLEAR_BITS_FRM_TO(1, 3);
141 CLEAR_BITS_FRM_TO(10, 11);
142 STG_WRITE_REG(DigVidPortCtrl, tmp);
147 /* Ramdac control, turning output to the screen on and off */
148 void DisableRamdacOutput(volatile STG4000REG * pSTGReg)
152 /* Disable DAC for Graphics Stream Control */
153 tmp = (STG_READ_REG(DACStreamCtrl)) & ~SET_BIT(0);
154 STG_WRITE_REG(DACStreamCtrl, tmp);
157 void EnableRamdacOutput(volatile STG4000REG * pSTGReg)
161 /* Enable DAC for Graphics Stream Control */
162 tmp = (STG_READ_REG(DACStreamCtrl)) | SET_BIT(0);
163 STG_WRITE_REG(DACStreamCtrl, tmp);