drivers/video/neofb.c

   1 /*
   2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
   3  *
   4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
   5  *
   6  *
   7  * Card specific code is based on XFree86's neomagic driver.
   8  * Framebuffer framework code is based on code of cyber2000fb.
   9  *
  10  * This file is subject to the terms and conditions of the GNU General
  11  * Public License.  See the file COPYING in the main directory of this
  12  * archive for more details.
  13  *
  14  *
  15  * 0.4.1
  16  *  - Cosmetic changes (dok)
  17  *
  18  * 0.4
  19  *  - Toshiba Libretto support, allow modes larger than LCD size if
  20  *    LCD is disabled, keep BIOS settings if internal/external display
  21  *    haven't been enabled explicitly
  22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
  23  *
  24  * 0.3.3
  25  *  - Porting over to new fbdev api. (jsimmons)
  26  *
  27  * 0.3.2
  28  *  - got rid of all floating point (dok)
  29  *
  30  * 0.3.1
  31  *  - added module license (dok)
  32  *
  33  * 0.3
  34  *  - hardware accelerated clear and move for 2200 and above (dok)
  35  *  - maximum allowed dotclock is handled now (dok)
  36  *
  37  * 0.2.1
  38  *  - correct panning after X usage (dok)
  39  *  - added module and kernel parameters (dok)
  40  *  - no stretching if external display is enabled (dok)
  41  *
  42  * 0.2
  43  *  - initial version (dok)
  44  *
  45  *
  46  * TODO
  47  * - ioctl for internal/external switching
  48  * - blanking
  49  * - 32bit depth support, maybe impossible
  50  * - disable pan-on-sync, need specs
  51  *
  52  * BUGS
  53  * - white margin on bootup like with tdfxfb (colormap problem?)
  54  *
  55  */
  56
  57 #include <linux/config.h>
  58 #include <linux/module.h>
  59 #include <linux/kernel.h>
  60 #include <linux/errno.h>
  61 #include <linux/string.h>
  62 #include <linux/mm.h>
  63 #include <linux/tty.h>
  64 #include <linux/slab.h>
  65 #include <linux/delay.h>
  66 #include <linux/fb.h>
  67 #include <linux/pci.h>
  68 #include <linux/init.h>
  69 #ifdef CONFIG_TOSHIBA
  70 #include <linux/toshiba.h>
  71 extern int tosh_smm(SMMRegisters *regs);
  72 #endif
  73
  74 #include <asm/io.h>
  75 #include <asm/irq.h>
  76 #include <asm/pgtable.h>
  77 #include <asm/system.h>
  78 #include <asm/uaccess.h>
  79
  80 #ifdef CONFIG_MTRR
  81 #include <asm/mtrr.h>
  82 #endif
  83
  84 #include <video/vga.h>
  85 #include <video/neomagic.h>
  86
  87 #define NEOFB_VERSION "0.4.2"
  88
  89 /* --------------------------------------------------------------------- */
  90
  91 static int internal;
  92 static int external;
  93 static int libretto;
  94 static int nostretch;
  95 static int nopciburst;
  96 static char *mode_option __initdata = NULL;
  97
  98 #ifdef MODULE
  99
 100 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
 101 MODULE_LICENSE("GPL");
 102 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
 103 MODULE_PARM(internal, "i");
 104 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
 105 MODULE_PARM(external, "i");
 106 MODULE_PARM_DESC(external, "Enable output on external CRT.");
 107 MODULE_PARM(libretto, "i");
 108 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
 109 MODULE_PARM(nostretch, "i");
 110 MODULE_PARM_DESC(nostretch,
 111                  "Disable stretching of modes smaller than LCD.");
 112 MODULE_PARM(nopciburst, "i");
 113 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
 114 MODULE_PARM(mode_option, "s");
 115 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
 116
 117 #endif
 118
 119
 120 /* --------------------------------------------------------------------- */
 121
 122 static biosMode bios8[] = {
 123         {320, 240, 0x40},
 124         {300, 400, 0x42},
 125         {640, 400, 0x20},
 126         {640, 480, 0x21},
 127         {800, 600, 0x23},
 128         {1024, 768, 0x25},
 129 };
 130
 131 static biosMode bios16[] = {
 132         {320, 200, 0x2e},
 133         {320, 240, 0x41},
 134         {300, 400, 0x43},
 135         {640, 480, 0x31},
 136         {800, 600, 0x34},
 137         {1024, 768, 0x37},
 138 };
 139
 140 static biosMode bios24[] = {
 141         {640, 480, 0x32},
 142         {800, 600, 0x35},
 143         {1024, 768, 0x38}
 144 };
 145
 146 #ifdef NO_32BIT_SUPPORT_YET
 147 /* FIXME: guessed values, wrong */
 148 static biosMode bios32[] = {
 149         {640, 480, 0x33},
 150         {800, 600, 0x36},
 151         {1024, 768, 0x39}
 152 };
 153 #endif
 154
 155 static inline u32 read_le32(int regindex, const struct neofb_par *par)
 156 {
 157         return readl(par->neo2200 + par->cursorOff + regindex);
 158 }
 159
 160 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
 161 {
 162         writel(val, par->neo2200 + par->cursorOff + regindex);
 163 }
 164
 165 static int neoFindMode(int xres, int yres, int depth)
 166 {
 167         int xres_s;
 168         int i, size;
 169         biosMode *mode;
 170
 171         switch (depth) {
 172         case 8:
 173                 size = sizeof(bios8) / sizeof(biosMode);
 174                 mode = bios8;
 175                 break;
 176         case 16:
 177                 size = sizeof(bios16) / sizeof(biosMode);
 178                 mode = bios16;
 179                 break;
 180         case 24:
 181                 size = sizeof(bios24) / sizeof(biosMode);
 182                 mode = bios24;
 183                 break;
 184 #ifdef NO_32BIT_SUPPORT_YET
 185         case 32:
 186                 size = sizeof(bios32) / sizeof(biosMode);
 187                 mode = bios32;
 188                 break;
 189 #endif
 190         default:
 191                 return 0;
 192         }
 193
 194         for (i = 0; i < size; i++) {
 195                 if (xres <= mode[i].x_res) {
 196                         xres_s = mode[i].x_res;
 197                         for (; i < size; i++) {
 198                                 if (mode[i].x_res != xres_s)
 199                                         return mode[i - 1].mode;
 200                                 if (yres <= mode[i].y_res)
 201                                         return mode[i].mode;
 202                         }
 203                 }
 204         }
 205         return mode[size - 1].mode;
 206 }
 207
 208 /*
 209  * neoCalcVCLK --
 210  *
 211  * Determine the closest clock frequency to the one requested.
 212  */
 213 #define REF_FREQ 0xe517         /* 14.31818 in 20.12 fixed point */
 214 #define MAX_N 127
 215 #define MAX_D 31
 216 #define MAX_F 1
 217
 218 static void neoCalcVCLK(const struct fb_info *info,
 219                         struct neofb_par *par, long freq)
 220 {
 221         int n, d, f;
 222         int n_best = 0, d_best = 0, f_best = 0;
 223         long f_best_diff = (0x7ffff << 12);     /* 20.12 */
 224         long f_target = (freq << 12) / 1000;    /* 20.12 */
 225
 226         for (f = 0; f <= MAX_F; f++)
 227                 for (n = 0; n <= MAX_N; n++)
 228                         for (d = 0; d <= MAX_D; d++) {
 229                                 long f_out;     /* 20.12 */
 230                                 long f_diff;    /* 20.12 */
 231
 232                                 f_out =
 233                                     ((((n + 1) << 12) / ((d +
 234                                                           1) *
 235                                                          (1 << f))) >> 12)
 236                                     * REF_FREQ;
 237                                 f_diff = abs(f_out - f_target);
 238                                 if (f_diff < f_best_diff) {
 239                                         f_best_diff = f_diff;
 240                                         n_best = n;
 241                                         d_best = d;
 242                                         f_best = f;
 243                                 }
 244                         }
 245
 246         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
 247             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
 248             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
 249             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
 250                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
 251                    We should be able to try n up to 2047 */
 252                 par->VCLK3NumeratorLow = n_best;
 253                 par->VCLK3NumeratorHigh = (f_best << 7);
 254         } else
 255                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
 256
 257         par->VCLK3Denominator = d_best;
 258
 259 #ifdef NEOFB_DEBUG
 260         printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n",
 261                f_target >> 12,
 262                par->VCLK3NumeratorLow,
 263                par->VCLK3NumeratorHigh,
 264                par->VCLK3Denominator, f_best_diff >> 12);
 265 #endif
 266 }
 267
 268 /*
 269  * vgaHWInit --
 270  *      Handle the initialization, etc. of a screen.
 271  *      Return FALSE on failure.
 272  */
 273
 274 static int vgaHWInit(const struct fb_var_screeninfo *var,
 275                      const struct fb_info *info,
 276                      struct neofb_par *par, struct xtimings *timings)
 277 {
 278         par->MiscOutReg = 0x23;
 279
 280         if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
 281                 par->MiscOutReg |= 0x40;
 282
 283         if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
 284                 par->MiscOutReg |= 0x80;
 285
 286         /*
 287          * Time Sequencer
 288          */
 289         par->Sequencer[0] = 0x00;
 290         par->Sequencer[1] = 0x01;
 291         par->Sequencer[2] = 0x0F;
 292         par->Sequencer[3] = 0x00;       /* Font select */
 293         par->Sequencer[4] = 0x0E;       /* Misc */
 294
 295         /*
 296          * CRTC Controller
 297          */
 298         par->CRTC[0] = (timings->HTotal >> 3) - 5;
 299         par->CRTC[1] = (timings->HDisplay >> 3) - 1;
 300         par->CRTC[2] = (timings->HDisplay >> 3) - 1;
 301         par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
 302         par->CRTC[4] = (timings->HSyncStart >> 3);
 303         par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
 304             | (((timings->HSyncEnd >> 3)) & 0x1F);
 305         par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
 306         par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
 307             | (((timings->VDisplay - 1) & 0x100) >> 7)
 308             | ((timings->VSyncStart & 0x100) >> 6)
 309             | (((timings->VDisplay - 1) & 0x100) >> 5)
 310             | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
 311             | (((timings->VDisplay - 1) & 0x200) >> 3)
 312             | ((timings->VSyncStart & 0x200) >> 2);
 313         par->CRTC[8] = 0x00;
 314         par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
 315
 316         if (timings->dblscan)
 317                 par->CRTC[9] |= 0x80;
 318
 319         par->CRTC[10] = 0x00;
 320         par->CRTC[11] = 0x00;
 321         par->CRTC[12] = 0x00;
 322         par->CRTC[13] = 0x00;
 323         par->CRTC[14] = 0x00;
 324         par->CRTC[15] = 0x00;
 325         par->CRTC[16] = timings->VSyncStart & 0xFF;
 326         par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
 327         par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
 328         par->CRTC[19] = var->xres_virtual >> 4;
 329         par->CRTC[20] = 0x00;
 330         par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
 331         par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
 332         par->CRTC[23] = 0xC3;
 333         par->CRTC[24] = 0xFF;
 334
 335         /*
 336          * are these unnecessary?
 337          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 338          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 339          */
 340
 341         /*
 342          * Graphics Display Controller
 343          */
 344         par->Graphics[0] = 0x00;
 345         par->Graphics[1] = 0x00;
 346         par->Graphics[2] = 0x00;
 347         par->Graphics[3] = 0x00;
 348         par->Graphics[4] = 0x00;
 349         par->Graphics[5] = 0x40;
 350         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
 351         par->Graphics[7] = 0x0F;
 352         par->Graphics[8] = 0xFF;
 353
 354
 355         par->Attribute[0] = 0x00;       /* standard colormap translation */
 356         par->Attribute[1] = 0x01;
 357         par->Attribute[2] = 0x02;
 358         par->Attribute[3] = 0x03;
 359         par->Attribute[4] = 0x04;
 360         par->Attribute[5] = 0x05;
 361         par->Attribute[6] = 0x06;
 362         par->Attribute[7] = 0x07;
 363         par->Attribute[8] = 0x08;
 364         par->Attribute[9] = 0x09;
 365         par->Attribute[10] = 0x0A;
 366         par->Attribute[11] = 0x0B;
 367         par->Attribute[12] = 0x0C;
 368         par->Attribute[13] = 0x0D;
 369         par->Attribute[14] = 0x0E;
 370         par->Attribute[15] = 0x0F;
 371         par->Attribute[16] = 0x41;
 372         par->Attribute[17] = 0xFF;
 373         par->Attribute[18] = 0x0F;
 374         par->Attribute[19] = 0x00;
 375         par->Attribute[20] = 0x00;
 376         return 0;
 377 }
 378
 379 static void vgaHWLock(struct vgastate *state)
 380 {
 381         /* Protect CRTC[0-7] */
 382         vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
 383 }
 384
 385 static void vgaHWUnlock(void)
 386 {
 387         /* Unprotect CRTC[0-7] */
 388         vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
 389 }
 390
 391 static void neoLock(struct vgastate *state)
 392 {
 393         vga_wgfx(state->vgabase, 0x09, 0x00);
 394         vgaHWLock(state);
 395 }
 396
 397 static void neoUnlock(void)
 398 {
 399         vgaHWUnlock();
 400         vga_wgfx(NULL, 0x09, 0x26);
 401 }
 402
 403 /*
 404  * VGA Palette management
 405  */
 406 static int paletteEnabled = 0;
 407
 408 inline void VGAenablePalette(void)
 409 {
 410         vga_r(NULL, VGA_IS1_RC);
 411         vga_w(NULL, VGA_ATT_W, 0x00);
 412         paletteEnabled = 1;
 413 }
 414
 415 inline void VGAdisablePalette(void)
 416 {
 417         vga_r(NULL, VGA_IS1_RC);
 418         vga_w(NULL, VGA_ATT_W, 0x20);
 419         paletteEnabled = 0;
 420 }
 421
 422 inline void VGAwATTR(u8 index, u8 value)
 423 {
 424         if (paletteEnabled)
 425                 index &= ~0x20;
 426         else
 427                 index |= 0x20;
 428
 429         vga_r(NULL, VGA_IS1_RC);
 430         vga_wattr(NULL, index, value);
 431 }
 432
 433 void vgaHWProtect(int on)
 434 {
 435         unsigned char tmp;
 436
 437         if (on) {
 438                 /*
 439                  * Turn off screen and disable sequencer.
 440                  */
 441                 tmp = vga_rseq(NULL, 0x01);
 442                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
 443                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
 444
 445                 VGAenablePalette();
 446         } else {
 447                 /*
 448                  * Reenable sequencer, then turn on screen.
 449                  */
 450                 tmp = vga_rseq(NULL, 0x01);
 451                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
 452                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
 453
 454                 VGAdisablePalette();
 455         }
 456 }
 457
 458 static void vgaHWRestore(const struct fb_info *info,
 459                          const struct neofb_par *par)
 460 {
 461         int i;
 462
 463         vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
 464
 465         for (i = 1; i < 5; i++)
 466                 vga_wseq(NULL, i, par->Sequencer[i]);
 467
 468         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
 469         vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
 470
 471         for (i = 0; i < 25; i++)
 472                 vga_wcrt(NULL, i, par->CRTC[i]);
 473
 474         for (i = 0; i < 9; i++)
 475                 vga_wgfx(NULL, i, par->Graphics[i]);
 476
 477         VGAenablePalette();
 478
 479         for (i = 0; i < 21; i++)
 480                 VGAwATTR(i, par->Attribute[i]);
 481
 482         VGAdisablePalette();
 483 }
 484
 485
 486 /* -------------------- Hardware specific routines ------------------------- */
 487
 488 /*
 489  * Hardware Acceleration for Neo2200+
 490  */
 491 static inline int neo2200_sync(struct fb_info *info)
 492 {
 493         struct neofb_par *par = (struct neofb_par *) info->par;
 494         int waitcycles;
 495
 496         while (par->neo2200->bltStat & 1)
 497                 waitcycles++;
 498         return 0;
 499 }
 500
 501 static inline void neo2200_wait_fifo(struct fb_info *info,
 502                                      int requested_fifo_space)
 503 {
 504         //  ndev->neo.waitfifo_calls++;
 505         //  ndev->neo.waitfifo_sum += requested_fifo_space;
 506
 507         /* FIXME: does not work
 508            if (neo_fifo_space < requested_fifo_space)
 509            {
 510            neo_fifo_waitcycles++;
 511
 512            while (1)
 513            {
 514            neo_fifo_space = (neo2200->bltStat >> 8);
 515            if (neo_fifo_space >= requested_fifo_space)
 516            break;
 517            }
 518            }
 519            else
 520            {
 521            neo_fifo_cache_hits++;
 522            }
 523
 524            neo_fifo_space -= requested_fifo_space;
 525          */
 526
 527         neo2200_sync(info);
 528 }
 529
 530 static inline void neo2200_accel_init(struct fb_info *info,
 531                                       struct fb_var_screeninfo *var)
 532 {
 533         struct neofb_par *par = (struct neofb_par *) info->par;
 534         Neo2200 *neo2200 = par->neo2200;
 535         u32 bltMod, pitch;
 536
 537         neo2200_sync(info);
 538
 539         switch (var->bits_per_pixel) {
 540         case 8:
 541                 bltMod = NEO_MODE1_DEPTH8;
 542                 pitch = var->xres_virtual;
 543                 break;
 544         case 15:
 545         case 16:
 546                 bltMod = NEO_MODE1_DEPTH16;
 547                 pitch = var->xres_virtual * 2;
 548                 break;
 549         case 24:
 550                 bltMod = NEO_MODE1_DEPTH24;
 551                 pitch = var->xres_virtual * 3;
 552                 break;
 553         default:
 554                 printk(KERN_ERR
 555                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
 556                 return;
 557         }
 558
 559         neo2200->bltStat = bltMod << 16;
 560         neo2200->pitch = (pitch << 16) | pitch;
 561 }
 562
 563 /* --------------------------------------------------------------------- */
 564
 565 static int
 566 neofb_open(struct fb_info *info, int user)
 567 {
 568         struct neofb_par *par = (struct neofb_par *) info->par;
 569         int cnt = atomic_read(&par->ref_count);
 570
 571         if (!cnt) {
 572                 memset(&par->state, 0, sizeof(struct vgastate));
 573                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
 574                 save_vga(&par->state);
 575         }
 576         atomic_inc(&par->ref_count);
 577         return 0;
 578 }
 579
 580 static int
 581 neofb_release(struct fb_info *info, int user)
 582 {
 583         struct neofb_par *par = (struct neofb_par *) info->par;
 584         int cnt = atomic_read(&par->ref_count);
 585
 586         if (!cnt)
 587                 return -EINVAL;
 588         if (cnt == 1) {
 589                 restore_vga(&par->state);
 590         }
 591         atomic_dec(&par->ref_count);
 592         return 0;
 593 }
 594
 595 static int
 596 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 597 {
 598         struct neofb_par *par = (struct neofb_par *) info->par;
 599         unsigned int pixclock = var->pixclock;
 600         struct xtimings timings;
 601         int memlen, vramlen;
 602         int mode_ok = 0;
 603
 604         DBG("neofb_check_var");
 605
 606         if (!pixclock)
 607                 pixclock = 10000;       /* 10ns = 100MHz */
 608         timings.pixclock = 1000000000 / pixclock;
 609         if (timings.pixclock < 1)
 610                 timings.pixclock = 1;
 611
 612         if (timings.pixclock > par->maxClock)
 613                 return -EINVAL;
 614
 615         timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
 616         timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
 617         timings.HDisplay = var->xres;
 618         timings.HSyncStart = timings.HDisplay + var->right_margin;
 619         timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
 620         timings.HTotal = timings.HSyncEnd + var->left_margin;
 621         timings.VDisplay = var->yres;
 622         timings.VSyncStart = timings.VDisplay + var->lower_margin;
 623         timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
 624         timings.VTotal = timings.VSyncEnd + var->upper_margin;
 625         timings.sync = var->sync;
 626
 627         /* Is the mode larger than the LCD panel? */
 628         if (par->internal_display &&
 629             ((var->xres > par->NeoPanelWidth) ||
 630              (var->yres > par->NeoPanelHeight))) {
 631                 printk(KERN_INFO
 632                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
 633                        var->xres, var->yres, par->NeoPanelWidth,
 634                        par->NeoPanelHeight);
 635                 return -EINVAL;
 636         }
 637
 638         /* Is the mode one of the acceptable sizes? */
 639         if (!par->internal_display)
 640                 mode_ok = 1;
 641         else {
 642                 switch (var->xres) {
 643                 case 1280:
 644                         if (var->yres == 1024)
 645                                 mode_ok = 1;
 646                         break;
 647                 case 1024:
 648                         if (var->yres == 768)
 649                                 mode_ok = 1;
 650                         break;
 651                 case 800:
 652                         if (var->yres == (par->libretto ? 480 : 600))
 653                                 mode_ok = 1;
 654                         break;
 655                 case 640:
 656                         if (var->yres == 480)
 657                                 mode_ok = 1;
 658                         break;
 659                 }
 660         }
 661
 662         if (!mode_ok) {
 663                 printk(KERN_INFO
 664                        "Mode (%dx%d) won't display properly on LCD\n",
 665                        var->xres, var->yres);
 666                 return -EINVAL;
 667         }
 668
 669         var->red.msb_right = 0;
 670         var->green.msb_right = 0;
 671         var->blue.msb_right = 0;
 672
 673         switch (var->bits_per_pixel) {
 674         case 8:         /* PSEUDOCOLOUR, 256 */
 675                 var->transp.offset = 0;
 676                 var->transp.length = 0;
 677                 var->red.offset = 0;
 678                 var->red.length = 8;
 679                 var->green.offset = 0;
 680                 var->green.length = 8;
 681                 var->blue.offset = 0;
 682                 var->blue.length = 8;
 683                 break;
 684
 685         case 16:                /* DIRECTCOLOUR, 64k */
 686                 var->transp.offset = 0;
 687                 var->transp.length = 0;
 688                 var->red.offset = 11;
 689                 var->red.length = 5;
 690                 var->green.offset = 5;
 691                 var->green.length = 6;
 692                 var->blue.offset = 0;
 693                 var->blue.length = 5;
 694                 break;
 695
 696         case 24:                /* TRUECOLOUR, 16m */
 697                 var->transp.offset = 0;
 698                 var->transp.length = 0;
 699                 var->red.offset = 16;
 700                 var->red.length = 8;
 701                 var->green.offset = 8;
 702                 var->green.length = 8;
 703                 var->blue.offset = 0;
 704                 var->blue.length = 8;
 705                 break;
 706
 707 #ifdef NO_32BIT_SUPPORT_YET
 708         case 32:                /* TRUECOLOUR, 16m */
 709                 var->transp.offset = 24;
 710                 var->transp.length = 8;
 711                 var->red.offset = 16;
 712                 var->red.length = 8;
 713                 var->green.offset = 8;
 714                 var->green.length = 8;
 715                 var->blue.offset = 0;
 716                 var->blue.length = 8;
 717                 break;
 718 #endif
 719         default:
 720                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
 721                        var->bits_per_pixel);
 722                 return -EINVAL;
 723         }
 724
 725         vramlen = info->fix.smem_len;
 726         if (vramlen > 4 * 1024 * 1024)
 727                 vramlen = 4 * 1024 * 1024;
 728
 729         if (var->yres_virtual < var->yres)
 730                 var->yres_virtual = var->yres;
 731         if (var->xres_virtual < var->xres)
 732                 var->xres_virtual = var->xres;
 733
 734         memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
 735
 736         if (memlen > vramlen) {
 737                 var->yres_virtual =  vramlen * 8 / (var->xres_virtual *
 738                                         var->bits_per_pixel);
 739                 memlen = var->xres_virtual * var->bits_per_pixel *
 740                                 var->yres_virtual / 8;
 741         }
 742
 743         /* we must round yres/xres down, we already rounded y/xres_virtual up
 744            if it was possible. We should return -EINVAL, but I disagree */
 745         if (var->yres_virtual < var->yres)
 746                 var->yres = var->yres_virtual;
 747         if (var->xres_virtual < var->xres)
 748                 var->xres = var->xres_virtual;
 749         if (var->xoffset + var->xres > var->xres_virtual)
 750                 var->xoffset = var->xres_virtual - var->xres;
 751         if (var->yoffset + var->yres > var->yres_virtual)
 752                 var->yoffset = var->yres_virtual - var->yres;
 753
 754         var->nonstd = 0;
 755         var->height = -1;
 756         var->width = -1;
 757
 758         if (var->bits_per_pixel >= 24 || !par->neo2200)
 759                 var->accel_flags &= ~FB_ACCELF_TEXT;
 760         return 0;
 761 }
 762
 763 static int neofb_set_par(struct fb_info *info)
 764 {
 765         struct neofb_par *par = (struct neofb_par *) info->par;
 766         struct xtimings timings;
 767         unsigned char temp;
 768         int i, clock_hi = 0;
 769         int lcd_stretch;
 770         int hoffset, voffset;
 771
 772         DBG("neofb_set_par");
 773
 774         neoUnlock();
 775
 776         vgaHWProtect(1);        /* Blank the screen */
 777
 778         timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
 779         timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
 780         timings.HDisplay = info->var.xres;
 781         timings.HSyncStart = timings.HDisplay + info->var.right_margin;
 782         timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
 783         timings.HTotal = timings.HSyncEnd + info->var.left_margin;
 784         timings.VDisplay = info->var.yres;
 785         timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
 786         timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
 787         timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
 788         timings.sync = info->var.sync;
 789         timings.pixclock = PICOS2KHZ(info->var.pixclock);
 790
 791         if (timings.pixclock < 1)
 792                 timings.pixclock = 1;
 793
 794         /*
 795          * This will allocate the datastructure and initialize all of the
 796          * generic VGA registers.
 797          */
 798
 799         if (vgaHWInit(&info->var, info, par, &timings))
 800                 return -EINVAL;
 801
 802         /*
 803          * The default value assigned by vgaHW.c is 0x41, but this does
 804          * not work for NeoMagic.
 805          */
 806         par->Attribute[16] = 0x01;
 807
 808         switch (info->var.bits_per_pixel) {
 809         case 8:
 810                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
 811                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
 812                 par->ExtColorModeSelect = 0x11;
 813                 break;
 814         case 16:
 815                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
 816                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
 817                 par->ExtColorModeSelect = 0x13;
 818                 break;
 819         case 24:
 820                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
 821                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
 822                 par->ExtColorModeSelect = 0x14;
 823                 break;
 824 #ifdef NO_32BIT_SUPPORT_YET
 825         case 32:                /* FIXME: guessed values */
 826                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
 827                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
 828                 par->ExtColorModeSelect = 0x15;
 829                 break;
 830 #endif
 831         default:
 832                 break;
 833         }
 834
 835         par->ExtCRTDispAddr = 0x10;
 836
 837         /* Vertical Extension */
 838         par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
 839             | (((timings.VDisplay - 1) & 0x400) >> 9)
 840             | (((timings.VSyncStart) & 0x400) >> 8)
 841             | (((timings.VSyncStart) & 0x400) >> 7);
 842
 843         /* Fast write bursts on unless disabled. */
 844         if (par->pci_burst)
 845                 par->SysIfaceCntl1 = 0x30;
 846         else
 847                 par->SysIfaceCntl1 = 0x00;
 848
 849         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
 850
 851         /* Enable any user specified display devices. */
 852         par->PanelDispCntlReg1 = 0x00;
 853         if (par->internal_display)
 854                 par->PanelDispCntlReg1 |= 0x02;
 855         if (par->external_display)
 856                 par->PanelDispCntlReg1 |= 0x01;
 857
 858         /* If the user did not specify any display devices, then... */
 859         if (par->PanelDispCntlReg1 == 0x00) {
 860                 /* Default to internal (i.e., LCD) only. */
 861                 par->PanelDispCntlReg1 |= 0x02;
 862         }
 863
 864         /* If we are using a fixed mode, then tell the chip we are. */
 865         switch (info->var.xres) {
 866         case 1280:
 867                 par->PanelDispCntlReg1 |= 0x60;
 868                 break;
 869         case 1024:
 870                 par->PanelDispCntlReg1 |= 0x40;
 871                 break;
 872         case 800:
 873                 par->PanelDispCntlReg1 |= 0x20;
 874                 break;
 875         case 640:
 876         default:
 877                 break;
 878         }
 879
 880         /* Setup shadow register locking. */
 881         switch (par->PanelDispCntlReg1 & 0x03) {
 882         case 0x01:              /* External CRT only mode: */
 883                 par->GeneralLockReg = 0x00;
 884                 /* We need to program the VCLK for external display only mode. */
 885                 par->ProgramVCLK = 1;
 886                 break;
 887         case 0x02:              /* Internal LCD only mode: */
 888         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
 889                 par->GeneralLockReg = 0x01;
 890                 /* Don't program the VCLK when using the LCD. */
 891                 par->ProgramVCLK = 0;
 892                 break;
 893         }
 894
 895         /*
 896          * If the screen is to be stretched, turn on stretching for the
 897          * various modes.
 898          *
 899          * OPTION_LCD_STRETCH means stretching should be turned off!
 900          */
 901         par->PanelDispCntlReg2 = 0x00;
 902         par->PanelDispCntlReg3 = 0x00;
 903
 904         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
 905             (info->var.xres != par->NeoPanelWidth)) {
 906                 switch (info->var.xres) {
 907                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
 908                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
 909                 case 640:
 910                 case 800:
 911                 case 1024:
 912                         lcd_stretch = 1;
 913                         par->PanelDispCntlReg2 |= 0xC6;
 914                         break;
 915                 default:
 916                         lcd_stretch = 0;
 917                         /* No stretching in these modes. */
 918                 }
 919         } else
 920                 lcd_stretch = 0;
 921
 922         /*
 923          * If the screen is to be centerd, turn on the centering for the
 924          * various modes.
 925          */
 926         par->PanelVertCenterReg1 = 0x00;
 927         par->PanelVertCenterReg2 = 0x00;
 928         par->PanelVertCenterReg3 = 0x00;
 929         par->PanelVertCenterReg4 = 0x00;
 930         par->PanelVertCenterReg5 = 0x00;
 931         par->PanelHorizCenterReg1 = 0x00;
 932         par->PanelHorizCenterReg2 = 0x00;
 933         par->PanelHorizCenterReg3 = 0x00;
 934         par->PanelHorizCenterReg4 = 0x00;
 935         par->PanelHorizCenterReg5 = 0x00;
 936
 937
 938         if (par->PanelDispCntlReg1 & 0x02) {
 939                 if (info->var.xres == par->NeoPanelWidth) {
 940                         /*
 941                          * No centering required when the requested display width
 942                          * equals the panel width.
 943                          */
 944                 } else {
 945                         par->PanelDispCntlReg2 |= 0x01;
 946                         par->PanelDispCntlReg3 |= 0x10;
 947
 948                         /* Calculate the horizontal and vertical offsets. */
 949                         if (!lcd_stretch) {
 950                                 hoffset =
 951                                     ((par->NeoPanelWidth -
 952                                       info->var.xres) >> 4) - 1;
 953                                 voffset =
 954                                     ((par->NeoPanelHeight -
 955                                       info->var.yres) >> 1) - 2;
 956                         } else {
 957                                 /* Stretched modes cannot be centered. */
 958                                 hoffset = 0;
 959                                 voffset = 0;
 960                         }
 961
 962                         switch (info->var.xres) {
 963                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
 964                                 par->PanelHorizCenterReg3 = hoffset;
 965                                 par->PanelVertCenterReg2 = voffset;
 966                                 break;
 967                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
 968                                 par->PanelHorizCenterReg4 = hoffset;
 969                                 par->PanelVertCenterReg1 = voffset;
 970                                 break;
 971                         case 640:
 972                                 par->PanelHorizCenterReg1 = hoffset;
 973                                 par->PanelVertCenterReg3 = voffset;
 974                                 break;
 975                         case 800:
 976                                 par->PanelHorizCenterReg2 = hoffset;
 977                                 par->PanelVertCenterReg4 = voffset;
 978                                 break;
 979                         case 1024:
 980                                 par->PanelHorizCenterReg5 = hoffset;
 981                                 par->PanelVertCenterReg5 = voffset;
 982                                 break;
 983                         case 1280:
 984                         default:
 985                                 /* No centering in these modes. */
 986                                 break;
 987                         }
 988                 }
 989         }
 990
 991         par->biosMode =
 992             neoFindMode(info->var.xres, info->var.yres,
 993                         info->var.bits_per_pixel);
 994
 995         /*
 996          * Calculate the VCLK that most closely matches the requested dot
 997          * clock.
 998          */
 999         neoCalcVCLK(info, par, timings.pixclock);
1000
1001         /* Since we program the clocks ourselves, always use VCLK3. */
1002         par->MiscOutReg |= 0x0C;
1003
1004         /* alread unlocked above */
1005         /* BOGUS  vga_wgfx(NULL, 0x09, 0x26); */
1006
1007         /* don't know what this is, but it's 0 from bootup anyway */
1008         vga_wgfx(NULL, 0x15, 0x00);
1009
1010         /* was set to 0x01 by my bios in text and vesa modes */
1011         vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
1012
1013         /*
1014          * The color mode needs to be set before calling vgaHWRestore
1015          * to ensure the DAC is initialized properly.
1016          *
1017          * NOTE: Make sure we don't change bits make sure we don't change
1018          * any reserved bits.
1019          */
1020         temp = vga_rgfx(NULL, 0x90);
1021         switch (info->fix.accel) {
1022         case FB_ACCEL_NEOMAGIC_NM2070:
1023                 temp &= 0xF0;   /* Save bits 7:4 */
1024                 temp |= (par->ExtColorModeSelect & ~0xF0);
1025                 break;
1026         case FB_ACCEL_NEOMAGIC_NM2090:
1027         case FB_ACCEL_NEOMAGIC_NM2093:
1028         case FB_ACCEL_NEOMAGIC_NM2097:
1029         case FB_ACCEL_NEOMAGIC_NM2160:
1030         case FB_ACCEL_NEOMAGIC_NM2200:
1031         case FB_ACCEL_NEOMAGIC_NM2230:
1032         case FB_ACCEL_NEOMAGIC_NM2360:
1033         case FB_ACCEL_NEOMAGIC_NM2380:
1034                 temp &= 0x70;   /* Save bits 6:4 */
1035                 temp |= (par->ExtColorModeSelect & ~0x70);
1036                 break;
1037         }
1038
1039         vga_wgfx(NULL, 0x90, temp);
1040
1041         /*
1042          * In some rare cases a lockup might occur if we don't delay
1043          * here. (Reported by Miles Lane)
1044          */
1045         //mdelay(200);
1046
1047         /*
1048          * Disable horizontal and vertical graphics and text expansions so
1049          * that vgaHWRestore works properly.
1050          */
1051         temp = vga_rgfx(NULL, 0x25);
1052         temp &= 0x39;
1053         vga_wgfx(NULL, 0x25, temp);
1054
1055         /*
1056          * Sleep for 200ms to make sure that the two operations above have
1057          * had time to take effect.
1058          */
1059         mdelay(200);
1060
1061         /*
1062          * This function handles restoring the generic VGA registers.  */
1063         vgaHWRestore(info, par);
1064
1065         /* linear colormap for non palettized modes */
1066         switch (info->var.bits_per_pixel) {
1067         case 8:
1068                 /* PseudoColor, 256 */
1069                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1070                 break;
1071         case 16:
1072                 /* TrueColor, 64k */
1073                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1074
1075                 for (i = 0; i < 64; i++) {
1076                         outb(i, 0x3c8);
1077
1078                         outb(i << 1, 0x3c9);
1079                         outb(i, 0x3c9);
1080                         outb(i << 1, 0x3c9);
1081                 }
1082                 break;
1083         case 24:
1084 #ifdef NO_32BIT_SUPPORT_YET
1085         case 32:
1086 #endif
1087                 /* TrueColor, 16m */
1088                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1089
1090                 for (i = 0; i < 256; i++) {
1091                         outb(i, 0x3c8);
1092
1093                         outb(i, 0x3c9);
1094                         outb(i, 0x3c9);
1095                         outb(i, 0x3c9);
1096                 }
1097                 break;
1098         }
1099
1100         vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1101         vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1102         temp = vga_rgfx(NULL, 0x10);
1103         temp &= 0x0F;           /* Save bits 3:0 */
1104         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1105         vga_wgfx(NULL, 0x10, temp);
1106
1107         vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1108         vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1109         vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1110
1111         temp = vga_rgfx(NULL, 0x20);
1112         switch (info->fix.accel) {
1113         case FB_ACCEL_NEOMAGIC_NM2070:
1114                 temp &= 0xFC;   /* Save bits 7:2 */
1115                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1116                 break;
1117         case FB_ACCEL_NEOMAGIC_NM2090:
1118         case FB_ACCEL_NEOMAGIC_NM2093:
1119         case FB_ACCEL_NEOMAGIC_NM2097:
1120         case FB_ACCEL_NEOMAGIC_NM2160:
1121                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1122                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1123                 break;
1124         case FB_ACCEL_NEOMAGIC_NM2200:
1125         case FB_ACCEL_NEOMAGIC_NM2230:
1126         case FB_ACCEL_NEOMAGIC_NM2360:
1127         case FB_ACCEL_NEOMAGIC_NM2380:
1128                 temp &= 0x98;   /* Save bits 7,4:3 */
1129                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1130                 break;
1131         }
1132         vga_wgfx(NULL, 0x20, temp);
1133
1134         temp = vga_rgfx(NULL, 0x25);
1135         temp &= 0x38;           /* Save bits 5:3 */
1136         temp |= (par->PanelDispCntlReg2 & ~0x38);
1137         vga_wgfx(NULL, 0x25, temp);
1138
1139         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1140                 temp = vga_rgfx(NULL, 0x30);
1141                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1142                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1143                 vga_wgfx(NULL, 0x30, temp);
1144         }
1145
1146         vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1147         vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1148         vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1149
1150         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1151                 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1152                 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1153                 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1154                 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1155         }
1156
1157         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1158                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1159
1160         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1161             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1162             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1163             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1164                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1165                 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1166                 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1167
1168                 clock_hi = 1;
1169         }
1170
1171         /* Program VCLK3 if needed. */
1172         if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1173                                  || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1174                                  || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1175                                                   != (par->VCLK3NumeratorHigh &
1176                                                       ~0x0F))))) {
1177                 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1178                 if (clock_hi) {
1179                         temp = vga_rgfx(NULL, 0x8F);
1180                         temp &= 0x0F;   /* Save bits 3:0 */
1181                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1182                         vga_wgfx(NULL, 0x8F, temp);
1183                 }
1184                 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1185         }
1186
1187         if (par->biosMode)
1188                 vga_wcrt(NULL, 0x23, par->biosMode);
1189
1190         vga_wgfx(NULL, 0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1191
1192         /* Program vertical extension register */
1193         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1194             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1195             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1196             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1197                 vga_wcrt(NULL, 0x70, par->VerticalExt);
1198         }
1199
1200         vgaHWProtect(0);        /* Turn on screen */
1201
1202         /* Calling this also locks offset registers required in update_start */
1203         neoLock(&par->state);
1204
1205         info->fix.line_length =
1206             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1207
1208         switch (info->fix.accel) {
1209                 case FB_ACCEL_NEOMAGIC_NM2200:
1210                 case FB_ACCEL_NEOMAGIC_NM2230:
1211                 case FB_ACCEL_NEOMAGIC_NM2360:
1212                 case FB_ACCEL_NEOMAGIC_NM2380:
1213                         neo2200_accel_init(info, &info->var);
1214                         break;
1215                 default:
1216                         break;
1217         }
1218         return 0;
1219 }
1220
1221 static void neofb_update_start(struct fb_info *info,
1222                                struct fb_var_screeninfo *var)
1223 {
1224         struct neofb_par *par = (struct neofb_par *) info->par;
1225         struct vgastate *state = &par->state;
1226         int oldExtCRTDispAddr;
1227         int Base;
1228
1229         DBG("neofb_update_start");
1230
1231         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1232         Base *= (var->bits_per_pixel + 7) / 8;
1233
1234         neoUnlock();
1235
1236         /*
1237          * These are the generic starting address registers.
1238          */
1239         vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1240         vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1241
1242         /*
1243          * Make sure we don't clobber some other bits that might already
1244          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1245          * be needed.
1246          */
1247         oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1248         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1249
1250         neoLock(state);
1251 }
1252
1253 /*
1254  *    Pan or Wrap the Display
1255  */
1256 static int neofb_pan_display(struct fb_var_screeninfo *var,
1257                              struct fb_info *info)
1258 {
1259         u_int y_bottom;
1260
1261         y_bottom = var->yoffset;
1262
1263         if (!(var->vmode & FB_VMODE_YWRAP))
1264                 y_bottom += var->yres;
1265
1266         if (var->xoffset > (var->xres_virtual - var->xres))
1267                 return -EINVAL;
1268         if (y_bottom > info->var.yres_virtual)
1269                 return -EINVAL;
1270
1271         neofb_update_start(info, var);
1272
1273         info->var.xoffset = var->xoffset;
1274         info->var.yoffset = var->yoffset;
1275
1276         if (var->vmode & FB_VMODE_YWRAP)
1277                 info->var.vmode |= FB_VMODE_YWRAP;
1278         else
1279                 info->var.vmode &= ~FB_VMODE_YWRAP;
1280         return 0;
1281 }
1282
1283 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1284                            u_int transp, struct fb_info *fb)
1285 {
1286         if (regno >= fb->cmap.len || regno > 255)
1287                 return -EINVAL;
1288
1289         switch (fb->var.bits_per_pixel) {
1290         case 8:
1291                 outb(regno, 0x3c8);
1292
1293                 outb(red >> 10, 0x3c9);
1294                 outb(green >> 10, 0x3c9);
1295                 outb(blue >> 10, 0x3c9);
1296                 break;
1297         case 16:
1298                 ((u32 *) fb->pseudo_palette)[regno] =
1299                                 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1300                                 ((blue & 0xf800) >> 11);
1301                 break;
1302         case 24:
1303                 ((u32 *) fb->pseudo_palette)[regno] =
1304                                 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1305                                 ((blue & 0xff00) >> 8);
1306                 break;
1307 #ifdef NO_32BIT_SUPPORT_YET
1308         case 32:
1309                 ((u32 *) fb->pseudo_palette)[regno] =
1310                                 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1311                                 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1312                 break;
1313 #endif
1314         default:
1315                 return 1;
1316         }
1317         return 0;
1318 }
1319
1320 /*
1321  *    (Un)Blank the display.
1322  */
1323 int neofb_blank(int blank_mode, struct fb_info *info)
1324 {
1325         /*
1326          *  Blank the screen if blank_mode != 0, else unblank.
1327          *  Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1328          *  e.g. a video mode which doesn't support it. Implements VESA suspend
1329          *  and powerdown modes for monitors, and backlight control on LCDs.
1330          *    blank_mode == 0: unblanked (backlight on)
1331          *    blank_mode == 1: blank (backlight on)
1332          *    blank_mode == 2: suspend vsync (backlight off)
1333          *    blank_mode == 3: suspend hsync (backlight off)
1334          *    blank_mode == 4: powerdown (backlight off)
1335          *
1336          *  wms...Enable VESA DPMS compatible powerdown mode
1337          *  run "setterm -powersave powerdown" to take advantage
1338          */
1339         struct neofb_par *par = (struct neofb_par *)info->par;
1340         int seqflags, lcdflags, dpmsflags, reg;
1341
1342         switch (blank_mode) {
1343         case 4:         /* powerdown - both sync lines down */
1344                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1345                 lcdflags = 0;                   /* LCD off */
1346                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1347                             NEO_GR01_SUPPRESS_VSYNC;
1348 #ifdef CONFIG_TOSHIBA
1349                 /* Do we still need this ? */
1350                 /* attempt to turn off backlight on toshiba; also turns off external */
1351                 {
1352                         SMMRegisters regs;
1353
1354                         regs.eax = 0xff00; /* HCI_SET */
1355                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1356                         regs.ecx = 0x0000; /* HCI_DISABLE */
1357                         tosh_smm(&regs);
1358                 }
1359 #endif
1360                 break;
1361         case 3:         /* hsync off */
1362                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1363                 lcdflags = 0;                   /* LCD off */
1364                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1365                 break;
1366         case 2:         /* vsync off */
1367                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1368                 lcdflags = 0;                   /* LCD off */
1369                 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1370                 break;
1371         case 1:         /* just blank screen (backlight stays on) */
1372                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1373                 lcdflags = par->PanelDispCntlReg1 & 0x02; /* LCD normal */
1374                 dpmsflags = 0;                  /* no hsync/vsync suppression */
1375                 break;
1376         case 0:         /* unblank */
1377                 seqflags = 0;                   /* Enable sequencer */
1378                 lcdflags = par->PanelDispCntlReg1 & 0x02; /* LCD normal */
1379                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1380 #ifdef CONFIG_TOSHIBA
1381                 /* Do we still need this ? */
1382                 /* attempt to re-enable backlight/external on toshiba */
1383                 {
1384                         SMMRegisters regs;
1385
1386                         regs.eax = 0xff00; /* HCI_SET */
1387                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1388                         regs.ecx = 0x0001; /* HCI_ENABLE */
1389                         tosh_smm(&regs);
1390                 }
1391 #endif
1392                 break;
1393         default:        /* Anything else we don't understand; return 1 to tell
1394                          * fb_blank we didn't aactually do anything */
1395                 return 1;
1396         }
1397
1398         neoUnlock();
1399         reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1400         vga_wseq(NULL, 0x01, reg);
1401         reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1402         vga_wgfx(NULL, 0x20, reg);
1403         reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1404         vga_wgfx(NULL, 0x01, reg);
1405         neoLock(&par->state);
1406         return 0;
1407 }
1408
1409 static void
1410 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1411 {
1412         struct neofb_par *par = (struct neofb_par *) info->par;
1413         u_long dst, rop;
1414
1415         dst = rect->dx + rect->dy * info->var.xres_virtual;
1416         rop = rect->rop ? 0x060000 : 0x0c0000;
1417
1418         neo2200_wait_fifo(info, 4);
1419
1420         /* set blt control */
1421         par->neo2200->bltCntl = NEO_BC3_FIFO_EN |
1422             NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1423             //               NEO_BC3_DST_XY_ADDR  |
1424             //               NEO_BC3_SRC_XY_ADDR  |
1425             rop;
1426
1427         switch (info->var.bits_per_pixel) {
1428         case 8:
1429                 par->neo2200->fgColor = rect->color;
1430                 break;
1431         case 16:
1432         case 24:
1433                 par->neo2200->fgColor =
1434                     ((u32 *) (info->pseudo_palette))[rect->color];
1435                 break;
1436         }
1437
1438         par->neo2200->dstStart =
1439             dst * ((info->var.bits_per_pixel + 7) >> 3);
1440         par->neo2200->xyExt =
1441             (rect->height << 16) | (rect->width & 0xffff);
1442 }
1443
1444 static void
1445 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1446 {
1447         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1448         struct neofb_par *par = (struct neofb_par *) info->par;
1449         u_long src, dst, bltCntl;
1450
1451         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1452
1453         if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1454                 /* Start with the lower right corner */
1455                 sy += (area->height - 1);
1456                 dy += (area->height - 1);
1457                 sx += (area->width - 1);
1458                 dx += (area->width - 1);
1459
1460                 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1461         }
1462
1463         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1464         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1465
1466         neo2200_wait_fifo(info, 4);
1467
1468         /* set blt control */
1469         par->neo2200->bltCntl = bltCntl;
1470
1471         par->neo2200->srcStart = src;
1472         par->neo2200->dstStart = dst;
1473         par->neo2200->xyExt =
1474             (area->height << 16) | (area->width & 0xffff);
1475 }
1476
1477 static void
1478 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1479 {
1480         struct neofb_par *par = (struct neofb_par *) info->par;
1481         int s_pitch = (image->width * image->depth + 7) >> 3;
1482         int scan_align = info->pixmap.scan_align - 1;
1483         int buf_align = info->pixmap.buf_align - 1;
1484         int bltCntl_flags, d_pitch, data_len;
1485
1486         // The data is padded for the hardware
1487         d_pitch = (s_pitch + scan_align) & ~scan_align;
1488         data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1489
1490         neo2200_sync(info);
1491
1492         if (image->depth == 1) {
1493                 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1494                         /* FIXME. There is a bug with accelerated color-expanded
1495                          * transfers in 24 bit mode if the image being transferred
1496                          * is less than 16 bits wide. This is due to insufficient
1497                          * padding when writing the image. We need to adjust
1498                          * struct fb_pixmap. Not yet done. */
1499                         return cfb_imageblit(info, image);
1500                 }
1501                 bltCntl_flags = NEO_BC0_SRC_MONO;
1502         } else if (image->depth == info->var.bits_per_pixel) {
1503                 bltCntl_flags = 0;
1504         } else {
1505                 /* We don't currently support hardware acceleration if image
1506                  * depth is different from display */
1507                 return cfb_imageblit(info, image);
1508         }
1509
1510         switch (info->var.bits_per_pixel) {
1511         case 8:
1512                 par->neo2200->fgColor = image->fg_color;
1513                 par->neo2200->bgColor = image->bg_color;
1514                 break;
1515         case 16:
1516         case 24:
1517                 par->neo2200->fgColor =
1518                     ((u32 *) (info->pseudo_palette))[image->fg_color];
1519                 par->neo2200->bgColor =
1520                     ((u32 *) (info->pseudo_palette))[image->bg_color];
1521                 break;
1522         }
1523
1524         par->neo2200->bltCntl = NEO_BC0_SYS_TO_VID |
1525                 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1526                 // NEO_BC3_DST_XY_ADDR |
1527                 0x0c0000;
1528
1529         par->neo2200->srcStart = 0;
1530 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1531         par->neo2200->dstStart =
1532             ((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1533              image->dy * info->fix.line_length);
1534         par->neo2200->xyExt =
1535             (image->height << 16) | (image->width & 0xffff);
1536
1537         memcpy(par->mmio_vbase + 0x100000, image->data, data_len);
1538 }
1539
1540 static void
1541 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1542 {
1543         switch (info->fix.accel) {
1544                 case FB_ACCEL_NEOMAGIC_NM2200:
1545                 case FB_ACCEL_NEOMAGIC_NM2230:
1546                 case FB_ACCEL_NEOMAGIC_NM2360:
1547                 case FB_ACCEL_NEOMAGIC_NM2380:
1548                         neo2200_fillrect(info, rect);
1549                         break;
1550                 default:
1551                         cfb_fillrect(info, rect);
1552                         break;
1553         }
1554 }
1555
1556 static void
1557 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1558 {
1559         switch (info->fix.accel) {
1560                 case FB_ACCEL_NEOMAGIC_NM2200:
1561                 case FB_ACCEL_NEOMAGIC_NM2230:
1562                 case FB_ACCEL_NEOMAGIC_NM2360:
1563                 case FB_ACCEL_NEOMAGIC_NM2380:
1564                         neo2200_copyarea(info, area);
1565                         break;
1566                 default:
1567                         cfb_copyarea(info, area);
1568                         break;
1569         }
1570 }
1571
1572 static void
1573 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1574 {
1575         switch (info->fix.accel) {
1576                 case FB_ACCEL_NEOMAGIC_NM2200:
1577                 case FB_ACCEL_NEOMAGIC_NM2230:
1578                 case FB_ACCEL_NEOMAGIC_NM2360:
1579                 case FB_ACCEL_NEOMAGIC_NM2380:
1580                         neo2200_imageblit(info, image);
1581                         break;
1582                 default:
1583                         cfb_imageblit(info, image);
1584                         break;
1585         }
1586 }
1587
1588 static int
1589 neofb_sync(struct fb_info *info)
1590 {
1591         switch (info->fix.accel) {
1592                 case FB_ACCEL_NEOMAGIC_NM2200:
1593                 case FB_ACCEL_NEOMAGIC_NM2230:
1594                 case FB_ACCEL_NEOMAGIC_NM2360:
1595                 case FB_ACCEL_NEOMAGIC_NM2380:
1596                         neo2200_sync(info);
1597                         break;
1598                 default:
1599                         break;
1600         }
1601         return 0;
1602 }
1603
1604 /*
1605 static void
1606 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1607 {
1608         //memset_io(info->sprite.addr, 0xff, 1);
1609 }
1610
1611 static int
1612 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1613 {
1614         struct neofb_par *par = (struct neofb_par *) info->par;
1615
1616         * Disable cursor *
1617         write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1618
1619         if (cursor->set & FB_CUR_SETPOS) {
1620                 u32 x = cursor->image.dx;
1621                 u32 y = cursor->image.dy;
1622
1623                 info->cursor.image.dx = x;
1624                 info->cursor.image.dy = y;
1625                 write_le32(NEOREG_CURSX, x, par);
1626                 write_le32(NEOREG_CURSY, y, par);
1627         }
1628
1629         if (cursor->set & FB_CUR_SETSIZE) {
1630                 info->cursor.image.height = cursor->image.height;
1631                 info->cursor.image.width = cursor->image.width;
1632         }
1633
1634         if (cursor->set & FB_CUR_SETHOT)
1635                 info->cursor.hot = cursor->hot;
1636
1637         if (cursor->set & FB_CUR_SETCMAP) {
1638                 if (cursor->image.depth == 1) {
1639                         u32 fg = cursor->image.fg_color;
1640                         u32 bg = cursor->image.bg_color;
1641
1642                         info->cursor.image.fg_color = fg;
1643                         info->cursor.image.bg_color = bg;
1644
1645                         fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1646                         bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1647                         write_le32(NEOREG_CURSFGCOLOR, fg, par);
1648                         write_le32(NEOREG_CURSBGCOLOR, bg, par);
1649                 }
1650         }
1651
1652         if (cursor->set & FB_CUR_SETSHAPE)
1653                 fb_load_cursor_image(info);
1654
1655         if (info->cursor.enable)
1656                 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1657         return 0;
1658 }
1659 */
1660
1661 static struct fb_ops neofb_ops = {
1662         .owner          = THIS_MODULE,
1663         .fb_open        = neofb_open,
1664         .fb_release     = neofb_release,
1665         .fb_check_var   = neofb_check_var,
1666         .fb_set_par     = neofb_set_par,
1667         .fb_setcolreg   = neofb_setcolreg,
1668         .fb_pan_display = neofb_pan_display,
1669         .fb_blank       = neofb_blank,
1670         .fb_sync        = neofb_sync,
1671         .fb_fillrect    = neofb_fillrect,
1672         .fb_copyarea    = neofb_copyarea,
1673         .fb_imageblit   = neofb_imageblit,
1674         .fb_cursor      = soft_cursor,
1675 };
1676
1677 /* --------------------------------------------------------------------- */
1678
1679 static struct fb_videomode __devinitdata mode800x480 = {
1680         .xres           = 800,
1681         .yres           = 480,
1682         .pixclock       = 25000,
1683         .left_margin    = 88,
1684         .right_margin   = 40,
1685         .upper_margin   = 23,
1686         .lower_margin   = 1,
1687         .hsync_len      = 128,
1688         .vsync_len      = 4,
1689         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1690         .vmode          = FB_VMODE_NONINTERLACED
1691 };
1692
1693 static int __devinit neo_map_mmio(struct fb_info *info,
1694                                   struct pci_dev *dev)
1695 {
1696         struct neofb_par *par = (struct neofb_par *) info->par;
1697
1698         DBG("neo_map_mmio");
1699
1700         info->fix.mmio_start = pci_resource_start(dev, 1);
1701         info->fix.mmio_len = MMIO_SIZE;
1702
1703         if (!request_mem_region
1704             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1705                 printk("neofb: memory mapped IO in use\n");
1706                 return -EBUSY;
1707         }
1708
1709         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1710         if (!par->mmio_vbase) {
1711                 printk("neofb: unable to map memory mapped IO\n");
1712                 release_mem_region(info->fix.mmio_start,
1713                                    info->fix.mmio_len);
1714                 return -ENOMEM;
1715         } else
1716                 printk(KERN_INFO "neofb: mapped io at %p\n",
1717                        par->mmio_vbase);
1718         return 0;
1719 }
1720
1721 static void neo_unmap_mmio(struct fb_info *info)
1722 {
1723         struct neofb_par *par = (struct neofb_par *) info->par;
1724
1725         DBG("neo_unmap_mmio");
1726
1727         iounmap(par->mmio_vbase);
1728         par->mmio_vbase = NULL;
1729
1730         release_mem_region(info->fix.mmio_start,
1731                            info->fix.mmio_len);
1732 }
1733
1734 static int __devinit neo_map_video(struct fb_info *info,
1735                                    struct pci_dev *dev, int video_len)
1736 {
1737         //unsigned long addr;
1738
1739         DBG("neo_map_video");
1740
1741         info->fix.smem_start = pci_resource_start(dev, 0);
1742         info->fix.smem_len = video_len;
1743
1744         if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1745                                 "frame buffer")) {
1746                 printk("neofb: frame buffer in use\n");
1747                 return -EBUSY;
1748         }
1749
1750         info->screen_base =
1751             ioremap(info->fix.smem_start, info->fix.smem_len);
1752         if (!info->screen_base) {
1753                 printk("neofb: unable to map screen memory\n");
1754                 release_mem_region(info->fix.smem_start,
1755                                    info->fix.smem_len);
1756                 return -ENOMEM;
1757         } else
1758                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1759                        info->screen_base);
1760
1761 #ifdef CONFIG_MTRR
1762         ((struct neofb_par *)(info->par))->mtrr =
1763                 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1764                                 MTRR_TYPE_WRCOMB, 1);
1765 #endif
1766
1767         /* Clear framebuffer, it's all white in memory after boot */
1768         memset(info->screen_base, 0, info->fix.smem_len);
1769
1770         /* Allocate Cursor drawing pad.
1771         info->fix.smem_len -= PAGE_SIZE;
1772         addr = info->fix.smem_start + info->fix.smem_len;
1773         write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1774                                         ((0x0ff0 & (addr >> 10)) >> 4), par);
1775         addr = (unsigned long) info->screen_base + info->fix.smem_len;
1776         info->sprite.addr = (u8 *) addr; */
1777         return 0;
1778 }
1779
1780 static void neo_unmap_video(struct fb_info *info)
1781 {
1782         DBG("neo_unmap_video");
1783
1784 #ifdef CONFIG_MTRR
1785         {
1786                 struct neofb_par *par = (struct neofb_par *) info->par;
1787
1788                 mtrr_del(par->mtrr, info->fix.smem_start,
1789                          info->fix.smem_len);
1790         }
1791 #endif
1792         iounmap(info->screen_base);
1793         info->screen_base = NULL;
1794
1795         release_mem_region(info->fix.smem_start,
1796                            info->fix.smem_len);
1797 }
1798
1799 static int __devinit neo_scan_monitor(struct fb_info *info)
1800 {
1801         struct neofb_par *par = (struct neofb_par *) info->par;
1802         unsigned char type, display;
1803         int w;
1804
1805         // Eventually we will have i2c support.
1806         info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1807         if (!info->monspecs.modedb)
1808                 return -ENOMEM;
1809         info->monspecs.modedb_len = 1;
1810
1811         /* Determine the panel type */
1812         vga_wgfx(NULL, 0x09, 0x26);
1813         type = vga_rgfx(NULL, 0x21);
1814         display = vga_rgfx(NULL, 0x20);
1815         if (!par->internal_display && !par->external_display) {
1816                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1817                 par->external_display = display & 1;
1818                 printk (KERN_INFO "Autodetected %s display\n",
1819                         par->internal_display && par->external_display ? "simultaneous" :
1820                         par->internal_display ? "internal" : "external");
1821         }
1822
1823         /* Determine panel width -- used in NeoValidMode. */
1824         w = vga_rgfx(NULL, 0x20);
1825         vga_wgfx(NULL, 0x09, 0x00);
1826         switch ((w & 0x18) >> 3) {
1827         case 0x00:
1828                 // 640x480@60
1829                 par->NeoPanelWidth = 640;
1830                 par->NeoPanelHeight = 480;
1831                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1832                 break;
1833         case 0x01:
1834                 par->NeoPanelWidth = 800;
1835                 if (par->libretto) {
1836                         par->NeoPanelHeight = 480;
1837                         memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1838                 } else {
1839                         // 800x600@60
1840                         par->NeoPanelHeight = 600;
1841                         memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1842                 }
1843                 break;
1844         case 0x02:
1845                 // 1024x768@60
1846                 par->NeoPanelWidth = 1024;
1847                 par->NeoPanelHeight = 768;
1848                 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1849                 break;
1850         case 0x03:
1851                 /* 1280x1024@60 panel support needs to be added */
1852 #ifdef NOT_DONE
1853                 par->NeoPanelWidth = 1280;
1854                 par->NeoPanelHeight = 1024;
1855                 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1856                 break;
1857 #else
1858                 printk(KERN_ERR
1859                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1860                 return -1;
1861 #endif
1862         default:
1863                 // 640x480@60
1864                 par->NeoPanelWidth = 640;
1865                 par->NeoPanelHeight = 480;
1866                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1867                 break;
1868         }
1869
1870         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1871                par->NeoPanelWidth,
1872                par->NeoPanelHeight,
1873                (type & 0x02) ? "color" : "monochrome",
1874                (type & 0x10) ? "TFT" : "dual scan");
1875         return 0;
1876 }
1877
1878 static int __devinit neo_init_hw(struct fb_info *info)
1879 {
1880         struct neofb_par *par = (struct neofb_par *) info->par;
1881         int videoRam = 896;
1882         int maxClock = 65000;
1883         int CursorMem = 1024;
1884         int CursorOff = 0x100;
1885         int linearSize = 1024;
1886         int maxWidth = 1024;
1887         int maxHeight = 1024;
1888
1889         DBG("neo_init_hw");
1890
1891         neoUnlock();
1892
1893 #if 0
1894         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1895         for (int w = 0; w < 0x85; w++)
1896                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1897                        (void *) vga_rcrt(NULL, w);
1898         for (int w = 0; w < 0xC7; w++)
1899                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1900                        (void *) vga_rgfx(NULL, w));
1901 #endif
1902         switch (info->fix.accel) {
1903         case FB_ACCEL_NEOMAGIC_NM2070:
1904                 videoRam = 896;
1905                 maxClock = 65000;
1906                 CursorMem = 2048;
1907                 CursorOff = 0x100;
1908                 linearSize = 1024;
1909                 maxWidth = 1024;
1910                 maxHeight = 1024;
1911                 break;
1912         case FB_ACCEL_NEOMAGIC_NM2090:
1913         case FB_ACCEL_NEOMAGIC_NM2093:
1914                 videoRam = 1152;
1915                 maxClock = 80000;
1916                 CursorMem = 2048;
1917                 CursorOff = 0x100;
1918                 linearSize = 2048;
1919                 maxWidth = 1024;
1920                 maxHeight = 1024;
1921                 break;
1922         case FB_ACCEL_NEOMAGIC_NM2097:
1923                 videoRam = 1152;
1924                 maxClock = 80000;
1925                 CursorMem = 1024;
1926                 CursorOff = 0x100;
1927                 linearSize = 2048;
1928                 maxWidth = 1024;
1929                 maxHeight = 1024;
1930                 break;
1931         case FB_ACCEL_NEOMAGIC_NM2160:
1932                 videoRam = 2048;
1933                 maxClock = 90000;
1934                 CursorMem = 1024;
1935                 CursorOff = 0x100;
1936                 linearSize = 2048;
1937                 maxWidth = 1024;
1938                 maxHeight = 1024;
1939                 break;
1940         case FB_ACCEL_NEOMAGIC_NM2200:
1941                 videoRam = 2560;
1942                 maxClock = 110000;
1943                 CursorMem = 1024;
1944                 CursorOff = 0x1000;
1945                 linearSize = 4096;
1946                 maxWidth = 1280;
1947                 maxHeight = 1024;       /* ???? */
1948
1949                 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1950                 break;
1951         case FB_ACCEL_NEOMAGIC_NM2230:
1952                 videoRam = 3008;
1953                 maxClock = 110000;
1954                 CursorMem = 1024;
1955                 CursorOff = 0x1000;
1956                 linearSize = 4096;
1957                 maxWidth = 1280;
1958                 maxHeight = 1024;       /* ???? */
1959
1960                 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1961                 break;
1962         case FB_ACCEL_NEOMAGIC_NM2360:
1963                 videoRam = 4096;
1964                 maxClock = 110000;
1965                 CursorMem = 1024;
1966                 CursorOff = 0x1000;
1967                 linearSize = 4096;
1968                 maxWidth = 1280;
1969                 maxHeight = 1024;       /* ???? */
1970
1971                 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1972                 break;
1973         case FB_ACCEL_NEOMAGIC_NM2380:
1974                 videoRam = 6144;
1975                 maxClock = 110000;
1976                 CursorMem = 1024;
1977                 CursorOff = 0x1000;
1978                 linearSize = 8192;
1979                 maxWidth = 1280;
1980                 maxHeight = 1024;       /* ???? */
1981
1982                 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1983                 break;
1984         }
1985 /*
1986         info->sprite.size = CursorMem;
1987         info->sprite.scan_align = 1;
1988         info->sprite.buf_align = 1;
1989         info->sprite.flags = FB_PIXMAP_IO;
1990         info->sprite.outbuf = neofb_draw_cursor;
1991 */
1992         par->maxClock = maxClock;
1993         par->cursorOff = CursorOff;
1994         return ((videoRam * 1024));
1995 }
1996
1997
1998 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
1999                                                    pci_device_id *id)
2000 {
2001         struct fb_info *info;
2002         struct neofb_par *par;
2003
2004         info = framebuffer_alloc(sizeof(struct neofb_par) + sizeof(u32) * 256, &dev->dev);
2005
2006         if (!info)
2007                 return NULL;
2008
2009         par = info->par;
2010
2011         info->fix.accel = id->driver_data;
2012
2013         par->pci_burst = !nopciburst;
2014         par->lcd_stretch = !nostretch;
2015         par->libretto = libretto;
2016
2017         par->internal_display = internal;
2018         par->external_display = external;
2019
2020         switch (info->fix.accel) {
2021         case FB_ACCEL_NEOMAGIC_NM2070:
2022                 sprintf(info->fix.id, "MagicGraph 128");
2023                 break;
2024         case FB_ACCEL_NEOMAGIC_NM2090:
2025                 sprintf(info->fix.id, "MagicGraph 128V");
2026                 break;
2027         case FB_ACCEL_NEOMAGIC_NM2093:
2028                 sprintf(info->fix.id, "MagicGraph 128ZV");
2029                 break;
2030         case FB_ACCEL_NEOMAGIC_NM2097:
2031                 sprintf(info->fix.id, "MagicGraph 128ZV+");
2032                 break;
2033         case FB_ACCEL_NEOMAGIC_NM2160:
2034                 sprintf(info->fix.id, "MagicGraph 128XD");
2035                 break;
2036         case FB_ACCEL_NEOMAGIC_NM2200:
2037                 sprintf(info->fix.id, "MagicGraph 256AV");
2038                 break;
2039         case FB_ACCEL_NEOMAGIC_NM2230:
2040                 sprintf(info->fix.id, "MagicGraph 256AV+");
2041                 break;
2042         case FB_ACCEL_NEOMAGIC_NM2360:
2043                 sprintf(info->fix.id, "MagicGraph 256ZX");
2044                 break;
2045         case FB_ACCEL_NEOMAGIC_NM2380:
2046                 sprintf(info->fix.id, "MagicGraph 256XL+");
2047                 break;
2048         }
2049
2050         info->fix.type = FB_TYPE_PACKED_PIXELS;
2051         info->fix.type_aux = 0;
2052         info->fix.xpanstep = 0;
2053         info->fix.ypanstep = 4;
2054         info->fix.ywrapstep = 0;
2055         info->fix.accel = id->driver_data;
2056
2057         info->fbops = &neofb_ops;
2058         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN |
2059                 FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_COPYAREA |
2060                 FBINFO_HWACCEL_COPYAREA;
2061         info->pseudo_palette = (void *) (par + 1);
2062         return info;
2063 }
2064
2065 static void neo_free_fb_info(struct fb_info *info)
2066 {
2067         if (info) {
2068                 /*
2069                  * Free the colourmap
2070                  */
2071                 fb_dealloc_cmap(&info->cmap);
2072                 framebuffer_release(info);
2073         }
2074 }
2075
2076 /* --------------------------------------------------------------------- */
2077
2078 static int __devinit neofb_probe(struct pci_dev *dev,
2079                                  const struct pci_device_id *id)
2080 {
2081         struct fb_info *info;
2082         u_int h_sync, v_sync;
2083         int video_len, err;
2084
2085         DBG("neofb_probe");
2086
2087         err = pci_enable_device(dev);
2088         if (err)
2089                 return err;
2090
2091         err = -ENOMEM;
2092         info = neo_alloc_fb_info(dev, id);
2093         if (!info)
2094                 return err;
2095
2096         err = neo_map_mmio(info, dev);
2097         if (err)
2098                 goto err_map_mmio;
2099
2100         err = neo_scan_monitor(info);
2101         if (err)
2102                 goto err_scan_monitor;
2103
2104         video_len = neo_init_hw(info);
2105         if (video_len < 0) {
2106                 err = video_len;
2107                 goto err_init_hw;
2108         }
2109
2110         err = neo_map_video(info, dev, video_len);
2111         if (err)
2112                 goto err_init_hw;
2113
2114         if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2115                         info->monspecs.modedb, 16)) {
2116                 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2117                 goto err_map_video;
2118         }
2119
2120         /*
2121          * Calculate the hsync and vsync frequencies.  Note that
2122          * we split the 1e12 constant up so that we can preserve
2123          * the precision and fit the results into 32-bit registers.
2124          *  (1953125000 * 512 = 1e12)
2125          */
2126         h_sync = 1953125000 / info->var.pixclock;
2127         h_sync =
2128             h_sync * 512 / (info->var.xres + info->var.left_margin +
2129                             info->var.right_margin + info->var.hsync_len);
2130         v_sync =
2131             h_sync / (info->var.yres + info->var.upper_margin +
2132                       info->var.lower_margin + info->var.vsync_len);
2133
2134         printk(KERN_INFO "neofb v" NEOFB_VERSION
2135                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2136                info->fix.smem_len >> 10, info->var.xres,
2137                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2138
2139         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2140                 goto err_map_video;
2141
2142         err = register_framebuffer(info);
2143         if (err < 0)
2144                 goto err_reg_fb;
2145
2146         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2147                info->node, info->fix.id);
2148
2149         /*
2150          * Our driver data
2151          */
2152         pci_set_drvdata(dev, info);
2153         return 0;
2154
2155 err_reg_fb:
2156         fb_dealloc_cmap(&info->cmap);
2157 err_map_video:
2158         neo_unmap_video(info);
2159 err_init_hw:
2160         fb_destroy_modedb(info->monspecs.modedb);
2161 err_scan_monitor:
2162         neo_unmap_mmio(info);
2163 err_map_mmio:
2164         neo_free_fb_info(info);
2165         return err;
2166 }
2167
2168 static void __devexit neofb_remove(struct pci_dev *dev)
2169 {
2170         struct fb_info *info = pci_get_drvdata(dev);
2171
2172         DBG("neofb_remove");
2173
2174         if (info) {
2175                 /*
2176                  * If unregister_framebuffer fails, then
2177                  * we will be leaving hooks that could cause
2178                  * oopsen laying around.
2179                  */
2180                 if (unregister_framebuffer(info))
2181                         printk(KERN_WARNING
2182                                "neofb: danger danger!  Oopsen imminent!\n");
2183
2184                 neo_unmap_video(info);
2185                 fb_destroy_modedb(info->monspecs.modedb);
2186                 neo_unmap_mmio(info);
2187                 neo_free_fb_info(info);
2188
2189                 /*
2190                  * Ensure that the driver data is no longer
2191                  * valid.
2192                  */
2193                 pci_set_drvdata(dev, NULL);
2194         }
2195 }
2196
2197 static struct pci_device_id neofb_devices[] = {
2198         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2199          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2200
2201         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2202          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2203
2204         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2205          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2206
2207         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2208          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2209
2210         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2211          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2212
2213         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2214          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2215
2216         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2217          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2218
2219         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2220          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2221
2222         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2223          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2224
2225         {0, 0, 0, 0, 0, 0, 0}
2226 };
2227
2228 MODULE_DEVICE_TABLE(pci, neofb_devices);
2229
2230 static struct pci_driver neofb_driver = {
2231         .name =         "neofb",
2232         .id_table =     neofb_devices,
2233         .probe =        neofb_probe,
2234         .remove =       __devexit_p(neofb_remove)
2235 };
2236
2237 /* ************************* init in-kernel code ************************** */
2238
2239 int __init neofb_setup(char *options)
2240 {
2241         char *this_opt;
2242
2243         DBG("neofb_setup");
2244
2245         if (!options || !*options)
2246                 return 0;
2247
2248         while ((this_opt = strsep(&options, ",")) != NULL) {
2249                 if (!*this_opt)
2250                         continue;
2251
2252                 if (!strncmp(this_opt, "internal", 8))
2253                         internal = 1;
2254                 else if (!strncmp(this_opt, "external", 8))
2255                         external = 1;
2256                 else if (!strncmp(this_opt, "nostretch", 9))
2257                         nostretch = 1;
2258                 else if (!strncmp(this_opt, "nopciburst", 10))
2259                         nopciburst = 1;
2260                 else if (!strncmp(this_opt, "libretto", 8))
2261                         libretto = 1;
2262                 else
2263                         mode_option = this_opt;
2264         }
2265         return 0;
2266 }
2267
2268 int __init neofb_init(void)
2269 {
2270 #ifndef MODULE
2271         char *option = NULL;
2272
2273         if (fb_get_options("neofb", &option))
2274                 return -ENODEV;
2275         neofb_setup(option);
2276 #endif
2277         return pci_register_driver(&neofb_driver);
2278 }
2279
2280 module_init(neofb_init);
2281
2282 #ifdef MODULE
2283 static void __exit neofb_exit(void)
2284 {
2285         pci_unregister_driver(&neofb_driver);
2286 }
2287
2288 module_exit(neofb_exit);
2289 #endif                          /* MODULE */