drivers/video/neofb.c

   1 /*
   2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
   3  *
   4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
   5  *
   6  *
   7  * Card specific code is based on XFree86's neomagic driver.
   8  * Framebuffer framework code is based on code of cyber2000fb.
   9  *
  10  * This file is subject to the terms and conditions of the GNU General
  11  * Public License.  See the file COPYING in the main directory of this
  12  * archive for more details.
  13  *
  14  *
  15  * 0.4.1
  16  *  - Cosmetic changes (dok)
  17  *
  18  * 0.4
  19  *  - Toshiba Libretto support, allow modes larger than LCD size if
  20  *    LCD is disabled, keep BIOS settings if internal/external display
  21  *    haven't been enabled explicitly
  22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
  23  *
  24  * 0.3.3
  25  *  - Porting over to new fbdev api. (jsimmons)
  26  *
  27  * 0.3.2
  28  *  - got rid of all floating point (dok)
  29  *
  30  * 0.3.1
  31  *  - added module license (dok)
  32  *
  33  * 0.3
  34  *  - hardware accelerated clear and move for 2200 and above (dok)
  35  *  - maximum allowed dotclock is handled now (dok)
  36  *
  37  * 0.2.1
  38  *  - correct panning after X usage (dok)
  39  *  - added module and kernel parameters (dok)
  40  *  - no stretching if external display is enabled (dok)
  41  *
  42  * 0.2
  43  *  - initial version (dok)
  44  *
  45  *
  46  * TODO
  47  * - ioctl for internal/external switching
  48  * - blanking
  49  * - 32bit depth support, maybe impossible
  50  * - disable pan-on-sync, need specs
  51  *
  52  * BUGS
  53  * - white margin on bootup like with tdfxfb (colormap problem?)
  54  *
  55  */
  56
  57 #include <linux/config.h>
  58 #include <linux/module.h>
  59 #include <linux/kernel.h>
  60 #include <linux/errno.h>
  61 #include <linux/string.h>
  62 #include <linux/mm.h>
  63 #include <linux/tty.h>
  64 #include <linux/slab.h>
  65 #include <linux/delay.h>
  66 #include <linux/fb.h>
  67 #include <linux/pci.h>
  68 #include <linux/init.h>
  69 #ifdef CONFIG_TOSHIBA
  70 #include <linux/toshiba.h>
  71 extern int tosh_smm(SMMRegisters *regs);
  72 #endif
  73
  74 #include <asm/io.h>
  75 #include <asm/irq.h>
  76 #include <asm/pgtable.h>
  77 #include <asm/system.h>
  78 #include <asm/uaccess.h>
  79
  80 #ifdef CONFIG_MTRR
  81 #include <asm/mtrr.h>
  82 #endif
  83
  84 #include <video/neomagic.h>
  85
  86 #define NEOFB_VERSION "0.4.1"
  87
  88 /* --------------------------------------------------------------------- */
  89
  90 static int disabled;
  91 static int internal;
  92 static int external;
  93 static int libretto;
  94 static int nostretch;
  95 static int nopciburst;
  96
  97
  98 #ifdef MODULE
  99
 100 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
 101 MODULE_LICENSE("GPL");
 102 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
 103 MODULE_PARM(disabled, "i");
 104 MODULE_PARM_DESC(disabled, "Disable this driver's initialization.");
 105 MODULE_PARM(internal, "i");
 106 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
 107 MODULE_PARM(external, "i");
 108 MODULE_PARM_DESC(external, "Enable output on external CRT.");
 109 MODULE_PARM(libretto, "i");
 110 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
 111 MODULE_PARM(nostretch, "i");
 112 MODULE_PARM_DESC(nostretch,
 113                  "Disable stretching of modes smaller than LCD.");
 114 MODULE_PARM(nopciburst, "i");
 115 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
 116
 117 #endif
 118
 119
 120 /* --------------------------------------------------------------------- */
 121
 122 static biosMode bios8[] = {
 123         {320, 240, 0x40},
 124         {300, 400, 0x42},
 125         {640, 400, 0x20},
 126         {640, 480, 0x21},
 127         {800, 600, 0x23},
 128         {1024, 768, 0x25},
 129 };
 130
 131 static biosMode bios16[] = {
 132         {320, 200, 0x2e},
 133         {320, 240, 0x41},
 134         {300, 400, 0x43},
 135         {640, 480, 0x31},
 136         {800, 600, 0x34},
 137         {1024, 768, 0x37},
 138 };
 139
 140 static biosMode bios24[] = {
 141         {640, 480, 0x32},
 142         {800, 600, 0x35},
 143         {1024, 768, 0x38}
 144 };
 145
 146 #ifdef NO_32BIT_SUPPORT_YET
 147 /* FIXME: guessed values, wrong */
 148 static biosMode bios32[] = {
 149         {640, 480, 0x33},
 150         {800, 600, 0x36},
 151         {1024, 768, 0x39}
 152 };
 153 #endif
 154
 155 static int neoFindMode(int xres, int yres, int depth)
 156 {
 157         int xres_s;
 158         int i, size;
 159         biosMode *mode;
 160
 161         switch (depth) {
 162         case 8:
 163                 size = sizeof(bios8) / sizeof(biosMode);
 164                 mode = bios8;
 165                 break;
 166         case 16:
 167                 size = sizeof(bios16) / sizeof(biosMode);
 168                 mode = bios16;
 169                 break;
 170         case 24:
 171                 size = sizeof(bios24) / sizeof(biosMode);
 172                 mode = bios24;
 173                 break;
 174 #ifdef NO_32BIT_SUPPORT_YET
 175         case 32:
 176                 size = sizeof(bios32) / sizeof(biosMode);
 177                 mode = bios32;
 178                 break;
 179 #endif
 180         default:
 181                 return 0;
 182         }
 183
 184         for (i = 0; i < size; i++) {
 185                 if (xres <= mode[i].x_res) {
 186                         xres_s = mode[i].x_res;
 187                         for (; i < size; i++) {
 188                                 if (mode[i].x_res != xres_s)
 189                                         return mode[i - 1].mode;
 190                                 if (yres <= mode[i].y_res)
 191                                         return mode[i].mode;
 192                         }
 193                 }
 194         }
 195         return mode[size - 1].mode;
 196 }
 197
 198 /*
 199  * neoCalcVCLK --
 200  *
 201  * Determine the closest clock frequency to the one requested.
 202  */
 203 #define REF_FREQ 0xe517         /* 14.31818 in 20.12 fixed point */
 204 #define MAX_N 127
 205 #define MAX_D 31
 206 #define MAX_F 1
 207
 208 static void neoCalcVCLK(const struct fb_info *info,
 209                         struct neofb_par *par, long freq)
 210 {
 211         int n, d, f;
 212         int n_best = 0, d_best = 0, f_best = 0;
 213         long f_best_diff = (0x7ffff << 12);     /* 20.12 */
 214         long f_target = (freq << 12) / 1000;    /* 20.12 */
 215
 216         for (f = 0; f <= MAX_F; f++)
 217                 for (n = 0; n <= MAX_N; n++)
 218                         for (d = 0; d <= MAX_D; d++) {
 219                                 long f_out;     /* 20.12 */
 220                                 long f_diff;    /* 20.12 */
 221
 222                                 f_out =
 223                                     ((((n + 1) << 12) / ((d +
 224                                                           1) *
 225                                                          (1 << f))) >> 12)
 226                                     * REF_FREQ;
 227                                 f_diff = abs(f_out - f_target);
 228                                 if (f_diff < f_best_diff) {
 229                                         f_best_diff = f_diff;
 230                                         n_best = n;
 231                                         d_best = d;
 232                                         f_best = f;
 233                                 }
 234                         }
 235
 236         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
 237             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
 238             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
 239             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
 240                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
 241                    We should be able to try n up to 2047 */
 242                 par->VCLK3NumeratorLow = n_best;
 243                 par->VCLK3NumeratorHigh = (f_best << 7);
 244         } else
 245                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
 246
 247         par->VCLK3Denominator = d_best;
 248
 249 #ifdef NEOFB_DEBUG
 250         printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n",
 251                f_target >> 12,
 252                par->VCLK3NumeratorLow,
 253                par->VCLK3NumeratorHigh,
 254                par->VCLK3Denominator, f_best_diff >> 12);
 255 #endif
 256 }
 257
 258 /*
 259  * vgaHWInit --
 260  *      Handle the initialization, etc. of a screen.
 261  *      Return FALSE on failure.
 262  */
 263
 264 static int vgaHWInit(const struct fb_var_screeninfo *var,
 265                      const struct fb_info *info,
 266                      struct neofb_par *par, struct xtimings *timings)
 267 {
 268         par->MiscOutReg = 0x23;
 269
 270         if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
 271                 par->MiscOutReg |= 0x40;
 272
 273         if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
 274                 par->MiscOutReg |= 0x80;
 275
 276         /*
 277          * Time Sequencer
 278          */
 279         par->Sequencer[0] = 0x00;
 280         par->Sequencer[1] = 0x01;
 281         par->Sequencer[2] = 0x0F;
 282         par->Sequencer[3] = 0x00;       /* Font select */
 283         par->Sequencer[4] = 0x0E;       /* Misc */
 284
 285         /*
 286          * CRTC Controller
 287          */
 288         par->CRTC[0] = (timings->HTotal >> 3) - 5;
 289         par->CRTC[1] = (timings->HDisplay >> 3) - 1;
 290         par->CRTC[2] = (timings->HDisplay >> 3) - 1;
 291         par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
 292         par->CRTC[4] = (timings->HSyncStart >> 3);
 293         par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
 294             | (((timings->HSyncEnd >> 3)) & 0x1F);
 295         par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
 296         par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
 297             | (((timings->VDisplay - 1) & 0x100) >> 7)
 298             | ((timings->VSyncStart & 0x100) >> 6)
 299             | (((timings->VDisplay - 1) & 0x100) >> 5)
 300             | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
 301             | (((timings->VDisplay - 1) & 0x200) >> 3)
 302             | ((timings->VSyncStart & 0x200) >> 2);
 303         par->CRTC[8] = 0x00;
 304         par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
 305
 306         if (timings->dblscan)
 307                 par->CRTC[9] |= 0x80;
 308
 309         par->CRTC[10] = 0x00;
 310         par->CRTC[11] = 0x00;
 311         par->CRTC[12] = 0x00;
 312         par->CRTC[13] = 0x00;
 313         par->CRTC[14] = 0x00;
 314         par->CRTC[15] = 0x00;
 315         par->CRTC[16] = timings->VSyncStart & 0xFF;
 316         par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
 317         par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
 318         par->CRTC[19] = var->xres_virtual >> 4;
 319         par->CRTC[20] = 0x00;
 320         par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
 321         par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
 322         par->CRTC[23] = 0xC3;
 323         par->CRTC[24] = 0xFF;
 324
 325         /*
 326          * are these unnecessary?
 327          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 328          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 329          */
 330
 331         /*
 332          * Graphics Display Controller
 333          */
 334         par->Graphics[0] = 0x00;
 335         par->Graphics[1] = 0x00;
 336         par->Graphics[2] = 0x00;
 337         par->Graphics[3] = 0x00;
 338         par->Graphics[4] = 0x00;
 339         par->Graphics[5] = 0x40;
 340         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
 341         par->Graphics[7] = 0x0F;
 342         par->Graphics[8] = 0xFF;
 343
 344
 345         par->Attribute[0] = 0x00;       /* standard colormap translation */
 346         par->Attribute[1] = 0x01;
 347         par->Attribute[2] = 0x02;
 348         par->Attribute[3] = 0x03;
 349         par->Attribute[4] = 0x04;
 350         par->Attribute[5] = 0x05;
 351         par->Attribute[6] = 0x06;
 352         par->Attribute[7] = 0x07;
 353         par->Attribute[8] = 0x08;
 354         par->Attribute[9] = 0x09;
 355         par->Attribute[10] = 0x0A;
 356         par->Attribute[11] = 0x0B;
 357         par->Attribute[12] = 0x0C;
 358         par->Attribute[13] = 0x0D;
 359         par->Attribute[14] = 0x0E;
 360         par->Attribute[15] = 0x0F;
 361         par->Attribute[16] = 0x41;
 362         par->Attribute[17] = 0xFF;
 363         par->Attribute[18] = 0x0F;
 364         par->Attribute[19] = 0x00;
 365         par->Attribute[20] = 0x00;
 366
 367         return 0;
 368 }
 369
 370 static void vgaHWLock(void)
 371 {
 372         /* Protect CRTC[0-7] */
 373         VGAwCR(0x11, VGArCR(0x11) | 0x80);
 374 }
 375
 376 static void vgaHWUnlock(void)
 377 {
 378         /* Unprotect CRTC[0-7] */
 379         VGAwCR(0x11, VGArCR(0x11) & ~0x80);
 380 }
 381
 382 static void neoLock(void)
 383 {
 384         VGAwGR(0x09, 0x00);
 385         vgaHWLock();
 386 }
 387
 388 static void neoUnlock(void)
 389 {
 390         vgaHWUnlock();
 391         VGAwGR(0x09, 0x26);
 392 }
 393
 394 /*
 395  * vgaHWSeqReset
 396  *      perform a sequencer reset.
 397  */
 398 void vgaHWSeqReset(int start)
 399 {
 400         if (start)
 401                 VGAwSEQ(0x00, 0x01);    /* Synchronous Reset */
 402         else
 403                 VGAwSEQ(0x00, 0x03);    /* End Reset */
 404 }
 405
 406 void vgaHWProtect(int on)
 407 {
 408         unsigned char tmp;
 409
 410         if (on) {
 411                 /*
 412                  * Turn off screen and disable sequencer.
 413                  */
 414                 tmp = VGArSEQ(0x01);
 415
 416                 vgaHWSeqReset(1);       /* start synchronous reset */
 417                 VGAwSEQ(0x01, tmp | 0x20);      /* disable the display */
 418
 419                 VGAenablePalette();
 420         } else {
 421                 /*
 422                  * Reenable sequencer, then turn on screen.
 423                  */
 424
 425                 tmp = VGArSEQ(0x01);
 426
 427                 VGAwSEQ(0x01, tmp & ~0x20);     /* reenable display */
 428                 vgaHWSeqReset(0);       /* clear synchronousreset */
 429
 430                 VGAdisablePalette();
 431         }
 432 }
 433
 434 static void vgaHWRestore(const struct fb_info *info,
 435                          const struct neofb_par *par)
 436 {
 437         int i;
 438
 439         VGAwMISC(par->MiscOutReg);
 440
 441         for (i = 1; i < 5; i++)
 442                 VGAwSEQ(i, par->Sequencer[i]);
 443
 444         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
 445         VGAwCR(17, par->CRTC[17] & ~0x80);
 446
 447         for (i = 0; i < 25; i++)
 448                 VGAwCR(i, par->CRTC[i]);
 449
 450         for (i = 0; i < 9; i++)
 451                 VGAwGR(i, par->Graphics[i]);
 452
 453         VGAenablePalette();
 454
 455         for (i = 0; i < 21; i++)
 456                 VGAwATTR(i, par->Attribute[i]);
 457
 458         VGAdisablePalette();
 459 }
 460
 461
 462 /* -------------------- Hardware specific routines ------------------------- */
 463
 464 /*
 465  * Hardware Acceleration for Neo2200+
 466  */
 467 static inline int neo2200_sync(struct fb_info *info)
 468 {
 469         struct neofb_par *par = (struct neofb_par *) info->par;
 470         int waitcycles;
 471
 472         while (par->neo2200->bltStat & 1)
 473                 waitcycles++;
 474         return 0;
 475 }
 476
 477 static inline void neo2200_wait_fifo(struct fb_info *info,
 478                                      int requested_fifo_space)
 479 {
 480         //  ndev->neo.waitfifo_calls++;
 481         //  ndev->neo.waitfifo_sum += requested_fifo_space;
 482
 483         /* FIXME: does not work
 484            if (neo_fifo_space < requested_fifo_space)
 485            {
 486            neo_fifo_waitcycles++;
 487
 488            while (1)
 489            {
 490            neo_fifo_space = (neo2200->bltStat >> 8);
 491            if (neo_fifo_space >= requested_fifo_space)
 492            break;
 493            }
 494            }
 495            else
 496            {
 497            neo_fifo_cache_hits++;
 498            }
 499
 500            neo_fifo_space -= requested_fifo_space;
 501          */
 502
 503         neo2200_sync(info);
 504 }
 505
 506 static inline void neo2200_accel_init(struct fb_info *info,
 507                                       struct fb_var_screeninfo *var)
 508 {
 509         struct neofb_par *par = (struct neofb_par *) info->par;
 510         Neo2200 *neo2200 = par->neo2200;
 511         u32 bltMod, pitch;
 512
 513         neo2200_sync(info);
 514
 515         switch (var->bits_per_pixel) {
 516         case 8:
 517                 bltMod = NEO_MODE1_DEPTH8;
 518                 pitch = var->xres_virtual;
 519                 break;
 520         case 15:
 521         case 16:
 522                 bltMod = NEO_MODE1_DEPTH16;
 523                 pitch = var->xres_virtual * 2;
 524                 break;
 525         default:
 526                 printk(KERN_ERR
 527                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
 528                 return;
 529         }
 530
 531         neo2200->bltStat = bltMod << 16;
 532         neo2200->pitch = (pitch << 16) | pitch;
 533 }
 534
 535 /* --------------------------------------------------------------------- */
 536
 537 static int
 538 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 539 {
 540         struct neofb_par *par = (struct neofb_par *) info->par;
 541         unsigned int pixclock = var->pixclock;
 542         struct xtimings timings;
 543         int memlen, vramlen;
 544         int mode_ok = 0;
 545
 546         DBG("neofb_check_var");
 547
 548         if (!pixclock)
 549                 pixclock = 10000;       /* 10ns = 100MHz */
 550         timings.pixclock = 1000000000 / pixclock;
 551         if (timings.pixclock < 1)
 552                 timings.pixclock = 1;
 553
 554         if (timings.pixclock > par->maxClock)
 555                 return -EINVAL;
 556
 557         timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
 558         timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
 559         timings.HDisplay = var->xres;
 560         timings.HSyncStart = timings.HDisplay + var->right_margin;
 561         timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
 562         timings.HTotal = timings.HSyncEnd + var->left_margin;
 563         timings.VDisplay = var->yres;
 564         timings.VSyncStart = timings.VDisplay + var->lower_margin;
 565         timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
 566         timings.VTotal = timings.VSyncEnd + var->upper_margin;
 567         timings.sync = var->sync;
 568
 569         /* Is the mode larger than the LCD panel? */
 570         if (par->internal_display &&
 571             ((var->xres > par->NeoPanelWidth) ||
 572              (var->yres > par->NeoPanelHeight))) {
 573                 printk(KERN_INFO
 574                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
 575                        var->xres, var->yres, par->NeoPanelWidth,
 576                        par->NeoPanelHeight);
 577                 return -EINVAL;
 578         }
 579
 580         /* Is the mode one of the acceptable sizes? */
 581         if (!par->internal_display)
 582                 mode_ok = 1;
 583         else {
 584                 switch (var->xres) {
 585                 case 1280:
 586                         if (var->yres == 1024)
 587                                 mode_ok = 1;
 588                         break;
 589                 case 1024:
 590                         if (var->yres == 768)
 591                                 mode_ok = 1;
 592                         break;
 593                 case 800:
 594                         if (var->yres == (par->libretto ? 480 : 600))
 595                                 mode_ok = 1;
 596                         break;
 597                 case 640:
 598                         if (var->yres == 480)
 599                                 mode_ok = 1;
 600                         break;
 601                 }
 602         }
 603
 604         if (!mode_ok) {
 605                 printk(KERN_INFO
 606                        "Mode (%dx%d) won't display properly on LCD\n",
 607                        var->xres, var->yres);
 608                 return -EINVAL;
 609         }
 610
 611         var->red.msb_right = 0;
 612         var->green.msb_right = 0;
 613         var->blue.msb_right = 0;
 614
 615         switch (var->bits_per_pixel) {
 616         case 8:         /* PSEUDOCOLOUR, 256 */
 617                 var->transp.offset = 0;
 618                 var->transp.length = 0;
 619                 var->red.offset = 0;
 620                 var->red.length = 8;
 621                 var->green.offset = 0;
 622                 var->green.length = 8;
 623                 var->blue.offset = 0;
 624                 var->blue.length = 8;
 625                 break;
 626
 627         case 16:                /* DIRECTCOLOUR, 64k */
 628                 var->transp.offset = 0;
 629                 var->transp.length = 0;
 630                 var->red.offset = 11;
 631                 var->red.length = 5;
 632                 var->green.offset = 5;
 633                 var->green.length = 6;
 634                 var->blue.offset = 0;
 635                 var->blue.length = 5;
 636                 break;
 637
 638         case 24:                /* TRUECOLOUR, 16m */
 639                 var->transp.offset = 0;
 640                 var->transp.length = 0;
 641                 var->red.offset = 16;
 642                 var->red.length = 8;
 643                 var->green.offset = 8;
 644                 var->green.length = 8;
 645                 var->blue.offset = 0;
 646                 break;
 647
 648 #ifdef NO_32BIT_SUPPORT_YET
 649         case 32:                /* TRUECOLOUR, 16m */
 650                 var->transp.offset = 24;
 651                 var->transp.length = 8;
 652                 var->red.offset = 16;
 653                 var->red.length = 8;
 654                 var->green.offset = 8;
 655                 var->green.length = 8;
 656                 var->blue.offset = 0;
 657                 var->blue.length = 8;
 658                 break;
 659 #endif
 660         default:
 661                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
 662                        var->bits_per_pixel);
 663                 return -EINVAL;
 664         }
 665
 666         vramlen = info->fix.smem_len;
 667         if (vramlen > 4 * 1024 * 1024)
 668                 vramlen = 4 * 1024 * 1024;
 669
 670         if (var->yres_virtual < var->yres)
 671                 var->yres_virtual = var->yres;
 672         if (var->xres_virtual < var->xres)
 673                 var->xres_virtual = var->xres;
 674
 675         memlen =
 676             var->xres_virtual * var->bits_per_pixel * var->yres_virtual /
 677             8;
 678         if (memlen > vramlen) {
 679                 var->yres_virtual =
 680                     vramlen * 8 / (var->xres_virtual *
 681                                    var->bits_per_pixel);
 682                 memlen =
 683                     var->xres_virtual * var->bits_per_pixel *
 684                     var->yres_virtual / 8;
 685         }
 686
 687         /* we must round yres/xres down, we already rounded y/xres_virtual up
 688            if it was possible. We should return -EINVAL, but I disagree */
 689         if (var->yres_virtual < var->yres)
 690                 var->yres = var->yres_virtual;
 691         if (var->xres_virtual < var->xres)
 692                 var->xres = var->xres_virtual;
 693         if (var->xoffset + var->xres > var->xres_virtual)
 694                 var->xoffset = var->xres_virtual - var->xres;
 695         if (var->yoffset + var->yres > var->yres_virtual)
 696                 var->yoffset = var->yres_virtual - var->yres;
 697
 698         var->nonstd = 0;
 699         var->height = -1;
 700         var->width = -1;
 701
 702         if (var->bits_per_pixel >= 24 || !par->neo2200)
 703                 var->accel_flags &= ~FB_ACCELF_TEXT;
 704         return 0;
 705 }
 706
 707 static int neofb_set_par(struct fb_info *info)
 708 {
 709         struct neofb_par *par = (struct neofb_par *) info->par;
 710         struct xtimings timings;
 711         unsigned char temp;
 712         int i, clock_hi = 0;
 713         int lcd_stretch;
 714         int hoffset, voffset;
 715
 716         DBG("neofb_set_par");
 717
 718         neoUnlock();
 719
 720         vgaHWProtect(1);        /* Blank the screen */
 721
 722         timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
 723         timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
 724         timings.HDisplay = info->var.xres;
 725         timings.HSyncStart = timings.HDisplay + info->var.right_margin;
 726         timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
 727         timings.HTotal = timings.HSyncEnd + info->var.left_margin;
 728         timings.VDisplay = info->var.yres;
 729         timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
 730         timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
 731         timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
 732         timings.sync = info->var.sync;
 733         timings.pixclock = PICOS2KHZ(info->var.pixclock);
 734
 735         if (timings.pixclock < 1)
 736                 timings.pixclock = 1;
 737
 738         /*
 739          * This will allocate the datastructure and initialize all of the
 740          * generic VGA registers.
 741          */
 742
 743         if (vgaHWInit(&info->var, info, par, &timings))
 744                 return -EINVAL;
 745
 746         /*
 747          * The default value assigned by vgaHW.c is 0x41, but this does
 748          * not work for NeoMagic.
 749          */
 750         par->Attribute[16] = 0x01;
 751
 752         switch (info->var.bits_per_pixel) {
 753         case 8:
 754                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
 755                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
 756                 par->ExtColorModeSelect = 0x11;
 757                 break;
 758         case 16:
 759                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
 760                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
 761                 par->ExtColorModeSelect = 0x13;
 762                 break;
 763         case 24:
 764                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
 765                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
 766                 par->ExtColorModeSelect = 0x14;
 767                 break;
 768 #ifdef NO_32BIT_SUPPORT_YET
 769         case 32:                /* FIXME: guessed values */
 770                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
 771                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
 772                 par->ExtColorModeSelect = 0x15;
 773                 break;
 774 #endif
 775         default:
 776                 break;
 777         }
 778
 779         par->ExtCRTDispAddr = 0x10;
 780
 781         /* Vertical Extension */
 782         par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
 783             | (((timings.VDisplay - 1) & 0x400) >> 9)
 784             | (((timings.VSyncStart) & 0x400) >> 8)
 785             | (((timings.VSyncStart) & 0x400) >> 7);
 786
 787         /* Fast write bursts on unless disabled. */
 788         if (par->pci_burst)
 789                 par->SysIfaceCntl1 = 0x30;
 790         else
 791                 par->SysIfaceCntl1 = 0x00;
 792
 793         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
 794
 795         /* Enable any user specified display devices. */
 796         par->PanelDispCntlReg1 = 0x00;
 797         if (par->internal_display)
 798                 par->PanelDispCntlReg1 |= 0x02;
 799         if (par->external_display)
 800                 par->PanelDispCntlReg1 |= 0x01;
 801
 802         /* If the user did not specify any display devices, then... */
 803         if (par->PanelDispCntlReg1 == 0x00) {
 804                 /* Default to internal (i.e., LCD) only. */
 805                 par->PanelDispCntlReg1 |= 0x02;
 806         }
 807
 808         /* If we are using a fixed mode, then tell the chip we are. */
 809         switch (info->var.xres) {
 810         case 1280:
 811                 par->PanelDispCntlReg1 |= 0x60;
 812                 break;
 813         case 1024:
 814                 par->PanelDispCntlReg1 |= 0x40;
 815                 break;
 816         case 800:
 817                 par->PanelDispCntlReg1 |= 0x20;
 818                 break;
 819         case 640:
 820         default:
 821                 break;
 822         }
 823
 824         /* Setup shadow register locking. */
 825         switch (par->PanelDispCntlReg1 & 0x03) {
 826         case 0x01:              /* External CRT only mode: */
 827                 par->GeneralLockReg = 0x00;
 828                 /* We need to program the VCLK for external display only mode. */
 829                 par->ProgramVCLK = 1;
 830                 break;
 831         case 0x02:              /* Internal LCD only mode: */
 832         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
 833                 par->GeneralLockReg = 0x01;
 834                 /* Don't program the VCLK when using the LCD. */
 835                 par->ProgramVCLK = 0;
 836                 break;
 837         }
 838
 839         /*
 840          * If the screen is to be stretched, turn on stretching for the
 841          * various modes.
 842          *
 843          * OPTION_LCD_STRETCH means stretching should be turned off!
 844          */
 845         par->PanelDispCntlReg2 = 0x00;
 846         par->PanelDispCntlReg3 = 0x00;
 847
 848         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
 849             (info->var.xres != par->NeoPanelWidth)) {
 850                 switch (info->var.xres) {
 851                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
 852                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
 853                 case 640:
 854                 case 800:
 855                 case 1024:
 856                         lcd_stretch = 1;
 857                         par->PanelDispCntlReg2 |= 0xC6;
 858                         break;
 859                 default:
 860                         lcd_stretch = 0;
 861                         /* No stretching in these modes. */
 862                 }
 863         } else
 864                 lcd_stretch = 0;
 865
 866         /*
 867          * If the screen is to be centerd, turn on the centering for the
 868          * various modes.
 869          */
 870         par->PanelVertCenterReg1 = 0x00;
 871         par->PanelVertCenterReg2 = 0x00;
 872         par->PanelVertCenterReg3 = 0x00;
 873         par->PanelVertCenterReg4 = 0x00;
 874         par->PanelVertCenterReg5 = 0x00;
 875         par->PanelHorizCenterReg1 = 0x00;
 876         par->PanelHorizCenterReg2 = 0x00;
 877         par->PanelHorizCenterReg3 = 0x00;
 878         par->PanelHorizCenterReg4 = 0x00;
 879         par->PanelHorizCenterReg5 = 0x00;
 880
 881
 882         if (par->PanelDispCntlReg1 & 0x02) {
 883                 if (info->var.xres == par->NeoPanelWidth) {
 884                         /*
 885                          * No centering required when the requested display width
 886                          * equals the panel width.
 887                          */
 888                 } else {
 889                         par->PanelDispCntlReg2 |= 0x01;
 890                         par->PanelDispCntlReg3 |= 0x10;
 891
 892                         /* Calculate the horizontal and vertical offsets. */
 893                         if (!lcd_stretch) {
 894                                 hoffset =
 895                                     ((par->NeoPanelWidth -
 896                                       info->var.xres) >> 4) - 1;
 897                                 voffset =
 898                                     ((par->NeoPanelHeight -
 899                                       info->var.yres) >> 1) - 2;
 900                         } else {
 901                                 /* Stretched modes cannot be centered. */
 902                                 hoffset = 0;
 903                                 voffset = 0;
 904                         }
 905
 906                         switch (info->var.xres) {
 907                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
 908                                 par->PanelHorizCenterReg3 = hoffset;
 909                                 par->PanelVertCenterReg2 = voffset;
 910                                 break;
 911                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
 912                                 par->PanelHorizCenterReg4 = hoffset;
 913                                 par->PanelVertCenterReg1 = voffset;
 914                                 break;
 915                         case 640:
 916                                 par->PanelHorizCenterReg1 = hoffset;
 917                                 par->PanelVertCenterReg3 = voffset;
 918                                 break;
 919                         case 800:
 920                                 par->PanelHorizCenterReg2 = hoffset;
 921                                 par->PanelVertCenterReg4 = voffset;
 922                                 break;
 923                         case 1024:
 924                                 par->PanelHorizCenterReg5 = hoffset;
 925                                 par->PanelVertCenterReg5 = voffset;
 926                                 break;
 927                         case 1280:
 928                         default:
 929                                 /* No centering in these modes. */
 930                                 break;
 931                         }
 932                 }
 933         }
 934
 935         par->biosMode =
 936             neoFindMode(info->var.xres, info->var.yres,
 937                         info->var.bits_per_pixel);
 938
 939         /*
 940          * Calculate the VCLK that most closely matches the requested dot
 941          * clock.
 942          */
 943         neoCalcVCLK(info, par, timings.pixclock);
 944
 945         /* Since we program the clocks ourselves, always use VCLK3. */
 946         par->MiscOutReg |= 0x0C;
 947
 948         /* linear colormap for non palettized modes */
 949         switch (info->var.bits_per_pixel) {
 950         case 8:
 951                 /* PseudoColor, 256 */
 952                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 953                 break;
 954         case 16:
 955                 /* DirectColor, 64k */
 956                 info->fix.visual = FB_VISUAL_DIRECTCOLOR;
 957
 958                 for (i = 0; i < 64; i++) {
 959                         outb(i, 0x3c8);
 960
 961                         outb(i << 1, 0x3c9);
 962                         outb(i, 0x3c9);
 963                         outb(i << 1, 0x3c9);
 964                 }
 965                 break;
 966         case 24:
 967 #ifdef NO_32BIT_SUPPORT_YET
 968         case 32:
 969 #endif
 970                 /* TrueColor, 16m */
 971                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 972
 973                 for (i = 0; i < 256; i++) {
 974                         outb(i, 0x3c8);
 975
 976                         outb(i, 0x3c9);
 977                         outb(i, 0x3c9);
 978                         outb(i, 0x3c9);
 979                 }
 980                 break;
 981         }
 982
 983         /* alread unlocked above */
 984         /* BOGUS  VGAwGR (0x09, 0x26); */
 985
 986         /* don't know what this is, but it's 0 from bootup anyway */
 987         VGAwGR(0x15, 0x00);
 988
 989         /* was set to 0x01 by my bios in text and vesa modes */
 990         VGAwGR(0x0A, par->GeneralLockReg);
 991
 992         /*
 993          * The color mode needs to be set before calling vgaHWRestore
 994          * to ensure the DAC is initialized properly.
 995          *
 996          * NOTE: Make sure we don't change bits make sure we don't change
 997          * any reserved bits.
 998          */
 999         temp = VGArGR(0x90);
1000         switch (info->fix.accel) {
1001         case FB_ACCEL_NEOMAGIC_NM2070:
1002                 temp &= 0xF0;   /* Save bits 7:4 */
1003                 temp |= (par->ExtColorModeSelect & ~0xF0);
1004                 break;
1005         case FB_ACCEL_NEOMAGIC_NM2090:
1006         case FB_ACCEL_NEOMAGIC_NM2093:
1007         case FB_ACCEL_NEOMAGIC_NM2097:
1008         case FB_ACCEL_NEOMAGIC_NM2160:
1009         case FB_ACCEL_NEOMAGIC_NM2200:
1010         case FB_ACCEL_NEOMAGIC_NM2230:
1011         case FB_ACCEL_NEOMAGIC_NM2360:
1012         case FB_ACCEL_NEOMAGIC_NM2380:
1013                 temp &= 0x70;   /* Save bits 6:4 */
1014                 temp |= (par->ExtColorModeSelect & ~0x70);
1015                 break;
1016         }
1017
1018         VGAwGR(0x90, temp);
1019
1020         /*
1021          * In some rare cases a lockup might occur if we don't delay
1022          * here. (Reported by Miles Lane)
1023          */
1024         //mdelay(200);
1025
1026         /*
1027          * Disable horizontal and vertical graphics and text expansions so
1028          * that vgaHWRestore works properly.
1029          */
1030         temp = VGArGR(0x25);
1031         temp &= 0x39;
1032         VGAwGR(0x25, temp);
1033
1034         /*
1035          * Sleep for 200ms to make sure that the two operations above have
1036          * had time to take effect.
1037          */
1038         mdelay(200);
1039
1040         /*
1041          * This function handles restoring the generic VGA registers.  */
1042         vgaHWRestore(info, par);
1043
1044
1045         VGAwGR(0x0E, par->ExtCRTDispAddr);
1046         VGAwGR(0x0F, par->ExtCRTOffset);
1047         temp = VGArGR(0x10);
1048         temp &= 0x0F;           /* Save bits 3:0 */
1049         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1050         VGAwGR(0x10, temp);
1051
1052         VGAwGR(0x11, par->SysIfaceCntl2);
1053         VGAwGR(0x15, 0 /*par->SingleAddrPage */ );
1054         VGAwGR(0x16, 0 /*par->DualAddrPage */ );
1055
1056         temp = VGArGR(0x20);
1057         switch (info->fix.accel) {
1058         case FB_ACCEL_NEOMAGIC_NM2070:
1059                 temp &= 0xFC;   /* Save bits 7:2 */
1060                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1061                 break;
1062         case FB_ACCEL_NEOMAGIC_NM2090:
1063         case FB_ACCEL_NEOMAGIC_NM2093:
1064         case FB_ACCEL_NEOMAGIC_NM2097:
1065         case FB_ACCEL_NEOMAGIC_NM2160:
1066                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1067                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1068                 break;
1069         case FB_ACCEL_NEOMAGIC_NM2200:
1070         case FB_ACCEL_NEOMAGIC_NM2230:
1071         case FB_ACCEL_NEOMAGIC_NM2360:
1072         case FB_ACCEL_NEOMAGIC_NM2380:
1073                 temp &= 0x98;   /* Save bits 7,4:3 */
1074                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1075                 break;
1076         }
1077         VGAwGR(0x20, temp);
1078
1079         temp = VGArGR(0x25);
1080         temp &= 0x38;           /* Save bits 5:3 */
1081         temp |= (par->PanelDispCntlReg2 & ~0x38);
1082         VGAwGR(0x25, temp);
1083
1084         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1085                 temp = VGArGR(0x30);
1086                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1087                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1088                 VGAwGR(0x30, temp);
1089         }
1090
1091         VGAwGR(0x28, par->PanelVertCenterReg1);
1092         VGAwGR(0x29, par->PanelVertCenterReg2);
1093         VGAwGR(0x2a, par->PanelVertCenterReg3);
1094
1095         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1096                 VGAwGR(0x32, par->PanelVertCenterReg4);
1097                 VGAwGR(0x33, par->PanelHorizCenterReg1);
1098                 VGAwGR(0x34, par->PanelHorizCenterReg2);
1099                 VGAwGR(0x35, par->PanelHorizCenterReg3);
1100         }
1101
1102         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1103                 VGAwGR(0x36, par->PanelHorizCenterReg4);
1104
1105         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1106             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1107             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1108             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1109                 VGAwGR(0x36, par->PanelHorizCenterReg4);
1110                 VGAwGR(0x37, par->PanelVertCenterReg5);
1111                 VGAwGR(0x38, par->PanelHorizCenterReg5);
1112
1113                 clock_hi = 1;
1114         }
1115
1116         /* Program VCLK3 if needed. */
1117         if (par->ProgramVCLK && ((VGArGR(0x9B) != par->VCLK3NumeratorLow)
1118                                  || (VGArGR(0x9F) != par->VCLK3Denominator)
1119                                  || (clock_hi && ((VGArGR(0x8F) & ~0x0f)
1120                                                   != (par->
1121                                                       VCLK3NumeratorHigh &
1122                                                       ~0x0F))))) {
1123                 VGAwGR(0x9B, par->VCLK3NumeratorLow);
1124                 if (clock_hi) {
1125                         temp = VGArGR(0x8F);
1126                         temp &= 0x0F;   /* Save bits 3:0 */
1127                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1128                         VGAwGR(0x8F, temp);
1129                 }
1130                 VGAwGR(0x9F, par->VCLK3Denominator);
1131         }
1132
1133         if (par->biosMode)
1134                 VGAwCR(0x23, par->biosMode);
1135
1136         VGAwGR(0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1137
1138         /* Program vertical extension register */
1139         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1140             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1141             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1142             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1143                 VGAwCR(0x70, par->VerticalExt);
1144         }
1145
1146         vgaHWProtect(0);        /* Turn on screen */
1147
1148         /* Calling this also locks offset registers required in update_start */
1149         neoLock();
1150
1151         info->fix.line_length =
1152             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1153
1154         switch (info->fix.accel) {
1155                 case FB_ACCEL_NEOMAGIC_NM2200:
1156                 case FB_ACCEL_NEOMAGIC_NM2230:
1157                 case FB_ACCEL_NEOMAGIC_NM2360:
1158                 case FB_ACCEL_NEOMAGIC_NM2380:
1159                         neo2200_accel_init(info, &info->var);
1160                         break;
1161                 default:
1162                         break;
1163         }
1164         return 0;
1165 }
1166
1167 static void neofb_update_start(struct fb_info *info,
1168                                struct fb_var_screeninfo *var)
1169 {
1170         int oldExtCRTDispAddr;
1171         int Base;
1172
1173         DBG("neofb_update_start");
1174
1175         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1176         Base *= (var->bits_per_pixel + 7) / 8;
1177
1178         neoUnlock();
1179
1180         /*
1181          * These are the generic starting address registers.
1182          */
1183         VGAwCR(0x0C, (Base & 0x00FF00) >> 8);
1184         VGAwCR(0x0D, (Base & 0x00FF));
1185
1186         /*
1187          * Make sure we don't clobber some other bits that might already
1188          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1189          * be needed.
1190          */
1191         oldExtCRTDispAddr = VGArGR(0x0E);
1192         VGAwGR(0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1193
1194         neoLock();
1195 }
1196
1197 /*
1198  *    Pan or Wrap the Display
1199  */
1200 static int neofb_pan_display(struct fb_var_screeninfo *var,
1201                              struct fb_info *info)
1202 {
1203         u_int y_bottom;
1204
1205         y_bottom = var->yoffset;
1206
1207         if (!(var->vmode & FB_VMODE_YWRAP))
1208                 y_bottom += var->yres;
1209
1210         if (var->xoffset > (var->xres_virtual - var->xres))
1211                 return -EINVAL;
1212         if (y_bottom > info->var.yres_virtual)
1213                 return -EINVAL;
1214
1215         neofb_update_start(info, var);
1216
1217         info->var.xoffset = var->xoffset;
1218         info->var.yoffset = var->yoffset;
1219
1220         if (var->vmode & FB_VMODE_YWRAP)
1221                 info->var.vmode |= FB_VMODE_YWRAP;
1222         else
1223                 info->var.vmode &= ~FB_VMODE_YWRAP;
1224         return 0;
1225 }
1226
1227 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1228                            u_int transp, struct fb_info *fb)
1229 {
1230         if (regno >= NR_PALETTE)
1231                 return -EINVAL;
1232
1233         switch (fb->var.bits_per_pixel) {
1234         case 8:
1235                 outb(regno, 0x3c8);
1236
1237                 outb(red >> 10, 0x3c9);
1238                 outb(green >> 10, 0x3c9);
1239                 outb(blue >> 10, 0x3c9);
1240                 break;
1241         case 16:
1242                 if (regno < 16)
1243                         ((u16 *) fb->pseudo_palette)[regno] =
1244                             ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1245                             ((blue & 0xf800) >> 11);
1246                 break;
1247         case 24:
1248                 if (regno < 16)
1249                         ((u32 *) fb->pseudo_palette)[regno] =
1250                             ((red & 0xff00) << 8) | ((green & 0xff00)) |
1251                             ((blue & 0xff00) >> 8);
1252                 break;
1253 #ifdef NO_32BIT_SUPPORT_YET
1254         case 32:
1255                 if (regno < 16)
1256                         ((u32 *) fb->pseudo_palette)[regno] =
1257                             ((transp & 0xff00) << 16) | ((red & 0xff00) <<
1258                                                          8) | ((green &
1259                                                                 0xff00)) |
1260                             ((blue & 0xff00) >> 8);
1261                 break;
1262 #endif
1263         default:
1264                 return 1;
1265         }
1266         return 0;
1267 }
1268
1269 /*
1270  *    (Un)Blank the display.
1271  */
1272 static int neofb_blank(int blank, struct fb_info *info)
1273 {
1274         /*
1275          *  Blank the screen if blank_mode != 0, else unblank. If
1276          *  blank == NULL then the caller blanks by setting the CLUT
1277          *  (Color Look Up Table) to all black. Return 0 if blanking
1278          *  succeeded, != 0 if un-/blanking failed due to e.g. a
1279          *  video mode which doesn't support it. Implements VESA
1280          *  suspend and powerdown modes on hardware that supports
1281          *  disabling hsync/vsync:
1282          *    blank_mode == 2: suspend vsync
1283          *    blank_mode == 3: suspend hsync
1284          *    blank_mode == 4: powerdown
1285          *
1286          *  wms...Enable VESA DMPS compatible powerdown mode
1287          *  run "setterm -powersave powerdown" to take advantage
1288          */
1289
1290         switch (blank) {
1291         case 4:         /* powerdown - both sync lines down */
1292 #ifdef CONFIG_TOSHIBA
1293                 /* attempt to turn off backlight on toshiba; also turns off external */
1294                 {
1295                         SMMRegisters regs;
1296
1297                         regs.eax = 0xff00; /* HCI_SET */
1298                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1299                         regs.ecx = 0x0000; /* HCI_DISABLE */
1300                         tosh_smm(&regs);
1301                 }
1302 #endif
1303                 break;
1304         case 3:         /* hsync off */
1305                 break;
1306         case 2:         /* vsync off */
1307                 break;
1308         case 1:         /* just software blanking of screen */
1309                 break;
1310         default:                /* case 0, or anything else: unblank */
1311 #ifdef CONFIG_TOSHIBA
1312                 /* attempt to re-enable backlight/external on toshiba */
1313                 {
1314                         SMMRegisters regs;
1315
1316                         regs.eax = 0xff00; /* HCI_SET */
1317                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1318                         regs.ecx = 0x0001; /* HCI_ENABLE */
1319                         tosh_smm(&regs);
1320                 }
1321 #endif
1322                 break;
1323         }
1324         return 0;
1325 }
1326
1327 static void
1328 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1329 {
1330         struct neofb_par *par = (struct neofb_par *) info->par;
1331         u_long dst, rop;
1332
1333         dst = rect->dx + rect->dy * info->var.xres_virtual;
1334         rop = rect->rop ? 0x060000 : 0x0c0000;
1335
1336         neo2200_wait_fifo(info, 4);
1337
1338         /* set blt control */
1339         par->neo2200->bltCntl = NEO_BC3_FIFO_EN |
1340             NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1341             //               NEO_BC3_DST_XY_ADDR  |
1342             //               NEO_BC3_SRC_XY_ADDR  |
1343             rop;
1344
1345         switch (info->var.bits_per_pixel) {
1346         case 8:
1347                 par->neo2200->fgColor = rect->color;
1348                 break;
1349         case 16:
1350                 par->neo2200->fgColor =
1351                     ((u16 *) (info->pseudo_palette))[rect->color];
1352                 break;
1353         }
1354
1355         par->neo2200->dstStart =
1356             dst * ((info->var.bits_per_pixel + 7) / 8);
1357         par->neo2200->xyExt =
1358             (rect->height << 16) | (rect->width & 0xffff);
1359 }
1360
1361 static void
1362 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1363 {
1364         struct neofb_par *par = (struct neofb_par *) info->par;
1365         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1366         u_long src, dst, bltCntl;
1367
1368         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1369
1370         if (sy < dy) {
1371                 sy += (area->height - 1);
1372                 dy += (area->height - 1);
1373
1374                 bltCntl |= NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1375         }
1376
1377         if (area->sx < area->dx) {
1378                 sx += (area->width - 1);
1379                 dx += (area->width - 1);
1380
1381                 bltCntl |= NEO_BC0_X_DEC;
1382         }
1383
1384         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1385         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1386
1387         neo2200_wait_fifo(info, 4);
1388
1389         /* set blt control */
1390         par->neo2200->bltCntl = bltCntl;
1391
1392         par->neo2200->srcStart = src;
1393         par->neo2200->dstStart = dst;
1394         par->neo2200->xyExt =
1395             (area->height << 16) | (area->width & 0xffff);
1396 }
1397
1398 static void
1399 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1400 {
1401         struct neofb_par *par = (struct neofb_par *) info->par;
1402
1403         neo2200_sync(info);
1404
1405         switch (info->var.bits_per_pixel) {
1406         case 8:
1407                 par->neo2200->fgColor = image->fg_color;
1408                 par->neo2200->bgColor = image->bg_color;
1409                 break;
1410         case 16:
1411                 par->neo2200->fgColor =
1412                     ((u16 *) (info->pseudo_palette))[image->fg_color];
1413                 par->neo2200->bgColor =
1414                     ((u16 *) (info->pseudo_palette))[image->bg_color];
1415                 break;
1416         }
1417
1418         par->neo2200->bltCntl = NEO_BC0_SYS_TO_VID |
1419             NEO_BC0_SRC_MONO | NEO_BC3_SKIP_MAPPING |
1420             //                      NEO_BC3_DST_XY_ADDR |
1421             0x0c0000;
1422
1423         par->neo2200->srcStart = 0;
1424 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1425         par->neo2200->dstStart =
1426             ((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1427              image->dy * info->fix.line_length);
1428         par->neo2200->xyExt =
1429             (image->height << 16) | (image->width & 0xffff);
1430
1431         memcpy(par->mmio_vbase + 0x100000, image->data,
1432                (image->width * image->height) >> 3);
1433 }
1434
1435 static void
1436 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1437 {
1438         switch (info->fix.accel) {
1439                 case FB_ACCEL_NEOMAGIC_NM2200:
1440                 case FB_ACCEL_NEOMAGIC_NM2230:
1441                 case FB_ACCEL_NEOMAGIC_NM2360:
1442                 case FB_ACCEL_NEOMAGIC_NM2380:
1443                         neo2200_fillrect(info, rect);
1444                         break;
1445                 default:
1446                         cfb_fillrect(info, rect);
1447                         break;
1448         }
1449 }
1450
1451 static void
1452 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1453 {
1454         switch (info->fix.accel) {
1455                 case FB_ACCEL_NEOMAGIC_NM2200:
1456                 case FB_ACCEL_NEOMAGIC_NM2230:
1457                 case FB_ACCEL_NEOMAGIC_NM2360:
1458                 case FB_ACCEL_NEOMAGIC_NM2380:
1459                         neo2200_copyarea(info, area);
1460                         break;
1461                 default:
1462                         cfb_copyarea(info, area);
1463                         break;
1464         }
1465 }
1466
1467 static void
1468 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1469 {
1470         switch (info->fix.accel) {
1471                 case FB_ACCEL_NEOMAGIC_NM2200:
1472                 case FB_ACCEL_NEOMAGIC_NM2230:
1473                 case FB_ACCEL_NEOMAGIC_NM2360:
1474                 case FB_ACCEL_NEOMAGIC_NM2380:
1475                         neo2200_imageblit(info, image);
1476                         break;
1477                 default:
1478                         cfb_imageblit(info, image);
1479                         break;
1480         }
1481 }
1482
1483 static int
1484 neofb_sync(struct fb_info *info)
1485 {
1486         switch (info->fix.accel) {
1487                 case FB_ACCEL_NEOMAGIC_NM2200:
1488                 case FB_ACCEL_NEOMAGIC_NM2230:
1489                 case FB_ACCEL_NEOMAGIC_NM2360:
1490                 case FB_ACCEL_NEOMAGIC_NM2380:
1491                         neo2200_sync(info);
1492                         break;
1493                 default:
1494                         break;
1495         }
1496         return 0;
1497 }
1498
1499 static struct fb_ops neofb_ops = {
1500         .owner          = THIS_MODULE,
1501         .fb_check_var   = neofb_check_var,
1502         .fb_set_par     = neofb_set_par,
1503         .fb_setcolreg   = neofb_setcolreg,
1504         .fb_pan_display = neofb_pan_display,
1505         .fb_blank       = neofb_blank,
1506         .fb_sync        = neofb_sync,
1507         .fb_fillrect    = neofb_fillrect,
1508         .fb_copyarea    = neofb_copyarea,
1509         .fb_imageblit   = neofb_imageblit,
1510         .fb_cursor      = soft_cursor,
1511 };
1512
1513 /* --------------------------------------------------------------------- */
1514
1515 static struct fb_var_screeninfo __devinitdata neofb_var640x480x8 = {
1516         .accel_flags    = FB_ACCELF_TEXT,
1517         .xres           = 640,
1518         .yres           = 480,
1519         .xres_virtual   = 640,
1520         .yres_virtual   = 30000,
1521         .bits_per_pixel = 8,
1522         .pixclock       = 39722,
1523         .left_margin    = 48,
1524         .right_margin   = 16,
1525         .upper_margin   = 33,
1526         .lower_margin   = 10,
1527         .hsync_len      = 96,
1528         .vsync_len      = 2,
1529         .vmode          = FB_VMODE_NONINTERLACED
1530 };
1531
1532 static struct fb_var_screeninfo __devinitdata neofb_var800x600x8 = {
1533         .accel_flags    = FB_ACCELF_TEXT,
1534         .xres           = 800,
1535         .yres           = 600,
1536         .xres_virtual   = 800,
1537         .yres_virtual   = 30000,
1538         .bits_per_pixel = 8,
1539         .pixclock       = 25000,
1540         .left_margin    = 88,
1541         .right_margin   = 40,
1542         .upper_margin   = 23,
1543         .lower_margin   = 1,
1544         .hsync_len      = 128,
1545         .vsync_len      = 4,
1546         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1547         .vmode          = FB_VMODE_NONINTERLACED
1548 };
1549
1550 static struct fb_var_screeninfo __devinitdata neofb_var800x480x8 = {
1551         .accel_flags    = FB_ACCELF_TEXT,
1552         .xres           = 800,
1553         .yres           = 480,
1554         .xres_virtual   = 800,
1555         .yres_virtual   = 30000,
1556         .bits_per_pixel = 8,
1557         .pixclock       = 25000,
1558         .left_margin    = 88,
1559         .right_margin   = 40,
1560         .upper_margin   = 23,
1561         .lower_margin   = 1,
1562         .hsync_len      = 128,
1563         .vsync_len      = 4,
1564         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1565         .vmode          = FB_VMODE_NONINTERLACED
1566 };
1567
1568 static struct fb_var_screeninfo __devinitdata neofb_var1024x768x8 = {
1569         .accel_flags    = FB_ACCELF_TEXT,
1570         .xres           = 1024,
1571         .yres           = 768,
1572         .xres_virtual   = 1024,
1573         .yres_virtual   = 30000,
1574         .bits_per_pixel = 8,
1575         .pixclock       = 15385,
1576         .left_margin    = 160,
1577         .right_margin   = 24,
1578         .upper_margin   = 29,
1579         .lower_margin   = 3,
1580         .hsync_len      = 136,
1581         .vsync_len      = 6,
1582         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1583         .vmode          = FB_VMODE_NONINTERLACED
1584 };
1585
1586 #ifdef NOT_DONE
1587 static struct fb_var_screeninfo __devinitdata neofb_var1280x1024x8 = {
1588         .accel_flags    = FB_ACCELF_TEXT,
1589         .xres           = 1280,
1590         .yres           = 1024,
1591         .xres_virtual   = 1280,
1592         .yres_virtual   = 30000,
1593         .bits_per_pixel = 8,
1594         .pixclock       = 9260,
1595         .left_margin    = 248,
1596         .right_margin   = 48,
1597         .upper_margin   = 38,
1598         .lower_margin   = 1,
1599         .hsync_len      = 112,
1600         .vsync_len      = 3,
1601         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1602         .vmode          = FB_VMODE_NONINTERLACED
1603 };
1604 #endif
1605
1606 static int __devinit neo_map_mmio(struct fb_info *info,
1607                                   struct pci_dev *dev)
1608 {
1609         struct neofb_par *par = (struct neofb_par *) info->par;
1610
1611         DBG("neo_map_mmio");
1612
1613         info->fix.mmio_start = pci_resource_start(dev, 1);
1614         info->fix.mmio_len = MMIO_SIZE;
1615
1616         if (!request_mem_region
1617             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1618                 printk("neofb: memory mapped IO in use\n");
1619                 return -EBUSY;
1620         }
1621
1622         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1623         if (!par->mmio_vbase) {
1624                 printk("neofb: unable to map memory mapped IO\n");
1625                 release_mem_region(info->fix.mmio_start,
1626                                    info->fix.mmio_len);
1627                 return -ENOMEM;
1628         } else
1629                 printk(KERN_INFO "neofb: mapped io at %p\n",
1630                        par->mmio_vbase);
1631         return 0;
1632 }
1633
1634 static void __devinit neo_unmap_mmio(struct fb_info *info)
1635 {
1636         struct neofb_par *par = (struct neofb_par *) info->par;
1637
1638         DBG("neo_unmap_mmio");
1639
1640         if (par->mmio_vbase) {
1641                 iounmap(par->mmio_vbase);
1642                 par->mmio_vbase = NULL;
1643
1644                 release_mem_region(info->fix.mmio_start,
1645                                    info->fix.mmio_len);
1646         }
1647 }
1648
1649 static int __devinit neo_map_video(struct fb_info *info,
1650                                    struct pci_dev *dev, int video_len)
1651 {
1652         DBG("neo_map_video");
1653
1654         info->fix.smem_start = pci_resource_start(dev, 0);
1655         info->fix.smem_len = video_len;
1656
1657         if (!request_mem_region
1658             (info->fix.smem_start, info->fix.smem_len, "frame buffer")) {
1659                 printk("neofb: frame buffer in use\n");
1660                 return -EBUSY;
1661         }
1662
1663         info->screen_base =
1664             ioremap(info->fix.smem_start, info->fix.smem_len);
1665         if (!info->screen_base) {
1666                 printk("neofb: unable to map screen memory\n");
1667                 release_mem_region(info->fix.smem_start,
1668                                    info->fix.smem_len);
1669                 return -ENOMEM;
1670         } else
1671                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1672                        info->screen_base);
1673
1674 #ifdef CONFIG_MTRR
1675         ((struct neofb_par *)(info->par))->mtrr =
1676             mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1677                      MTRR_TYPE_WRCOMB, 1);
1678 #endif
1679
1680         /* Clear framebuffer, it's all white in memory after boot */
1681         memset(info->screen_base, 0, info->fix.smem_len);
1682         return 0;
1683 }
1684
1685 static void __devinit neo_unmap_video(struct fb_info *info)
1686 {
1687
1688         DBG("neo_unmap_video");
1689
1690         if (info->screen_base) {
1691 #ifdef CONFIG_MTRR
1692                 struct neofb_par *par = (struct neofb_par *) info->par;
1693                 mtrr_del(par->mtrr, info->fix.smem_start,
1694                          info->fix.smem_len);
1695 #endif
1696
1697                 iounmap(info->screen_base);
1698                 info->screen_base = NULL;
1699
1700                 release_mem_region(info->fix.smem_start,
1701                                    info->fix.smem_len);
1702         }
1703 }
1704
1705 static int __devinit neo_init_hw(struct fb_info *info)
1706 {
1707         struct neofb_par *par = (struct neofb_par *) info->par;
1708         unsigned char type, display;
1709         int videoRam = 896;
1710         int maxClock = 65000;
1711         int CursorMem = 1024;
1712         int CursorOff = 0x100;
1713         int linearSize = 1024;
1714         int maxWidth = 1024;
1715         int maxHeight = 1024;
1716         int w;
1717
1718         DBG("neo_init_hw");
1719
1720         neoUnlock();
1721
1722 #if 0
1723         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1724         for (w = 0; w < 0x85; w++)
1725                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1726                        (void *) VGArCR(w));
1727         for (w = 0; w < 0xC7; w++)
1728                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1729                        (void *) VGArGR(w));
1730 #endif
1731
1732         /* Determine the panel type */
1733         VGAwGR(0x09, 0x26);
1734         type = VGArGR(0x21);
1735         display = VGArGR(0x20);
1736         if (!par->internal_display && !par->external_display) {
1737                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1738                 par->external_display = display & 1;
1739                 printk (KERN_INFO "Autodetected %s display\n",
1740                         par->internal_display && par->external_display ? "simultaneous" :
1741                         par->internal_display ? "internal" : "external");
1742         }
1743
1744         /* Determine panel width -- used in NeoValidMode. */
1745         w = VGArGR(0x20);
1746         VGAwGR(0x09, 0x00);
1747         switch ((w & 0x18) >> 3) {
1748         case 0x00:
1749                 par->NeoPanelWidth = 640;
1750                 par->NeoPanelHeight = 480;
1751                 info->var = neofb_var640x480x8;
1752                 break;
1753         case 0x01:
1754                 par->NeoPanelWidth = 800;
1755                 par->NeoPanelHeight = par->libretto ? 480 : 600;
1756                 info->var = par->libretto ? neofb_var800x480x8 : neofb_var800x600x8;
1757                 break;
1758         case 0x02:
1759                 par->NeoPanelWidth = 1024;
1760                 par->NeoPanelHeight = 768;
1761                 info->var = neofb_var1024x768x8;
1762                 break;
1763         case 0x03:
1764                 /* 1280x1024 panel support needs to be added */
1765 #ifdef NOT_DONE
1766                 par->NeoPanelWidth = 1280;
1767                 par->NeoPanelHeight = 1024;
1768                 info->var = neofb_var1280x1024x8;
1769                 break;
1770 #else
1771                 printk(KERN_ERR
1772                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1773                 return -1;
1774 #endif
1775         default:
1776                 par->NeoPanelWidth = 640;
1777                 par->NeoPanelHeight = 480;
1778                 info->var = neofb_var640x480x8;
1779                 break;
1780         }
1781
1782         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1783                par->NeoPanelWidth,
1784                par->NeoPanelHeight,
1785                (type & 0x02) ? "color" : "monochrome",
1786                (type & 0x10) ? "TFT" : "dual scan");
1787
1788         switch (info->fix.accel) {
1789         case FB_ACCEL_NEOMAGIC_NM2070:
1790                 videoRam = 896;
1791                 maxClock = 65000;
1792                 CursorMem = 2048;
1793                 CursorOff = 0x100;
1794                 linearSize = 1024;
1795                 maxWidth = 1024;
1796                 maxHeight = 1024;
1797                 break;
1798         case FB_ACCEL_NEOMAGIC_NM2090:
1799         case FB_ACCEL_NEOMAGIC_NM2093:
1800                 videoRam = 1152;
1801                 maxClock = 80000;
1802                 CursorMem = 2048;
1803                 CursorOff = 0x100;
1804                 linearSize = 2048;
1805                 maxWidth = 1024;
1806                 maxHeight = 1024;
1807                 break;
1808         case FB_ACCEL_NEOMAGIC_NM2097:
1809                 videoRam = 1152;
1810                 maxClock = 80000;
1811                 CursorMem = 1024;
1812                 CursorOff = 0x100;
1813                 linearSize = 2048;
1814                 maxWidth = 1024;
1815                 maxHeight = 1024;
1816                 break;
1817         case FB_ACCEL_NEOMAGIC_NM2160:
1818                 videoRam = 2048;
1819                 maxClock = 90000;
1820                 CursorMem = 1024;
1821                 CursorOff = 0x100;
1822                 linearSize = 2048;
1823                 maxWidth = 1024;
1824                 maxHeight = 1024;
1825                 break;
1826         case FB_ACCEL_NEOMAGIC_NM2200:
1827                 videoRam = 2560;
1828                 maxClock = 110000;
1829                 CursorMem = 1024;
1830                 CursorOff = 0x1000;
1831                 linearSize = 4096;
1832                 maxWidth = 1280;
1833                 maxHeight = 1024;       /* ???? */
1834
1835                 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1836                 break;
1837         case FB_ACCEL_NEOMAGIC_NM2230:
1838                 videoRam = 3008;
1839                 maxClock = 110000;
1840                 CursorMem = 1024;
1841                 CursorOff = 0x1000;
1842                 linearSize = 4096;
1843                 maxWidth = 1280;
1844                 maxHeight = 1024;       /* ???? */
1845
1846                 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1847                 break;
1848         case FB_ACCEL_NEOMAGIC_NM2360:
1849                 videoRam = 4096;
1850                 maxClock = 110000;
1851                 CursorMem = 1024;
1852                 CursorOff = 0x1000;
1853                 linearSize = 4096;
1854                 maxWidth = 1280;
1855                 maxHeight = 1024;       /* ???? */
1856
1857                 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1858                 break;
1859         case FB_ACCEL_NEOMAGIC_NM2380:
1860                 videoRam = 6144;
1861                 maxClock = 110000;
1862                 CursorMem = 1024;
1863                 CursorOff = 0x1000;
1864                 linearSize = 8192;
1865                 maxWidth = 1280;
1866                 maxHeight = 1024;       /* ???? */
1867
1868                 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1869                 break;
1870         }
1871
1872         par->maxClock = maxClock;
1873
1874         return videoRam * 1024;
1875 }
1876
1877
1878 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
1879                                                    pci_device_id *id)
1880 {
1881         struct fb_info *info;
1882         struct neofb_par *par;
1883
1884         info = kmalloc(sizeof(struct fb_info) + sizeof(struct neofb_par) +
1885                        sizeof(u32) * 17, GFP_KERNEL);
1886
1887         if (!info)
1888                 return NULL;
1889
1890         memset(info, 0, sizeof(struct fb_info) + sizeof(struct neofb_par) + sizeof(u32) * 17);
1891
1892         par = (struct neofb_par *) (info + 1);
1893
1894         info->fix.accel = id->driver_data;
1895
1896         par->pci_burst = !nopciburst;
1897         par->lcd_stretch = !nostretch;
1898         par->libretto = libretto;
1899
1900         par->internal_display = internal;
1901         par->external_display = external;
1902
1903         switch (info->fix.accel) {
1904         case FB_ACCEL_NEOMAGIC_NM2070:
1905                 sprintf(info->fix.id, "MagicGraph 128");
1906                 break;
1907         case FB_ACCEL_NEOMAGIC_NM2090:
1908                 sprintf(info->fix.id, "MagicGraph 128V");
1909                 break;
1910         case FB_ACCEL_NEOMAGIC_NM2093:
1911                 sprintf(info->fix.id, "MagicGraph 128ZV");
1912                 break;
1913         case FB_ACCEL_NEOMAGIC_NM2097:
1914                 sprintf(info->fix.id, "MagicGraph 128ZV+");
1915                 break;
1916         case FB_ACCEL_NEOMAGIC_NM2160:
1917                 sprintf(info->fix.id, "MagicGraph 128XD");
1918                 break;
1919         case FB_ACCEL_NEOMAGIC_NM2200:
1920                 sprintf(info->fix.id, "MagicGraph 256AV");
1921                 break;
1922         case FB_ACCEL_NEOMAGIC_NM2230:
1923                 sprintf(info->fix.id, "MagicGraph 256AV+");
1924                 break;
1925         case FB_ACCEL_NEOMAGIC_NM2360:
1926                 sprintf(info->fix.id, "MagicGraph 256ZX");
1927                 break;
1928         case FB_ACCEL_NEOMAGIC_NM2380:
1929                 sprintf(info->fix.id, "MagicGraph 256XL+");
1930                 break;
1931         }
1932
1933         info->fix.type = FB_TYPE_PACKED_PIXELS;
1934         info->fix.type_aux = 0;
1935         info->fix.xpanstep = 0;
1936         info->fix.ypanstep = 4;
1937         info->fix.ywrapstep = 0;
1938         info->fix.accel = id->driver_data;
1939
1940         info->fbops = &neofb_ops;
1941         info->flags = FBINFO_FLAG_DEFAULT;
1942         info->par = par;
1943         info->pseudo_palette = (void *) (par + 1);
1944
1945         fb_alloc_cmap(&info->cmap, NR_PALETTE, 0);
1946
1947         return info;
1948 }
1949
1950 static void __devinit neo_free_fb_info(struct fb_info *info)
1951 {
1952         if (info) {
1953                 /*
1954                  * Free the colourmap
1955                  */
1956                 fb_alloc_cmap(&info->cmap, 0, 0);
1957
1958                 kfree(info);
1959         }
1960 }
1961
1962 /* --------------------------------------------------------------------- */
1963
1964 static int __devinit neofb_probe(struct pci_dev *dev,
1965                                  const struct pci_device_id *id)
1966 {
1967         struct fb_info *info;
1968         u_int h_sync, v_sync;
1969         int err;
1970         int video_len;
1971
1972         DBG("neofb_probe");
1973
1974         err = pci_enable_device(dev);
1975         if (err)
1976                 return err;
1977
1978         err = -ENOMEM;
1979         info = neo_alloc_fb_info(dev, id);
1980         if (!info)
1981                 goto failed;
1982
1983         err = neo_map_mmio(info, dev);
1984         if (err)
1985                 goto failed;
1986
1987         video_len = neo_init_hw(info);
1988         if (video_len < 0) {
1989                 err = video_len;
1990                 goto failed;
1991         }
1992
1993         err = neo_map_video(info, dev, video_len);
1994         if (err)
1995                 goto failed;
1996
1997         /*
1998          * Calculate the hsync and vsync frequencies.  Note that
1999          * we split the 1e12 constant up so that we can preserve
2000          * the precision and fit the results into 32-bit registers.
2001          *  (1953125000 * 512 = 1e12)
2002          */
2003         h_sync = 1953125000 / info->var.pixclock;
2004         h_sync =
2005             h_sync * 512 / (info->var.xres + info->var.left_margin +
2006                             info->var.right_margin + info->var.hsync_len);
2007         v_sync =
2008             h_sync / (info->var.yres + info->var.upper_margin +
2009                       info->var.lower_margin + info->var.vsync_len);
2010
2011         printk(KERN_INFO "neofb v" NEOFB_VERSION
2012                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2013                info->fix.smem_len >> 10, info->var.xres,
2014                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2015
2016
2017         err = register_framebuffer(info);
2018         if (err < 0)
2019                 goto failed;
2020
2021         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2022                info->node, info->fix.id);
2023
2024         /*
2025          * Our driver data
2026          */
2027         pci_set_drvdata(dev, info);
2028         return 0;
2029
2030       failed:
2031         neo_unmap_video(info);
2032         neo_unmap_mmio(info);
2033         neo_free_fb_info(info);
2034
2035         return err;
2036 }
2037
2038 static void __devexit neofb_remove(struct pci_dev *dev)
2039 {
2040         struct fb_info *info = pci_get_drvdata(dev);
2041
2042         DBG("neofb_remove");
2043
2044         if (info) {
2045                 /*
2046                  * If unregister_framebuffer fails, then
2047                  * we will be leaving hooks that could cause
2048                  * oopsen laying around.
2049                  */
2050                 if (unregister_framebuffer(info))
2051                         printk(KERN_WARNING
2052                                "neofb: danger danger!  Oopsen imminent!\n");
2053
2054                 neo_unmap_video(info);
2055                 neo_unmap_mmio(info);
2056                 neo_free_fb_info(info);
2057
2058                 /*
2059                  * Ensure that the driver data is no longer
2060                  * valid.
2061                  */
2062                 pci_set_drvdata(dev, NULL);
2063         }
2064 }
2065
2066 static struct pci_device_id neofb_devices[] = {
2067         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2068          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2069
2070         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2071          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2072
2073         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2074          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2075
2076         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2077          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2078
2079         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2080          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2081
2082         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2083          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2084
2085         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2086          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2087
2088         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2089          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2090
2091         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2092          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2093
2094         {0, 0, 0, 0, 0, 0, 0}
2095 };
2096
2097 MODULE_DEVICE_TABLE(pci, neofb_devices);
2098
2099 static struct pci_driver neofb_driver = {
2100         .name =         "neofb",
2101         .id_table =     neofb_devices,
2102         .probe =        neofb_probe,
2103         .remove =       __devexit_p(neofb_remove)
2104 };
2105
2106 /* **************************** init-time only **************************** */
2107
2108 static void __init neo_init(void)
2109 {
2110         DBG("neo_init");
2111         pci_register_driver(&neofb_driver);
2112 }
2113
2114 /* **************************** exit-time only **************************** */
2115
2116 static void __exit neo_done(void)
2117 {
2118         DBG("neo_done");
2119         pci_unregister_driver(&neofb_driver);
2120 }
2121
2122 #ifndef MODULE
2123
2124 /* ************************* init in-kernel code ************************** */
2125
2126 int __init neofb_setup(char *options)
2127 {
2128         char *this_opt;
2129
2130         DBG("neofb_setup");
2131
2132         if (!options || !*options)
2133                 return 0;
2134
2135         while ((this_opt = strsep(&options, ",")) != NULL) {
2136                 if (!*this_opt)
2137                         continue;
2138
2139                 if (!strncmp(this_opt, "disabled", 8))
2140                         disabled = 1;
2141                 if (!strncmp(this_opt, "internal", 8))
2142                         internal = 1;
2143                 if (!strncmp(this_opt, "external", 8))
2144                         external = 1;
2145                 if (!strncmp(this_opt, "nostretch", 9))
2146                         nostretch = 1;
2147                 if (!strncmp(this_opt, "nopciburst", 10))
2148                         nopciburst = 1;
2149                 if (!strncmp(this_opt, "libretto", 8))
2150                         libretto = 1;
2151         }
2152
2153         return 0;
2154 }
2155
2156 static int __initdata initialized = 0;
2157
2158 int __init neofb_init(void)
2159 {
2160         DBG("neofb_init");
2161
2162         if (disabled)
2163                 return -ENXIO;
2164
2165         if (!initialized) {
2166                 initialized = 1;
2167                 neo_init();
2168         }
2169
2170         /* never return failure, user can hotplug card later... */
2171         return 0;
2172 }
2173
2174 #else
2175
2176 /* *************************** init module code **************************** */
2177
2178 int __init init_module(void)
2179 {
2180         DBG("init_module");
2181
2182         if (disabled)
2183                 return -ENXIO;
2184
2185         neo_init();
2186
2187         /* never return failure; user can hotplug card later... */
2188         return 0;
2189 }
2190
2191 #endif                          /* MODULE */
2192
2193 module_exit(neo_done);