4 #include <linux/config.h>
9 /* GGI compatibility macros */
10 #define NUM_SEQ_REGS 0x05
11 #define NUM_CRT_REGS 0x41
12 #define NUM_GRC_REGS 0x09
13 #define NUM_ATC_REGS 0x15
15 /* holds the state of the VGA core and extended Riva hw state from riva_hw.c.
16 * From KGI originally. */
18 u8 attr[NUM_ATC_REGS];
19 u8 crtc[NUM_CRT_REGS];
27 RIVA_HW_INST riva; /* interface to riva_hw.c */
29 caddr_t ctrl_base; /* virtual control register base addr */
30 unsigned dclk_max; /* max DCLK */
32 struct riva_regs initial_state; /* initial startup video mode */
33 struct riva_regs current_state;
34 struct vgastate state;
36 u32 cursor_data[32 * 32/4];
40 int panel_xres, panel_yres;
41 int hOver_plus, hSync_width, hblank;
42 int vOver_plus, vSync_width, vblank;
43 int hAct_high, vAct_high, interlaced;
44 int synct, misc, clock;
53 struct { int vram; int vram_valid; } mtrr;
57 void riva_common_setup(struct riva_par *);
58 unsigned long riva_get_memlen(struct riva_par *);
59 unsigned long riva_get_maxdclk(struct riva_par *);
61 #endif /* __RIVAFB_H */