4 * Mode initializing code (CRT1 section) for
5 * for SiS 300/305/540/630/730 and
6 * SiS 315/550/650/M650/651/661FX/M661FX/740/741(GX)/M741/330/660/M660/760/M760
7 * (Universal module for Linux kernel framebuffer and XFree86 4.x)
9 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
11 * If distributed as part of the Linux kernel, the following license terms
14 * * This program is free software; you can redistribute it and/or modify
15 * * it under the terms of the GNU General Public License as published by
16 * * the Free Software Foundation; either version 2 of the named License,
17 * * or any later version.
19 * * This program is distributed in the hope that it will be useful,
20 * * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * * GNU General Public License for more details.
24 * * You should have received a copy of the GNU General Public License
25 * * along with this program; if not, write to the Free Software
26 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
28 * Otherwise, the following license terms apply:
30 * * Redistribution and use in source and binary forms, with or without
31 * * modification, are permitted provided that the following conditions
33 * * 1) Redistributions of source code must retain the above copyright
34 * * notice, this list of conditions and the following disclaimer.
35 * * 2) Redistributions in binary form must reproduce the above copyright
36 * * notice, this list of conditions and the following disclaimer in the
37 * * documentation and/or other materials provided with the distribution.
38 * * 3) The name of the author may not be used to endorse or promote products
39 * * derived from this software without specific prior written permission.
41 * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR
42 * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
43 * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
44 * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
45 * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
46 * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
47 * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
48 * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
49 * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
50 * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
52 * Author: Thomas Winischhofer <thomas@winischhofer.net>
54 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
57 * TW says: This code looks awful, I know. But please don't do anything about
58 * this otherwise debugging will be hell.
59 * The code is extremely fragile as regards the different chipsets, different
60 * video bridges and combinations thereof. If anything is changed, extreme
61 * care has to be taken that that change doesn't break it for other chipsets,
62 * bridges or combinations thereof.
63 * All comments in this file are by me, regardless if they are marked TW or not.
77 #if defined(ALLOC_PRAGMA)
78 #pragma alloc_text(PAGE,SiSSetMode)
81 /*********************************************/
82 /* POINTER INITIALIZATION */
83 /*********************************************/
85 #if defined(SIS300) || defined(SIS315H)
87 InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
89 SiS_Pr->SiS_StResInfo = SiS_StResInfo;
90 SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo;
91 SiS_Pr->SiS_StandTable = SiS_StandTable;
93 SiS_Pr->SiS_NTSCPhase = SiS_NTSCPhase;
94 SiS_Pr->SiS_PALPhase = SiS_PALPhase;
95 SiS_Pr->SiS_NTSCPhase2 = SiS_NTSCPhase2;
96 SiS_Pr->SiS_PALPhase2 = SiS_PALPhase2;
97 SiS_Pr->SiS_PALMPhase = SiS_PALMPhase;
98 SiS_Pr->SiS_PALNPhase = SiS_PALNPhase;
99 SiS_Pr->SiS_PALMPhase2 = SiS_PALMPhase2;
100 SiS_Pr->SiS_PALNPhase2 = SiS_PALNPhase2;
101 SiS_Pr->SiS_SpecialPhase = SiS_SpecialPhase;
102 SiS_Pr->SiS_SpecialPhaseM = SiS_SpecialPhaseM;
103 SiS_Pr->SiS_SpecialPhaseJ = SiS_SpecialPhaseJ;
105 SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming;
106 SiS_Pr->SiS_PALTiming = SiS_PALTiming;
107 SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing;
108 SiS_Pr->SiS_HiTVSt2Timing = SiS_HiTVSt2Timing;
110 SiS_Pr->SiS_HiTVExtTiming = SiS_HiTVExtTiming;
111 SiS_Pr->SiS_HiTVGroup3Data = SiS_HiTVGroup3Data;
112 SiS_Pr->SiS_HiTVGroup3Simu = SiS_HiTVGroup3Simu;
114 SiS_Pr->SiS_HiTVTextTiming = SiS_HiTVTextTiming;
115 SiS_Pr->SiS_HiTVGroup3Text = SiS_HiTVGroup3Text;
118 SiS_Pr->SiS_StPALData = SiS_StPALData;
119 SiS_Pr->SiS_ExtPALData = SiS_ExtPALData;
120 SiS_Pr->SiS_StNTSCData = SiS_StNTSCData;
121 SiS_Pr->SiS_ExtNTSCData = SiS_ExtNTSCData;
122 SiS_Pr->SiS_St1HiTVData = SiS_StHiTVData;
123 SiS_Pr->SiS_St2HiTVData = SiS_St2HiTVData;
124 SiS_Pr->SiS_ExtHiTVData = SiS_ExtHiTVData;
125 SiS_Pr->SiS_St525iData = SiS_StNTSCData;
126 SiS_Pr->SiS_St525pData = SiS_St525pData;
127 SiS_Pr->SiS_St750pData = SiS_St750pData;
128 SiS_Pr->SiS_Ext525iData = SiS_ExtNTSCData;
129 SiS_Pr->SiS_Ext525pData = SiS_ExtNTSCData;
130 SiS_Pr->SiS_Ext750pData = SiS_Ext750pData;
132 SiS_Pr->pSiS_OutputSelect = &SiS_OutputSelect;
133 SiS_Pr->pSiS_SoftSetting = &SiS_SoftSetting;
135 SiS_Pr->SiS_LCD1280x720Data = SiS_LCD1280x720Data;
136 SiS_Pr->SiS_StLCD1280x768_2Data = SiS_StLCD1280x768_2Data;
137 SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data;
138 SiS_Pr->SiS_LCD1280x768_3Data = SiS_LCD1280x768_3Data;
139 SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data;
140 SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data;
141 SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data;
142 SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data;
143 SiS_Pr->SiS_LCD1680x1050Data = SiS_LCD1680x1050Data;
144 SiS_Pr->SiS_StLCD1600x1200Data = SiS_StLCD1600x1200Data;
145 SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data;
146 SiS_Pr->SiS_NoScaleData = SiS_NoScaleData;
148 SiS_Pr->SiS_LVDS320x480Data_1 = SiS_LVDS320x480Data_1;
149 SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1;
150 SiS_Pr->SiS_LVDS800x600Data_2 = SiS_LVDS800x600Data_2;
151 SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
152 SiS_Pr->SiS_LVDS1024x768Data_2 = SiS_LVDS1024x768Data_2;
153 SiS_Pr->SiS_LVDS1280x1024Data_1 = SiS_LVDS1280x1024Data_1;
154 SiS_Pr->SiS_LVDS1280x1024Data_2 = SiS_LVDS1280x1024Data_2;
155 SiS_Pr->SiS_LVDS1400x1050Data_1 = SiS_LVDS1400x1050Data_1;
156 SiS_Pr->SiS_LVDS1400x1050Data_2 = SiS_LVDS1400x1050Data_2;
157 SiS_Pr->SiS_LVDS1600x1200Data_1 = SiS_LVDS1600x1200Data_1;
158 SiS_Pr->SiS_LVDS1600x1200Data_2 = SiS_LVDS1600x1200Data_2;
159 SiS_Pr->SiS_LVDS1280x768Data_1 = SiS_LVDS1280x768Data_1;
160 SiS_Pr->SiS_LVDS1280x768Data_2 = SiS_LVDS1280x768Data_2;
161 SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1;
162 SiS_Pr->SiS_LVDS1024x600Data_2 = SiS_LVDS1024x600Data_2;
163 SiS_Pr->SiS_LVDS1152x768Data_1 = SiS_LVDS1152x768Data_1;
164 SiS_Pr->SiS_LVDS1152x768Data_2 = SiS_LVDS1152x768Data_2;
165 SiS_Pr->SiS_LVDSXXXxXXXData_1 = SiS_LVDSXXXxXXXData_1;
166 SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x960Data_1;
167 SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x960Data_2;
168 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
169 SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x1024Data_1;
170 SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x1024Data_2;
171 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
172 SiS_Pr->SiS_LVDS640x480Data_2 = SiS_LVDS640x480Data_2;
174 SiS_Pr->SiS_LVDS848x480Data_1 = SiS_LVDS848x480Data_1;
175 SiS_Pr->SiS_LVDS848x480Data_2 = SiS_LVDS848x480Data_2;
176 SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS_LVDSBARCO1024Data_1;
177 SiS_Pr->SiS_LVDSBARCO1024Data_2 = SiS_LVDSBARCO1024Data_2;
178 SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS_LVDSBARCO1366Data_1;
179 SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS_LVDSBARCO1366Data_2;
181 SiS_Pr->SiS_LVDSCRT11280x768_1 = SiS_LVDSCRT11280x768_1;
182 SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1;
183 SiS_Pr->SiS_LVDSCRT11152x768_1 = SiS_LVDSCRT11152x768_1;
184 SiS_Pr->SiS_LVDSCRT11280x768_1_H = SiS_LVDSCRT11280x768_1_H;
185 SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H;
186 SiS_Pr->SiS_LVDSCRT11152x768_1_H = SiS_LVDSCRT11152x768_1_H;
187 SiS_Pr->SiS_LVDSCRT11280x768_2 = SiS_LVDSCRT11280x768_2;
188 SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2;
189 SiS_Pr->SiS_LVDSCRT11152x768_2 = SiS_LVDSCRT11152x768_2;
190 SiS_Pr->SiS_LVDSCRT11280x768_2_H = SiS_LVDSCRT11280x768_2_H;
191 SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H;
192 SiS_Pr->SiS_LVDSCRT11152x768_2_H = SiS_LVDSCRT11152x768_2_H;
193 SiS_Pr->SiS_LVDSCRT1320x480_1 = SiS_LVDSCRT1320x480_1;
194 SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
195 SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
196 SiS_Pr->SiS_LVDSCRT1640x480_2 = SiS_LVDSCRT1640x480_2;
197 SiS_Pr->SiS_LVDSCRT1640x480_2_H = SiS_LVDSCRT1640x480_2_H;
198 SiS_Pr->SiS_LVDSCRT1640x480_3 = SiS_LVDSCRT1640x480_3;
199 SiS_Pr->SiS_LVDSCRT1640x480_3_H = SiS_LVDSCRT1640x480_3_H;
201 SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData;
202 SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData;
204 SiS_Pr->SiS_CHTVUNTSCDesData = SiS_CHTVUNTSCDesData;
205 SiS_Pr->SiS_CHTVONTSCDesData = SiS_CHTVONTSCDesData;
206 SiS_Pr->SiS_CHTVUPALDesData = SiS_CHTVUPALDesData;
207 SiS_Pr->SiS_CHTVOPALDesData = SiS_CHTVOPALDesData;
209 SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */
210 SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */
216 InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
218 InitCommonPointer(SiS_Pr, HwInfo);
220 SiS_StandTable[0x04].CRTC[4] = 0x2b;
221 SiS_StandTable[0x05].CRTC[4] = 0x2b;
222 SiS_StandTable[0x06].CRTC[4] = 0x54;
223 SiS_StandTable[0x06].CRTC[5] = 0x80;
224 SiS_StandTable[0x0d].CRTC[4] = 0x2b;
225 SiS_StandTable[0x0e].CRTC[4] = 0x54;
226 SiS_StandTable[0x0e].CRTC[5] = 0x80;
227 SiS_StandTable[0x11].CRTC[4] = 0x54;
228 SiS_StandTable[0x11].CRTC[5] = 0x80;
229 SiS_StandTable[0x11].CRTC[16] = 0x83;
230 SiS_StandTable[0x11].CRTC[17] = 0x85;
231 SiS_StandTable[0x12].CRTC[4] = 0x54;
232 SiS_StandTable[0x12].CRTC[5] = 0x80;
233 SiS_StandTable[0x12].CRTC[16] = 0x83;
234 SiS_StandTable[0x12].CRTC[17] = 0x85;
235 SiS_StandTable[0x13].CRTC[5] = 0xa0;
236 SiS_StandTable[0x17].CRTC[5] = 0xa0;
237 SiS_StandTable[0x1a].CRTC[4] = 0x54;
238 SiS_StandTable[0x1a].CRTC[5] = 0x80;
239 SiS_StandTable[0x1a].CRTC[16] = 0xea;
240 SiS_StandTable[0x1a].CRTC[17] = 0x8c;
241 SiS_StandTable[0x1b].CRTC[4] = 0x54;
242 SiS_StandTable[0x1b].CRTC[5] = 0x80;
243 SiS_StandTable[0x1b].CRTC[16] = 0xea;
244 SiS_StandTable[0x1b].CRTC[17] = 0x8c;
245 SiS_StandTable[0x1c].CRTC[4] = 0x54;
246 SiS_StandTable[0x1c].CRTC[5] = 0x80;
248 SiS_Pr->SiS_SModeIDTable = SiS300_SModeIDTable;
249 SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable;
250 SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable;
251 SiS_Pr->SiS_RefIndex = SiS300_RefIndex;
252 SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table;
253 if(HwInfo->jChipType == SIS_300) {
254 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */
256 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */
258 SiS_Pr->SiS_VCLKData = SiS300_VCLKData;
259 SiS_Pr->SiS_VBVCLKData = (SiS_VBVCLKDataStruct *)SiS300_VCLKData;
261 SiS_Pr->SiS_SR15 = SiS300_SR15;
264 SiS_Pr->pSiS_SR07 = &SiS300_SR07;
265 SiS_Pr->SiS_CR40 = SiS300_CR40;
266 SiS_Pr->SiS_CR49 = SiS300_CR49;
267 SiS_Pr->pSiS_SR1F = &SiS300_SR1F;
268 SiS_Pr->pSiS_SR21 = &SiS300_SR21;
269 SiS_Pr->pSiS_SR22 = &SiS300_SR22;
270 SiS_Pr->pSiS_SR23 = &SiS300_SR23;
271 SiS_Pr->pSiS_SR24 = &SiS300_SR24;
272 SiS_Pr->SiS_SR25 = SiS300_SR25;
273 SiS_Pr->pSiS_SR31 = &SiS300_SR31;
274 SiS_Pr->pSiS_SR32 = &SiS300_SR32;
275 SiS_Pr->pSiS_SR33 = &SiS300_SR33;
276 SiS_Pr->pSiS_CRT2Data_1_2 = &SiS300_CRT2Data_1_2;
277 SiS_Pr->pSiS_CRT2Data_4_D = &SiS300_CRT2Data_4_D;
278 SiS_Pr->pSiS_CRT2Data_4_E = &SiS300_CRT2Data_4_E;
279 SiS_Pr->pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
280 SiS_Pr->pSiS_RGBSenseData = &SiS300_RGBSenseData;
281 SiS_Pr->pSiS_VideoSenseData = &SiS300_VideoSenseData;
282 SiS_Pr->pSiS_YCSenseData = &SiS300_YCSenseData;
283 SiS_Pr->pSiS_RGBSenseData2 = &SiS300_RGBSenseData2;
284 SiS_Pr->pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
285 SiS_Pr->pSiS_YCSenseData2 = &SiS300_YCSenseData2;
288 SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl;
289 SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl;
291 SiS_Pr->SiS_ExtLCD1024x768Data = SiS300_ExtLCD1024x768Data;
292 SiS_Pr->SiS_St2LCD1024x768Data = SiS300_St2LCD1024x768Data;
293 SiS_Pr->SiS_ExtLCD1280x1024Data = SiS300_ExtLCD1280x1024Data;
294 SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data;
296 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1;
297 SiS_Pr->SiS_CRT2Part2_1280x1024_1 = SiS300_CRT2Part2_1280x1024_1;
298 SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2;
299 SiS_Pr->SiS_CRT2Part2_1280x1024_2 = SiS300_CRT2Part2_1280x1024_2;
300 SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3;
301 SiS_Pr->SiS_CRT2Part2_1280x1024_3 = SiS300_CRT2Part2_1280x1024_3;
303 SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData;
304 SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData;
305 SiS_Pr->SiS_CHTVUPALMData = SiS_CHTVUNTSCData; /* not supported on 300 series */
306 SiS_Pr->SiS_CHTVOPALMData = SiS_CHTVONTSCData; /* not supported on 300 series */
307 SiS_Pr->SiS_CHTVUPALNData = SiS300_CHTVUPALData; /* not supported on 300 series */
308 SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */
309 SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData;
311 SiS_Pr->SiS_PanelType00_1 = SiS300_PanelType00_1;
312 SiS_Pr->SiS_PanelType01_1 = SiS300_PanelType01_1;
313 SiS_Pr->SiS_PanelType02_1 = SiS300_PanelType02_1;
314 SiS_Pr->SiS_PanelType03_1 = SiS300_PanelType03_1;
315 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1;
316 SiS_Pr->SiS_PanelType05_1 = SiS300_PanelType05_1;
317 SiS_Pr->SiS_PanelType06_1 = SiS300_PanelType06_1;
318 SiS_Pr->SiS_PanelType07_1 = SiS300_PanelType07_1;
319 SiS_Pr->SiS_PanelType08_1 = SiS300_PanelType08_1;
320 SiS_Pr->SiS_PanelType09_1 = SiS300_PanelType09_1;
321 SiS_Pr->SiS_PanelType0a_1 = SiS300_PanelType0a_1;
322 SiS_Pr->SiS_PanelType0b_1 = SiS300_PanelType0b_1;
323 SiS_Pr->SiS_PanelType0c_1 = SiS300_PanelType0c_1;
324 SiS_Pr->SiS_PanelType0d_1 = SiS300_PanelType0d_1;
325 SiS_Pr->SiS_PanelType0e_1 = SiS300_PanelType0e_1;
326 SiS_Pr->SiS_PanelType0f_1 = SiS300_PanelType0f_1;
327 SiS_Pr->SiS_PanelType00_2 = SiS300_PanelType00_2;
328 SiS_Pr->SiS_PanelType01_2 = SiS300_PanelType01_2;
329 SiS_Pr->SiS_PanelType02_2 = SiS300_PanelType02_2;
330 SiS_Pr->SiS_PanelType03_2 = SiS300_PanelType03_2;
331 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2;
332 SiS_Pr->SiS_PanelType05_2 = SiS300_PanelType05_2;
333 SiS_Pr->SiS_PanelType06_2 = SiS300_PanelType06_2;
334 SiS_Pr->SiS_PanelType07_2 = SiS300_PanelType07_2;
335 SiS_Pr->SiS_PanelType08_2 = SiS300_PanelType08_2;
336 SiS_Pr->SiS_PanelType09_2 = SiS300_PanelType09_2;
337 SiS_Pr->SiS_PanelType0a_2 = SiS300_PanelType0a_2;
338 SiS_Pr->SiS_PanelType0b_2 = SiS300_PanelType0b_2;
339 SiS_Pr->SiS_PanelType0c_2 = SiS300_PanelType0c_2;
340 SiS_Pr->SiS_PanelType0d_2 = SiS300_PanelType0d_2;
341 SiS_Pr->SiS_PanelType0e_2 = SiS300_PanelType0e_2;
342 SiS_Pr->SiS_PanelType0f_2 = SiS300_PanelType0f_2;
343 SiS_Pr->SiS_PanelTypeNS_1 = SiS300_PanelTypeNS_1;
344 SiS_Pr->SiS_PanelTypeNS_2 = SiS300_PanelTypeNS_2;
346 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) {
347 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1a;
348 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2a;
350 if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) {
351 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1b;
352 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2b;
355 SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS300_LVDSCRT1800x600_1;
356 SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS300_LVDSCRT1800x600_1_H;
357 SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS300_LVDSCRT1800x600_2;
358 SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS300_LVDSCRT1800x600_2_H;
359 SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS300_LVDSCRT11024x768_1;
360 SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS300_LVDSCRT11024x768_1_H;
361 SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS300_LVDSCRT11024x768_2;
362 SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS300_LVDSCRT11024x768_2_H;
363 SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS300_LVDSCRT11280x1024_1;
364 SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS300_LVDSCRT11280x1024_1_H;
365 SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS300_LVDSCRT11280x1024_2;
366 SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS300_LVDSCRT11280x1024_2_H;
367 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS300_LVDSCRT1XXXxXXX_1;
368 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS300_LVDSCRT1XXXxXXX_1_H;
370 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC;
371 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC;
372 SiS_Pr->SiS_CHTVCRT1UPAL = SiS300_CHTVCRT1UPAL;
373 SiS_Pr->SiS_CHTVCRT1OPAL = SiS300_CHTVCRT1OPAL;
374 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS300_CHTVCRT1SOPAL;
375 SiS_Pr->SiS_CHTVReg_UNTSC = SiS300_CHTVReg_UNTSC;
376 SiS_Pr->SiS_CHTVReg_ONTSC = SiS300_CHTVReg_ONTSC;
377 SiS_Pr->SiS_CHTVReg_UPAL = SiS300_CHTVReg_UPAL;
378 SiS_Pr->SiS_CHTVReg_OPAL = SiS300_CHTVReg_OPAL;
379 SiS_Pr->SiS_CHTVReg_UPALM = SiS300_CHTVReg_UNTSC; /* not supported on 300 series */
380 SiS_Pr->SiS_CHTVReg_OPALM = SiS300_CHTVReg_ONTSC; /* not supported on 300 series */
381 SiS_Pr->SiS_CHTVReg_UPALN = SiS300_CHTVReg_UPAL; /* not supported on 300 series */
382 SiS_Pr->SiS_CHTVReg_OPALN = SiS300_CHTVReg_OPAL; /* not supported on 300 series */
383 SiS_Pr->SiS_CHTVReg_SOPAL = SiS300_CHTVReg_SOPAL;
384 SiS_Pr->SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
385 SiS_Pr->SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
386 SiS_Pr->SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
387 SiS_Pr->SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
388 SiS_Pr->SiS_CHTVVCLKUPALM = SiS300_CHTVVCLKUNTSC; /* not supported on 300 series */
389 SiS_Pr->SiS_CHTVVCLKOPALM = SiS300_CHTVVCLKONTSC; /* not supported on 300 series */
390 SiS_Pr->SiS_CHTVVCLKUPALN = SiS300_CHTVVCLKUPAL; /* not supported on 300 series */
391 SiS_Pr->SiS_CHTVVCLKOPALN = SiS300_CHTVVCLKOPAL; /* not supported on 300 series */
392 SiS_Pr->SiS_CHTVVCLKSOPAL = SiS300_CHTVVCLKSOPAL;
398 InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
400 InitCommonPointer(SiS_Pr, HwInfo);
402 SiS_StandTable[0x04].CRTC[4] = 0x2c;
403 SiS_StandTable[0x05].CRTC[4] = 0x2c;
404 SiS_StandTable[0x06].CRTC[4] = 0x55;
405 SiS_StandTable[0x06].CRTC[5] = 0x81;
406 SiS_StandTable[0x0d].CRTC[4] = 0x2c;
407 SiS_StandTable[0x0e].CRTC[4] = 0x55;
408 SiS_StandTable[0x0e].CRTC[5] = 0x81;
409 SiS_StandTable[0x11].CRTC[4] = 0x55;
410 SiS_StandTable[0x11].CRTC[5] = 0x81;
411 SiS_StandTable[0x11].CRTC[16] = 0x82;
412 SiS_StandTable[0x11].CRTC[17] = 0x84;
413 SiS_StandTable[0x12].CRTC[4] = 0x55;
414 SiS_StandTable[0x12].CRTC[5] = 0x81;
415 SiS_StandTable[0x12].CRTC[16] = 0x82;
416 SiS_StandTable[0x12].CRTC[17] = 0x84;
417 SiS_StandTable[0x13].CRTC[5] = 0xb1;
418 SiS_StandTable[0x17].CRTC[5] = 0xb1;
419 SiS_StandTable[0x1a].CRTC[4] = 0x55;
420 SiS_StandTable[0x1a].CRTC[5] = 0x81;
421 SiS_StandTable[0x1a].CRTC[16] = 0xe9;
422 SiS_StandTable[0x1a].CRTC[17] = 0x8b;
423 SiS_StandTable[0x1b].CRTC[4] = 0x55;
424 SiS_StandTable[0x1b].CRTC[5] = 0x81;
425 SiS_StandTable[0x1b].CRTC[16] = 0xe9;
426 SiS_StandTable[0x1b].CRTC[17] = 0x8b;
427 SiS_StandTable[0x1c].CRTC[4] = 0x55;
428 SiS_StandTable[0x1c].CRTC[5] = 0x81;
430 SiS_Pr->SiS_SModeIDTable = SiS310_SModeIDTable;
431 SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable;
432 SiS_Pr->SiS_RefIndex = (SiS_Ext2Struct *)SiS310_RefIndex;
433 SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table;
434 if(HwInfo->jChipType >= SIS_760) {
435 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */
436 } else if(HwInfo->jChipType >= SIS_661) {
437 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */
438 } else if(HwInfo->jChipType == SIS_330) {
439 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */
440 } else if(HwInfo->jChipType > SIS_315PRO) {
441 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */
443 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */
445 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1;
446 SiS_Pr->SiS_VCLKData = SiS310_VCLKData;
447 SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData;
449 SiS_Pr->SiS_SR15 = SiS310_SR15;
452 SiS_Pr->pSiS_SR07 = &SiS310_SR07;
453 SiS_Pr->SiS_CR40 = SiS310_CR40;
454 SiS_Pr->SiS_CR49 = SiS310_CR49;
455 SiS_Pr->pSiS_SR1F = &SiS310_SR1F;
456 SiS_Pr->pSiS_SR21 = &SiS310_SR21;
457 SiS_Pr->pSiS_SR22 = &SiS310_SR22;
458 SiS_Pr->pSiS_SR23 = &SiS310_SR23;
459 SiS_Pr->pSiS_SR24 = &SiS310_SR24;
460 SiS_Pr->SiS_SR25 = SiS310_SR25;
461 SiS_Pr->pSiS_SR31 = &SiS310_SR31;
462 SiS_Pr->pSiS_SR32 = &SiS310_SR32;
463 SiS_Pr->pSiS_SR33 = &SiS310_SR33;
464 SiS_Pr->pSiS_CRT2Data_1_2 = &SiS310_CRT2Data_1_2;
465 SiS_Pr->pSiS_CRT2Data_4_D = &SiS310_CRT2Data_4_D;
466 SiS_Pr->pSiS_CRT2Data_4_E = &SiS310_CRT2Data_4_E;
467 SiS_Pr->pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
468 SiS_Pr->pSiS_RGBSenseData = &SiS310_RGBSenseData;
469 SiS_Pr->pSiS_VideoSenseData = &SiS310_VideoSenseData;
470 SiS_Pr->pSiS_YCSenseData = &SiS310_YCSenseData;
471 SiS_Pr->pSiS_RGBSenseData2 = &SiS310_RGBSenseData2;
472 SiS_Pr->pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
473 SiS_Pr->pSiS_YCSenseData2 = &SiS310_YCSenseData2;
476 SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl;
477 SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS;
479 SiS_Pr->SiS_St2LCD1024x768Data = SiS310_St2LCD1024x768Data;
480 SiS_Pr->SiS_ExtLCD1024x768Data = SiS310_ExtLCD1024x768Data;
481 SiS_Pr->SiS_St2LCD1280x1024Data = SiS310_St2LCD1280x1024Data;
482 SiS_Pr->SiS_ExtLCD1280x1024Data = SiS310_ExtLCD1280x1024Data;
484 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1;
486 SiS_Pr->SiS_PanelType00_1 = SiS310_PanelType00_1;
487 SiS_Pr->SiS_PanelType01_1 = SiS310_PanelType01_1;
488 SiS_Pr->SiS_PanelType02_1 = SiS310_PanelType02_1;
489 SiS_Pr->SiS_PanelType03_1 = SiS310_PanelType03_1;
490 SiS_Pr->SiS_PanelType04_1 = SiS310_PanelType04_1;
491 SiS_Pr->SiS_PanelType05_1 = SiS310_PanelType05_1;
492 SiS_Pr->SiS_PanelType06_1 = SiS310_PanelType06_1;
493 SiS_Pr->SiS_PanelType07_1 = SiS310_PanelType07_1;
494 SiS_Pr->SiS_PanelType08_1 = SiS310_PanelType08_1;
495 SiS_Pr->SiS_PanelType09_1 = SiS310_PanelType09_1;
496 SiS_Pr->SiS_PanelType0a_1 = SiS310_PanelType0a_1;
497 SiS_Pr->SiS_PanelType0b_1 = SiS310_PanelType0b_1;
498 SiS_Pr->SiS_PanelType0c_1 = SiS310_PanelType0c_1;
499 SiS_Pr->SiS_PanelType0d_1 = SiS310_PanelType0d_1;
500 SiS_Pr->SiS_PanelType0e_1 = SiS310_PanelType0e_1;
501 SiS_Pr->SiS_PanelType0f_1 = SiS310_PanelType0f_1;
502 SiS_Pr->SiS_PanelType00_2 = SiS310_PanelType00_2;
503 SiS_Pr->SiS_PanelType01_2 = SiS310_PanelType01_2;
504 SiS_Pr->SiS_PanelType02_2 = SiS310_PanelType02_2;
505 SiS_Pr->SiS_PanelType03_2 = SiS310_PanelType03_2;
506 SiS_Pr->SiS_PanelType04_2 = SiS310_PanelType04_2;
507 SiS_Pr->SiS_PanelType05_2 = SiS310_PanelType05_2;
508 SiS_Pr->SiS_PanelType06_2 = SiS310_PanelType06_2;
509 SiS_Pr->SiS_PanelType07_2 = SiS310_PanelType07_2;
510 SiS_Pr->SiS_PanelType08_2 = SiS310_PanelType08_2;
511 SiS_Pr->SiS_PanelType09_2 = SiS310_PanelType09_2;
512 SiS_Pr->SiS_PanelType0a_2 = SiS310_PanelType0a_2;
513 SiS_Pr->SiS_PanelType0b_2 = SiS310_PanelType0b_2;
514 SiS_Pr->SiS_PanelType0c_2 = SiS310_PanelType0c_2;
515 SiS_Pr->SiS_PanelType0d_2 = SiS310_PanelType0d_2;
516 SiS_Pr->SiS_PanelType0e_2 = SiS310_PanelType0e_2;
517 SiS_Pr->SiS_PanelType0f_2 = SiS310_PanelType0f_2;
518 SiS_Pr->SiS_PanelTypeNS_1 = SiS310_PanelTypeNS_1;
519 SiS_Pr->SiS_PanelTypeNS_2 = SiS310_PanelTypeNS_2;
521 SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData;
522 SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData;
523 SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData;
524 SiS_Pr->SiS_CHTVOPALMData = SiS310_CHTVOPALMData;
525 SiS_Pr->SiS_CHTVUPALNData = SiS310_CHTVUPALNData;
526 SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData;
527 SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData;
529 SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS310_LVDSCRT1800x600_1;
530 SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS310_LVDSCRT11024x768_1;
531 SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS310_LVDSCRT11280x1024_1;
532 SiS_Pr->SiS_LVDSCRT11400x1050_1 = SiS310_LVDSCRT11400x1050_1;
533 SiS_Pr->SiS_LVDSCRT11600x1200_1 = SiS310_LVDSCRT11600x1200_1;
534 SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS310_LVDSCRT1800x600_1_H;
535 SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS310_LVDSCRT11024x768_1_H;
536 SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS310_LVDSCRT11280x1024_1_H;
537 SiS_Pr->SiS_LVDSCRT11400x1050_1_H = SiS310_LVDSCRT11400x1050_1_H;
538 SiS_Pr->SiS_LVDSCRT11600x1200_1_H = SiS310_LVDSCRT11600x1200_1_H;
539 SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS310_LVDSCRT1800x600_2;
540 SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS310_LVDSCRT11024x768_2;
541 SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS310_LVDSCRT11280x1024_2;
542 SiS_Pr->SiS_LVDSCRT11400x1050_2 = SiS310_LVDSCRT11400x1050_2;
543 SiS_Pr->SiS_LVDSCRT11600x1200_2 = SiS310_LVDSCRT11600x1200_2;
544 SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS310_LVDSCRT1800x600_2_H;
545 SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS310_LVDSCRT11024x768_2_H;
546 SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS310_LVDSCRT11280x1024_2_H;
547 SiS_Pr->SiS_LVDSCRT11400x1050_2_H = SiS310_LVDSCRT11400x1050_2_H;
548 SiS_Pr->SiS_LVDSCRT11600x1200_2_H = SiS310_LVDSCRT11600x1200_2_H;
549 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS310_LVDSCRT1XXXxXXX_1;
550 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS310_LVDSCRT1XXXxXXX_1_H;
551 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
552 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
553 SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
554 SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
555 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
557 SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC;
558 SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC;
559 SiS_Pr->SiS_CHTVReg_UPAL = SiS310_CHTVReg_UPAL;
560 SiS_Pr->SiS_CHTVReg_OPAL = SiS310_CHTVReg_OPAL;
561 SiS_Pr->SiS_CHTVReg_UPALM = SiS310_CHTVReg_UPALM;
562 SiS_Pr->SiS_CHTVReg_OPALM = SiS310_CHTVReg_OPALM;
563 SiS_Pr->SiS_CHTVReg_UPALN = SiS310_CHTVReg_UPALN;
564 SiS_Pr->SiS_CHTVReg_OPALN = SiS310_CHTVReg_OPALN;
565 SiS_Pr->SiS_CHTVReg_SOPAL = SiS310_CHTVReg_OPAL;
567 SiS_Pr->SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
568 SiS_Pr->SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
569 SiS_Pr->SiS_CHTVVCLKUPAL = SiS310_CHTVVCLKUPAL;
570 SiS_Pr->SiS_CHTVVCLKOPAL = SiS310_CHTVVCLKOPAL;
571 SiS_Pr->SiS_CHTVVCLKUPALM = SiS310_CHTVVCLKUPALM;
572 SiS_Pr->SiS_CHTVVCLKOPALM = SiS310_CHTVVCLKOPALM;
573 SiS_Pr->SiS_CHTVVCLKUPALN = SiS310_CHTVVCLKUPALN;
574 SiS_Pr->SiS_CHTVVCLKOPALN = SiS310_CHTVVCLKOPALN;
575 SiS_Pr->SiS_CHTVVCLKSOPAL = SiS310_CHTVVCLKOPAL;
580 SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
582 switch(HwInfo->jChipType) {
595 InitTo310Pointer(SiS_Pr, HwInfo);
603 InitTo300Pointer(SiS_Pr, HwInfo);
611 /*********************************************/
612 /* HELPER: Get ModeID */
613 /*********************************************/
616 SiS_GetModeID(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
617 int Depth, BOOLEAN FSTN, int LCDwidth, int LCDheight)
619 USHORT ModeIndex = 0;
624 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
625 else if(VDisplay == 240) {
626 if(FSTN) ModeIndex = ModeIndex_320x240_FSTN[Depth];
627 else ModeIndex = ModeIndex_320x240[Depth];
631 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
634 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
637 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
638 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
641 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
642 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
645 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
648 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
649 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
652 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
655 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
658 if(VGAEngine == SIS_315_VGA) {
659 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
663 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
664 else if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
665 else if((!(VBFlags & CRT1_LCDA)) && (VGAEngine == SIS_300_VGA)) {
666 if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth];
670 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
671 if((!(VBFlags & CRT1_LCDA)) && (VGAEngine == SIS_300_VGA)) {
672 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
676 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
677 else if(VDisplay == 800) {
678 if(VGAEngine == SIS_315_VGA) {
679 if((VBFlags & CRT1_LCDA) && (LCDwidth == 1280) && (LCDheight == 800)) {
680 ModeIndex = ModeIndex_1280x800[Depth];
681 } else if(!(VBFlags & CRT1_LCDA)) {
682 ModeIndex = ModeIndex_1280x800[Depth];
685 } else if(VDisplay == 720) {
686 if((VBFlags & CRT1_LCDA) && (LCDwidth == 1280) && (LCDheight == 720)) {
687 ModeIndex = ModeIndex_1280x720[Depth];
688 } else if(!(VBFlags & CRT1_LCDA)) {
689 ModeIndex = ModeIndex_1280x720[Depth];
691 } else if(!(VBFlags & CRT1_LCDA)) {
692 if(VDisplay == 960) ModeIndex = ModeIndex_1280x960[Depth];
693 else if(VDisplay == 768) {
694 if(VGAEngine == SIS_300_VGA) {
695 ModeIndex = ModeIndex_300_1280x768[Depth];
697 ModeIndex = ModeIndex_310_1280x768[Depth];
703 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
704 if(!(VBFlags & CRT1_LCDA)) {
705 if(VGAEngine == SIS_300_VGA) {
706 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
711 if(VGAEngine == SIS_315_VGA) {
712 if(VDisplay == 1050) {
713 if((VBFlags & CRT1_LCDA) &&
714 (((LCDwidth == 1400) && (LCDheight == 1050)) ||
715 ((LCDwidth == 1600) && (LCDheight == 1200)))) {
716 ModeIndex = ModeIndex_1400x1050[Depth];
717 } else if(!(VBFlags & CRT1_LCDA)) {
718 ModeIndex = ModeIndex_1400x1050[Depth];
724 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
727 if(VGAEngine == SIS_315_VGA) {
728 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
732 if(!(VBFlags & CRT1_LCDA)) {
733 if(VGAEngine == SIS_315_VGA) {
734 if(VDisplay == 1080) ModeIndex = ModeIndex_1920x1080[Depth];
736 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
740 if(!(VBFlags & CRT1_LCDA)) {
741 if(VDisplay == 1536) {
742 if(VGAEngine == SIS_300_VGA) {
743 ModeIndex = ModeIndex_300_2048x1536[Depth];
745 ModeIndex = ModeIndex_310_2048x1536[Depth];
756 SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
757 int Depth, BOOLEAN FSTN, USHORT CustomT, int LCDwidth, int LCDheight)
759 USHORT ModeIndex = 0;
761 if(VBFlags & (VB_LVDS | VB_30xBDH)) {
766 if(CustomT != CUT_PANEL848) {
767 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
768 else if(VDisplay == 240) {
769 if(!FSTN) ModeIndex = ModeIndex_320x240[Depth];
770 else if(VGAEngine == SIS_315_VGA) {
771 ModeIndex = ModeIndex_320x240_FSTN[Depth];
777 if(CustomT != CUT_PANEL848) {
778 if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) {
779 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
784 if(CustomT != CUT_PANEL848) {
785 if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) {
786 if(LCDwidth != 1024 || LCDheight != 600) {
787 if(VDisplay == 384) {
788 ModeIndex = ModeIndex_512x384[Depth];
795 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
796 else if(VDisplay == 400) {
797 if(CustomT != CUT_PANEL848) ModeIndex = ModeIndex_640x400[Depth];
801 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
804 if(CustomT == CUT_PANEL848) {
805 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
809 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
810 else if(VGAEngine == SIS_300_VGA) {
811 if((VDisplay == 600) && (LCDheight == 600)) {
812 ModeIndex = ModeIndex_1024x600[Depth];
817 if(VGAEngine == SIS_300_VGA) {
818 if((VDisplay == 768) && (LCDheight == 768)) {
819 ModeIndex = ModeIndex_1152x768[Depth];
824 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
825 else if(VGAEngine == SIS_315_VGA) {
826 if((VDisplay == 768) && (LCDheight == 768)) {
827 ModeIndex = ModeIndex_310_1280x768[Depth];
829 if((VDisplay == 800) && (LCDheight == 800)) {
830 ModeIndex = ModeIndex_310_1280x768[Depth];
835 if(VGAEngine == SIS_300_VGA) {
836 if(CustomT == CUT_BARCO1366) {
837 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
840 if(CustomT == CUT_PANEL848) {
841 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
845 if(VGAEngine == SIS_315_VGA) {
846 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
850 if(VGAEngine == SIS_315_VGA) {
851 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
856 } else if(VBFlags & VB_SISBRIDGE) {
861 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
862 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
865 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
868 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
871 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
872 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
875 if(VGAEngine == SIS_315_VGA) {
876 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
877 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
881 if(VGAEngine == SIS_315_VGA) {
882 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
886 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
887 if(VGAEngine == SIS_315_VGA) {
888 if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
892 if(VGAEngine == SIS_315_VGA) {
893 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
897 if(VGAEngine == SIS_315_VGA) {
898 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
902 if(VGAEngine == SIS_315_VGA) {
903 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
907 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
908 if(VGAEngine == SIS_315_VGA) {
909 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
913 if(VGAEngine == SIS_315_VGA) {
914 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
918 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
919 else if(VDisplay == 768) {
920 if((LCDheight == 768) || (LCDwidth == 1680) ||
921 (VBFlags & VB_SISTMDS)) {
922 if(VGAEngine == SIS_300_VGA) {
923 ModeIndex = ModeIndex_300_1280x768[Depth];
925 ModeIndex = ModeIndex_310_1280x768[Depth];
928 } else if(VDisplay == 960) {
929 if((LCDheight == 960) || (VBFlags & VB_SISTMDS)) {
930 ModeIndex = ModeIndex_1280x960[Depth];
932 } else if(VGAEngine == SIS_315_VGA) {
933 if(VDisplay == 800) {
934 if((LCDheight == 800) || (LCDwidth == 1680) ||
935 (VBFlags & VB_SISTMDS)) {
936 ModeIndex = ModeIndex_1280x800[Depth];
938 } else if(VDisplay == 720) {
939 if((LCDheight == 720) || (LCDwidth == 1680) || (LCDwidth == 1400) ||
940 (VBFlags & VB_SISTMDS)) {
941 ModeIndex = ModeIndex_1280x720[Depth];
947 if(VGAEngine == SIS_315_VGA) {
948 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
952 if(VGAEngine == SIS_315_VGA) {
953 if(VBFlags & (VB_301B | VB_301C | VB_302B | VB_302LV | VB_302ELV)) {
954 if((LCDwidth == 1400) || (LCDwidth == 1600) || (LCDwidth == 1680)) {
955 ModeIndex = ModeIndex_1400x1050[Depth];
961 if(VGAEngine == SIS_315_VGA) {
962 if(VBFlags & (VB_301C | VB_302B | VB_302LV | VB_302ELV)) {
963 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
968 if(VGAEngine == SIS_315_VGA) {
969 if(VBFlags & (VB_301C | VB_302B | VB_302LV | VB_302ELV)) {
970 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
981 SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth)
983 USHORT ModeIndex = 0;
985 if(VBFlags & VB_CHRONTEL) {
990 if(VGAEngine == SIS_315_VGA) {
991 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
995 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
996 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
999 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
1002 if(VGAEngine == SIS_315_VGA) {
1003 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
1008 } else if(VBFlags & VB_SISTVBRIDGE) {
1013 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
1014 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
1017 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
1020 if( ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR750P | TV_YPBPR1080I))) ||
1021 (VBFlags & TV_HIVISION) ||
1022 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
1023 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
1027 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
1028 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
1031 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
1032 if(VDisplay == 480) {
1033 /* if((VBFlags & TV_YPBPR) || (VBFlags & (TV_NTSC | TV_PALM))) */
1034 ModeIndex = ModeIndex_720x480[Depth];
1035 } else if(VDisplay == 576) {
1036 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
1037 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) )
1038 ModeIndex = ModeIndex_720x576[Depth];
1043 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
1044 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
1045 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
1046 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
1051 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
1052 else if(VDisplay == 480) {
1053 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1054 ModeIndex = ModeIndex_800x480[Depth];
1059 if(VDisplay == 768) {
1060 if(VBFlags & (VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)) {
1061 ModeIndex = ModeIndex_1024x768[Depth];
1063 } else if(VDisplay == 576) {
1064 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1065 ModeIndex = ModeIndex_1024x576[Depth];
1070 if(VDisplay == 720) {
1071 if((VBFlags & TV_HIVISION) ||
1072 ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I | TV_YPBPR750P)))) {
1073 ModeIndex = ModeIndex_1280x720[Depth];
1075 } else if(VDisplay == 1024) {
1076 if((VBFlags & TV_HIVISION) ||
1077 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1078 ModeIndex = ModeIndex_1280x1024[Depth];
1088 SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth)
1090 USHORT ModeIndex = 0;
1092 if(!(VBFlags & (VB_301|VB_301B|VB_301C|VB_302B))) return 0;
1097 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
1098 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
1101 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
1104 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
1107 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
1108 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
1111 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
1112 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
1115 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
1118 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
1119 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
1122 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
1125 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
1128 if(VGAEngine == SIS_315_VGA) {
1129 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
1133 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
1134 else if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
1137 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
1138 else if(VGAEngine == SIS_300_VGA) {
1139 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
1143 if(VDisplay == 768) {
1144 if(VGAEngine == SIS_300_VGA) {
1145 ModeIndex = ModeIndex_300_1280x768[Depth];
1147 ModeIndex = ModeIndex_310_1280x768[Depth];
1149 } else if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
1150 else if(VDisplay == 720) ModeIndex = ModeIndex_1280x720[Depth];
1151 else if(VDisplay == 800) ModeIndex = ModeIndex_1280x800[Depth];
1152 else if(VDisplay == 960) ModeIndex = ModeIndex_1280x960[Depth];
1155 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
1158 if(VGAEngine == SIS_315_VGA) {
1159 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
1163 if(VGAEngine == SIS_315_VGA) {
1164 if(VBFlags & (VB_301B|VB_301C|VB_302B)) {
1165 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
1170 if(VGAEngine == SIS_315_VGA) {
1171 if(VBFlags & (VB_301B|VB_301C|VB_302B)) {
1172 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
1182 /*********************************************/
1183 /* HELPER: SetReg, GetReg */
1184 /*********************************************/
1187 SiS_SetReg(SISIOADDRESS port, USHORT index, USHORT data)
1189 OutPortByte(port,index);
1190 OutPortByte(port + 1,data);
1194 SiS_SetRegByte(SISIOADDRESS port, USHORT data)
1196 OutPortByte(port,data);
1200 SiS_SetRegShort(SISIOADDRESS port, USHORT data)
1202 OutPortWord(port,data);
1206 SiS_SetRegLong(SISIOADDRESS port, ULONG data)
1208 OutPortLong(port,data);
1212 SiS_GetReg(SISIOADDRESS port, USHORT index)
1214 OutPortByte(port,index);
1215 return(InPortByte(port + 1));
1219 SiS_GetRegByte(SISIOADDRESS port)
1221 return(InPortByte(port));
1225 SiS_GetRegShort(SISIOADDRESS port)
1227 return(InPortWord(port));
1231 SiS_GetRegLong(SISIOADDRESS port)
1233 return(InPortLong(port));
1237 SiS_SetRegANDOR(SISIOADDRESS Port,USHORT Index,USHORT DataAND,USHORT DataOR)
1241 temp = SiS_GetReg(Port,Index);
1242 temp = (temp & (DataAND)) | DataOR;
1243 SiS_SetReg(Port,Index,temp);
1247 SiS_SetRegAND(SISIOADDRESS Port,USHORT Index,USHORT DataAND)
1251 temp = SiS_GetReg(Port,Index);
1253 SiS_SetReg(Port,Index,temp);
1257 SiS_SetRegOR(SISIOADDRESS Port,USHORT Index,USHORT DataOR)
1261 temp = SiS_GetReg(Port,Index);
1263 SiS_SetReg(Port,Index,temp);
1266 /*********************************************/
1267 /* HELPER: DisplayOn, DisplayOff */
1268 /*********************************************/
1271 SiS_DisplayOn(SiS_Private *SiS_Pr)
1273 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
1277 SiS_DisplayOff(SiS_Private *SiS_Pr)
1279 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
1283 /*********************************************/
1284 /* HELPER: Init Port Addresses */
1285 /*********************************************/
1288 SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
1290 SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
1291 SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
1292 SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
1293 SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
1294 SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
1295 SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
1296 SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
1297 SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
1298 SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
1299 SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
1300 SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
1301 SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
1302 SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
1303 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04; /* Digital video interface registers (LCD) */
1304 SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10; /* 301 TV Encoder registers */
1305 SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12; /* 301 Macrovision registers */
1306 SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14; /* 301 VGA2 (and LCD) registers */
1307 SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2; /* 301 palette address port registers */
1308 SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14; /* DDC Port ( = P3C4, SR11/0A) */
1309 SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
1310 SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
1313 /*********************************************/
1314 /* HELPER: GetSysFlags */
1315 /*********************************************/
1318 SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1320 unsigned char cr5f, temp1, temp2;
1322 /* 661 and newer: NEVER write non-zero to SR11[7:4] */
1323 /* (SR11 is used for DDC and in enable/disablebridge) */
1324 SiS_Pr->SiS_SensibleSR11 = FALSE;
1325 SiS_Pr->SiS_MyCR63 = 0x63;
1326 if(HwInfo->jChipType >= SIS_330) {
1327 SiS_Pr->SiS_MyCR63 = 0x53;
1328 if(HwInfo->jChipType >= SIS_661) {
1329 SiS_Pr->SiS_SensibleSR11 = TRUE;
1333 /* You should use the macros, not these flags directly */
1335 SiS_Pr->SiS_SysFlags = 0;
1336 if(HwInfo->jChipType == SIS_650) {
1337 cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
1338 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
1339 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1340 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
1341 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1342 if((!temp1) || (temp2)) {
1347 SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1351 SiS_Pr->SiS_SysFlags |= SF_Is651; break;
1356 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1358 case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
1359 case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
1360 default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1364 SiS_Pr->SiS_SysFlags |= SF_Is652; break;
1366 SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1370 if(HwInfo->jChipType == SIS_760) {
1371 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78);
1372 if(temp1 & 0x30) SiS_Pr->SiS_SysFlags |= SF_760LFB;
1376 /*********************************************/
1377 /* HELPER: Init PCI & Engines */
1378 /*********************************************/
1381 SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1383 switch(HwInfo->jChipType) {
1388 /* Set - PCI LINEAR ADDRESSING ENABLE (0x80)
1389 * - RELOCATED VGA IO (0x20)
1390 * - MMIO ENABLE (0x1)
1392 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
1393 /* - Enable 2D (0x40)
1394 * - Enable 3D (0x02)
1395 * - Enable 3D Vertex command fetch (0x10) ?
1396 * - Enable 3D command parser (0x08) ?
1398 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
1410 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
1411 /* - Enable 2D (0x40)
1412 * - Enable 3D (0x02)
1413 * - Enable 3D vertex command fetch (0x10)
1414 * - Enable 3D command parser (0x08)
1415 * - Enable 3D G/L transformation engine (0x80)
1417 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
1420 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
1421 /* No 3D engine ! */
1422 /* - Enable 2D (0x40)
1424 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x40);
1428 /*********************************************/
1429 /* HELPER: SetLVDSetc */
1430 /*********************************************/
1433 SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1437 SiS_Pr->SiS_IF_DEF_LVDS = 0;
1438 SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
1439 SiS_Pr->SiS_IF_DEF_CH70xx = 0;
1440 SiS_Pr->SiS_IF_DEF_DSTN = 0;
1441 SiS_Pr->SiS_IF_DEF_FSTN = 0;
1442 SiS_Pr->SiS_IF_DEF_CONEX = 0;
1444 SiS_Pr->SiS_ChrontelInit = 0;
1446 /* Check for SiS30x first */
1447 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1448 if((temp == 1) || (temp == 2)) return;
1450 switch(HwInfo->jChipType) {
1455 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37);
1456 temp = (temp & 0x0E) >> 1;
1457 if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1458 if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
1459 if((temp == 4) || (temp == 5)) {
1460 /* Save power status (and error check) - UNUSED */
1461 SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
1462 SiS_Pr->SiS_IF_DEF_CH70xx = 1;
1471 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37);
1472 temp = (temp & 0x0E) >> 1;
1473 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1474 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1480 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
1481 temp = (temp & 0xe0) >> 5;
1482 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1483 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1484 if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */
1492 /*********************************************/
1493 /* HELPER: Enable DSTN/FSTN */
1494 /*********************************************/
1497 SiS_SetEnableDstn(SiS_Private *SiS_Pr, int enable)
1499 SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
1503 SiS_SetEnableFstn(SiS_Private *SiS_Pr, int enable)
1505 SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
1508 /*********************************************/
1509 /* HELPER: Determine ROM usage */
1510 /*********************************************/
1513 SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1515 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
1516 USHORT romversoffs, romvmaj = 1, romvmin = 0;
1518 if(HwInfo->jChipType >= SIS_661) {
1519 if((ROMAddr[0x1a] == 'N') &&
1520 (ROMAddr[0x1b] == 'e') &&
1521 (ROMAddr[0x1c] == 'w') &&
1522 (ROMAddr[0x1d] == 'V')) {
1525 romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8);
1527 if((ROMAddr[romversoffs+1] == '.') || (ROMAddr[romversoffs+4] == '.')) {
1528 romvmaj = ROMAddr[romversoffs] - '0';
1529 romvmin = ((ROMAddr[romversoffs+2] -'0') * 10) + (ROMAddr[romversoffs+3] - '0');
1532 if((romvmaj != 0) || (romvmin >= 92)) {
1535 } else if(IS_SIS650740) {
1536 if((ROMAddr[0x1a] == 'N') &&
1537 (ROMAddr[0x1b] == 'e') &&
1538 (ROMAddr[0x1c] == 'w') &&
1539 (ROMAddr[0x1d] == 'V')) {
1547 SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1549 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
1552 SiS_Pr->SiS_UseROM = FALSE;
1553 SiS_Pr->SiS_ROMNew = FALSE;
1555 if((ROMAddr) && (HwInfo->UseROM)) {
1556 if(HwInfo->jChipType == SIS_300) {
1557 /* 300: We check if the code starts below 0x220 by
1558 * checking the jmp instruction at the beginning
1559 * of the BIOS image.
1561 if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
1562 SiS_Pr->SiS_UseROM = TRUE;
1563 } else if(HwInfo->jChipType < SIS_315H) {
1564 /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps
1565 * the others do as well
1567 SiS_Pr->SiS_UseROM = TRUE;
1569 /* 315/330 series stick to the standard(s) */
1570 SiS_Pr->SiS_UseROM = TRUE;
1571 if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr, HwInfo))) {
1572 /* Find out about LCD data table entry size */
1573 if((romptr = SISGETROMW(0x0102))) {
1574 if(ROMAddr[romptr + (32 * 16)] == 0xff)
1575 SiS_Pr->SiS661LCD2TableSize = 32;
1576 else if(ROMAddr[romptr + (34 * 16)] == 0xff)
1577 SiS_Pr->SiS661LCD2TableSize = 34;
1578 else if(ROMAddr[romptr + (36 * 16)] == 0xff)
1579 SiS_Pr->SiS661LCD2TableSize = 36; /* 0.94 final */
1586 /*********************************************/
1587 /* HELPER: SET SEGMENT REGISTERS */
1588 /*********************************************/
1591 SiS_SetSegRegLower(SiS_Private *SiS_Pr, USHORT value)
1596 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0;
1597 temp |= (value >> 4);
1598 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
1599 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0xf0;
1600 temp |= (value & 0x0f);
1601 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
1605 SiS_SetSegRegUpper(SiS_Private *SiS_Pr, USHORT value)
1610 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f;
1611 temp |= (value & 0xf0);
1612 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
1613 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0x0f;
1614 temp |= (value << 4);
1615 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
1619 SiS_SetSegmentReg(SiS_Private *SiS_Pr, USHORT value)
1621 SiS_SetSegRegLower(SiS_Pr, value);
1622 SiS_SetSegRegUpper(SiS_Pr, value);
1626 SiS_ResetSegmentReg(SiS_Private *SiS_Pr)
1628 SiS_SetSegmentReg(SiS_Pr, 0);
1632 SiS_SetSegmentRegOver(SiS_Private *SiS_Pr, USHORT value)
1634 USHORT temp = value >> 8;
1637 temp |= (temp << 4);
1638 SiS_SetReg(SiS_Pr->SiS_P3c4,0x1d,temp);
1639 SiS_SetSegmentReg(SiS_Pr, value);
1643 SiS_ResetSegmentRegOver(SiS_Private *SiS_Pr)
1645 SiS_SetSegmentRegOver(SiS_Pr, 0);
1649 SiS_ResetSegmentRegisters(SiS_Private *SiS_Pr,PSIS_HW_INFO HwInfo)
1651 if((IS_SIS65x) || (HwInfo->jChipType >= SIS_661)) {
1652 SiS_ResetSegmentReg(SiS_Pr);
1653 SiS_ResetSegmentRegOver(SiS_Pr);
1657 /*********************************************/
1658 /* HELPER: GetVBType */
1659 /*********************************************/
1662 SiS_GetVBType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1664 USHORT flag=0, rev=0, nolcd=0;
1666 SiS_Pr->SiS_VBType = 0;
1668 if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX))
1671 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1673 if(flag > 3) return;
1675 rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01);
1678 SiS_Pr->SiS_VBType = VB_SIS302B;
1679 } else if(flag == 1) {
1681 SiS_Pr->SiS_VBType = VB_SIS301C;
1682 } else if(rev >= 0xB0) {
1683 SiS_Pr->SiS_VBType = VB_SIS301B;
1684 /* Check if 30xB DH version (no LCD support, use Panel Link instead) */
1685 nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23);
1686 if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
1688 SiS_Pr->SiS_VBType = VB_SIS301;
1691 if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) {
1693 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39);
1694 if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV;
1695 else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */
1696 } else if(rev >= 0xD0) {
1697 SiS_Pr->SiS_VBType = VB_SIS301LV;
1702 /*********************************************/
1703 /* HELPER: Check RAM size */
1704 /*********************************************/
1708 SiS_CheckMemorySize(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
1709 USHORT ModeNo, USHORT ModeIdIndex)
1711 USHORT AdapterMemSize = HwInfo->ulVideoMemorySize / (1024*1024);
1712 USHORT memorysize,modeflag;
1714 if(SiS_Pr->UseCustomMode) {
1715 modeflag = SiS_Pr->CModeFlag;
1717 if(ModeNo <= 0x13) {
1718 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1720 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1724 memorysize = modeflag & MemoryInfoFlag;
1725 memorysize >>= MemorySizeShift; /* Get required memory size */
1728 if(AdapterMemSize < memorysize) return FALSE;
1733 /*********************************************/
1734 /* HELPER: Get DRAM type */
1735 /*********************************************/
1739 SiS_Get310DRAMType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1743 if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) {
1744 data = (*SiS_Pr->pSiS_SoftSetting) & 0x03;
1746 if(HwInfo->jChipType >= SIS_661) {
1747 data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07;
1748 if(SiS_Pr->SiS_ROMNew) {
1749 data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6);
1751 } else if(IS_SIS550650740) {
1752 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07;
1753 } else { /* 315, 330 */
1754 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
1755 if(HwInfo->jChipType == SIS_330) {
1757 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30;
1759 case 0x00: data = 1; break;
1760 case 0x10: data = 3; break;
1761 case 0x20: data = 3; break;
1762 case 0x30: data = 2; break;
1775 SiS_GetMCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1777 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
1780 index = SiS_Get310DRAMType(SiS_Pr, HwInfo);
1781 if(HwInfo->jChipType >= SIS_661) {
1782 if(SiS_Pr->SiS_ROMNew) {
1783 return((USHORT)(SISGETROMW((0x90 + (index * 5) + 3))));
1785 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1786 } else if(index >= 4) {
1788 return(SiS_Pr->SiS_MCLKData_1[index].CLOCK);
1790 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1795 /*********************************************/
1796 /* HELPER: ClearBuffer */
1797 /*********************************************/
1801 SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
1803 UCHAR *VideoMemoryAddress = HwInfo->pjVideoMemoryAddress;
1804 ULONG AdapterMemorySize = (ULONG)HwInfo->ulVideoMemorySize;
1808 if(SiS_Pr->SiS_ModeType >= ModeEGA) {
1810 SiS_SetMemory(VideoMemoryAddress, AdapterMemorySize, 0);
1812 pBuffer = (USHORT *)VideoMemoryAddress;
1813 for(i=0; i<0x4000; i++) pBuffer[i] = 0x0000;
1816 if(SiS_Pr->SiS_ModeType < ModeCGA) {
1817 pBuffer = (USHORT *)VideoMemoryAddress;
1818 for(i=0; i<0x4000; i++) pBuffer[i] = 0x0720;
1820 SiS_SetMemory(VideoMemoryAddress, 0x8000, 0);
1826 /*********************************************/
1827 /* HELPER: SearchModeID */
1828 /*********************************************/
1831 SiS_SearchModeID(SiS_Private *SiS_Pr, USHORT *ModeNo, USHORT *ModeIdIndex)
1833 UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO;
1835 if(*ModeNo <= 0x13) {
1837 if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01;
1839 for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) {
1840 if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == (*ModeNo)) break;
1841 if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF) return FALSE;
1844 if(*ModeNo == 0x07) {
1845 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
1846 /* else 350 lines */
1848 if(*ModeNo <= 0x03) {
1849 if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
1850 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
1851 /* else 350 lines */
1853 /* else 200 lines */
1857 for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) {
1858 if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == (*ModeNo)) break;
1859 if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF) return FALSE;
1866 /*********************************************/
1867 /* HELPER: GetModePtr */
1868 /*********************************************/
1871 SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex)
1875 if(ModeNo <= 0x13) {
1876 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
1878 if(SiS_Pr->SiS_ModeType <= ModeEGA) index = 0x1B;
1884 /*********************************************/
1885 /* HELPER: LowModeTests */
1886 /*********************************************/
1889 SiS_DoLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo)
1891 USHORT temp,temp1,temp2;
1893 if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12))
1895 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11);
1896 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80);
1897 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1898 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55);
1899 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1900 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1);
1901 SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp);
1902 if((HwInfo->jChipType >= SIS_315H) ||
1903 (HwInfo->jChipType == SIS_300)) {
1904 if(temp2 == 0x55) return(FALSE);
1907 if(temp2 != 0x55) return(TRUE);
1909 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
1916 SiS_SetLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo)
1918 if(SiS_DoLowModeTest(SiS_Pr, ModeNo, HwInfo)) {
1919 SiS_Pr->SiS_SetFlag |= LowModeTests;
1923 /*********************************************/
1924 /* HELPER: ENABLE CRT1 */
1925 /*********************************************/
1928 SiS_SetupCR5x(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1930 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
1932 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1933 if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20);
1934 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1935 } else if(IS_SIS661741660760) {
1936 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7);
1937 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1938 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1939 if(!SiS_Pr->SiS_ROMNew) {
1940 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
1947 SiS_HandleCRT1(SiS_Private *SiS_Pr)
1949 SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf);
1951 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x01)) {
1952 if((SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x0a) ||
1953 (SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x01)) {
1954 SiS_SetRegOR(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0x40);
1960 /*********************************************/
1961 /* HELPER: GetColorDepth */
1962 /*********************************************/
1965 SiS_GetColorDepth(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex)
1967 USHORT ColorDepth[6] = { 1, 2, 4, 4, 6, 8};
1971 /* Do NOT check UseCustomMode, will skrew up FIFO */
1972 if(ModeNo == 0xfe) {
1973 modeflag = SiS_Pr->CModeFlag;
1976 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1978 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1981 index = (modeflag & ModeInfoFlag) - ModeEGA;
1982 if(index < 0) index = 0;
1983 return(ColorDepth[index]);
1986 /*********************************************/
1987 /* HELPER: GetOffset */
1988 /*********************************************/
1991 SiS_GetOffset(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
1992 USHORT RefreshRateTableIndex,PSIS_HW_INFO HwInfo)
1994 USHORT xres, temp, colordepth, infoflag;
1996 if(SiS_Pr->UseCustomMode) {
1997 infoflag = SiS_Pr->CInfoFlag;
1998 xres = SiS_Pr->CHDisplay;
2000 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
2001 xres = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes;
2004 colordepth = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex);
2007 if(infoflag & InterlaceMode) temp <<= 1;
2017 /*********************************************/
2019 /*********************************************/
2022 SiS_SetSeqRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo)
2027 SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03); /* Set SR0 */
2029 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0];
2031 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
2032 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
2035 if(HwInfo->jChipType >= SIS_661) {
2036 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2037 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2038 SRdata |= 0x01; /* 8 dot clock */
2041 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2042 if(SiS_Pr->SiS_VBType & VB_NoLCD) {
2043 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2044 SRdata |= 0x01; /* 8 dot clock */
2050 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2051 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
2052 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
2053 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2054 SRdata |= 0x01; /* 8 dot clock */
2058 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2059 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2060 SRdata |= 0x01; /* 8 dot clock */
2065 SRdata |= 0x20; /* screen off */
2067 SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata);
2069 for(i = 2; i <= 4; i++) {
2070 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i-1];
2071 SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata);
2075 /*********************************************/
2077 /*********************************************/
2080 SiS_SetMiscRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo)
2084 Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
2086 if(HwInfo->jChipType < SIS_661) {
2087 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
2088 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
2094 SiS_SetRegByte(SiS_Pr->SiS_P3c2,Miscdata);
2097 /*********************************************/
2099 /*********************************************/
2102 SiS_SetCRTCRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
2103 USHORT StandTableIndex)
2108 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* Unlock CRTC */
2110 for(i = 0; i <= 0x18; i++) {
2111 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
2112 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata); /* Set CRTC(3d4) */
2114 if(HwInfo->jChipType >= SIS_661) {
2115 SiS_SetupCR5x(SiS_Pr, HwInfo);
2116 for(i = 0x13; i <= 0x14; i++) {
2117 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
2118 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
2120 } else if( ( (HwInfo->jChipType == SIS_630) ||
2121 (HwInfo->jChipType == SIS_730) ) &&
2122 (HwInfo->jChipRevision >= 0x30) ) { /* for 630S0 */
2123 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2124 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2125 SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE);
2131 /*********************************************/
2133 /*********************************************/
2136 SiS_SetATTRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex,
2137 PSIS_HW_INFO HwInfo)
2142 for(i = 0; i <= 0x13; i++) {
2143 ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
2145 if((i <= 0x0f) || (i == 0x11)) {
2152 /* Pixel shift. If screen on LCD or TV is shifted left or right,
2153 * this might be the cause.
2155 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
2156 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata=0;
2158 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2159 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
2160 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
2161 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
2165 if(HwInfo->jChipType >= SIS_661) {
2166 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) {
2167 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
2169 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2170 if(HwInfo->jChipType >= SIS_315H) {
2171 if(IS_SIS550650740660) {
2172 /* 315, 330 don't do this */
2173 if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
2174 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
2180 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
2184 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
2185 SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */
2186 SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */
2188 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
2189 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */
2190 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */
2192 SiS_GetRegByte(SiS_Pr->SiS_P3da);
2193 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */
2194 SiS_GetRegByte(SiS_Pr->SiS_P3da);
2197 /*********************************************/
2199 /*********************************************/
2202 SiS_SetGRCRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex)
2207 for(i = 0; i <= 0x08; i++) {
2208 GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
2209 SiS_SetReg(SiS_Pr->SiS_P3ce,i,GRdata);
2212 if(SiS_Pr->SiS_ModeType > ModeVGA) {
2213 /* 256 color disable */
2214 SiS_SetRegAND(SiS_Pr->SiS_P3ce,0x05,0xBF);
2218 /*********************************************/
2219 /* CLEAR EXTENDED REGISTERS */
2220 /*********************************************/
2223 SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
2227 for(i = 0x0A; i <= 0x0E; i++) {
2228 SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00);
2231 if(HwInfo->jChipType >= SIS_315H) {
2232 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
2233 if(ModeNo <= 0x13) {
2234 if(ModeNo == 0x06 || ModeNo >= 0x0e) {
2235 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20);
2241 /*********************************************/
2243 /*********************************************/
2246 SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
2248 if(HwInfo->jChipType >= SIS_315H) {
2249 if(HwInfo->jChipType < SIS_661) {
2250 if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return;
2253 if((SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
2254 (!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) {
2259 if(HwInfo->jChipType >= SIS_315H) {
2260 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xCF,0x20);
2262 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x20);
2264 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B);
2265 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C);
2266 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2267 if(HwInfo->jChipType >= SIS_315H) {
2268 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
2270 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x10);
2272 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B);
2273 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C);
2274 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2277 /*********************************************/
2279 /*********************************************/
2282 SiS_SetCRT1Sync(SiS_Private *SiS_Pr, USHORT RefreshRateTableIndex)
2286 if(SiS_Pr->UseCustomMode) {
2287 sync = SiS_Pr->CInfoFlag >> 8;
2289 sync = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8;
2294 SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync);
2297 /*********************************************/
2299 /*********************************************/
2302 SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2303 USHORT RefreshRateTableIndex,
2304 PSIS_HW_INFO HwInfo)
2307 USHORT temp,i,j,modeflag;
2309 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* unlock cr0-7 */
2311 if(SiS_Pr->UseCustomMode) {
2313 modeflag = SiS_Pr->CModeFlag;
2315 for(i=0,j=0;i<=7;i++,j++) {
2316 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
2318 for(j=0x10;i<=10;i++,j++) {
2319 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
2321 for(j=0x15;i<=12;i++,j++) {
2322 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
2324 for(j=0x0A;i<=15;i++,j++) {
2325 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
2328 temp = SiS_Pr->CCRT1CRTC[16] & 0xE0;
2329 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp);
2331 temp = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
2332 if(modeflag & DoubleScanMode) temp |= 0x80;
2333 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
2337 if(ModeNo <= 0x13) {
2338 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
2340 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2343 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
2345 for(i=0,j=0;i<=7;i++,j++) {
2346 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
2348 for(j=0x10;i<=10;i++,j++) {
2349 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
2351 for(j=0x15;i<=12;i++,j++) {
2352 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
2354 for(j=0x0A;i<=15;i++,j++) {
2355 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
2358 temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0;
2359 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp);
2361 temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5;
2362 if(modeflag & DoubleScanMode) temp |= 0x80;
2363 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
2367 if(SiS_Pr->SiS_ModeType > ModeVGA) SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
2370 /*********************************************/
2371 /* OFFSET & PITCH */
2372 /*********************************************/
2373 /* (partly overruled by SetPitch() in XF86) */
2374 /*********************************************/
2377 SiS_SetCRT1Offset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2378 USHORT RefreshRateTableIndex,
2379 PSIS_HW_INFO HwInfo)
2381 USHORT temp, DisplayUnit, infoflag;
2383 if(SiS_Pr->UseCustomMode) {
2384 infoflag = SiS_Pr->CInfoFlag;
2386 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
2389 DisplayUnit = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,
2390 RefreshRateTableIndex,HwInfo);
2392 temp = (DisplayUnit >> 8) & 0x0f;
2393 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
2395 temp = DisplayUnit & 0xFF;
2396 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,temp);
2398 if(infoflag & InterlaceMode) DisplayUnit >>= 1;
2401 temp = (DisplayUnit & 0xff00) >> 8;
2402 if(DisplayUnit & 0xff) temp++;
2404 SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp);
2407 /*********************************************/
2409 /*********************************************/
2412 SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2413 PSIS_HW_INFO HwInfo, USHORT RefreshRateTableIndex)
2415 USHORT index=0, clka, clkb;
2417 if(SiS_Pr->UseCustomMode) {
2418 clka = SiS_Pr->CSR2B;
2419 clkb = SiS_Pr->CSR2C;
2421 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo);
2422 if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2423 clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A;
2424 clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B;
2426 clka = SiS_Pr->SiS_VCLKData[index].SR2B;
2427 clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
2431 if(HwInfo->jChipType >= SIS_315H) {
2432 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
2434 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x00);
2437 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,clka);
2438 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,clkb);
2440 if(HwInfo->jChipType >= SIS_315H) {
2441 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01);
2443 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2447 /*********************************************/
2449 /*********************************************/
2453 SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key)
2455 const UCHAR ThLowA[] = { 61, 3,52, 5,68, 7,100,11,
2456 43, 3,42, 5,54, 7, 78,11,
2457 34, 3,37, 5,47, 7, 67,11 };
2459 const UCHAR ThLowB[] = { 81, 4,72, 6,88, 8,120,12,
2460 55, 4,54, 6,66, 8, 90,12,
2461 42, 4,45, 6,55, 8, 75,12 };
2463 const UCHAR ThTiming[] = { 1, 2, 2, 3, 0, 1, 1, 2 };
2465 USHORT tempah, tempal, tempcl, tempbx, temp;
2468 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18);
2475 tempcl = ThTiming[tempal];
2476 tempbx = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
2478 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
2484 tempal = ThLowA[tempbx + 1];
2486 tempal += ThLowA[tempbx];
2488 tempal = ThLowB[tempbx + 1];
2490 tempal += ThLowB[tempbx];
2492 longtemp = tempal * VCLK * colordepth;
2493 temp = longtemp % (MCLK * 16);
2494 longtemp /= (MCLK * 16);
2495 if(temp) longtemp++;
2496 return((USHORT)longtemp);
2500 SiS_CalcDelay(SiS_Private *SiS_Pr, USHORT VCLK, USHORT colordepth, USHORT MCLK)
2502 USHORT tempax, tempbx;
2504 tempbx = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
2505 tempax = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
2506 if(tempax < 4) tempax = 4;
2508 if(tempbx < tempax) tempbx = tempax;
2513 SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo,
2514 USHORT RefreshRateTableIndex)
2516 USHORT ThresholdLow = 0;
2517 USHORT index, VCLK, MCLK, colorth=0;
2518 USHORT tempah, temp;
2522 if(SiS_Pr->UseCustomMode) {
2523 VCLK = SiS_Pr->CSRClock;
2525 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
2527 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */
2530 switch (SiS_Pr->SiS_ModeType - ModeEGA) { /* Get half colordepth */
2531 case 0 : colorth = 1; break;
2532 case 1 : colorth = 1; break;
2533 case 2 : colorth = 2; break;
2534 case 3 : colorth = 2; break;
2535 case 4 : colorth = 3; break;
2536 case 5 : colorth = 4; break;
2539 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A);
2541 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
2543 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
2545 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,tempah);
2548 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK);
2550 if(ThresholdLow < 0x13) break;
2551 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
2552 ThresholdLow = 0x13;
2553 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
2555 if(!(tempah)) break;
2558 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,tempah);
2561 } else ThresholdLow = 2;
2563 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2564 temp = (ThresholdLow << 4) | 0x0f;
2565 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
2567 temp = (ThresholdLow & 0x10) << 1;
2568 if(ModeNo > 0x13) temp |= 0x40;
2569 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
2572 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2574 /* Write CRT/CPU threshold high */
2575 temp = ThresholdLow + 3;
2576 if(temp > 0x0f) temp = 0x0f;
2577 SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
2581 SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR key, PSIS_HW_INFO HwInfo)
2584 const UCHAR LatencyFactor[] = {
2585 97, 88, 86, 79, 77, 00, /*; 64 bit BQ=2 */
2586 00, 87, 85, 78, 76, 54, /*; 64 bit BQ=1 */
2587 97, 88, 86, 79, 77, 00, /*; 128 bit BQ=2 */
2588 00, 79, 77, 70, 68, 48, /*; 128 bit BQ=1 */
2589 80, 72, 69, 63, 61, 00, /*; 64 bit BQ=2 */
2590 00, 70, 68, 61, 59, 37, /*; 64 bit BQ=1 */
2591 86, 77, 75, 68, 66, 00, /*; 128 bit BQ=2 */
2592 00, 68, 66, 59, 57, 37 /*; 128 bit BQ=1 */
2594 const UCHAR LatencyFactor730[] = {
2599 137,130,128, /* --- Table ends with this entry, data below */
2600 137,130,128, /* to avoid using illegal values */
2613 if(HwInfo->jChipType == SIS_730) {
2614 index = ((key & 0x0f) * 3) + ((key & 0xC0) >> 6);
2615 data = LatencyFactor730[index];
2617 index = (key & 0xE0) >> 5;
2618 if(key & 0x10) index +=6;
2619 if(!(key & 0x01)) index += 24;
2620 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
2621 if(data & 0x0080) index += 12;
2622 data = LatencyFactor[index];
2628 SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, USHORT ModeNo,
2629 PSIS_HW_INFO HwInfo,
2630 USHORT RefreshRateTableIndex)
2632 USHORT i,index,data,VCLK,MCLK,colorth=0;
2633 ULONG B,eax,bl,data2;
2634 USHORT ThresholdLow=0;
2636 0x01,0x21,0x41,0x61,0x81,
2637 0x31,0x51,0x71,0x91,0xb1,
2638 0x00,0x20,0x40,0x60,0x80,
2639 0x30,0x50,0x70,0x90,0xb0,
2642 UCHAR FQBQData730[]= {
2653 if(SiS_Pr->UseCustomMode) {
2654 VCLK = SiS_Pr->CSRClock;
2656 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
2658 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */
2661 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A);
2663 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
2665 data2 = SiS_Pr->SiS_ModeType - ModeEGA; /* Get half colordepth */
2667 case 0 : colorth = 1; break;
2668 case 1 : colorth = 1; break;
2669 case 2 : colorth = 2; break;
2670 case 3 : colorth = 2; break;
2671 case 4 : colorth = 3; break;
2672 case 5 : colorth = 4; break;
2675 if(HwInfo->jChipType == SIS_730) {
2678 B = SiS_CalcDelay2(SiS_Pr, FQBQData730[i], HwInfo) * VCLK * colorth;
2679 bl = B / (MCLK * 16);
2681 if(B == bl * 16 * MCLK) {
2688 if(FQBQData730[i+1] == 0xFF) {
2689 ThresholdLow = 0x13;
2697 } while(FQBQData730[i] != 0xFF);
2702 B = SiS_CalcDelay2(SiS_Pr, FQBQData[i], HwInfo) * VCLK * colorth;
2703 bl = B / (MCLK * 16);
2705 if(B == bl * 16 * MCLK) {
2712 if(FQBQData[i+1] == 0xFF) {
2713 ThresholdLow = 0x13;
2721 } while(FQBQData[i] != 0xFF);
2725 if(HwInfo->jChipType == SIS_730) {
2729 ThresholdLow = 0x02;
2732 /* Write foreground and background queue */
2733 if(HwInfo->jChipType == SIS_730) {
2735 data2 = FQBQData730[i];
2736 data2 = (data2 & 0xC0) >> 5;
2740 SiS_SetRegLong(0xcf8,0x80000050);
2741 eax = SiS_GetRegLong(0xcfc);
2744 SiS_SetRegLong(0xcfc,eax);
2746 /* We use pci functions X offers. We use pcitag 0, because
2747 * we want to read/write to the host bridge (which is always
2748 * 00:00.0 on 630, 730 and 540), not the VGA device.
2750 eax = pciReadLong(0x00000000, 0x50);
2753 pciWriteLong(0x00000000, 0x50, eax);
2756 /* Write GUI grant timer (PCI config 0xA3) */
2757 data2 = FQBQData730[i] << 8;
2758 data2 = (data2 & 0x0f00) | ((data2 & 0x3000) >> 8);
2762 SiS_SetRegLong(0xcf8,0x800000A0);
2763 eax = SiS_GetRegLong(0xcfc);
2766 SiS_SetRegLong(0xcfc,eax);
2768 eax = pciReadLong(0x00000000, 0xA0);
2771 pciWriteLong(0x00000000, 0xA0, eax);
2776 data2 = FQBQData[i];
2777 data2 = (data2 & 0xf0) >> 4;
2781 SiS_SetRegLong(0xcf8,0x80000050);
2782 eax = SiS_GetRegLong(0xcfc);
2785 SiS_SetRegLong(0xcfc,eax);
2787 eax = pciReadLong(0x00000000, 0x50);
2790 pciWriteLong(0x00000000, 0x50, eax);
2793 /* Write GUI grant timer (PCI config 0xA3) */
2794 data2 = FQBQData[i];
2799 SiS_SetRegLong(0xcf8,0x800000A0);
2800 eax = SiS_GetRegLong(0xcfc);
2803 SiS_SetRegLong(0xcfc,eax);
2805 eax = pciReadLong(0x00000000, 0xA0);
2808 pciWriteLong(0x00000000, 0xA0, eax);
2813 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2814 data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
2815 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
2817 data = (ThresholdLow & 0x10) << 1;
2818 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
2821 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2823 /* Write CRT/CPU threshold high (gap = 3) */
2824 data = ThresholdLow + 3;
2825 if(data > 0x0f) data = 0x0f;
2826 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
2832 SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2833 PSIS_HW_INFO HwInfo)
2837 /* disable auto-threshold */
2838 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);
2840 if(SiS_Pr->UseCustomMode) {
2841 modeflag = SiS_Pr->CModeFlag;
2843 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2846 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE);
2847 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
2849 if(HwInfo->jChipType >= SIS_661) {
2850 if(!(modeflag & HalfDCLK)) {
2851 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2852 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2855 if((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
2856 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2857 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2864 /*********************************************/
2865 /* MODE REGISTERS */
2866 /*********************************************/
2869 SiS_SetVCLKState(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
2870 USHORT ModeNo, USHORT RefreshRateTableIndex,
2873 USHORT data=0, VCLK=0, index=0;
2876 if(SiS_Pr->UseCustomMode) {
2877 VCLK = SiS_Pr->CSRClock;
2879 index = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,
2880 RefreshRateTableIndex,HwInfo);
2881 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2885 if(HwInfo->jChipType < SIS_315H) {
2887 if(VCLK > 150) data |= 0x80;
2888 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
2891 if(VCLK >= 150) data |= 0x08;
2892 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
2896 if(VCLK >= 166) data |= 0x0c;
2897 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2900 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
2905 if(HwInfo->jChipType >= SIS_661) {
2907 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10);
2912 if((VCLK >= 135) && (VCLK < 160)) data = 0x02;
2913 else if((VCLK >= 160) && (VCLK < 260)) data = 0x01;
2914 else if(VCLK >= 260) data = 0x00;
2916 if(HwInfo->jChipType == SIS_540) {
2917 if((VCLK == 203) || (VCLK < 234)) data = 0x02;
2920 if(HwInfo->jChipType < SIS_315H) {
2921 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data);
2923 if(HwInfo->jChipType > SIS_315PRO) {
2924 if(ModeNo > 0x13) data &= 0xfc;
2926 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data);
2933 SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
2934 USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex)
2936 USHORT data,infoflag=0,modeflag;
2937 USHORT resindex,xres;
2941 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
2944 if(SiS_Pr->UseCustomMode) {
2945 modeflag = SiS_Pr->CModeFlag;
2946 infoflag = SiS_Pr->CInfoFlag;
2947 xres = SiS_Pr->CHDisplay;
2949 resindex = SiS_GetResInfo(SiS_Pr,ModeNo,ModeIdIndex);
2951 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2952 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
2953 xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal;
2955 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
2956 xres = SiS_Pr->SiS_StResInfo[resindex].HTotal;
2961 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F);
2965 if(SiS_Pr->SiS_ModeType > ModeEGA) {
2967 data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
2969 if(infoflag & InterlaceMode) data |= 0x20;
2971 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data);
2973 if(HwInfo->jChipType != SIS_300) {
2975 if(infoflag & InterlaceMode) {
2976 if(xres <= 800) data = 0x0020;
2977 else if(xres <= 1024) data = 0x0035;
2980 SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,(data & 0xFF));
2981 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,(data >> 8));
2984 if(modeflag & HalfDCLK) {
2985 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
2989 if(modeflag & LineCompareOff) data = 0x08;
2990 if(HwInfo->jChipType == SIS_300) {
2991 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data);
2993 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data);
2994 if(SiS_Pr->SiS_ModeType == ModeEGA) {
2996 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x40);
3001 if(HwInfo->jChipType >= SIS_661) {
3002 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
3006 if(HwInfo->jChipType == SIS_315PRO) {
3008 data = SiS_Get310DRAMType(SiS_Pr, HwInfo);
3009 data = SiS_Pr->SiS_SR15[2][data];
3010 if(SiS_Pr->SiS_ModeType == ModeText) {
3013 data2 = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,
3014 RefreshRateTableIndex,HwInfo);
3016 if(infoflag & InterlaceMode) data2 >>= 1;
3017 data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1;
3025 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
3027 } else if( (HwInfo->jChipType == SIS_330) ||
3028 ((HwInfo->jChipType == SIS_760) && (SiS_Pr->SiS_SysFlags & SF_760LFB))) {
3030 data = SiS_Get310DRAMType(SiS_Pr, HwInfo);
3031 if(HwInfo->jChipType == SIS_330) {
3032 data = SiS_Pr->SiS_SR15[2][data];
3034 if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
3035 else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
3038 if(SiS_Pr->SiS_ModeType <= ModeEGA) {
3041 if(SiS_Pr->UseCustomMode) {
3042 data2 = SiS_Pr->CSRClock;
3044 data2 = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,
3045 RefreshRateTableIndex,HwInfo);
3046 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
3049 data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1;
3050 if(data3) data2 *= data3;
3052 longdata = SiS_GetMCLK(SiS_Pr, HwInfo) * 1024;
3054 data2 = longdata / data2;
3056 if(HwInfo->jChipType == SIS_330) {
3057 if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
3058 if (data2 >= 0x19c) data = 0xba;
3059 else if(data2 >= 0x140) data = 0x7a;
3060 else if(data2 >= 0x101) data = 0x3a;
3061 else if(data2 >= 0xf5) data = 0x32;
3062 else if(data2 >= 0xe2) data = 0x2a;
3063 else if(data2 >= 0xc4) data = 0x22;
3064 else if(data2 >= 0xac) data = 0x1a;
3065 else if(data2 >= 0x9e) data = 0x12;
3066 else if(data2 >= 0x8e) data = 0x0a;
3069 if(data2 >= 0x127) data = 0xba;
3072 } else { /* 760+LFB */
3073 if (data2 >= 0x190) data = 0xba;
3074 else if(data2 >= 0xff) data = 0x7a;
3075 else if(data2 >= 0xd3) data = 0x3a;
3076 else if(data2 >= 0xa9) data = 0x1a;
3077 else if(data2 >= 0x93) data = 0x0a;
3081 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
3086 if(SiS_Pr->SiS_ModeType != ModeText) {
3088 if(SiS_Pr->SiS_ModeType != ModeEGA) {
3092 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
3094 SiS_SetVCLKState(SiS_Pr, HwInfo, ModeNo, RefreshRateTableIndex, ModeIdIndex);
3097 if(HwInfo->jChipType >= SIS_315H) {
3098 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
3099 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c);
3101 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c);
3107 /*********************************************/
3109 /*********************************************/
3113 SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG port)
3117 OutPortByte(port, 0);
3119 for (i=0; i < (256 * 3); i++) {
3120 OutPortByte(port, 0);
3126 SiS_WriteDAC(SiS_Private *SiS_Pr, SISIOADDRESS DACData, USHORT shiftflag,
3127 USHORT dl, USHORT ah, USHORT al, USHORT dh)
3152 SiS_SetRegByte(DACData,(USHORT)dh);
3153 SiS_SetRegByte(DACData,(USHORT)bh);
3154 SiS_SetRegByte(DACData,(USHORT)bl);
3158 SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
3159 USHORT ModeNo, USHORT ModeIdIndex)
3162 USHORT time,i,j,k,m,n,o;
3163 USHORT si,di,bx,dl,al,ah,dh;
3165 SISIOADDRESS DACAddr, DACData;
3166 const USHORT *table = NULL;
3168 if(ModeNo <= 0x13) {
3169 data = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
3171 if(SiS_Pr->UseCustomMode) {
3172 data = SiS_Pr->CModeFlag;
3174 data = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3178 data &= DACInfoFlag;
3180 if(data == 0x00) table = SiS_MDA_DAC;
3181 if(data == 0x08) table = SiS_CGA_DAC;
3182 if(data == 0x10) table = SiS_EGA_DAC;
3185 table = SiS_VGA_DAC;
3187 if(time == 256) j = 16;
3190 if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */
3191 (SiS_Pr->SiS_VBType & VB_NoLCD) ) ||
3192 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */
3193 (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */
3194 DACAddr = SiS_Pr->SiS_P3c8;
3195 DACData = SiS_Pr->SiS_P3c9;
3197 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3200 DACAddr = SiS_Pr->SiS_Part5Port;
3201 DACData = SiS_Pr->SiS_Part5Port + 1;
3204 SiS_SetRegByte(DACAddr,0x00);
3206 for(i=0; i<j; i++) {
3208 for(k=0; k<3; k++) {
3210 if(data & 0x01) data2 = 0x2A;
3211 if(data & 0x02) data2 += 0x15;
3212 if(shiftflag) data2 <<= 2;
3213 SiS_SetRegByte(DACData, data2);
3219 for(i = 16; i < 32; i++) {
3221 if(shiftflag) data <<= 2;
3222 for(k = 0; k < 3; k++) SiS_SetRegByte(DACData, data);
3225 for(m = 0; m < 9; m++) {
3229 for(n = 0; n < 3; n++) {
3230 for(o = 0; o < 5; o++) {
3235 SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
3238 for(o = 0; o < 3; o++) {
3243 SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
3252 /*********************************************/
3253 /* SET CRT1 REGISTER GROUP */
3254 /*********************************************/
3257 SiS_SetCRT1Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
3258 USHORT ModeNo, USHORT ModeIdIndex)
3260 USHORT StandTableIndex,RefreshRateTableIndex;
3262 SiS_Pr->SiS_CRT1Mode = ModeNo;
3263 StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex);
3264 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
3265 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) {
3266 SiS_DisableBridge(SiS_Pr, HwInfo);
3270 SiS_ResetSegmentRegisters(SiS_Pr, HwInfo);
3272 SiS_SetSeqRegs(SiS_Pr, StandTableIndex, HwInfo);
3273 SiS_SetMiscRegs(SiS_Pr, StandTableIndex, HwInfo);
3274 SiS_SetCRTCRegs(SiS_Pr, HwInfo, StandTableIndex);
3275 SiS_SetATTRegs(SiS_Pr, StandTableIndex, HwInfo);
3276 SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
3277 SiS_ClearExt1Regs(SiS_Pr, HwInfo, ModeNo);
3278 SiS_ResetCRT1VCLK(SiS_Pr, HwInfo);
3280 SiS_Pr->SiS_SelectCRT2Rate = 0;
3281 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
3284 xf86DrvMsgVerb(0, X_PROBED, 4, "(init: VBType=0x%04x, VBInfo=0x%04x)\n",
3285 SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo);
3288 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
3289 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
3290 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
3294 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3295 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
3298 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3300 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
3301 SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
3304 if(RefreshRateTableIndex != 0xFFFF) {
3305 SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex);
3306 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo);
3307 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo);
3308 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex);
3312 if(HwInfo->jChipType == SIS_300) {
3313 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo,HwInfo,RefreshRateTableIndex);
3314 } else if((HwInfo->jChipType == SIS_630) ||
3315 (HwInfo->jChipType == SIS_730) ||
3316 (HwInfo->jChipType == SIS_540)) {
3317 SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, HwInfo, RefreshRateTableIndex);
3321 if(HwInfo->jChipType >= SIS_315H) {
3322 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3326 SiS_SetCRT1ModeRegs(SiS_Pr, HwInfo, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3328 SiS_LoadDAC(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
3331 if(SiS_Pr->SiS_flag_clearbuffer) {
3332 SiS_ClearBuffer(SiS_Pr,HwInfo,ModeNo);
3336 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) {
3337 SiS_WaitRetrace1(SiS_Pr);
3338 SiS_DisplayOn(SiS_Pr);
3342 /*********************************************/
3343 /* HELPER: RESET VIDEO BRIDGE */
3344 /*********************************************/
3347 SiS_ResetVB(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
3349 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
3352 if(SiS_Pr->SiS_UseROM) {
3353 if(HwInfo->jChipType < SIS_330) {
3354 temp = ROMAddr[VB310Data_1_2_Offset] | 0x40;
3355 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3356 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3357 } else if(HwInfo->jChipType >= SIS_661) {
3358 temp = ROMAddr[0x7e];
3359 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80];
3360 if(HwInfo->jChipType >= SIS_660) temp |= 0x40;
3361 else if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x7b) >= 100) temp |= 0x40;
3362 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3367 /*********************************************/
3368 /* HELPER: SET VIDEO REGISTERS */
3369 /*********************************************/
3372 SiS_StrangeStuff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
3374 if((IS_SIS651) || (IS_SISM650)) {
3375 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */
3376 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00);
3377 SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */
3378 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x30, 0xfe); /* Fiddle with video regs */
3379 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef);
3381 /* !!! This does not support modes < 0x13 !!! */
3384 /*********************************************/
3385 /* XFree86: SET SCREEN PITCH */
3386 /*********************************************/
3390 SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3392 SISPtr pSiS = SISPTR(pScrn);
3393 UShort HDisplay = pSiS->scrnPitch >> 3;
3395 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,(HDisplay & 0xFF));
3396 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,(HDisplay>>8));
3400 SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3402 SISPtr pSiS = SISPTR(pScrn);
3403 UShort HDisplay = pSiS->scrnPitch2 >> 3;
3406 if(pSiS->VGAEngine == SIS_315_VGA)
3407 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01);
3409 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01);
3411 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(HDisplay & 0xFF));
3412 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0xF0,(HDisplay >> 8));
3416 SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3418 SISPtr pSiS = SISPTR(pScrn);
3419 BOOLEAN isslavemode = FALSE;
3421 if( (pSiS->VBFlags & VB_VIDEOBRIDGE) &&
3422 ( ((pSiS->VGAEngine == SIS_300_VGA) &&
3423 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
3424 ((pSiS->VGAEngine == SIS_315_VGA) &&
3425 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) {
3429 /* We need to set pitch for CRT1 if bridge is in slave mode, too */
3430 if((pSiS->VBFlags & DISPTYPE_DISP1) || (isslavemode)) {
3431 SiS_SetPitchCRT1(SiS_Pr, pScrn);
3433 /* We must not set the pitch for CRT2 if bridge is in slave mode */
3434 if((pSiS->VBFlags & DISPTYPE_DISP2) && (!isslavemode)) {
3435 SiS_SetPitchCRT2(SiS_Pr, pScrn);
3440 /*********************************************/
3442 /*********************************************/
3445 /* We need pScrn for setting the pitch correctly */
3447 SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch)
3450 SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3454 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress;
3455 unsigned char backupreg=0;
3460 SiS_Pr->UseCustomMode = FALSE;
3461 SiS_Pr->CRT1UsesCustomMode = FALSE;
3464 if(SiS_Pr->UseCustomMode) {
3468 SiSInitPtr(SiS_Pr, HwInfo);
3469 SiSRegInit(SiS_Pr, BaseAddr);
3470 SiS_GetSysFlags(SiS_Pr, HwInfo);
3472 #if defined(LINUX_XF86) && (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__))
3473 if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3476 SiS_Pr->SiS_VGAINFO = 0x11;
3478 SiSInitPCIetc(SiS_Pr, HwInfo);
3479 SiSSetLVDSetc(SiS_Pr, HwInfo);
3480 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3482 SiS_Pr->SiS_flag_clearbuffer = 0;
3484 if(!SiS_Pr->UseCustomMode) {
3486 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
3492 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05);
3494 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3496 SiS_UnLockCRT2(SiS_Pr, HwInfo);
3498 if(!SiS_Pr->UseCustomMode) {
3499 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
3504 SiS_GetVBType(SiS_Pr, HwInfo);
3506 /* Init/restore some VB registers */
3508 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3509 if(HwInfo->jChipType >= SIS_315H) {
3510 SiS_ResetVB(SiS_Pr, HwInfo);
3511 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3512 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3513 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3515 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3519 /* Get VB information (connectors, connected devices) */
3520 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, (SiS_Pr->UseCustomMode) ? 0 : 1);
3521 SiS_SetYPbPr(SiS_Pr, HwInfo);
3522 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3523 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3524 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo);
3527 /* 3. Check memory size (Kernel framebuffer driver only) */
3528 temp = SiS_CheckMemorySize(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
3529 if(!temp) return(0);
3532 if(HwInfo->jChipType >= SIS_315H) {
3533 SiS_SetupCR5x(SiS_Pr, HwInfo);
3536 if(SiS_Pr->UseCustomMode) {
3537 SiS_Pr->CRT1UsesCustomMode = TRUE;
3538 SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
3539 SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
3541 SiS_Pr->CRT1UsesCustomMode = FALSE;
3544 /* Set mode on CRT1 */
3545 if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) ||
3546 (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) {
3547 SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
3550 /* Set mode on CRT2 */
3551 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) {
3552 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3553 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3554 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3555 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3556 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo);
3560 SiS_HandleCRT1(SiS_Pr);
3562 SiS_StrangeStuff(SiS_Pr, HwInfo);
3564 SiS_DisplayOn(SiS_Pr);
3565 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3567 if(HwInfo->jChipType >= SIS_315H) {
3568 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3569 if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) {
3570 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3575 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3576 if(HwInfo->jChipType >= SIS_315H) {
3577 if(!SiS_Pr->SiS_ROMNew) {
3578 if(SiS_IsVAMode(SiS_Pr,HwInfo)) {
3579 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3581 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
3585 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3587 if((IS_SIS650) && (SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0xfc)) {
3588 if((ModeNo == 0x03) || (ModeNo == 0x10)) {
3589 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
3590 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
3594 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3595 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3597 } else if((HwInfo->jChipType == SIS_630) ||
3598 (HwInfo->jChipType == SIS_730)) {
3599 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3605 /* SetPitch: Adapt to virtual size & position */
3606 if((ModeNo > 0x13) && (dosetpitch)) {
3607 SiS_SetPitch(SiS_Pr, pScrn);
3610 /* Backup/Set ModeNo in BIOS scratch area */
3611 SiS_GetSetModeID(pScrn, ModeNo);
3615 #ifndef LINUX_XF86 /* We never lock registers in XF86 */
3616 if(KeepLockReg == 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3617 else SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00);
3623 /*********************************************/
3624 /* XFree86: SiSBIOSSetMode() */
3625 /* for non-Dual-Head mode */
3626 /*********************************************/
3630 SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3631 DisplayModePtr mode, BOOLEAN IsCustom)
3633 SISPtr pSiS = SISPTR(pScrn);
3636 SiS_Pr->UseCustomMode = FALSE;
3638 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3640 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n",
3642 (mode->Flags & V_INTERLACE ? SiS_Pr->CVDisplay * 2 :
3643 (mode->Flags & V_DBLSCAN ? SiS_Pr->CVDisplay / 2 :
3644 SiS_Pr->CVDisplay)));
3646 return(SiSSetMode(SiS_Pr, HwInfo, pScrn, ModeNo, TRUE));
3650 ModeNo = SiS_CalcModeIndex(pScrn, mode, pSiS->VBFlags, pSiS->HaveCustomModes);
3651 if(!ModeNo) return FALSE;
3653 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo);
3655 return(SiSSetMode(SiS_Pr, HwInfo, pScrn, ModeNo, TRUE));
3658 /*********************************************/
3659 /* XFree86: SiSBIOSSetModeCRT2() */
3660 /* for Dual-Head modes */
3661 /*********************************************/
3663 SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3664 DisplayModePtr mode, BOOLEAN IsCustom)
3667 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress;
3669 unsigned char backupreg=0;
3670 SISPtr pSiS = SISPTR(pScrn);
3672 SISEntPtr pSiSEnt = pSiS->entityPrivate;
3675 SiS_Pr->UseCustomMode = FALSE;
3677 /* Remember: Custom modes for CRT2 are ONLY supported
3678 * -) on 315/330 series,
3679 * -) on the 30x/B/C, and
3680 * -) if CRT2 is LCD or VGA
3683 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3689 BOOLEAN havecustommodes = pSiS->HaveCustomModes;
3692 if(pSiS->MergedFB) havecustommodes = pSiS->HaveCustomModes2;
3695 ModeNo = SiS_CalcModeIndex(pScrn, mode, pSiS->VBFlags, havecustommodes);
3696 if(!ModeNo) return FALSE;
3700 SiSRegInit(SiS_Pr, BaseAddr);
3701 SiSInitPtr(SiS_Pr, HwInfo);
3702 SiS_GetSysFlags(SiS_Pr, HwInfo);
3703 #if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__))
3704 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3706 SiS_Pr->SiS_VGAINFO = 0x11;
3708 SiSInitPCIetc(SiS_Pr, HwInfo);
3709 SiSSetLVDSetc(SiS_Pr, HwInfo);
3710 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3712 /* Save mode info so we can set it from within SetMode for CRT1 */
3714 if(pSiS->DualHeadMode) {
3715 pSiSEnt->CRT2ModeNo = ModeNo;
3716 pSiSEnt->CRT2DMode = mode;
3717 pSiSEnt->CRT2IsCustom = IsCustom;
3718 pSiSEnt->CRT2CR30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
3719 pSiSEnt->CRT2CR31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31);
3720 pSiSEnt->CRT2CR35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3721 pSiSEnt->CRT2CR38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3723 /* We can't set CRT2 mode before CRT1 mode is set */
3724 if(pSiSEnt->CRT1ModeNo == -1) {
3725 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3726 "Setting CRT2 mode delayed until after setting CRT1 mode\n");
3730 pSiSEnt->CRT2ModeSet = TRUE;
3734 /* We don't clear the buffer under X */
3735 SiS_Pr->SiS_flag_clearbuffer=0;
3737 if(SiS_Pr->UseCustomMode) {
3739 USHORT temptemp = SiS_Pr->CVDisplay;
3741 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3742 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
3744 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3745 "Setting custom mode %dx%d on CRT2\n",
3746 SiS_Pr->CHDisplay, temptemp);
3750 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3751 "Setting standard mode 0x%x on CRT2\n", ModeNo);
3755 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3757 SiS_UnLockCRT2(SiS_Pr, HwInfo);
3759 if(!SiS_Pr->UseCustomMode) {
3760 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
3765 SiS_GetVBType(SiS_Pr, HwInfo);
3767 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3768 if(HwInfo->jChipType >= SIS_315H) {
3769 SiS_ResetVB(SiS_Pr, HwInfo);
3770 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3771 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3772 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3774 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3778 /* Get VB information (connectors, connected devices) */
3779 if(!SiS_Pr->UseCustomMode) {
3780 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 1);
3782 /* If this is a custom mode, we don't check the modeflag for CRT2Mode */
3783 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0);
3785 SiS_SetYPbPr(SiS_Pr, HwInfo);
3786 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3787 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3788 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo);
3790 /* Set mode on CRT2 */
3791 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3792 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3793 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3794 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3795 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo);
3798 SiS_StrangeStuff(SiS_Pr, HwInfo);
3800 SiS_DisplayOn(SiS_Pr);
3801 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3803 if(HwInfo->jChipType >= SIS_315H) {
3804 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3805 if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) {
3806 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3811 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3812 if(HwInfo->jChipType >= SIS_315H) {
3813 if(!SiS_Pr->SiS_ROMNew) {
3814 if(SiS_IsVAMode(SiS_Pr,HwInfo)) {
3815 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3817 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
3821 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3823 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3824 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3826 } else if((HwInfo->jChipType == SIS_630) ||
3827 (HwInfo->jChipType == SIS_730)) {
3828 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3832 /* SetPitch: Adapt to virtual size & position */
3833 SiS_SetPitchCRT2(SiS_Pr, pScrn);
3838 /*********************************************/
3839 /* XFree86: SiSBIOSSetModeCRT1() */
3840 /* for Dual-Head modes */
3841 /*********************************************/
3844 SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3845 DisplayModePtr mode, BOOLEAN IsCustom)
3847 SISPtr pSiS = SISPTR(pScrn);
3848 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress;
3849 USHORT ModeIdIndex, ModeNo=0;
3852 SISEntPtr pSiSEnt = pSiS->entityPrivate;
3853 UCHAR backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0;
3854 BOOLEAN backupcustom;
3857 SiS_Pr->UseCustomMode = FALSE;
3859 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3861 USHORT temptemp = SiS_Pr->CVDisplay;
3863 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3864 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
3866 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3867 "Setting custom mode %dx%d on CRT1\n",
3868 SiS_Pr->CHDisplay, temptemp);
3873 ModeNo = SiS_CalcModeIndex(pScrn, mode, pSiS->VBFlags, pSiS->HaveCustomModes);
3874 if(!ModeNo) return FALSE;
3876 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3877 "Setting standard mode 0x%x on CRT1\n", ModeNo);
3880 SiSInitPtr(SiS_Pr, HwInfo);
3881 SiSRegInit(SiS_Pr, BaseAddr);
3882 SiS_GetSysFlags(SiS_Pr, HwInfo);
3883 #if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__))
3884 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3886 SiS_Pr->SiS_VGAINFO = 0x11;
3888 SiSInitPCIetc(SiS_Pr, HwInfo);
3889 SiSSetLVDSetc(SiS_Pr, HwInfo);
3890 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3892 /* We don't clear the buffer under X */
3893 SiS_Pr->SiS_flag_clearbuffer = 0;
3895 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3897 SiS_UnLockCRT2(SiS_Pr, HwInfo);
3899 if(!SiS_Pr->UseCustomMode) {
3900 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
3905 /* Determine VBType */
3906 SiS_GetVBType(SiS_Pr, HwInfo);
3908 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3909 if(HwInfo->jChipType >= SIS_315H) {
3910 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3912 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3916 /* Get VB information (connectors, connected devices) */
3917 /* (We don't care if the current mode is a CRT2 mode) */
3918 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0);
3919 SiS_SetYPbPr(SiS_Pr, HwInfo);
3920 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3921 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3922 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo);
3924 if(HwInfo->jChipType >= SIS_315H) {
3925 SiS_SetupCR5x(SiS_Pr, HwInfo);
3928 /* Set mode on CRT1 */
3929 SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
3930 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3931 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo);
3934 /* SetPitch: Adapt to virtual size & position */
3935 SiS_SetPitchCRT1(SiS_Pr, pScrn);
3938 if(pSiS->DualHeadMode) {
3939 pSiSEnt->CRT1ModeNo = ModeNo;
3940 pSiSEnt->CRT1DMode = mode;
3944 if(SiS_Pr->UseCustomMode) {
3945 SiS_Pr->CRT1UsesCustomMode = TRUE;
3946 SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
3947 SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
3949 SiS_Pr->CRT1UsesCustomMode = FALSE;
3952 /* Reset CRT2 if changing mode on CRT1 */
3954 if(pSiS->DualHeadMode) {
3955 if(pSiSEnt->CRT2ModeNo != -1) {
3956 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3957 "(Re-)Setting mode for CRT2\n");
3958 backupcustom = SiS_Pr->UseCustomMode;
3959 backupcr30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
3960 backupcr31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31);
3961 backupcr35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3962 backupcr38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3963 if(SiS_Pr->SiS_VBType & VB_SISVB) {
3964 /* Backup LUT-enable */
3965 if(pSiSEnt->CRT2ModeSet) {
3966 backupp40d = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0d) & 0x08;
3969 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3970 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,pSiSEnt->CRT2CR30);
3971 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,pSiSEnt->CRT2CR31);
3972 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,pSiSEnt->CRT2CR35);
3973 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,pSiSEnt->CRT2CR38);
3975 SiSBIOSSetModeCRT2(SiS_Pr, HwInfo, pSiSEnt->pScrn_1,
3976 pSiSEnt->CRT2DMode, pSiSEnt->CRT2IsCustom);
3977 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,backupcr30);
3978 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,backupcr31);
3979 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupcr35);
3980 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupcr38);
3981 if(SiS_Pr->SiS_VBType & VB_SISVB) {
3982 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0d, ~0x08, backupp40d);
3984 SiS_Pr->UseCustomMode = backupcustom;
3989 /* Warning: From here, the custom mode entries in SiS_Pr are
3990 * possibly overwritten
3993 SiS_HandleCRT1(SiS_Pr);
3995 SiS_StrangeStuff(SiS_Pr, HwInfo);
3997 SiS_DisplayOn(SiS_Pr);
3998 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
4000 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
4001 if(HwInfo->jChipType >= SIS_315H) {
4002 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
4003 } else if((HwInfo->jChipType == SIS_630) ||
4004 (HwInfo->jChipType == SIS_730)) {
4005 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
4009 /* Backup/Set ModeNo in BIOS scratch area */
4010 SiS_GetSetModeID(pScrn,ModeNo);
4014 #endif /* Linux_XF86 */
4019 SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4021 const USHORT PanelTypeTable300[16] = {
4022 0xc101, 0xc117, 0x0121, 0xc135, 0xc142, 0xc152, 0xc162, 0xc072,
4023 0xc181, 0xc192, 0xc1a1, 0xc1b6, 0xc1c2, 0xc0d2, 0xc1e2, 0xc1f2
4025 const USHORT PanelTypeTable31030x[16] = {
4026 0xc102, 0xc112, 0x0122, 0xc132, 0xc142, 0xc152, 0xc169, 0xc179,
4027 0x0189, 0xc192, 0xc1a2, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
4029 const USHORT PanelTypeTable310LVDS[16] = {
4030 0xc111, 0xc122, 0xc133, 0xc144, 0xc155, 0xc166, 0xc177, 0xc188,
4031 0xc199, 0xc0aa, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
4033 USHORT tempax,tempbx,temp;
4035 if(HwInfo->jChipType < SIS_315H) {
4037 tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18);
4038 tempbx = tempax & 0x0F;
4039 if(!(tempax & 0x10)){
4040 if(SiS_Pr->SiS_IF_DEF_LVDS == 1){
4042 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x38);
4043 if(temp & 0x40) tempbx |= 0x08;
4044 if(temp & 0x20) tempbx |= 0x02;
4045 if(temp & 0x01) tempbx |= 0x01;
4046 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x39);
4047 if(temp & 0x80) tempbx |= 0x04;
4052 tempbx = PanelTypeTable300[tempbx];
4054 temp = tempbx & 0x00FF;
4055 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
4056 temp = (tempbx & 0xFF00) >> 8;
4057 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
4061 if(HwInfo->jChipType >= SIS_661) return 0;
4063 tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1a);
4066 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
4068 /* TODO: Include HUGE detection routine
4069 (Probably not worth bothering)
4073 temp = tempax & 0xff;
4075 tempbx = PanelTypeTable310LVDS[tempax];
4077 tempbx = PanelTypeTable31030x[tempax];
4078 temp = tempbx & 0xff;
4080 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
4081 tempbx = (tempbx & 0xff00) >> 8;
4082 temp = tempbx & 0xc1;
4083 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
4084 if(SiS_Pr->SiS_VBType & VB_SISVB) {
4085 temp = tempbx & 0x04;
4086 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x39,0xfb,temp);
4095 #define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l))
4096 #define GENMASK(mask) BITMASK(1?mask,0?mask)
4097 #define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0?mask))
4098 #define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to))
4102 SiS_CalcCRRegisters(SiS_Private *SiS_Pr, int depth)
4104 SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */
4105 SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */
4106 SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */
4107 SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */
4108 SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */
4109 SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */
4110 (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
4112 SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */
4113 SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */
4114 | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
4115 | ((SiS_Pr->CVSyncStart & 0x100) >> 6)
4116 | (((SiS_Pr->CVBlankStart - 1) & 0x100) >> 5)
4118 | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4)
4119 | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
4120 | ((SiS_Pr->CVSyncStart & 0x200) >> 2);
4122 SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */
4125 if(SiS_Pr->CHDisplay >= 1600) SiS_Pr->CCRT1CRTC[16] |= 0x60; /* SRE */
4126 else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40;
4130 if (mode->VScan >= 32)
4131 regp->CRTC[9] |= 0x1F;
4132 else if (mode->VScan > 1)
4133 regp->CRTC[9] |= mode->VScan - 1;
4136 SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart ) & 0xFF; /* CR10 */
4137 SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd ) & 0x0F) | 0x80; /* CR11 */
4138 SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */
4139 SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */
4140 SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */
4142 SiS_Pr->CCRT1CRTC[13] = /* SRA */
4143 GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) |
4144 GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) |
4145 GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
4146 GETBITSTR((SiS_Pr->CVSyncStart ), 10:10, 3:3) |
4147 GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) |
4148 GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ;
4150 SiS_Pr->CCRT1CRTC[14] = /* SRB */
4151 GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) |
4152 GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) |
4153 GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
4154 GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ;
4157 SiS_Pr->CCRT1CRTC[15] = /* SRC */
4158 GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
4159 GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ;
4163 SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)
4165 USHORT modeflag, tempax, tempbx, VGAHDE = SiS_Pr->SiS_VGAHDE;
4168 /* 1:1 data: use data set by setcrt1crtc() */
4169 if(SiS_Pr->SiS_LCDInfo & LCDPass11) return;
4171 if(ModeNo <= 0x13) {
4172 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
4173 } else if(SiS_Pr->UseCustomMode) {
4174 modeflag = SiS_Pr->CModeFlag;
4176 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
4179 if(modeflag & HalfDCLK) VGAHDE >>= 1;
4181 SiS_Pr->CHDisplay = VGAHDE;
4182 SiS_Pr->CHBlankStart = VGAHDE;
4184 SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE;
4185 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE;
4187 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes;
4188 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */
4189 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4190 tempax = SiS_Pr->PanelXRes;
4193 if(modeflag & HalfDCLK) tempbx -= VGAHDE;
4194 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx;
4197 tempbx = SiS_Pr->CHTotal;
4198 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4199 tempbx = SiS_Pr->PanelXRes;
4200 if(modeflag & HalfDCLK) tempbx >>= 1;
4201 tempax += ((tempbx - tempax) >> 1);
4204 tempax += SiS_Pr->PanelHRS;
4205 SiS_Pr->CHSyncStart = tempax;
4206 tempax += SiS_Pr->PanelHRE;
4207 SiS_Pr->CHSyncEnd = tempax;
4209 tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes;
4210 tempax = SiS_Pr->SiS_VGAVDE;
4211 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4212 tempax = SiS_Pr->PanelYRes;
4214 SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax;
4216 tempax = SiS_Pr->SiS_VGAVDE;
4217 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4218 tempax += (SiS_Pr->PanelYRes - tempax) >> 1;
4220 tempax += SiS_Pr->PanelVRS;
4221 SiS_Pr->CVSyncStart = tempax;
4222 tempax += SiS_Pr->PanelVRE;
4223 SiS_Pr->CVSyncEnd = tempax;
4225 SiS_CalcCRRegisters(SiS_Pr, 8);
4226 SiS_Pr->CCRT1CRTC[16] &= ~0xE0;
4228 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
4230 for(i=0,j=0;i<=7;i++,j++) {
4231 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4233 for(j=0x10;i<=10;i++,j++) {
4234 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4236 for(j=0x15;i<=12;i++,j++) {
4237 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4239 for(j=0x0A;i<=15;i++,j++) {
4240 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
4243 tempax = SiS_Pr->CCRT1CRTC[16] & 0xE0;
4244 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1F,tempax);
4246 tempax = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
4247 if(modeflag & DoubleScanMode) tempax |= 0x80;
4248 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax);
4251 xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n",
4252 SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal,
4253 SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal,
4254 SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd);
4256 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4257 SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1],
4258 SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3],
4259 SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5],
4260 SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]);
4261 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4262 SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9],
4263 SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11],
4264 SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13],
4265 SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]);
4266 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]);
4270 /* ================ XFREE86 ================= */
4272 /* Helper functions */
4277 SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
4279 SISPtr pSiS = SISPTR(pScrn);
4280 int out_n, out_dn, out_div, out_sbit, out_scale;
4281 int depth = pSiS->CurrentLayout.bitsPerPixel;
4282 unsigned int vclk[5];
4290 pSiS->SiS_Pr->CModeFlag = 0;
4292 pSiS->SiS_Pr->CDClock = mode->Clock;
4294 pSiS->SiS_Pr->CHDisplay = mode->HDisplay;
4295 pSiS->SiS_Pr->CHSyncStart = mode->HSyncStart;
4296 pSiS->SiS_Pr->CHSyncEnd = mode->HSyncEnd;
4297 pSiS->SiS_Pr->CHTotal = mode->HTotal;
4299 pSiS->SiS_Pr->CVDisplay = mode->VDisplay;
4300 pSiS->SiS_Pr->CVSyncStart = mode->VSyncStart;
4301 pSiS->SiS_Pr->CVSyncEnd = mode->VSyncEnd;
4302 pSiS->SiS_Pr->CVTotal = mode->VTotal;
4304 pSiS->SiS_Pr->CFlags = mode->Flags;
4306 if(pSiS->SiS_Pr->CFlags & V_INTERLACE) {
4307 pSiS->SiS_Pr->CVDisplay >>= 1;
4308 pSiS->SiS_Pr->CVSyncStart >>= 1;
4309 pSiS->SiS_Pr->CVSyncEnd >>= 1;
4310 pSiS->SiS_Pr->CVTotal >>= 1;
4312 if(pSiS->SiS_Pr->CFlags & V_DBLSCAN) {
4313 /* pSiS->SiS_Pr->CDClock <<= 1; */
4314 pSiS->SiS_Pr->CVDisplay <<= 1;
4315 pSiS->SiS_Pr->CVSyncStart <<= 1;
4316 pSiS->SiS_Pr->CVSyncEnd <<= 1;
4317 pSiS->SiS_Pr->CVTotal <<= 1;
4320 pSiS->SiS_Pr->CHBlankStart = pSiS->SiS_Pr->CHDisplay;
4321 pSiS->SiS_Pr->CHBlankEnd = pSiS->SiS_Pr->CHTotal;
4322 pSiS->SiS_Pr->CVBlankStart = pSiS->SiS_Pr->CVSyncStart - 1;
4323 pSiS->SiS_Pr->CVBlankEnd = pSiS->SiS_Pr->CVTotal;
4325 if(SiS_compute_vclk(pSiS->SiS_Pr->CDClock, &out_n, &out_dn, &out_div, &out_sbit, &out_scale)) {
4326 pSiS->SiS_Pr->CSR2B = (out_div == 2) ? 0x80 : 0x00;
4327 pSiS->SiS_Pr->CSR2B |= ((out_n - 1) & 0x7f);
4328 pSiS->SiS_Pr->CSR2C = (out_dn - 1) & 0x1f;
4329 pSiS->SiS_Pr->CSR2C |= (((out_scale - 1) & 3) << 5);
4330 pSiS->SiS_Pr->CSR2C |= ((out_sbit & 0x01) << 7);
4332 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sb %d sc %d\n",
4333 pSiS->SiS_Pr->CDClock, out_n, out_dn, out_div, out_sbit, out_scale);
4336 SiSCalcClock(pScrn, pSiS->SiS_Pr->CDClock, 2, vclk);
4337 pSiS->SiS_Pr->CSR2B = (vclk[VLDidx] == 2) ? 0x80 : 0x00;
4338 pSiS->SiS_Pr->CSR2B |= (vclk[Midx] - 1) & 0x7f;
4339 pSiS->SiS_Pr->CSR2C = (vclk[Nidx] - 1) & 0x1f;
4340 if(vclk[Pidx] <= 4) {
4341 /* postscale 1,2,3,4 */
4342 pSiS->SiS_Pr->CSR2C |= ((vclk[Pidx] - 1) & 3) << 5;
4345 pSiS->SiS_Pr->CSR2C |= (((vclk[Pidx] / 2) - 1) & 3) << 5;
4346 pSiS->SiS_Pr->CSR2C |= 0x80;
4349 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sc %d\n",
4350 pSiS->SiS_Pr->CDClock, vclk[Midx], vclk[Nidx], vclk[VLDidx], vclk[Pidx]);
4354 pSiS->SiS_Pr->CSRClock = (pSiS->SiS_Pr->CDClock / 1000) + 1;
4356 SiS_CalcCRRegisters(pSiS->SiS_Pr, depth);
4359 case 8: pSiS->SiS_Pr->CModeFlag |= 0x223b; break;
4360 case 16: pSiS->SiS_Pr->CModeFlag |= 0x227d; break;
4361 case 32: pSiS->SiS_Pr->CModeFlag |= 0x22ff; break;
4365 if(pSiS->SiS_Pr->CFlags & V_DBLSCAN)
4366 pSiS->SiS_Pr->CModeFlag |= DoubleScanMode;
4368 if((pSiS->SiS_Pr->CVDisplay >= 1024) ||
4369 (pSiS->SiS_Pr->CVTotal >= 1024) ||
4370 (pSiS->SiS_Pr->CHDisplay >= 1024))
4371 pSiS->SiS_Pr->CModeFlag |= LineCompareOff;
4373 if(pSiS->SiS_Pr->CFlags & V_CLKDIV2)
4374 pSiS->SiS_Pr->CModeFlag |= HalfDCLK;
4376 pSiS->SiS_Pr->CInfoFlag = 0x0007;
4378 if(pSiS->SiS_Pr->CFlags & V_NHSYNC)
4379 pSiS->SiS_Pr->CInfoFlag |= 0x4000;
4381 if(pSiS->SiS_Pr->CFlags & V_NVSYNC)
4382 pSiS->SiS_Pr->CInfoFlag |= 0x8000;
4384 if(pSiS->SiS_Pr->CFlags & V_INTERLACE)
4385 pSiS->SiS_Pr->CInfoFlag |= InterlaceMode;
4387 pSiS->SiS_Pr->UseCustomMode = TRUE;
4389 xf86DrvMsg(0, X_INFO, "Custom mode %dx%d:\n",
4390 pSiS->SiS_Pr->CHDisplay,pSiS->SiS_Pr->CVDisplay);
4391 xf86DrvMsg(0, X_INFO, "Modeflag %04x, Infoflag %04x\n",
4392 pSiS->SiS_Pr->CModeFlag, pSiS->SiS_Pr->CInfoFlag);
4393 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4394 pSiS->SiS_Pr->CCRT1CRTC[0], pSiS->SiS_Pr->CCRT1CRTC[1],
4395 pSiS->SiS_Pr->CCRT1CRTC[2], pSiS->SiS_Pr->CCRT1CRTC[3],
4396 pSiS->SiS_Pr->CCRT1CRTC[4], pSiS->SiS_Pr->CCRT1CRTC[5],
4397 pSiS->SiS_Pr->CCRT1CRTC[6], pSiS->SiS_Pr->CCRT1CRTC[7]);
4398 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4399 pSiS->SiS_Pr->CCRT1CRTC[8], pSiS->SiS_Pr->CCRT1CRTC[9],
4400 pSiS->SiS_Pr->CCRT1CRTC[10], pSiS->SiS_Pr->CCRT1CRTC[11],
4401 pSiS->SiS_Pr->CCRT1CRTC[12], pSiS->SiS_Pr->CCRT1CRTC[13],
4402 pSiS->SiS_Pr->CCRT1CRTC[14], pSiS->SiS_Pr->CCRT1CRTC[15]);
4403 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", pSiS->SiS_Pr->CCRT1CRTC[16]);
4404 xf86DrvMsg(0, X_INFO, "Clock: 0x%02x, 0x%02x, %d\n",
4405 pSiS->SiS_Pr->CSR2B, pSiS->SiS_Pr->CSR2C, pSiS->SiS_Pr->CSRClock);
4410 /* Build a list of supported modes */
4412 SiSBuildBuiltInModeList(ScrnInfoPtr pScrn, BOOLEAN includelcdmodes, BOOLEAN isfordvi)
4414 SISPtr pSiS = SISPTR(pScrn);
4415 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
4416 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
4417 unsigned char sr_data, cr_data, cr_data2, cr_data3;
4418 unsigned char sr2b, sr2c;
4419 float num, denum, postscalar, divider;
4420 int A, B, C, D, E, F, temp, i, j, k, l, index, vclkindex;
4421 DisplayModePtr new = NULL, current = NULL, first = NULL;
4422 BOOLEAN done = FALSE;
4424 DisplayModePtr backup = NULL;
4427 pSiS->backupmodelist = NULL;
4428 pSiS->AddedPlasmaModes = FALSE;
4430 /* Initialize our pointers */
4431 if(pSiS->VGAEngine == SIS_300_VGA) {
4433 InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4437 } else if(pSiS->VGAEngine == SIS_315_VGA) {
4439 InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4446 while(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag != 0xFFFF) {
4448 index = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRT1CRTC;
4450 /* 0x5a (320x240) is a pure FTSN mode, not DSTN! */
4452 (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID == 0x5a)) {
4457 (pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
4458 (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240) &&
4459 (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID != 0x5a)) {
4464 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4465 memset(new, 0, sizeof(DisplayModeRec));
4466 if(!(new->name = xalloc(10))) {
4470 if(!first) first = new;
4472 current->next = new;
4473 new->prev = current;
4478 sprintf(current->name, "%dx%d", pSiS->SiS_Pr->SiS_RefIndex[i].XRes,
4479 pSiS->SiS_Pr->SiS_RefIndex[i].YRes);
4481 current->status = MODE_OK;
4483 current->type = M_T_DEFAULT;
4485 vclkindex = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRTVCLK;
4486 if(pSiS->VGAEngine == SIS_300_VGA) vclkindex &= 0x3F;
4488 sr2b = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
4489 sr2c = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
4491 divider = (sr2b & 0x80) ? 2.0 : 1.0;
4492 postscalar = (sr2c & 0x80) ?
4493 ( (((sr2c >> 5) & 0x03) == 0x02) ? 6.0 : 8.0) : (((sr2c >> 5) & 0x03) + 1.0);
4494 num = (sr2b & 0x7f) + 1.0;
4495 denum = (sr2c & 0x1f) + 1.0;
4498 xf86DrvMsg(0, X_INFO, "------------\n");
4499 xf86DrvMsg(0, X_INFO, "sr2b: %x sr2c %x div %f ps %f num %f denum %f\n",
4500 sr2b, sr2c, divider, postscalar, num, denum);
4503 current->Clock = (int)(14318 * (divider / postscalar) * (num / denum));
4505 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[14];
4506 /* inSISIDXREG(SISSR, 0x0b, sr_data); */
4508 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[0];
4509 /* inSISIDXREG(SISCR, 0x00, cr_data); */
4511 /* Horizontal total */
4512 HT = (cr_data & 0xff) |
4513 ((unsigned short) (sr_data & 0x03) << 8);
4516 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[1];
4517 /* inSISIDXREG(SISCR, 0x01, cr_data); */
4519 /* Horizontal display enable end */
4520 HDE = (cr_data & 0xff) |
4521 ((unsigned short) (sr_data & 0x0C) << 6);
4522 E = HDE + 1; /* 0x80 0x64 */
4524 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[4];
4525 /* inSISIDXREG(SISCR, 0x04, cr_data); */
4527 /* Horizontal retrace (=sync) start */
4528 HRS = (cr_data & 0xff) |
4529 ((unsigned short) (sr_data & 0xC0) << 2);
4530 F = HRS - E - 3; /* 0x06 0x06 */
4532 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[2];
4533 /* inSISIDXREG(SISCR, 0x02, cr_data); */
4535 /* Horizontal blank start */
4536 HBS = (cr_data & 0xff) |
4537 ((unsigned short) (sr_data & 0x30) << 4);
4539 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[15];
4540 /* inSISIDXREG(SISSR, 0x0c, sr_data); */
4542 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[3];
4543 /* inSISIDXREG(SISCR, 0x03, cr_data); */
4545 cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[5];
4546 /* inSISIDXREG(SISCR, 0x05, cr_data2); */
4548 /* Horizontal blank end */
4549 HBE = (cr_data & 0x1f) |
4550 ((unsigned short) (cr_data2 & 0x80) >> 2) |
4551 ((unsigned short) (sr_data & 0x03) << 6);
4553 /* Horizontal retrace (=sync) end */
4554 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
4556 temp = HBE - ((E - 1) & 255);
4557 B = (temp > 0) ? temp : (temp + 256);
4559 temp = HRE - ((E + F + 3) & 63);
4560 C = (temp > 0) ? temp : (temp + 64); /* 0x0b 0x0b */
4564 if((pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
4565 ((pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 200) ||
4566 (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240))) {
4568 /* Terrible hack, but correct CRTC data for
4569 * these modes only produces a black screen...
4570 * (HRE is 0, leading into a too large C and
4571 * a negative D. The CRT controller does not
4572 * seem to like correcting HRE to 50
4574 current->HDisplay = 320;
4575 current->HSyncStart = 328;
4576 current->HSyncEnd = 376;
4577 current->HTotal = 400;
4581 current->HDisplay = (E * 8);
4582 current->HSyncStart = (E * 8) + (F * 8);
4583 current->HSyncEnd = (E * 8) + (F * 8) + (C * 8);
4584 current->HTotal = (E * 8) + (F * 8) + (C * 8) + (D * 8);
4589 xf86DrvMsg(0, X_INFO,
4590 "H: A %d B %d C %d D %d E %d F %d HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n",
4591 A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE);
4594 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[13];
4595 /* inSISIDXREG(SISSR, 0x0A, sr_data); */
4597 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[6];
4598 /* inSISIDXREG(SISCR, 0x06, cr_data); */
4600 cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[7];
4601 /* inSISIDXREG(SISCR, 0x07, cr_data2); */
4603 /* Vertical total */
4604 VT = (cr_data & 0xFF) |
4605 ((unsigned short) (cr_data2 & 0x01) << 8) |
4606 ((unsigned short)(cr_data2 & 0x20) << 4) |
4607 ((unsigned short) (sr_data & 0x01) << 10);
4610 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[10];
4611 /* inSISIDXREG(SISCR, 0x12, cr_data); */
4613 /* Vertical display enable end */
4614 VDE = (cr_data & 0xff) |
4615 ((unsigned short) (cr_data2 & 0x02) << 7) |
4616 ((unsigned short) (cr_data2 & 0x40) << 3) |
4617 ((unsigned short) (sr_data & 0x02) << 9);
4620 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[8];
4621 /* inSISIDXREG(SISCR, 0x10, cr_data); */
4623 /* Vertical retrace (=sync) start */
4624 VRS = (cr_data & 0xff) |
4625 ((unsigned short) (cr_data2 & 0x04) << 6) |
4626 ((unsigned short) (cr_data2 & 0x80) << 2) |
4627 ((unsigned short) (sr_data & 0x08) << 7);
4630 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[11];
4631 /* inSISIDXREG(SISCR, 0x15, cr_data); */
4633 cr_data3 = (pSiS->SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
4634 /* inSISIDXREG(SISCR, 0x09, cr_data3); */
4636 /* Vertical blank start */
4637 VBS = (cr_data & 0xff) |
4638 ((unsigned short) (cr_data2 & 0x08) << 5) |
4639 ((unsigned short) (cr_data3 & 0x20) << 4) |
4640 ((unsigned short) (sr_data & 0x04) << 8);
4642 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[12];
4643 /* inSISIDXREG(SISCR, 0x16, cr_data); */
4645 /* Vertical blank end */
4646 VBE = (cr_data & 0xff) |
4647 ((unsigned short) (sr_data & 0x10) << 4);
4648 temp = VBE - ((E - 1) & 511);
4649 B = (temp > 0) ? temp : (temp + 512);
4651 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[9];
4652 /* inSISIDXREG(SISCR, 0x11, cr_data); */
4654 /* Vertical retrace (=sync) end */
4655 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
4656 temp = VRE - ((E + F - 1) & 31);
4657 C = (temp > 0) ? temp : (temp + 32);
4661 current->VDisplay = VDE + 1;
4662 current->VSyncStart = VRS + 1;
4663 current->VSyncEnd = ((VRS & ~0x1f) | VRE) + 1;
4664 if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32;
4665 current->VTotal = E + D + C + F;
4668 current->VDisplay = E;
4669 current->VSyncStart = E + D;
4670 current->VSyncEnd = E + D + C;
4671 current->VTotal = E + D + C + F;
4675 xf86DrvMsg(0, X_INFO,
4676 "V: A %d B %d C %d D %d E %d F %d VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n",
4677 A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE);
4680 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x4000)
4681 current->Flags |= V_NHSYNC;
4683 current->Flags |= V_PHSYNC;
4685 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x8000)
4686 current->Flags |= V_NVSYNC;
4688 current->Flags |= V_PVSYNC;
4690 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x0080)
4691 current->Flags |= V_INTERLACE;
4694 while(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
4695 if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
4696 pSiS->SiS_Pr->SiS_RefIndex[i].ModeID) {
4697 if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
4698 current->Flags |= V_DBLSCAN;
4705 if(current->Flags & V_INTERLACE) {
4706 current->VDisplay <<= 1;
4707 current->VSyncStart <<= 1;
4708 current->VSyncEnd <<= 1;
4709 current->VTotal <<= 1;
4710 current->VTotal |= 1;
4712 if(current->Flags & V_DBLSCAN) {
4713 current->Clock >>= 1;
4714 current->VDisplay >>= 1;
4715 current->VSyncStart >>= 1;
4716 current->VSyncEnd >>= 1;
4717 current->VTotal >>= 1;
4721 if((backup = xalloc(sizeof(DisplayModeRec)))) {
4722 if(!pSiS->backupmodelist) pSiS->backupmodelist = backup;
4724 pSiS->backupmodelist->next = backup;
4725 backup->prev = pSiS->backupmodelist;
4727 backup->next = NULL;
4728 backup->HDisplay = current->HDisplay;
4729 backup->HSyncStart = current->HSyncStart;
4730 backup->HSyncEnd = current->HSyncEnd;
4731 backup->HTotal = current->HTotal;
4732 backup->VDisplay = current->VDisplay;
4733 backup->VSyncStart = current->VSyncStart;
4734 backup->VSyncEnd = current->VSyncEnd;
4735 backup->VTotal = current->VTotal;
4736 backup->Flags = current->Flags;
4737 backup->Clock = current->Clock;
4742 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
4743 "Built-in: %s %.2f %d %d %d %d %d %d %d %d\n",
4744 current->name, (float)current->Clock / 1000,
4745 current->HDisplay, current->HSyncStart, current->HSyncEnd, current->HTotal,
4746 current->VDisplay, current->VSyncStart, current->VSyncEnd, current->VTotal);
4748 (void)VBS; (void)HBS; (void)A;
4754 /* Add non-standard LCD modes for panel's detailed timings */
4756 if(!includelcdmodes) return first;
4758 if(pSiS->SiS_Pr->CP_Vendor) {
4759 xf86DrvMsg(0, X_INFO, "Checking database for vendor %x, product %x\n",
4760 pSiS->SiS_Pr->CP_Vendor, pSiS->SiS_Pr->CP_Product);
4764 while((!done) && (SiS_PlasmaTable[i].vendor) && (pSiS->SiS_Pr->CP_Vendor)) {
4766 if(SiS_PlasmaTable[i].vendor == pSiS->SiS_Pr->CP_Vendor) {
4768 for(j=0; j<SiS_PlasmaTable[i].productnum; j++) {
4770 if(SiS_PlasmaTable[i].product[j] == pSiS->SiS_Pr->CP_Product) {
4772 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
4773 "Identified %s panel, adding specific modes\n",
4774 SiS_PlasmaTable[i].plasmaname);
4776 for(k=0; k<SiS_PlasmaTable[i].modenum; k++) {
4779 if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x80)) continue;
4781 if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x40)) continue;
4784 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4786 memset(new, 0, sizeof(DisplayModeRec));
4787 if(!(new->name = xalloc(10))) {
4791 if(!first) first = new;
4793 current->next = new;
4794 new->prev = current;
4799 pSiS->AddedPlasmaModes = TRUE;
4801 l = SiS_PlasmaTable[i].plasmamodes[k] & 0x3f;
4803 sprintf(current->name, "%dx%d", SiS_PlasmaMode[l].HDisplay,
4804 SiS_PlasmaMode[l].VDisplay);
4806 current->status = MODE_OK;
4808 current->type = M_T_BUILTIN;
4810 current->Clock = SiS_PlasmaMode[l].clock;
4811 current->SynthClock = current->Clock;
4813 current->HDisplay = SiS_PlasmaMode[l].HDisplay;
4814 current->HSyncStart = current->HDisplay + SiS_PlasmaMode[l].HFrontPorch;
4815 current->HSyncEnd = current->HSyncStart + SiS_PlasmaMode[l].HSyncWidth;
4816 current->HTotal = SiS_PlasmaMode[l].HTotal;
4818 current->VDisplay = SiS_PlasmaMode[l].VDisplay;
4819 current->VSyncStart = current->VDisplay + SiS_PlasmaMode[l].VFrontPorch;
4820 current->VSyncEnd = current->VSyncStart + SiS_PlasmaMode[l].VSyncWidth;
4821 current->VTotal = SiS_PlasmaMode[l].VTotal;
4823 current->CrtcHDisplay = current->HDisplay;
4824 current->CrtcHBlankStart = current->HSyncStart;
4825 current->CrtcHSyncStart = current->HSyncStart;
4826 current->CrtcHSyncEnd = current->HSyncEnd;
4827 current->CrtcHBlankEnd = current->HSyncEnd;
4828 current->CrtcHTotal = current->HTotal;
4830 current->CrtcVDisplay = current->VDisplay;
4831 current->CrtcVBlankStart = current->VSyncStart;
4832 current->CrtcVSyncStart = current->VSyncStart;
4833 current->CrtcVSyncEnd = current->VSyncEnd;
4834 current->CrtcVBlankEnd = current->VSyncEnd;
4835 current->CrtcVTotal = current->VTotal;
4837 if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_HSYNCP)
4838 current->Flags |= V_PHSYNC;
4840 current->Flags |= V_NHSYNC;
4842 if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_VSYNCP)
4843 current->Flags |= V_PVSYNC;
4845 current->Flags |= V_NVSYNC;
4847 if(current->HDisplay > pSiS->LCDwidth)
4848 pSiS->LCDwidth = pSiS->SiS_Pr->CP_MaxX = current->HDisplay;
4849 if(current->VDisplay > pSiS->LCDheight)
4850 pSiS->LCDheight = pSiS->SiS_Pr->CP_MaxY = current->VDisplay;
4863 if(pSiS->SiS_Pr->CP_HaveCustomData) {
4865 for(i=0; i<7; i++) {
4867 if(pSiS->SiS_Pr->CP_DataValid[i]) {
4869 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4871 memset(new, 0, sizeof(DisplayModeRec));
4872 if(!(new->name = xalloc(10))) {
4876 if(!first) first = new;
4878 current->next = new;
4879 new->prev = current;
4884 sprintf(current->name, "%dx%d", pSiS->SiS_Pr->CP_HDisplay[i],
4885 pSiS->SiS_Pr->CP_VDisplay[i]);
4887 current->status = MODE_OK;
4889 current->type = M_T_BUILTIN;
4891 current->Clock = pSiS->SiS_Pr->CP_Clock[i];
4892 current->SynthClock = current->Clock;
4894 current->HDisplay = pSiS->SiS_Pr->CP_HDisplay[i];
4895 current->HSyncStart = pSiS->SiS_Pr->CP_HSyncStart[i];
4896 current->HSyncEnd = pSiS->SiS_Pr->CP_HSyncEnd[i];
4897 current->HTotal = pSiS->SiS_Pr->CP_HTotal[i];
4899 current->VDisplay = pSiS->SiS_Pr->CP_VDisplay[i];
4900 current->VSyncStart = pSiS->SiS_Pr->CP_VSyncStart[i];
4901 current->VSyncEnd = pSiS->SiS_Pr->CP_VSyncEnd[i];
4902 current->VTotal = pSiS->SiS_Pr->CP_VTotal[i];
4904 current->CrtcHDisplay = current->HDisplay;
4905 current->CrtcHBlankStart = pSiS->SiS_Pr->CP_HBlankStart[i];
4906 current->CrtcHSyncStart = current->HSyncStart;
4907 current->CrtcHSyncEnd = current->HSyncEnd;
4908 current->CrtcHBlankEnd = pSiS->SiS_Pr->CP_HBlankEnd[i];
4909 current->CrtcHTotal = current->HTotal;
4911 current->CrtcVDisplay = current->VDisplay;
4912 current->CrtcVBlankStart = pSiS->SiS_Pr->CP_VBlankStart[i];
4913 current->CrtcVSyncStart = current->VSyncStart;
4914 current->CrtcVSyncEnd = current->VSyncEnd;
4915 current->CrtcVBlankEnd = pSiS->SiS_Pr->CP_VBlankEnd[i];
4916 current->CrtcVTotal = current->VTotal;
4918 if(pSiS->SiS_Pr->CP_SyncValid[i]) {
4919 if(pSiS->SiS_Pr->CP_HSync_P[i])
4920 current->Flags |= V_PHSYNC;
4922 current->Flags |= V_NHSYNC;
4924 if(pSiS->SiS_Pr->CP_VSync_P[i])
4925 current->Flags |= V_PVSYNC;
4927 current->Flags |= V_NVSYNC;
4929 /* No sync data? Use positive sync... */
4930 current->Flags |= V_PHSYNC;
4931 current->Flags |= V_PVSYNC;
4941 /* Build a list of supported modes */
4943 SiSTranslateToVESA(ScrnInfoPtr pScrn, int modenumber)
4945 SISPtr pSiS = SISPTR(pScrn);
4948 /* Initialize our pointers */
4949 if(pSiS->VGAEngine == SIS_300_VGA) {
4951 InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4955 } else if(pSiS->VGAEngine == SIS_315_VGA) {
4957 InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4963 if(modenumber <= 0x13) return modenumber;
4966 while(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID != 0xff) {
4967 if(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID == modenumber) {
4968 return (int)pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_VESAID;
4974 #endif /* Xfree86 */
4978 sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
4979 unsigned char modeno, unsigned char rateindex)
4981 USHORT ModeNo = modeno;
4982 USHORT ModeIdIndex = 0, ClockIndex = 0;
4983 USHORT RefreshRateTableIndex = 0;
4986 if(HwInfo->jChipType < SIS_315H) {
4988 InitTo300Pointer(SiS_Pr, HwInfo);
4994 InitTo310Pointer(SiS_Pr, HwInfo);
5000 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) {;
5001 printk(KERN_ERR "Could not find mode %x\n", ModeNo);
5005 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5006 RefreshRateTableIndex += (rateindex - 1);
5007 ClockIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
5008 if(HwInfo->jChipType < SIS_315H) {
5011 Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
5017 sisfb_gettotalfrommode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
5018 unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex)
5020 USHORT ModeNo = modeno;
5021 USHORT ModeIdIndex = 0, CRT1Index = 0;
5022 USHORT RefreshRateTableIndex = 0;
5023 unsigned char sr_data, cr_data, cr_data2;
5025 if(HwInfo->jChipType < SIS_315H) {
5027 InitTo300Pointer(SiS_Pr, HwInfo);
5033 InitTo310Pointer(SiS_Pr, HwInfo);
5039 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
5041 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5042 RefreshRateTableIndex += (rateindex - 1);
5043 CRT1Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
5045 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
5046 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
5047 *htotal = (((cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8)) + 5) * 8;
5049 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
5050 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
5051 cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
5052 *vtotal = ((cr_data & 0xFF) |
5053 ((unsigned short)(cr_data2 & 0x01) << 8) |
5054 ((unsigned short)(cr_data2 & 0x20) << 4) |
5055 ((unsigned short)(sr_data & 0x01) << 10)) + 2;
5057 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & InterlaceMode)
5064 sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
5065 unsigned char modeno, unsigned char rateindex,
5066 struct fb_var_screeninfo *var)
5068 USHORT ModeNo = modeno;
5069 USHORT ModeIdIndex = 0, index = 0;
5070 USHORT RefreshRateTableIndex = 0;
5071 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
5072 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
5073 unsigned char sr_data, cr_data, cr_data2, cr_data3;
5074 int A, B, C, D, E, F, temp, j;
5076 if(HwInfo->jChipType < SIS_315H) {
5078 InitTo300Pointer(SiS_Pr, HwInfo);
5084 InitTo310Pointer(SiS_Pr, HwInfo);
5090 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return 0;
5092 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5093 RefreshRateTableIndex += (rateindex - 1);
5094 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
5096 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[14];
5098 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[0];
5100 /* Horizontal total */
5101 HT = (cr_data & 0xff) |
5102 ((unsigned short) (sr_data & 0x03) << 8);
5105 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[1];
5107 /* Horizontal display enable end */
5108 HDE = (cr_data & 0xff) |
5109 ((unsigned short) (sr_data & 0x0C) << 6);
5112 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[4];
5114 /* Horizontal retrace (=sync) start */
5115 HRS = (cr_data & 0xff) |
5116 ((unsigned short) (sr_data & 0xC0) << 2);
5119 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[2];
5121 /* Horizontal blank start */
5122 HBS = (cr_data & 0xff) |
5123 ((unsigned short) (sr_data & 0x30) << 4);
5125 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[15];
5127 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[3];
5129 cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[5];
5131 /* Horizontal blank end */
5132 HBE = (cr_data & 0x1f) |
5133 ((unsigned short) (cr_data2 & 0x80) >> 2) |
5134 ((unsigned short) (sr_data & 0x03) << 6);
5136 /* Horizontal retrace (=sync) end */
5137 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
5139 temp = HBE - ((E - 1) & 255);
5140 B = (temp > 0) ? temp : (temp + 256);
5142 temp = HRE - ((E + F + 3) & 63);
5143 C = (temp > 0) ? temp : (temp + 64);
5147 if((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes == 320) &&
5148 ((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 200) ||
5149 (SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 240))) {
5151 /* Terrible hack, but the correct CRTC data for
5152 * these modes only produces a black screen...
5154 var->left_margin = (400 - 376);
5155 var->right_margin = (328 - 320);
5156 var->hsync_len = (376 - 328);
5160 var->left_margin = D * 8;
5161 var->right_margin = F * 8;
5162 var->hsync_len = C * 8;
5166 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[13];
5168 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[6];
5170 cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[7];
5172 /* Vertical total */
5173 VT = (cr_data & 0xFF) |
5174 ((unsigned short) (cr_data2 & 0x01) << 8) |
5175 ((unsigned short)(cr_data2 & 0x20) << 4) |
5176 ((unsigned short) (sr_data & 0x01) << 10);
5179 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[10];
5181 /* Vertical display enable end */
5182 VDE = (cr_data & 0xff) |
5183 ((unsigned short) (cr_data2 & 0x02) << 7) |
5184 ((unsigned short) (cr_data2 & 0x40) << 3) |
5185 ((unsigned short) (sr_data & 0x02) << 9);
5188 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[8];
5190 /* Vertical retrace (=sync) start */
5191 VRS = (cr_data & 0xff) |
5192 ((unsigned short) (cr_data2 & 0x04) << 6) |
5193 ((unsigned short) (cr_data2 & 0x80) << 2) |
5194 ((unsigned short) (sr_data & 0x08) << 7);
5197 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[11];
5199 cr_data3 = (SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
5201 /* Vertical blank start */
5202 VBS = (cr_data & 0xff) |
5203 ((unsigned short) (cr_data2 & 0x08) << 5) |
5204 ((unsigned short) (cr_data3 & 0x20) << 4) |
5205 ((unsigned short) (sr_data & 0x04) << 8);
5207 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[12];
5209 /* Vertical blank end */
5210 VBE = (cr_data & 0xff) |
5211 ((unsigned short) (sr_data & 0x10) << 4);
5212 temp = VBE - ((E - 1) & 511);
5213 B = (temp > 0) ? temp : (temp + 512);
5215 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[9];
5217 /* Vertical retrace (=sync) end */
5218 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
5219 temp = VRE - ((E + F - 1) & 31);
5220 C = (temp > 0) ? temp : (temp + 32);
5224 var->upper_margin = D;
5225 var->lower_margin = F;
5228 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
5229 var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
5231 var->sync |= FB_SYNC_VERT_HIGH_ACT;
5233 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)
5234 var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
5236 var->sync |= FB_SYNC_HOR_HIGH_ACT;
5238 var->vmode = FB_VMODE_NONINTERLACED;
5239 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
5240 var->vmode = FB_VMODE_INTERLACED;
5243 while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
5244 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
5245 SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].ModeID) {
5246 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
5247 var->vmode = FB_VMODE_DOUBLE;
5255 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
5256 #if 0 /* Do this? */
5257 var->upper_margin <<= 1;
5258 var->lower_margin <<= 1;
5259 var->vsync_len <<= 1;
5261 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
5262 var->upper_margin >>= 1;
5263 var->lower_margin >>= 1;
5264 var->vsync_len >>= 1;