drivers/video/tridentfb.c

   1 /*
   2  * Frame buffer driver for Trident Blade and Image series
   3  *
   4  * Copyright 2001,2002 - Jani Monoses   <jani@iv.ro>
   5  *
   6  *
   7  * CREDITS:(in order of appearance)
   8  *      skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
   9  *      Special thanks ;) to Mattia Crivellini <tia@mclink.it>
  10  *      much inspired by the XFree86 4.x Trident driver sources by Alan Hourihane
  11  *      the FreeVGA project
  12  *      Francesco Salvestrini <salvestrini@users.sf.net> XP support,code,suggestions
  13  * TODO:
  14  *      timing value tweaking so it looks good on every monitor in every mode
  15  *      TGUI acceleration
  16  */
  17
  18 #include <linux/config.h>
  19 #include <linux/module.h>
  20 #include <linux/fb.h>
  21 #include <linux/init.h>
  22 #include <linux/pci.h>
  23
  24 #include <linux/delay.h>
  25 #include <video/trident.h>
  26
  27 #define VERSION         "0.7.8-NEWAPI"
  28
  29 struct tridentfb_par {
  30         int vclk;               //in MHz
  31         unsigned long io_virt;  //iospace virtual memory address
  32 };
  33
  34 unsigned char eng_oper;         //engine operation...
  35 static struct fb_ops tridentfb_ops;
  36
  37 static struct tridentfb_par default_par;
  38
  39 /* FIXME:kmalloc these 3 instead */
  40 static struct fb_info fb_info;
  41 static int pseudo_pal[16];
  42
  43
  44 static struct fb_var_screeninfo default_var;
  45
  46 static struct fb_fix_screeninfo tridentfb_fix = {
  47         .id = "Trident",
  48         .type = FB_TYPE_PACKED_PIXELS,
  49         .ypanstep = 1,
  50         .visual = FB_VISUAL_PSEUDOCOLOR,
  51         .accel = FB_ACCEL_NONE,
  52 };
  53
  54 static int chip_id;
  55
  56 static int defaultaccel;
  57 static int displaytype;
  58
  59
  60 /* defaults which are normally overriden by user values */
  61
  62 /* video mode */
  63 static char * mode = "640x480";
  64 static int bpp = 8;
  65
  66 static int noaccel;
  67
  68 static int center;
  69 static int stretch;
  70
  71 static int fp;
  72 static int crt;
  73
  74 static int memsize;
  75 static int memdiff;
  76 static int nativex;
  77
  78
  79 MODULE_PARM(mode,"s");
  80 MODULE_PARM(bpp,"i");
  81 MODULE_PARM(center,"i");
  82 MODULE_PARM(stretch,"i");
  83 MODULE_PARM(noaccel,"i");
  84 MODULE_PARM(memsize,"i");
  85 MODULE_PARM(memdiff,"i");
  86 MODULE_PARM(nativex,"i");
  87 MODULE_PARM(fp,"i");
  88 MODULE_PARM(crt,"i");
  89
  90
  91 static int chip3D;
  92 static int chipcyber;
  93
  94 int is3Dchip(int id)
  95 {
  96         return  ((id == BLADE3D) || (id == CYBERBLADEE4) ||
  97                  (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
  98                  (id == CYBER9397) || (id == CYBER9397DVD) ||
  99                  (id == CYBER9520) || (id == CYBER9525DVD) ||
 100                  (id == IMAGE975) || (id == IMAGE985) ||
 101                  (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
 102                  (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
 103                  (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
 104                  (id == CYBERBLADEXPAi1));
 105 }
 106
 107 int iscyber(int id)
 108 {
 109         switch (id) {
 110                 case CYBER9388:
 111                 case CYBER9382:
 112                 case CYBER9385:
 113                 case CYBER9397:
 114                 case CYBER9397DVD:
 115                 case CYBER9520:
 116                 case CYBER9525DVD:
 117                 case CYBERBLADEE4:
 118                 case CYBERBLADEi7D:
 119                 case CYBERBLADEi1:
 120                 case CYBERBLADEi1D:
 121                 case CYBERBLADEAi1:
 122                 case CYBERBLADEAi1D:
 123                 case CYBERBLADEXPAi1:
 124                         return 1;
 125
 126                 case CYBER9320:
 127                 case TGUI9660:
 128                 case IMAGE975:
 129                 case IMAGE985:
 130                 case BLADE3D:
 131                 case CYBERBLADEi7: /* VIA MPV4 integrated version */
 132
 133                 default:
 134                         /* case CYBERBLDAEXPm8:  Strange */
 135                         /* case CYBERBLDAEXPm16: Strange */
 136                         return 0;
 137         }
 138 }
 139
 140 #define CRT 0x3D0               //CRTC registers offset for color display
 141
 142 #ifndef TRIDENT_MMIO
 143         #define TRIDENT_MMIO 1
 144 #endif
 145
 146 #if TRIDENT_MMIO
 147         #define t_outb(val,reg) writeb(val,((struct tridentfb_par *)(fb_info.par))->io_virt + reg)
 148         #define t_inb(reg)      readb(((struct tridentfb_par*)(fb_info.par))->io_virt + reg)
 149 #else
 150         #define t_outb(val,reg) outb(val,reg)
 151         #define t_inb(reg) inb(reg)
 152 #endif
 153
 154
 155 static struct accel_switch {
 156         void (*init_accel)(int,int);
 157         void (*wait_engine)(void);
 158         void (*fill_rect)(__u32,__u32,__u32,__u32,__u32,__u32);
 159         void (*copy_rect)(__u32,__u32,__u32,__u32,__u32,__u32);
 160 } *acc;
 161
 162 #define writemmr(r,v)   writel(v, ((struct tridentfb_par *)fb_info.par)->io_virt + r)
 163 #define readmmr(r)      readl(((struct tridentfb_par *)fb_info.par)->io_virt + r)
 164
 165
 166
 167 /*
 168  * Blade specific acceleration.
 169  */
 170
 171 #define point(x,y) ((y)<<16|(x))
 172 #define STA     0x2120
 173 #define CMD     0x2144
 174 #define ROP     0x2148
 175 #define CLR     0x2160
 176 #define SR1     0x2100
 177 #define SR2     0x2104
 178 #define DR1     0x2108
 179 #define DR2     0x210C
 180
 181 #define ROP_S   0xCC
 182
 183 static void blade_init_accel(int pitch,int bpp)
 184 {
 185         int v1 = (pitch>>3)<<20;
 186         int tmp = 0,v2;
 187         switch (bpp) {
 188                 case 8:tmp = 0;break;
 189                 case 15:tmp = 5;break;
 190                 case 16:tmp = 1;break;
 191                 case 24:
 192                 case 32:tmp = 2;break;
 193         }
 194         v2 = v1 | (tmp<<29);
 195         writemmr(0x21C0,v2);
 196         writemmr(0x21C4,v2);
 197         writemmr(0x21B8,v2);
 198         writemmr(0x21BC,v2);
 199         writemmr(0x21D0,v1);
 200         writemmr(0x21D4,v1);
 201         writemmr(0x21C8,v1);
 202         writemmr(0x21CC,v1);
 203         writemmr(0x216C,0);
 204 }
 205
 206 static void blade_wait_engine(void)
 207 {
 208         while(readmmr(STA) & 0xFA800000);
 209 }
 210
 211 static void blade_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop)
 212 {
 213         writemmr(CLR,c);
 214         writemmr(ROP,rop ? 0x66:ROP_S);
 215         writemmr(CMD,0x20000000|1<<19|1<<4|2<<2);
 216
 217         writemmr(DR1,point(x,y));
 218         writemmr(DR2,point(x+w-1,y+h-1));
 219 }
 220
 221 static void blade_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h)
 222 {
 223         __u32 s1,s2,d1,d2;
 224         int direction = 2;
 225         s1 = point(x1,y1);
 226         s2 = point(x1+w-1,y1+h-1);
 227         d1 = point(x2,y2);
 228         d2 = point(x2+w-1,y2+h-1);
 229
 230         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 231                         direction = 0;
 232
 233
 234         writemmr(ROP,ROP_S);
 235         writemmr(CMD,0xE0000000|1<<19|1<<4|1<<2|direction);
 236
 237         writemmr(SR1,direction?s2:s1);
 238         writemmr(SR2,direction?s1:s2);
 239         writemmr(DR1,direction?d2:d1);
 240         writemmr(DR2,direction?d1:d2);
 241 }
 242
 243 static struct accel_switch accel_blade = {
 244         blade_init_accel,
 245         blade_wait_engine,
 246         blade_fill_rect,
 247         blade_copy_rect,
 248 };
 249
 250
 251 /*
 252  * BladeXP specific acceleration functions
 253  */
 254
 255 #define ROP_P 0xF0
 256 #define masked_point(x,y) ((y & 0xffff)<<16|(x & 0xffff))
 257
 258 static void xp_init_accel(int pitch,int bpp)
 259 {
 260         int tmp = 0,v1;
 261         unsigned char x = 0;
 262
 263         switch (bpp) {
 264                 case 8:  x = 0; break;
 265                 case 16: x = 1; break;
 266                 case 24: x = 3; break;
 267                 case 32: x = 2; break;
 268         }
 269
 270         switch (pitch << (bpp >> 3)) {
 271                 case 8192:
 272                 case 512:  x |= 0x00; break;
 273                 case 1024: x |= 0x04; break;
 274                 case 2048: x |= 0x08; break;
 275                 case 4096: x |= 0x0C; break;
 276         }
 277
 278         t_outb(x,0x2125);
 279
 280         eng_oper = x | 0x40;
 281
 282         switch (bpp) {
 283                 case 8:  tmp = 18; break;
 284                 case 15:
 285                 case 16: tmp = 19; break;
 286                 case 24:
 287                 case 32: tmp = 20; break;
 288         }
 289
 290         v1 = pitch << tmp;
 291
 292         writemmr(0x2154,v1);
 293         writemmr(0x2150,v1);
 294         t_outb(3,0x2126);
 295 }
 296
 297 static void xp_wait_engine(void)
 298 {
 299         int busy;
 300         int count, timeout;
 301
 302         count = 0;
 303         timeout = 0;
 304         for (;;) {
 305                 busy = t_inb(STA) & 0x80;
 306                 if (busy != 0x80)
 307                         return;
 308                 count++;
 309                 if (count == 10000000) {
 310                         /* Timeout */
 311                         count = 9990000;
 312                         timeout++;
 313                         if (timeout == 8) {
 314                                 /* Reset engine */
 315                                 t_outb(0x00, 0x2120);
 316                                 return;
 317                         }
 318                 }
 319         }
 320 }
 321
 322 static void xp_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop)
 323 {
 324         writemmr(0x2127,ROP_P);
 325         writemmr(0x2158,c);
 326         writemmr(0x2128,0x4000);
 327         writemmr(0x2140,masked_point(h,w));
 328         writemmr(0x2138,masked_point(y,x));
 329         t_outb(0x01,0x2124);
 330         t_outb(eng_oper,0x2125);
 331 }
 332
 333 static void xp_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h)
 334 {
 335         int direction;
 336         __u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
 337
 338         direction = 0x0004;
 339
 340         if ((x1 < x2) && (y1 == y2)) {
 341                 direction |= 0x0200;
 342                 x1_tmp = x1 + w - 1;
 343                 x2_tmp = x2 + w - 1;
 344         } else {
 345                 x1_tmp = x1;
 346                 x2_tmp = x2;
 347         }
 348
 349         if (y1 < y2) {
 350                 direction |= 0x0100;
 351                 y1_tmp = y1 + h - 1;
 352                 y2_tmp = y2 + h - 1;
 353         } else {
 354                 y1_tmp = y1;
 355                 y2_tmp = y2;
 356         }
 357
 358         writemmr(0x2128,direction);
 359         t_outb(ROP_S,0x2127);
 360         writemmr(0x213C,masked_point(y1_tmp,x1_tmp));
 361         writemmr(0x2138,masked_point(y2_tmp,x2_tmp));
 362         writemmr(0x2140,masked_point(h,w));
 363         t_outb(0x01,0x2124);
 364 }
 365
 366 static struct accel_switch accel_xp = {
 367         xp_init_accel,
 368         xp_wait_engine,
 369         xp_fill_rect,
 370         xp_copy_rect,
 371 };
 372
 373
 374 /*
 375  * Image specific acceleration functions
 376  */
 377 static void image_init_accel(int pitch,int bpp)
 378 {
 379         int tmp = 0;
 380         switch (bpp) {
 381                 case 8:tmp = 0;break;
 382                 case 15:tmp = 5;break;
 383                 case 16:tmp = 1;break;
 384                 case 24:
 385                 case 32:tmp = 2;break;
 386         }
 387         writemmr(0x2120, 0xF0000000);
 388         writemmr(0x2120, 0x40000000|tmp);
 389         writemmr(0x2120, 0x80000000);
 390         writemmr(0x2144, 0x00000000);
 391         writemmr(0x2148, 0x00000000);
 392         writemmr(0x2150, 0x00000000);
 393         writemmr(0x2154, 0x00000000);
 394         writemmr(0x2120, 0x60000000|(pitch<<16) |pitch);
 395         writemmr(0x216C, 0x00000000);
 396         writemmr(0x2170, 0x00000000);
 397         writemmr(0x217C, 0x00000000);
 398         writemmr(0x2120, 0x10000000);
 399         writemmr(0x2130, (2047 << 16) | 2047);
 400 }
 401
 402 static void image_wait_engine(void)
 403 {
 404         while(readmmr(0x2164) & 0xF0000000);
 405 }
 406
 407 static void image_fill_rect(__u32 x, __u32 y, __u32 w, __u32 h, __u32 c, __u32 rop)
 408 {
 409         writemmr(0x2120,0x80000000);
 410         writemmr(0x2120,0x90000000|ROP_S);
 411
 412         writemmr(0x2144,c);
 413
 414         writemmr(DR1,point(x,y));
 415         writemmr(DR2,point(x+w-1,y+h-1));
 416
 417         writemmr(0x2124,0x80000000|3<<22|1<<10|1<<9);
 418 }
 419
 420 static void image_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h)
 421 {
 422         __u32 s1,s2,d1,d2;
 423         int direction = 2;
 424         s1 = point(x1,y1);
 425         s2 = point(x1+w-1,y1+h-1);
 426         d1 = point(x2,y2);
 427         d2 = point(x2+w-1,y2+h-1);
 428
 429         if ((y1 > y2) || ((y1 == y2) && (x1 >x2)))
 430                         direction = 0;
 431
 432         writemmr(0x2120,0x80000000);
 433         writemmr(0x2120,0x90000000|ROP_S);
 434
 435         writemmr(SR1,direction?s2:s1);
 436         writemmr(SR2,direction?s1:s2);
 437         writemmr(DR1,direction?d2:d1);
 438         writemmr(DR2,direction?d1:d2);
 439         writemmr(0x2124,0x80000000|1<<22|1<<10|1<<7|direction);
 440 }
 441
 442
 443 static struct accel_switch accel_image = {
 444         image_init_accel,
 445         image_wait_engine,
 446         image_fill_rect,
 447         image_copy_rect,
 448 };
 449
 450 /*
 451  * Accel functions called by the upper layers
 452  */
 453 #ifdef CONFIG_FB_TRIDENT_ACCEL
 454 static void tridentfb_fillrect(struct fb_info * info, const struct fb_fillrect *fr)
 455 {
 456         int bpp = info->var.bits_per_pixel;
 457         int col;
 458
 459         switch (bpp) {
 460                 default:
 461                 case 8: col = fr->color;
 462                         break;
 463                 case 16: col = ((u16 *)(info->pseudo_palette))[fr->color];
 464                          break;
 465                 case 32: col = ((u32 *)(info->pseudo_palette))[fr->color];
 466                          break;
 467         }
 468
 469         acc->fill_rect(fr->dx, fr->dy, fr->width, fr->height, col, fr->rop);
 470         acc->wait_engine();
 471 }
 472 static void tridentfb_copyarea(struct fb_info *info, const struct fb_copyarea *ca)
 473 {
 474         acc->copy_rect(ca->sx,ca->sy,ca->dx,ca->dy,ca->width,ca->height);
 475         acc->wait_engine();
 476 }
 477 #else /* !CONFIG_FB_TRIDENT_ACCEL */
 478 #define tridentfb_fillrect cfb_fillrect
 479 #define tridentfb_copyarea cfb_copyarea
 480 #endif /* CONFIG_FB_TRIDENT_ACCEL */
 481
 482
 483 /*
 484  * Hardware access functions
 485  */
 486
 487 static inline unsigned char read3X4(int reg)
 488 {
 489         struct tridentfb_par * par = (struct tridentfb_par *)fb_info.par;
 490         writeb(reg, par->io_virt + CRT + 4);
 491         return readb( par->io_virt + CRT + 5);
 492 }
 493
 494 static inline void write3X4(int reg, unsigned char val)
 495 {
 496         struct tridentfb_par * par = (struct tridentfb_par *)fb_info.par;
 497         writeb(reg, par->io_virt + CRT + 4);
 498         writeb(val, par->io_virt + CRT + 5);
 499 }
 500
 501 static inline unsigned char read3C4(int reg)
 502 {
 503         t_outb(reg, 0x3C4);
 504         return t_inb(0x3C5);
 505 }
 506
 507 static inline void write3C4(int reg, unsigned char val)
 508 {
 509         t_outb(reg, 0x3C4);
 510         t_outb(val, 0x3C5);
 511 }
 512
 513 static inline unsigned char read3CE(int reg)
 514 {
 515         t_outb(reg, 0x3CE);
 516         return t_inb(0x3CF);
 517 }
 518
 519 static inline void writeAttr(int reg, unsigned char val)
 520 {
 521         readb(((struct tridentfb_par *)fb_info.par)->io_virt + CRT + 0x0A);     //flip-flop to index
 522         t_outb(reg, 0x3C0);
 523         t_outb(val, 0x3C0);
 524 }
 525
 526 static inline unsigned char readAttr(int reg)
 527 {
 528         readb(((struct tridentfb_par *)fb_info.par)->io_virt + CRT + 0x0A);     //flip-flop to index
 529         t_outb(reg, 0x3C0);
 530         return t_inb(0x3C1);
 531 }
 532
 533 static inline void write3CE(int reg, unsigned char val)
 534 {
 535         t_outb(reg, 0x3CE);
 536         t_outb(val, 0x3CF);
 537 }
 538
 539 static inline void enable_mmio(void)
 540 {
 541         /* Goto New Mode */
 542         outb(0x0B, 0x3C4);
 543         inb(0x3C5);
 544
 545         /* Unprotect registers */
 546         outb(NewMode1, 0x3C4);
 547         outb(0x80, 0x3C5);
 548
 549         /* Enable MMIO */
 550         outb(PCIReg, 0x3D4);
 551         outb(inb(0x3D5) | 0x01, 0x3D5);
 552 }
 553
 554
 555 #define crtc_unlock()   write3X4(CRTVSyncEnd, read3X4(CRTVSyncEnd) & 0x7F)
 556
 557 /*  Return flat panel's maximum x resolution */
 558 static int __init get_nativex(void)
 559 {
 560         int x,y,tmp;
 561
 562         if (nativex)
 563                 return nativex;
 564
 565         tmp = (read3CE(VertStretch) >> 4) & 3;
 566
 567         switch (tmp) {
 568                 case 0: x = 1280; y = 1024; break;
 569                 case 2: x = 1024; y = 768;  break;
 570                 case 3: x = 800;  y = 600;  break;
 571                 case 4: x = 1400; y = 1050; break;
 572                 case 1:
 573                 default:x = 640;  y = 480;  break;
 574         }
 575
 576         output("%dx%d flat panel found\n", x, y);
 577         return x;
 578 }
 579
 580 /* Set pitch */
 581 static void set_lwidth(int width)
 582 {
 583         write3X4(Offset, width & 0xFF);
 584         write3X4(AddColReg, (read3X4(AddColReg) & 0xCF) | ((width & 0x300) >>4));
 585 }
 586
 587 /* For resolutions smaller than FP resolution stretch */
 588 static void screen_stretch(void)
 589 {
 590         if (chip_id != CYBERBLADEXPAi1)
 591                 write3CE(BiosReg,0);
 592         else
 593                 write3CE(BiosReg,8);
 594         write3CE(VertStretch,(read3CE(VertStretch) & 0x7C) | 1);
 595         write3CE(HorStretch,(read3CE(HorStretch) & 0x7C) | 1);
 596 }
 597
 598 /* For resolutions smaller than FP resolution center */
 599 static void screen_center(void)
 600 {
 601         write3CE(VertStretch,(read3CE(VertStretch) & 0x7C) | 0x80);
 602         write3CE(HorStretch,(read3CE(HorStretch) & 0x7C) | 0x80);
 603 }
 604
 605 /* Address of first shown pixel in display memory */
 606 static void set_screen_start(int base)
 607 {
 608         write3X4(StartAddrLow, base & 0xFF);
 609         write3X4(StartAddrHigh, (base & 0xFF00) >> 8);
 610         write3X4(CRTCModuleTest, (read3X4(CRTCModuleTest) & 0xDF) | ((base & 0x10000) >> 11));
 611         write3X4(CRTHiOrd, (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17));
 612 }
 613
 614 /* Use 20.12 fixed-point for NTSC value and frequency calculation */
 615 #define calc_freq(n,m,k)  ( ((unsigned long)0xE517 * (n+8) / ((m+2)*(1<<k))) >> 12 )
 616
 617 /* Set dotclock frequency */
 618 static void set_vclk(int freq)
 619 {
 620         int m,n,k;
 621         int f,fi,d,di;
 622         unsigned char lo=0,hi=0;
 623
 624         d = 20;
 625         for(k = 2;k>=0;k--)
 626         for(m = 0;m<63;m++)
 627         for(n = 0;n<128;n++) {
 628                 fi = calc_freq(n,m,k);
 629                 if ((di = abs(fi - freq)) < d) {
 630                         d = di;
 631                         f = fi;
 632                         lo = n;
 633                         hi = (k<<6) | m;
 634                 }
 635         }
 636         if (chip3D) {
 637                 write3C4(ClockHigh,hi);
 638                 write3C4(ClockLow,lo);
 639         } else {
 640                 outb(lo,0x43C8);
 641                 outb(hi,0x43C9);
 642         }
 643         debug("VCLK = %X %X\n",hi,lo);
 644 }
 645
 646 /* Set number of lines for flat panels*/
 647 static void set_number_of_lines(int lines)
 648 {
 649         int tmp = read3CE(CyberEnhance) & 0x8F;
 650         if (lines > 1024)
 651                 tmp |= 0x50;
 652         else if (lines > 768)
 653                 tmp |= 0x30;
 654         else if (lines > 600)
 655                 tmp |= 0x20;
 656         else if (lines > 480)
 657                 tmp |= 0x10;
 658         write3CE(CyberEnhance, tmp);
 659 }
 660
 661 /*
 662  * If we see that FP is active we assume we have one.
 663  * Otherwise we have a CRT display.User can override.
 664  */
 665 static unsigned int __init get_displaytype(void)
 666 {
 667         if (fp)
 668                 return DISPLAY_FP;
 669         if (crt || !chipcyber)
 670                 return DISPLAY_CRT;
 671         return (read3CE(FPConfig) & 0x10)?DISPLAY_FP:DISPLAY_CRT;
 672 }
 673
 674 /* Try detecting the video memory size */
 675 static unsigned int __init get_memsize(void)
 676 {
 677         unsigned char tmp, tmp2;
 678         unsigned int k;
 679
 680         /* If memory size provided by user */
 681         if (memsize)
 682                 k = memsize * Kb;
 683         else
 684         switch (chip_id) {
 685                 case CYBER9525DVD:    k = 2560 * Kb; break;
 686                 default:
 687                         tmp = read3X4(SPR) & 0x0F;
 688                         switch (tmp) {
 689
 690                                 case 0x01: k = 512;     break;
 691                                 case 0x02: k = 6 * Mb;  break; /* XP */
 692                                 case 0x03: k = 1 * Mb;  break;
 693                                 case 0x04: k = 8 * Mb;  break;
 694                                 case 0x06: k = 10 * Mb; break; /* XP */
 695                                 case 0x07: k = 2 * Mb;  break;
 696                                 case 0x08: k = 12 * Mb; break; /* XP */
 697                                 case 0x0A: k = 14 * Mb; break; /* XP */
 698                                 case 0x0C: k = 16 * Mb; break; /* XP */
 699                                 case 0x0E:                     /* XP */
 700
 701                                         tmp2 = read3C4(0xC1);
 702                                         switch (tmp2) {
 703                                                 case 0x00: k = 20 * Mb; break;
 704                                                 case 0x01: k = 24 * Mb; break;
 705                                                 case 0x10: k = 28 * Mb; break;
 706                                                 case 0x11: k = 32 * Mb; break;
 707                                                 default:   k = 1 * Mb;  break;
 708                                         }
 709                                 break;
 710
 711                                 case 0x0F: k = 4 * Mb; break;
 712                                 default:   k = 1 * Mb;
 713                         }
 714         }
 715
 716         k -= memdiff * Kb;
 717         output("framebuffer size = %d Kb\n", k/Kb);
 718         return k;
 719 }
 720
 721 /* See if we can handle the video mode described in var */
 722 static int tridentfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 723 {
 724         int bpp = var->bits_per_pixel;
 725         debug("enter\n");
 726
 727         /* check color depth */
 728         if (bpp == 24 )
 729                 bpp = var->bits_per_pixel = 32;
 730         /* check whether resolution fits on panel and in memory*/
 731         if (flatpanel && nativex && var->xres > nativex)
 732                 return -EINVAL;
 733         if (var->xres * var->yres_virtual * bpp/8 > info->fix.smem_len)
 734                 return -EINVAL;
 735
 736         switch (bpp) {
 737                 case 8:
 738                         var->red.offset = 0;
 739                         var->green.offset = 0;
 740                         var->blue.offset = 0;
 741                         var->red.length = 6;
 742                         var->green.length = 6;
 743                         var->blue.length = 6;
 744                         break;
 745                 case 16:
 746                         var->red.offset = 11;
 747                         var->green.offset = 5;
 748                         var->blue.offset = 0;
 749                         var->red.length = 5;
 750                         var->green.length = 6;
 751                         var->blue.length = 5;
 752                         break;
 753                 case 32:
 754                         var->red.offset = 16;
 755                         var->green.offset = 8;
 756                         var->blue.offset = 0;
 757                         var->red.length = 8;
 758                         var->green.length = 8;
 759                         var->blue.length = 8;
 760                         break;
 761                 default:
 762                         return -EINVAL;
 763         }
 764         debug("exit\n");
 765
 766         return 0;
 767
 768 }
 769 /* Pan the display */
 770 static int tridentfb_pan_display(struct fb_var_screeninfo *var,
 771                                    struct fb_info *info)
 772 {
 773         unsigned int offset;
 774
 775         debug("enter\n");
 776         offset = (var->xoffset + (var->yoffset * var->xres))
 777                         * var->bits_per_pixel/32;
 778         info->var.xoffset = var->xoffset;
 779         info->var.yoffset = var->yoffset;
 780         set_screen_start(offset);
 781         debug("exit\n");
 782         return 0;
 783 }
 784
 785 #define shadowmode_on()  write3CE(CyberControl,read3CE(CyberControl) | 0x81)
 786 #define shadowmode_off() write3CE(CyberControl,read3CE(CyberControl) & 0x7E)
 787
 788 /* Set the hardware to the requested video mode */
 789 static int tridentfb_set_par(struct fb_info *info)
 790 {
 791         struct tridentfb_par * par = (struct tridentfb_par *)(info->par);
 792         u32     htotal,hdispend,hsyncstart,hsyncend,hblankstart,hblankend,
 793                 vtotal,vdispend,vsyncstart,vsyncend,vblankstart,vblankend;
 794         struct fb_var_screeninfo *var = &info->var;
 795         int bpp = var->bits_per_pixel;
 796         unsigned char tmp;
 797         debug("enter\n");
 798         htotal = (var->xres + var->left_margin + var->right_margin + var->hsync_len)/8 - 10;
 799         hdispend = var->xres/8 - 1;
 800         hsyncstart = (var->xres + var->right_margin)/8;
 801         hsyncend = var->hsync_len/8;
 802         hblankstart = hdispend + 1;
 803         hblankend = htotal + 5;
 804
 805         vtotal = var->yres + var->upper_margin + var->lower_margin + var->vsync_len - 2;
 806         vdispend = var->yres - 1;
 807         vsyncstart = var->yres + var->lower_margin;
 808         vsyncend = var->vsync_len;
 809         vblankstart = var->yres;
 810         vblankend = vtotal + 2;
 811
 812         enable_mmio();
 813         crtc_unlock();
 814         write3CE(CyberControl,8);
 815
 816         if (flatpanel && var->xres < nativex) {
 817                 /*
 818                  * on flat panels with native size larger
 819                  * than requested resolution decide whether
 820                  * we stretch or center
 821                  */
 822                 t_outb(0xEB,0x3C2);
 823
 824                 shadowmode_on();
 825
 826                 if (center)
 827                         screen_center();
 828                 else if (stretch)
 829                         screen_stretch();
 830
 831         } else {
 832                 t_outb(0x2B,0x3C2);
 833                 write3CE(CyberControl,8);
 834         }
 835
 836         /* vertical timing values */
 837         write3X4(CRTVTotal, vtotal & 0xFF);
 838         write3X4(CRTVDispEnd, vdispend & 0xFF);
 839         write3X4(CRTVSyncStart, vsyncstart & 0xFF);
 840         write3X4(CRTVSyncEnd, (vsyncend & 0x0F));
 841         write3X4(CRTVBlankStart, vblankstart & 0xFF);
 842         write3X4(CRTVBlankEnd, 0/*p->vblankend & 0xFF*/);
 843
 844         /* horizontal timing values */
 845         write3X4(CRTHTotal, htotal & 0xFF);
 846         write3X4(CRTHDispEnd, hdispend & 0xFF);
 847         write3X4(CRTHSyncStart, hsyncstart & 0xFF);
 848         write3X4(CRTHSyncEnd, (hsyncend & 0x1F) | ((hblankend & 0x20)<<2));
 849         write3X4(CRTHBlankStart, hblankstart & 0xFF);
 850         write3X4(CRTHBlankEnd, 0/*(p->hblankend & 0x1F)*/);
 851
 852         /* higher bits of vertical timing values */
 853         tmp = 0x10;
 854         if (vtotal & 0x100) tmp |= 0x01;
 855         if (vdispend & 0x100) tmp |= 0x02;
 856         if (vsyncstart & 0x100) tmp |= 0x04;
 857         if (vblankstart & 0x100) tmp |= 0x08;
 858
 859         if (vtotal & 0x200) tmp |= 0x20;
 860         if (vdispend & 0x200) tmp |= 0x40;
 861         if (vsyncstart & 0x200) tmp |= 0x80;
 862         write3X4(CRTOverflow, tmp);
 863
 864         tmp = read3X4(CRTHiOrd) | 0x08; //line compare bit 10
 865         if (vtotal & 0x400) tmp |= 0x80;
 866         if (vblankstart & 0x400) tmp |= 0x40;
 867         if (vsyncstart & 0x400) tmp |= 0x20;
 868         if (vdispend & 0x400) tmp |= 0x10;
 869         write3X4(CRTHiOrd, tmp);
 870
 871         tmp = 0;
 872         if (htotal & 0x800) tmp |= 0x800 >> 11;
 873         if (hblankstart & 0x800) tmp |= 0x800 >> 7;
 874         write3X4(HorizOverflow, tmp);
 875
 876         tmp = 0x40;
 877         if (vblankstart & 0x200) tmp |= 0x20;
 878 //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80;  //double scan for 200 line modes
 879         write3X4(CRTMaxScanLine, tmp);
 880
 881         write3X4(CRTLineCompare,0xFF);
 882         write3X4(CRTPRowScan,0);
 883         write3X4(CRTModeControl,0xC3);
 884
 885         write3X4(LinearAddReg,0x20);    //enable linear addressing
 886
 887         tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84:0x80;
 888         write3X4(CRTCModuleTest,tmp);   //enable access extended memory
 889
 890         write3X4(GraphEngReg, 0x80);    //enable GE for text acceleration
 891
 892 //      if (info->var.accel_flags & FB_ACCELF_TEXT)
 893 //FIXME         acc->init_accel(info->var.xres,bpp);
 894
 895         switch (bpp) {
 896                 case 8:  tmp = 0x00; break;
 897                 case 16: tmp = 0x05; break;
 898                 case 24: tmp = 0x29; break;
 899                 case 32: tmp = 0x09;
 900         }
 901
 902         write3X4(PixelBusReg, tmp);
 903
 904         tmp = 0x10;
 905         if (chipcyber)
 906             tmp |= 0x20;
 907         write3X4(DRAMControl, tmp);     //both IO,linear enable
 908
 909         write3X4(InterfaceSel, read3X4(InterfaceSel) | 0x40);
 910         write3X4(Performance,0x20);
 911         write3X4(PCIReg,0x07);          //MMIO & PCI read and write burst enable
 912
 913         /* convert from picoseconds to MHz */
 914         par->vclk = 1000000/info->var.pixclock;
 915         if (bpp == 32)
 916                 par->vclk *=2;
 917         set_vclk(par->vclk);
 918
 919         write3C4(0,3);
 920         write3C4(1,1);          //set char clock 8 dots wide
 921         write3C4(2,0x0F);       //enable 4 maps because needed in chain4 mode
 922         write3C4(3,0);
 923         write3C4(4,0x0E);       //memory mode enable bitmaps ??
 924
 925         write3CE(MiscExtFunc,(bpp==32)?0x1A:0x12);      //divide clock by 2 if 32bpp
 926                                                         //chain4 mode display and CPU path
 927         write3CE(0x5,0x40);     //no CGA compat,allow 256 col
 928         write3CE(0x6,0x05);     //graphics mode
 929         write3CE(0x7,0x0F);     //planes?
 930
 931         if (chip_id == CYBERBLADEXPAi1) {
 932                 /* This fixes snow-effect in 32 bpp */
 933                 write3X4(CRTHSyncStart,0x84);
 934         }
 935
 936         writeAttr(0x10,0x41);   //graphics mode and support 256 color modes
 937         writeAttr(0x12,0x0F);   //planes
 938         writeAttr(0x13,0);      //horizontal pel panning
 939
 940         //colors
 941         for(tmp = 0;tmp < 0x10;tmp++)
 942                 writeAttr(tmp,tmp);
 943         readb(par->io_virt + CRT + 0x0A);       //flip-flop to index
 944         t_outb(0x20, 0x3C0);                    //enable attr
 945
 946         switch (bpp) {
 947                 case 8: tmp = 0;break;          //256 colors
 948                 case 15: tmp = 0x10;break;
 949                 case 16: tmp = 0x30;break;      //hicolor
 950                 case 24:                        //truecolor
 951                 case 32: tmp = 0xD0;break;
 952         }
 953
 954         t_inb(0x3C8);
 955         t_inb(0x3C6);
 956         t_inb(0x3C6);
 957         t_inb(0x3C6);
 958         t_inb(0x3C6);
 959         t_outb(tmp,0x3C6);
 960         t_inb(0x3C8);
 961
 962         if (flatpanel)
 963                 set_number_of_lines(info->var.yres);
 964         set_lwidth(info->var.xres * bpp/(4*16));
 965         info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
 966         info->fix.line_length = info->var.xres * (bpp >> 3);
 967         info->cmap.len = (bpp == 8) ? 256: 16;
 968         debug("exit\n");
 969         return 0;
 970 }
 971
 972 /* Set one color register */
 973 static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 974                                  unsigned blue, unsigned transp,
 975                                  struct fb_info *info)
 976 {
 977         int bpp = info->var.bits_per_pixel;
 978
 979         if (regno >= info->cmap.len)
 980                 return 1;
 981
 982
 983         if (bpp==8) {
 984                 t_outb(0xFF,0x3C6);
 985                 t_outb(regno,0x3C8);
 986
 987                 t_outb(red>>10,0x3C9);
 988                 t_outb(green>>10,0x3C9);
 989                 t_outb(blue>>10,0x3C9);
 990
 991         } else
 992         if (bpp == 16)                  /* RGB 565 */
 993                         ((u16*)info->pseudo_palette)[regno] = (red & 0xF800) |
 994                         ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11);
 995         else
 996         if (bpp == 32)          /* ARGB 8888 */
 997                 ((u32*)info->pseudo_palette)[regno] =
 998                         ((transp & 0xFF00) <<16)        |
 999                         ((red & 0xFF00) << 8)           |
1000                         ((green & 0xFF00))              |
1001                         ((blue & 0xFF00)>>8);
1002
1003 //      debug("exit\n");
1004         return 0;
1005 }
1006
1007 /* Try blanking the screen.For flat panels it does nothing */
1008 static int tridentfb_blank(int blank_mode, struct fb_info *info)
1009 {
1010         unsigned char PMCont,DPMSCont;
1011
1012         debug("enter\n");
1013         if (flatpanel)
1014                 return 0;
1015         t_outb(0x04,0x83C8); /* Read DPMS Control */
1016         PMCont = t_inb(0x83C6) & 0xFC;
1017         DPMSCont = read3CE(PowerStatus) & 0xFC;
1018         switch (blank_mode)
1019         {
1020         case VESA_NO_BLANKING:
1021                 /* Screen: On, HSync: On, VSync: On */
1022                 PMCont |= 0x03;
1023                 DPMSCont |= 0x00;
1024                 break;
1025         case VESA_HSYNC_SUSPEND:
1026                 /* Screen: Off, HSync: Off, VSync: On */
1027                 PMCont |= 0x02;
1028                 DPMSCont |= 0x01;
1029                 break;
1030         case VESA_VSYNC_SUSPEND:
1031                 /* Screen: Off, HSync: On, VSync: Off */
1032                 PMCont |= 0x02;
1033                 DPMSCont |= 0x02;
1034                 break;
1035         case VESA_POWERDOWN:
1036                 /* Screen: Off, HSync: Off, VSync: Off */
1037                 PMCont |= 0x00;
1038                 DPMSCont |= 0x03;
1039                 break;
1040         }
1041
1042         write3CE(PowerStatus,DPMSCont);
1043         t_outb(4,0x83C8);
1044         t_outb(PMCont,0x83C6);
1045
1046         debug("exit\n");
1047         return 0;
1048 }
1049
1050 static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_device_id * id)
1051 {
1052         int err;
1053         unsigned char revision;
1054
1055         err = pci_enable_device(dev);
1056         if (err)
1057                 return err;
1058
1059         chip_id = id->device;
1060
1061         /* If PCI id is 0x9660 then further detect chip type */
1062
1063         if (chip_id == TGUI9660) {
1064                 outb(RevisionID,0x3C4);
1065                 revision = inb(0x3C5);
1066
1067                 switch (revision) {
1068                         case 0x22:
1069                         case 0x23: chip_id = CYBER9397;break;
1070                         case 0x2A: chip_id = CYBER9397DVD;break;
1071                         case 0x30:
1072                         case 0x33:
1073                         case 0x34:
1074                         case 0x35:
1075                         case 0x38:
1076                         case 0x3A:
1077                         case 0xB3: chip_id = CYBER9385;break;
1078                         case 0x40 ... 0x43: chip_id = CYBER9382;break;
1079                         case 0x4A: chip_id = CYBER9388;break;
1080                         default:break;
1081                 }
1082         }
1083
1084         chip3D = is3Dchip(chip_id);
1085         chipcyber = iscyber(chip_id);
1086
1087         if (is_xp(chip_id)) {
1088                 acc = &accel_xp;
1089         } else
1090         if (is_blade(chip_id)) {
1091                 acc = &accel_blade;
1092         } else {
1093                 acc = &accel_image;
1094         }
1095
1096         /* acceleration is on by default for 3D chips */
1097         defaultaccel = chip3D && !noaccel;
1098
1099         fb_info.par = &default_par;
1100
1101         /* setup MMIO region */
1102         tridentfb_fix.mmio_start = pci_resource_start(dev,1);
1103         tridentfb_fix.mmio_len = chip3D ? 0x20000:0x10000;
1104
1105         if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) {
1106                 debug("request_region failed!\n");
1107                 return -1;
1108         }
1109
1110         default_par.io_virt = (unsigned long)ioremap_nocache(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1111
1112         if (!default_par.io_virt) {
1113                 release_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1114                 debug("ioremap failed\n");
1115                 return -1;
1116         }
1117
1118         enable_mmio();
1119
1120         /* setup framebuffer memory */
1121         tridentfb_fix.smem_start = pci_resource_start(dev,0);
1122         tridentfb_fix.smem_len = get_memsize();
1123
1124         if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) {
1125                 debug("request_mem_region failed!\n");
1126                 return -1;
1127         }
1128
1129         fb_info.screen_base = ioremap_nocache(tridentfb_fix.smem_start,
1130                                         tridentfb_fix.smem_len);
1131
1132         if (!fb_info.screen_base) {
1133                 release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1134                 debug("ioremap failed\n");
1135                 return -1;
1136         }
1137
1138         output("%s board found\n", pci_name(dev));
1139 #if 0
1140         output("Trident board found : mem = %X,io = %X, mem_v = %X, io_v = %X\n",
1141                 tridentfb_fix.smem_start, tridentfb_fix.mmio_start, fb_info.screen_base, default_par.io_virt);
1142 #endif
1143         displaytype = get_displaytype();
1144
1145         if(flatpanel)
1146                 nativex = get_nativex();
1147
1148         fb_info.fix = tridentfb_fix;
1149         fb_info.fbops = &tridentfb_ops;
1150
1151
1152         fb_info.flags = FBINFO_FLAG_DEFAULT;
1153         fb_info.pseudo_palette = pseudo_pal;
1154
1155         if (!fb_find_mode(&default_var,&fb_info,mode,NULL,0,NULL,bpp))
1156                 return -EINVAL;
1157         fb_alloc_cmap(&fb_info.cmap,256,0);
1158         if (defaultaccel && acc)
1159                 default_var.accel_flags |= FB_ACCELF_TEXT;
1160         else
1161                 default_var.accel_flags &= ~FB_ACCELF_TEXT;
1162         default_var.activate |= FB_ACTIVATE_NOW;
1163         fb_info.var = default_var;
1164         if (register_framebuffer(&fb_info) < 0) {
1165                 output("Could not register Trident framebuffer\n");
1166                 return -EINVAL;
1167         }
1168         output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
1169            fb_info.node, fb_info.fix.id,default_var.xres,
1170            default_var.yres,default_var.bits_per_pixel);
1171         return 0;
1172 }
1173
1174 static void __devexit trident_pci_remove(struct pci_dev * dev)
1175 {
1176         struct tridentfb_par *par = (struct tridentfb_par*)fb_info.par;
1177         unregister_framebuffer(&fb_info);
1178         iounmap((void *)par->io_virt);
1179         iounmap((void*)fb_info.screen_base);
1180         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1181         release_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1182 }
1183
1184 /* List of boards that we are trying to support */
1185 static struct pci_device_id trident_devices[] = {
1186         {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1187         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1188         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1189         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1190         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1191         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1192         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1193         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1194         {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1195         {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1196         {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1197         {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1198         {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1199         {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1200         {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1201         {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1202         {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1203         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1204         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1205         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID,PCI_ANY_ID,0,0,0},
1206         {0,}
1207 };
1208
1209 MODULE_DEVICE_TABLE(pci,trident_devices);
1210
1211 static struct pci_driver tridentfb_pci_driver = {
1212         .name           = "tridentfb",
1213         .id_table       = trident_devices,
1214         .probe          = trident_pci_probe,
1215         .remove         = __devexit_p(trident_pci_remove)
1216 };
1217
1218 int __init tridentfb_init(void)
1219 {
1220         output("Trident framebuffer %s initializing\n", VERSION);
1221         return pci_module_init(&tridentfb_pci_driver);
1222 }
1223
1224 void __exit tridentfb_exit(void)
1225 {
1226         pci_unregister_driver(&tridentfb_pci_driver);
1227 }
1228
1229
1230 /*
1231  * Parse user specified options (`video=trident:')
1232  * example:
1233  *      video=trident:800x600,bpp=16,noaccel
1234  */
1235 int tridentfb_setup(char *options)
1236 {
1237         char * opt;
1238         if (!options || !*options)
1239                 return 0;
1240         while((opt = strsep(&options,",")) != NULL ) {
1241                 if (!*opt) continue;
1242                 if (!strncmp(opt,"noaccel",7))
1243                         noaccel = 1;
1244                 else if (!strncmp(opt,"fp",2))
1245                         displaytype = DISPLAY_FP;
1246                 else if (!strncmp(opt,"crt",3))
1247                         displaytype = DISPLAY_CRT;
1248                 else if (!strncmp(opt,"bpp=",4))
1249                         bpp = simple_strtoul(opt+4,NULL,0);
1250                 else if (!strncmp(opt,"center",6))
1251                         center = 1;
1252                 else if (!strncmp(opt,"stretch",7))
1253                         stretch = 1;
1254                 else if (!strncmp(opt,"memsize=",8))
1255                         memsize = simple_strtoul(opt+8,NULL,0);
1256                 else if (!strncmp(opt,"memdiff=",8))
1257                         memdiff = simple_strtoul(opt+8,NULL,0);
1258                 else if (!strncmp(opt,"nativex=",8))
1259                         nativex = simple_strtoul(opt+8,NULL,0);
1260                 else
1261                         mode = opt;
1262         }
1263         return 0;
1264 }
1265
1266 static struct fb_ops tridentfb_ops = {
1267         .owner  = THIS_MODULE,
1268         .fb_setcolreg = tridentfb_setcolreg,
1269         .fb_pan_display = tridentfb_pan_display,
1270         .fb_blank = tridentfb_blank,
1271         .fb_check_var = tridentfb_check_var,
1272         .fb_set_par = tridentfb_set_par,
1273         .fb_fillrect = tridentfb_fillrect,
1274         .fb_copyarea= tridentfb_copyarea,
1275         .fb_imageblit = cfb_imageblit,
1276         .fb_cursor = soft_cursor,
1277 };
1278
1279 #ifdef MODULE
1280 module_init(tridentfb_init);
1281 #endif
1282 module_exit(tridentfb_exit);
1283
1284 MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
1285 MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
1286 MODULE_LICENSE("GPL");
1287