2 * PCI Backend - Handles the virtual fields in the configuration space headers.
4 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
7 #include <linux/kernel.h>
10 #include "conf_space.h"
18 #define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO))
19 #define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER)
21 static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
23 if (!atomic_read(&dev->enable_cnt) && is_enable_cmd(value)) {
24 if (unlikely(verbose_request))
25 printk(KERN_DEBUG "pciback: %s: enable\n",
27 if (pci_enable_device(dev))
29 } else if (atomic_read(&dev->enable_cnt) && !is_enable_cmd(value)) {
30 if (unlikely(verbose_request))
31 printk(KERN_DEBUG "pciback: %s: disable\n",
33 pci_disable_device(dev);
36 if (!dev->is_busmaster && is_master_cmd(value)) {
37 if (unlikely(verbose_request))
38 printk(KERN_DEBUG "pciback: %s: set bus master\n",
43 if (value & PCI_COMMAND_INVALIDATE) {
44 if (unlikely(verbose_request))
46 "pciback: %s: enable memory-write-invalidate\n",
52 return pci_write_config_word(dev, offset, value);
55 static int rom_write(struct pci_dev *dev, int offset, u32 value, void *data)
57 struct pci_bar_info *bar = data;
60 printk(KERN_WARNING "pciback: driver data not found for %s\n",
62 return XEN_PCI_ERR_op_failed;
65 /* A write to obtain the length must happen as a 32-bit write.
66 * This does not (yet) support writing individual bytes
68 if (value == ~PCI_ROM_ADDRESS_ENABLE)
73 /* Do we need to support enabling/disabling the rom address here? */
78 /* For the BARs, only allow writes which write ~0 or
79 * the correct resource information
80 * (Needed for when the driver probes the resource usage)
82 static int bar_write(struct pci_dev *dev, int offset, u32 value, void *data)
84 struct pci_bar_info *bar = data;
87 printk(KERN_WARNING "pciback: driver data not found for %s\n",
89 return XEN_PCI_ERR_op_failed;
92 /* A write to obtain the length must happen as a 32-bit write.
93 * This does not (yet) support writing individual bytes
103 static int bar_read(struct pci_dev *dev, int offset, u32 * value, void *data)
105 struct pci_bar_info *bar = data;
107 if (unlikely(!bar)) {
108 printk(KERN_WARNING "pciback: driver data not found for %s\n",
110 return XEN_PCI_ERR_op_failed;
113 *value = bar->which ? bar->len_val : bar->val;
118 static inline void read_dev_bar(struct pci_dev *dev,
119 struct pci_bar_info *bar_info, int offset,
122 pci_read_config_dword(dev, offset, &bar_info->val);
123 pci_write_config_dword(dev, offset, len_mask);
124 pci_read_config_dword(dev, offset, &bar_info->len_val);
125 pci_write_config_dword(dev, offset, bar_info->val);
128 static void *bar_init(struct pci_dev *dev, int offset)
130 struct pci_bar_info *bar = kmalloc(sizeof(*bar), GFP_KERNEL);
133 return ERR_PTR(-ENOMEM);
135 read_dev_bar(dev, bar, offset, ~0);
141 static void *rom_init(struct pci_dev *dev, int offset)
143 struct pci_bar_info *bar = kmalloc(sizeof(*bar), GFP_KERNEL);
146 return ERR_PTR(-ENOMEM);
148 read_dev_bar(dev, bar, offset, ~PCI_ROM_ADDRESS_ENABLE);
154 static void bar_reset(struct pci_dev *dev, int offset, void *data)
156 struct pci_bar_info *bar = data;
161 static void bar_release(struct pci_dev *dev, int offset, void *data)
166 static int interrupt_read(struct pci_dev *dev, int offset, u8 * value,
169 *value = (u8) dev->irq;
174 static int bist_write(struct pci_dev *dev, int offset, u8 value, void *data)
179 err = pci_read_config_byte(dev, offset, &cur_value);
183 if ((cur_value & ~PCI_BIST_START) == (value & ~PCI_BIST_START)
184 || value == PCI_BIST_START)
185 err = pci_write_config_byte(dev, offset, value);
191 static struct config_field header_common[] = {
193 .offset = PCI_COMMAND,
195 .u.w.read = pciback_read_config_word,
196 .u.w.write = command_write,
199 .offset = PCI_INTERRUPT_LINE,
201 .u.b.read = interrupt_read,
204 .offset = PCI_INTERRUPT_PIN,
206 .u.b.read = pciback_read_config_byte,
209 /* Any side effects of letting driver domain control cache line? */
210 .offset = PCI_CACHE_LINE_SIZE,
212 .u.b.read = pciback_read_config_byte,
213 .u.b.write = pciback_write_config_byte,
216 .offset = PCI_LATENCY_TIMER,
218 .u.b.read = pciback_read_config_byte,
223 .u.b.read = pciback_read_config_byte,
224 .u.b.write = bist_write,
231 #define CFG_FIELD_BAR(reg_offset) \
233 .offset = reg_offset, \
236 .reset = bar_reset, \
237 .release = bar_release, \
238 .u.dw.read = bar_read, \
239 .u.dw.write = bar_write, \
242 #define CFG_FIELD_ROM(reg_offset) \
244 .offset = reg_offset, \
247 .reset = bar_reset, \
248 .release = bar_release, \
249 .u.dw.read = bar_read, \
250 .u.dw.write = rom_write, \
253 static struct config_field header_0[] = {
254 CFG_FIELD_BAR(PCI_BASE_ADDRESS_0),
255 CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
256 CFG_FIELD_BAR(PCI_BASE_ADDRESS_2),
257 CFG_FIELD_BAR(PCI_BASE_ADDRESS_3),
258 CFG_FIELD_BAR(PCI_BASE_ADDRESS_4),
259 CFG_FIELD_BAR(PCI_BASE_ADDRESS_5),
260 CFG_FIELD_ROM(PCI_ROM_ADDRESS),
266 static struct config_field header_1[] = {
267 CFG_FIELD_BAR(PCI_BASE_ADDRESS_0),
268 CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
269 CFG_FIELD_ROM(PCI_ROM_ADDRESS1),
275 int pciback_config_header_add_fields(struct pci_dev *dev)
279 err = pciback_config_add_fields(dev, header_common);
283 switch (dev->hdr_type) {
284 case PCI_HEADER_TYPE_NORMAL:
285 err = pciback_config_add_fields(dev, header_0);
288 case PCI_HEADER_TYPE_BRIDGE:
289 err = pciback_config_add_fields(dev, header_1);
294 printk(KERN_ERR "pciback: %s: Unsupported header type %d!\n",
295 pci_name(dev), dev->hdr_type);