2 * linux/include/asm/arch-iop3xx/iop321.h
4 * Intel IOP321 Chip definitions
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
19 * This is needed for mixed drivers that need to work on all
20 * IOP3xx variants but behave slightly differently on each.
23 #define iop_is_321() ((processor_id & 0xfffff7e0) == 0x69052420)
28 * IOP321 I/O and Mem space regions for PCI autoconfiguration
31 #define IOP321_PCI_IO_BASE 0x90000000
32 #define IOP321_PCI_IO_SIZE 0x00010000
33 #define IOP321_PCI_MEM_BASE 0x40000000
34 #define IOP321_PCI_MEM_SIZE 0x40000000
37 * IOP321 chipset registers
39 #define IOP321_VIRT_MEM_BASE 0xfff00000 /* chip virtual mem address*/
41 #define IOP321_PHY_MEM_BASE 0xffffe000 /* chip physical memory address */
42 #define IOP321_REG_ADDR(reg) (IOP321_VIRT_MEM_BASE | (reg))
44 /* Reserved 0x00000000 through 0x000000FF */
46 /* Address Translation Unit 0x00000100 through 0x000001FF */
47 #define IOP321_ATUVID (volatile u16 *)IOP321_REG_ADDR(0x00000100)
48 #define IOP321_ATUDID (volatile u16 *)IOP321_REG_ADDR(0x00000102)
49 #define IOP321_ATUCMD (volatile u16 *)IOP321_REG_ADDR(0x00000104)
50 #define IOP321_ATUSR (volatile u16 *)IOP321_REG_ADDR(0x00000106)
51 #define IOP321_ATURID (volatile u8 *)IOP321_REG_ADDR(0x00000108)
52 #define IOP321_ATUCCR (volatile u32 *)IOP321_REG_ADDR(0x00000109)
53 #define IOP321_ATUCLSR (volatile u8 *)IOP321_REG_ADDR(0x0000010C)
54 #define IOP321_ATULT (volatile u8 *)IOP321_REG_ADDR(0x0000010D)
55 #define IOP321_ATUHTR (volatile u8 *)IOP321_REG_ADDR(0x0000010E)
56 #define IOP321_ATUBIST (volatile u8 *)IOP321_REG_ADDR(0x0000010F)
57 #define IOP321_IABAR0 (volatile u32 *)IOP321_REG_ADDR(0x00000110)
58 #define IOP321_IAUBAR0 (volatile u32 *)IOP321_REG_ADDR(0x00000114)
59 #define IOP321_IABAR1 (volatile u32 *)IOP321_REG_ADDR(0x00000118)
60 #define IOP321_IAUBAR1 (volatile u32 *)IOP321_REG_ADDR(0x0000011C)
61 #define IOP321_IABAR2 (volatile u32 *)IOP321_REG_ADDR(0x00000120)
62 #define IOP321_IAUBAR2 (volatile u32 *)IOP321_REG_ADDR(0x00000124)
63 #define IOP321_ASVIR (volatile u16 *)IOP321_REG_ADDR(0x0000012C)
64 #define IOP321_ASIR (volatile u16 *)IOP321_REG_ADDR(0x0000012E)
65 #define IOP321_ERBAR (volatile u32 *)IOP321_REG_ADDR(0x00000130)
66 /* Reserved 0x00000134 through 0x0000013B */
67 #define IOP321_ATUILR (volatile u8 *)IOP321_REG_ADDR(0x0000013C)
68 #define IOP321_ATUIPR (volatile u8 *)IOP321_REG_ADDR(0x0000013D)
69 #define IOP321_ATUMGNT (volatile u8 *)IOP321_REG_ADDR(0x0000013E)
70 #define IOP321_ATUMLAT (volatile u8 *)IOP321_REG_ADDR(0x0000013F)
71 #define IOP321_IALR0 (volatile u32 *)IOP321_REG_ADDR(0x00000140)
72 #define IOP321_IATVR0 (volatile u32 *)IOP321_REG_ADDR(0x00000144)
73 #define IOP321_ERLR (volatile u32 *)IOP321_REG_ADDR(0x00000148)
74 #define IOP321_ERTVR (volatile u32 *)IOP321_REG_ADDR(0x0000014C)
75 #define IOP321_IALR1 (volatile u32 *)IOP321_REG_ADDR(0x00000150)
76 #define IOP321_IALR2 (volatile u32 *)IOP321_REG_ADDR(0x00000154)
77 #define IOP321_IATVR2 (volatile u32 *)IOP321_REG_ADDR(0x00000158)
78 #define IOP321_OIOWTVR (volatile u32 *)IOP321_REG_ADDR(0x0000015C)
79 #define IOP321_OMWTVR0 (volatile u32 *)IOP321_REG_ADDR(0x00000160)
80 #define IOP321_OUMWTVR0 (volatile u32 *)IOP321_REG_ADDR(0x00000164)
81 #define IOP321_OMWTVR1 (volatile u32 *)IOP321_REG_ADDR(0x00000168)
82 #define IOP321_OUMWTVR1 (volatile u32 *)IOP321_REG_ADDR(0x0000016C)
83 /* Reserved 0x00000170 through 0x00000177*/
84 #define IOP321_OUDWTVR (volatile u32 *)IOP321_REG_ADDR(0x00000178)
85 /* Reserved 0x0000017C through 0x0000017F*/
86 #define IOP321_ATUCR (volatile u32 *)IOP321_REG_ADDR(0x00000180)
87 #define IOP321_PCSR (volatile u32 *)IOP321_REG_ADDR(0x00000184)
88 #define IOP321_ATUISR (volatile u32 *)IOP321_REG_ADDR(0x00000188)
89 #define IOP321_ATUIMR (volatile u32 *)IOP321_REG_ADDR(0x0000018C)
90 #define IOP321_IABAR3 (volatile u32 *)IOP321_REG_ADDR(0x00000190)
91 #define IOP321_IAUBAR3 (volatile u32 *)IOP321_REG_ADDR(0x00000194)
92 #define IOP321_IALR3 (volatile u32 *)IOP321_REG_ADDR(0x00000198)
93 #define IOP321_IATVR3 (volatile u32 *)IOP321_REG_ADDR(0x0000019C)
94 /* Reserved 0x000001A0 through 0x000001A3*/
95 #define IOP321_OCCAR (volatile u32 *)IOP321_REG_ADDR(0x000001A4)
96 /* Reserved 0x000001A8 through 0x000001AB*/
97 #define IOP321_OCCDR (volatile u32 *)IOP321_REG_ADDR(0x000001AC)
98 /* Reserved 0x000001B0 through 0x000001BB*/
99 #define IOP321_PDSCR (volatile u32 *)IOP321_REG_ADDR(0x000001BC)
100 #define IOP321_PMCAPID (volatile u8 *)IOP321_REG_ADDR(0x000001C0)
101 #define IOP321_PMNEXT (volatile u8 *)IOP321_REG_ADDR(0x000001C1)
102 #define IOP321_APMCR (volatile u16 *)IOP321_REG_ADDR(0x000001C2)
103 #define IOP321_APMCSR (volatile u16 *)IOP321_REG_ADDR(0x000001C4)
104 /* Reserved 0x000001C6 through 0x000001DF */
105 #define IOP321_PCIXCAPID (volatile u8 *)IOP321_REG_ADDR(0x000001E0)
106 #define IOP321_PCIXNEXT (volatile u8 *)IOP321_REG_ADDR(0x000001E1)
107 #define IOP321_PCIXCMD (volatile u16 *)IOP321_REG_ADDR(0x000001E2)
108 #define IOP321_PCIXSR (volatile u32 *)IOP321_REG_ADDR(0x000001E4)
109 #define IOP321_PCIIRSR (volatile u32 *)IOP321_REG_ADDR(0x000001EC)
111 /* Messaging Unit 0x00000300 through 0x000003FF */
113 /* Reserved 0x00000300 through 0x0000030c */
114 #define IOP321_IMR0 (volatile u32 *)IOP321_REG_ADDR(0x00000310)
115 #define IOP321_IMR1 (volatile u32 *)IOP321_REG_ADDR(0x00000314)
116 #define IOP321_OMR0 (volatile u32 *)IOP321_REG_ADDR(0x00000318)
117 #define IOP321_OMR1 (volatile u32 *)IOP321_REG_ADDR(0x0000031C)
118 #define IOP321_IDR (volatile u32 *)IOP321_REG_ADDR(0x00000320)
119 #define IOP321_IISR (volatile u32 *)IOP321_REG_ADDR(0x00000324)
120 #define IOP321_IIMR (volatile u32 *)IOP321_REG_ADDR(0x00000328)
121 #define IOP321_ODR (volatile u32 *)IOP321_REG_ADDR(0x0000032C)
122 #define IOP321_OISR (volatile u32 *)IOP321_REG_ADDR(0x00000330)
123 #define IOP321_OIMR (volatile u32 *)IOP321_REG_ADDR(0x00000334)
124 /* Reserved 0x00000338 through 0x0000034F */
125 #define IOP321_MUCR (volatile u32 *)IOP321_REG_ADDR(0x00000350)
126 #define IOP321_QBAR (volatile u32 *)IOP321_REG_ADDR(0x00000354)
127 /* Reserved 0x00000358 through 0x0000035C */
128 #define IOP321_IFHPR (volatile u32 *)IOP321_REG_ADDR(0x00000360)
129 #define IOP321_IFTPR (volatile u32 *)IOP321_REG_ADDR(0x00000364)
130 #define IOP321_IPHPR (volatile u32 *)IOP321_REG_ADDR(0x00000368)
131 #define IOP321_IPTPR (volatile u32 *)IOP321_REG_ADDR(0x0000036C)
132 #define IOP321_OFHPR (volatile u32 *)IOP321_REG_ADDR(0x00000370)
133 #define IOP321_OFTPR (volatile u32 *)IOP321_REG_ADDR(0x00000374)
134 #define IOP321_OPHPR (volatile u32 *)IOP321_REG_ADDR(0x00000378)
135 #define IOP321_OPTPR (volatile u32 *)IOP321_REG_ADDR(0x0000037C)
136 #define IOP321_IAR (volatile u32 *)IOP321_REG_ADDR(0x00000380)
137 /* Reserved 0x00000384 through 0x000003FF */
139 /* DMA Controller 0x00000400 through 0x000004FF */
140 #define IOP321_DMA0_CCR (volatile u32 *)IOP321_REG_ADDR(0x00000400)
141 #define IOP321_DMA0_CSR (volatile u32 *)IOP321_REG_ADDR(0x00000404)
142 #define IOP321_DMA0_DAR (volatile u32 *)IOP321_REG_ADDR(0x0000040C)
143 #define IOP321_DMA0_NDAR (volatile u32 *)IOP321_REG_ADDR(0x00000410)
144 #define IOP321_DMA0_PADR (volatile u32 *)IOP321_REG_ADDR(0x00000414)
145 #define IOP321_DMA0_PUADR (volatile u32 *)IOP321_REG_ADDR(0x00000418)
146 #define IOP321_DMA0_LADR (volatile u32 *)IOP321_REG_ADDR(0X0000041C)
147 #define IOP321_DMA0_BCR (volatile u32 *)IOP321_REG_ADDR(0x00000420)
148 #define IOP321_DMA0_DCR (volatile u32 *)IOP321_REG_ADDR(0x00000424)
149 /* Reserved 0x00000428 through 0x0000043C */
150 #define IOP321_DMA1_CCR (volatile u32 *)IOP321_REG_ADDR(0x00000440)
151 #define IOP321_DMA1_CSR (volatile u32 *)IOP321_REG_ADDR(0x00000444)
152 #define IOP321_DMA1_DAR (volatile u32 *)IOP321_REG_ADDR(0x0000044C)
153 #define IOP321_DMA1_NDAR (volatile u32 *)IOP321_REG_ADDR(0x00000450)
154 #define IOP321_DMA1_PADR (volatile u32 *)IOP321_REG_ADDR(0x00000454)
155 #define IOP321_DMA1_PUADR (volatile u32 *)IOP321_REG_ADDR(0x00000458)
156 #define IOP321_DMA1_LADR (volatile u32 *)IOP321_REG_ADDR(0x0000045C)
157 #define IOP321_DMA1_BCR (volatile u32 *)IOP321_REG_ADDR(0x00000460)
158 #define IOP321_DMA1_DCR (volatile u32 *)IOP321_REG_ADDR(0x00000464)
159 /* Reserved 0x00000468 through 0x000004FF */
161 /* Memory controller 0x00000500 through 0x0005FF */
163 /* Peripheral bus interface unit 0x00000680 through 0x0006FF */
164 #define IOP321_PBCR (volatile u32 *)IOP321_REG_ADDR(0x00000680)
165 #define IOP321_PBISR (volatile u32 *)IOP321_REG_ADDR(0x00000684)
166 #define IOP321_PBBAR0 (volatile u32 *)IOP321_REG_ADDR(0x00000688)
167 #define IOP321_PBLR0 (volatile u32 *)IOP321_REG_ADDR(0x0000068C)
168 #define IOP321_PBBAR1 (volatile u32 *)IOP321_REG_ADDR(0x00000690)
169 #define IOP321_PBLR1 (volatile u32 *)IOP321_REG_ADDR(0x00000694)
170 #define IOP321_PBBAR2 (volatile u32 *)IOP321_REG_ADDR(0x00000698)
171 #define IOP321_PBLR2 (volatile u32 *)IOP321_REG_ADDR(0x0000069C)
172 #define IOP321_PBBAR3 (volatile u32 *)IOP321_REG_ADDR(0x000006A0)
173 #define IOP321_PBLR3 (volatile u32 *)IOP321_REG_ADDR(0x000006A4)
174 #define IOP321_PBBAR4 (volatile u32 *)IOP321_REG_ADDR(0x000006A8)
175 #define IOP321_PBLR4 (volatile u32 *)IOP321_REG_ADDR(0x000006AC)
176 #define IOP321_PBBAR5 (volatile u32 *)IOP321_REG_ADDR(0x000006B0)
177 #define IOP321_PBLR5 (volatile u32 *)IOP321_REG_ADDR(0x000006B4)
178 #define IOP321_PBDSCR (volatile u32 *)IOP321_REG_ADDR(0x000006B8)
179 /* Reserved 0x000006BC */
180 #define IOP321_PMBR0 (volatile u32 *)IOP321_REG_ADDR(0x000006C0)
181 /* Reserved 0x000006C4 through 0x000006DC */
182 #define IOP321_PMBR1 (volatile u32 *)IOP321_REG_ADDR(0x000006E0)
183 #define IOP321_PMBR2 (volatile u32 *)IOP321_REG_ADDR(0x000006E4)
185 #define IOP321_PBCR_EN 0x1
187 #define IOP321_PBISR_BOOR_ERR 0x1
191 /* Peripheral performance monitoring unit 0x00000700 through 0x00077F */
192 /* Internal arbitration unit 0x00000780 through 0x0007BF */
194 /* General Purpose I/O Registers */
195 #define IOP321_GPOE (volatile u32 *)IOP321_REG_ADDR(0x000007C4)
196 #define IOP321_GPID (volatile u32 *)IOP321_REG_ADDR(0x000007C8)
197 #define IOP321_GPOD (volatile u32 *)IOP321_REG_ADDR(0x000007CC)
199 /* Interrupt Controller */
200 #define IOP321_INTCTL (volatile u32 *)IOP321_REG_ADDR(0x000007D0)
201 #define IOP321_INTSTR (volatile u32 *)IOP321_REG_ADDR(0x000007D4)
202 #define IOP321_IINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007D8)
203 #define IOP321_FINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007DC)
207 #define IOP321_TU_TMR0 (volatile u32 *)IOP321_REG_ADDR(0x000007E0)
208 #define IOP321_TU_TMR1 (volatile u32 *)IOP321_REG_ADDR(0x000007E4)
210 #define IOP321_TMR_TC 0x01
211 #define IOP321_TMR_EN 0x02
212 #define IOP321_TMR_RELOAD 0x04
213 #define IOP321_TMR_PRIVILEGED 0x09
215 #define IOP321_TMR_RATIO_1_1 0x00
216 #define IOP321_TMR_RATIO_4_1 0x10
217 #define IOP321_TMR_RATIO_8_1 0x20
218 #define IOP321_TMR_RATIO_16_1 0x30
220 #define IOP321_TU_TCR0 (volatile u32 *)IOP321_REG_ADDR(0x000007E8)
221 #define IOP321_TU_TCR1 (volatile u32 *)IOP321_REG_ADDR(0x000007EC)
222 #define IOP321_TU_TRR0 (volatile u32 *)IOP321_REG_ADDR(0x000007F0)
223 #define IOP321_TU_TRR1 (volatile u32 *)IOP321_REG_ADDR(0x000007F4)
224 #define IOP321_TU_TISR (volatile u32 *)IOP321_REG_ADDR(0x000007F8)
225 #define IOP321_TU_WDTCR (volatile u32 *)IOP321_REG_ADDR(0x000007FC)
229 /* Application accelerator unit 0x00000800 - 0x000008FF */
230 #define IOP321_AAU_ACR (volatile u32 *)IOP321_REG_ADDR(0x00000800)
231 #define IOP321_AAU_ASR (volatile u32 *)IOP321_REG_ADDR(0x00000804)
232 #define IOP321_AAU_ADAR (volatile u32 *)IOP321_REG_ADDR(0x00000808)
233 #define IOP321_AAU_ANDAR (volatile u32 *)IOP321_REG_ADDR(0x0000080C)
234 #define IOP321_AAU_SAR1 (volatile u32 *)IOP321_REG_ADDR(0x00000810)
235 /* SAR2...SAR32 0x00000814 - 0x000008A4 */
236 #define IOP321_AAU_DAR (volatile u32 *)IOP321_REG_ADDR(0x00000820)
237 #define IOP321_AAU_ABCR (volatile u32 *)IOP321_REG_ADDR(0x00000824)
238 #define IOP321_AAU_ADCR (volatile u32 *)IOP321_REG_ADDR(0x00000828)
239 #define IOP321_AAU_EDCR0 (volatile u32 *)IOP321_REG_ADDR(0x0000083c)
240 #define IOP321_AAU_EDCR1 (volatile u32 *)IOP321_REG_ADDR(0x00000860)
241 #define IOP321_AAU_EDCR2 (volatile u32 *)IOP321_REG_ADDR(0x00000884)
244 /* SSP serial port unit 0x00001600 - 0x0000167F */
245 /* I2C bus interface unit 0x00001680 - 0x000016FF */
246 #define IOP321_ICR0 (volatile u32 *)IOP321_REG_ADDR(0x00001680)
247 #define IOP321_ISR0 (volatile u32 *)IOP321_REG_ADDR(0x00001684)
248 #define IOP321_ISAR0 (volatile u32 *)IOP321_REG_ADDR(0x00001688)
249 #define IOP321_IDBR0 (volatile u32 *)IOP321_REG_ADDR(0x0000168C)
250 /* Reserved 0x00001690 */
251 #define IOP321_IBMR0 (volatile u32 *)IOP321_REG_ADDR(0x00001694)
252 /* Reserved 0x00001698 */
253 /* Reserved 0x0000169C */
254 #define IOP321_ICR1 (volatile u32 *)IOP321_REG_ADDR(0x000016A0)
255 #define IOP321_ISR1 (volatile u32 *)IOP321_REG_ADDR(0x000016A4)
256 #define IOP321_ISAR1 (volatile u32 *)IOP321_REG_ADDR(0x000016A8)
257 #define IOP321_IDBR1 (volatile u32 *)IOP321_REG_ADDR(0x000016AC)
258 #define IOP321_IBMR1 (volatile u32 *)IOP321_REG_ADDR(0x000016B4)
259 /* Reserved 0x000016B8 through 0x000016FC */
261 /* for I2C bit defs see drivers/i2c/i2c-iop3xx.h */
263 #endif // _IOP321_HW_H_