1 /* linux/include/asm-arm/arch-omap/omap5912.h
3 * Hardware definitions for TI OMAP5912 processor.
5 * Written by Dirk Behme <dirk.behme@de.bosch.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 #ifndef __ASM_ARCH_OMAP5912_H
29 #define __ASM_ARCH_OMAP5912_H
32 * ----------------------------------------------------------------------------
34 * ----------------------------------------------------------------------------
37 /* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
39 /* OMAP5912 internal SRAM size is 250kByte */
40 #define OMAP5912_SRAM_BASE 0xD0000000
41 #define OMAP5912_SRAM_SIZE 0x3E800
42 #define OMAP5912_SRAM_START 0x20000000
44 #define OMAP5912_DSP_BASE 0xE0000000
45 #define OMAP5912_DSP_SIZE 0x50000
46 #define OMAP5912_DSP_START 0xE0000000
48 #define OMAP5912_DSPREG_BASE 0xE1000000
49 #define OMAP5912_DSPREG_SIZE SZ_128K
50 #define OMAP5912_DSPREG_START 0xE1000000
53 * ---------------------------------------------------------------------------
55 * ---------------------------------------------------------------------------
57 #define OMAP_IH2_0_BASE (0xfffe0000)
58 #define OMAP_IH2_1_BASE (0xfffe0100)
59 #define OMAP_IH2_2_BASE (0xfffe0200)
60 #define OMAP_IH2_3_BASE (0xfffe0300)
62 #define OMAP_IH2_0_ITR (OMAP_IH2_0_BASE + 0x00)
63 #define OMAP_IH2_0_MIR (OMAP_IH2_0_BASE + 0x04)
64 #define OMAP_IH2_0_SIR_IRQ (OMAP_IH2_0_BASE + 0x10)
65 #define OMAP_IH2_0_SIR_FIQ (OMAP_IH2_0_BASE + 0x14)
66 #define OMAP_IH2_0_CONTROL (OMAP_IH2_0_BASE + 0x18)
67 #define OMAP_IH2_0_ILR0 (OMAP_IH2_0_BASE + 0x1c)
68 #define OMAP_IH2_0_ISR (OMAP_IH2_0_BASE + 0x9c)
70 #define OMAP_IH2_1_ITR (OMAP_IH2_1_BASE + 0x00)
71 #define OMAP_IH2_1_MIR (OMAP_IH2_1_BASE + 0x04)
72 #define OMAP_IH2_1_SIR_IRQ (OMAP_IH2_1_BASE + 0x10)
73 #define OMAP_IH2_1_SIR_FIQ (OMAP_IH2_1_BASE + 0x14)
74 #define OMAP_IH2_1_CONTROL (OMAP_IH2_1_BASE + 0x18)
75 #define OMAP_IH2_1_ILR1 (OMAP_IH2_1_BASE + 0x1c)
76 #define OMAP_IH2_1_ISR (OMAP_IH2_1_BASE + 0x9c)
78 #define OMAP_IH2_2_ITR (OMAP_IH2_2_BASE + 0x00)
79 #define OMAP_IH2_2_MIR (OMAP_IH2_2_BASE + 0x04)
80 #define OMAP_IH2_2_SIR_IRQ (OMAP_IH2_2_BASE + 0x10)
81 #define OMAP_IH2_2_SIR_FIQ (OMAP_IH2_2_BASE + 0x14)
82 #define OMAP_IH2_2_CONTROL (OMAP_IH2_2_BASE + 0x18)
83 #define OMAP_IH2_2_ILR2 (OMAP_IH2_2_BASE + 0x1c)
84 #define OMAP_IH2_2_ISR (OMAP_IH2_2_BASE + 0x9c)
86 #define OMAP_IH2_3_ITR (OMAP_IH2_3_BASE + 0x00)
87 #define OMAP_IH2_3_MIR (OMAP_IH2_3_BASE + 0x04)
88 #define OMAP_IH2_3_SIR_IRQ (OMAP_IH2_3_BASE + 0x10)
89 #define OMAP_IH2_3_SIR_FIQ (OMAP_IH2_3_BASE + 0x14)
90 #define OMAP_IH2_3_CONTROL (OMAP_IH2_3_BASE + 0x18)
91 #define OMAP_IH2_3_ILR3 (OMAP_IH2_3_BASE + 0x1c)
92 #define OMAP_IH2_3_ISR (OMAP_IH2_3_BASE + 0x9c)
95 * ----------------------------------------------------------------------------
96 * System control registers
97 * ----------------------------------------------------------------------------
100 #define OMAP5912_ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
102 #endif /* __ASM_ARCH_OMAP5912_H */