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[linux-2.6.git] / include / asm-arm / arch-s3c2410 / io.h
1 /*
2  * linux/include/asm-arm/arch-s3c2410/io.h
3  *  from linux/include/asm-arm/arch-rpc/io.h
4  *
5  * Copyright (C) 1997 Russell King
6  *           (C) 2003 Simtec Electronics
7  *
8  * Modifications:
9  *  06-Dec-1997 RMK     Created.
10  *  02-Sep-2003 BJD     Modified for S3C2410
11  *
12  */
13
14 #ifndef __ASM_ARM_ARCH_IO_H
15 #define __ASM_ARM_ARCH_IO_H
16
17 #define IO_SPACE_LIMIT 0xffffffff
18
19 /*
20  * We use two different types of addressing - PC style addresses, and ARM
21  * addresses.  PC style accesses the PC hardware with the normal PC IO
22  * addresses, eg 0x3f8 for serial#1.  ARM addresses are above A28
23  * and are translated to the start of IO.  Note that all addresses are
24  * not shifted left!
25  */
26
27 #define __PORT_PCIO(x)  ((x) < (1<<28))
28
29 #define PCIO_BASE        (S3C2410_VA_ISA_WORD)
30 #define PCIO_BASE_b      (S3C2410_VA_ISA_BYTE)
31 #define PCIO_BASE_w      (S3C2410_VA_ISA_WORD)
32 #define PCIO_BASE_l      (S3C2410_VA_ISA_WORD)
33 /*
34  * Dynamic IO functions - let the compiler
35  * optimize the expressions
36  */
37
38 #define DECLARE_DYN_OUT(sz,fnsuffix,instr) \
39 static inline void __out##fnsuffix (unsigned int val, unsigned int port) \
40 { \
41         unsigned long temp;                                   \
42         __asm__ __volatile__(                                 \
43         "cmp    %2, #(1<<28)\n\t"                             \
44         "mov    %0, %2\n\t"                                   \
45         "addcc  %0, %0, %3\n\t"                               \
46         "str" instr " %1, [%0, #0 ]     @ out" #fnsuffix      \
47         : "=&r" (temp)                                        \
48         : "r" (val), "r" (port), "Ir" (PCIO_BASE_##fnsuffix)  \
49         : "cc");                                              \
50 }
51
52
53 #define DECLARE_DYN_IN(sz,fnsuffix,instr)                               \
54 static inline unsigned sz __in##fnsuffix (unsigned int port)            \
55 {                                                                       \
56         unsigned long temp, value;                                      \
57         __asm__ __volatile__(                                           \
58         "cmp    %2, #(1<<28)\n\t"                                       \
59         "mov    %0, %2\n\t"                                             \
60         "addcc  %0, %0, %3\n\t"                                         \
61         "ldr" instr "   %1, [%0, #0 ]   @ in" #fnsuffix         \
62         : "=&r" (temp), "=r" (value)                                    \
63         : "r" (port), "Ir" (PCIO_BASE_##fnsuffix)       \
64         : "cc");                                                        \
65         return (unsigned sz)value;                                      \
66 }
67
68 static inline void __iomem *__ioaddr (unsigned int port)
69 {
70         return (void __iomem *)(__PORT_PCIO(port) ? PCIO_BASE + port : port);
71 }
72
73 #define DECLARE_IO(sz,fnsuffix,instr)   \
74         DECLARE_DYN_IN(sz,fnsuffix,instr) \
75         DECLARE_DYN_OUT(sz,fnsuffix,instr)
76
77 DECLARE_IO(char,b,"b")
78 DECLARE_IO(short,w,"h")
79 DECLARE_IO(int,l,"")
80
81 #undef DECLARE_IO
82 #undef DECLARE_DYN_IN
83
84 /*
85  * Constant address IO functions
86  *
87  * These have to be macros for the 'J' constraint to work -
88  * +/-4096 immediate operand.
89  */
90 #define __outbc(value,port)                                             \
91 ({                                                                      \
92         if (__PORT_PCIO((port)))                                        \
93                 __asm__ __volatile__(                                   \
94                 "strb   %0, [%1, %2]    @ outbc"                        \
95                 : : "r" (value), "r" (PCIO_BASE), "Jr" ((port)));       \
96         else                                                            \
97                 __asm__ __volatile__(                                   \
98                 "strb   %0, [%1, #0]    @ outbc"                        \
99                 : : "r" (value), "r" ((port)));         \
100 })
101
102 #define __inbc(port)                                                    \
103 ({                                                                      \
104         unsigned char result;                                           \
105         if (__PORT_PCIO((port)))                                        \
106                 __asm__ __volatile__(                                   \
107                 "ldrb   %0, [%1, %2]    @ inbc"                         \
108                 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port)));      \
109         else                                                            \
110                 __asm__ __volatile__(                                   \
111                 "ldrb   %0, [%1, #0]    @ inbc"                         \
112                 : "=r" (result) : "r" ((port)));        \
113         result;                                                         \
114 })
115
116 #define __outwc(value,port)                                             \
117 ({                                                                      \
118         unsigned long v = value;                                        \
119         if (__PORT_PCIO((port)))                                        \
120                 __asm__ __volatile__(                                   \
121                 "strh   %0, [%1, %2]    @ outwc"                        \
122                 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port)));   \
123         else                                                            \
124                 __asm__ __volatile__(                                   \
125                 "strh   %0, [%1, #0]    @ outwc"                        \
126                 : : "r" (v), "r" ((port)));     \
127 })
128
129 #define __inwc(port)                                                    \
130 ({                                                                      \
131         unsigned short result;                                          \
132         if (__PORT_PCIO((port)))                                        \
133                 __asm__ __volatile__(                                   \
134                 "ldrh   %0, [%1, %2]    @ inwc"                         \
135                 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port)));      \
136         else                                                            \
137                 __asm__ __volatile__(                                   \
138                 "ldrh   %0, [%1, #0]    @ inwc"                         \
139                 : "=r" (result) : "r" ((port)));                \
140         result;                                         \
141 })
142
143 #define __outlc(value,port)                                             \
144 ({                                                                      \
145         unsigned long v = value;                                        \
146         if (__PORT_PCIO((port)))                                        \
147                 __asm__ __volatile__(                                   \
148                 "str    %0, [%1, %2]    @ outlc"                        \
149                 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port)));   \
150         else                                                            \
151                 __asm__ __volatile__(                                   \
152                 "str    %0, [%1, #0]    @ outlc"                        \
153                 : : "r" (v), "r" ((port)));             \
154 })
155
156 #define __inlc(port)                                                    \
157 ({                                                                      \
158         unsigned long result;                                           \
159         if (__PORT_PCIO((port)))                                        \
160                 __asm__ __volatile__(                                   \
161                 "ldr    %0, [%1, %2]    @ inlc"                         \
162                 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port)));      \
163         else                                                            \
164                 __asm__ __volatile__(                                   \
165                 "ldr    %0, [%1, #0]    @ inlc"                         \
166                 : "=r" (result) : "r" ((port)));                \
167         result;                                                         \
168 })
169
170 #define __ioaddrc(port) ((void __iomem *)(__PORT_PCIO(port) ? PCIO_BASE + (port) : (port)))
171
172 #define inb(p)          (__builtin_constant_p((p)) ? __inbc(p)     : __inb(p))
173 #define inw(p)          (__builtin_constant_p((p)) ? __inwc(p)     : __inw(p))
174 #define inl(p)          (__builtin_constant_p((p)) ? __inlc(p)     : __inl(p))
175 #define outb(v,p)       (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
176 #define outw(v,p)       (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
177 #define outl(v,p)       (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
178 #define __ioaddr(p)     (__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
179 /* the following macro is deprecated */
180 #define ioaddr(port)                    __ioaddr((port))
181
182 #define insb(p,d,l)     __raw_readsb(__ioaddr(p),d,l)
183 #define insw(p,d,l)     __raw_readsw(__ioaddr(p),d,l)
184 #define insl(p,d,l)     __raw_readsl(__ioaddr(p),d,l)
185
186 #define outsb(p,d,l)    __raw_writesb(__ioaddr(p),d,l)
187 #define outsw(p,d,l)    __raw_writesw(__ioaddr(p),d,l)
188 #define outsl(p,d,l)    __raw_writesl(__ioaddr(p),d,l)
189
190 /*
191  * 1:1 mapping for ioremapped regions.
192  */
193 #define __mem_pci(x)    (x)
194
195 #endif