include/asm-arm26/tlb.h

   1 #ifndef __ASMARM_TLB_H
   2 #define __ASMARM_TLB_H
   3
   4 #include <asm/pgalloc.h>
   5 #include <asm/tlbflush.h>
   6 #include <linux/vs_memory.h>
   7
   8 /*
   9  * TLB handling.  This allows us to remove pages from the page
  10  * tables, and efficiently handle the TLB issues.
  11  */
  12 struct mmu_gather {
  13         struct mm_struct        *mm;
  14         unsigned int            need_flush;
  15         unsigned int            fullmm;
  16 };
  17
  18 DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
  19
  20 static inline struct mmu_gather *
  21 tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
  22 {
  23         struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
  24
  25         tlb->mm = mm;
  26         tlb->need_flush = 0;
  27         tlb->fullmm = full_mm_flush;
  28
  29         return tlb;
  30 }
  31
  32 static inline void
  33 tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
  34 {
  35         if (tlb->need_flush)
  36                 flush_tlb_mm(tlb->mm);
  37
  38         /* keep the page table cache within bounds */
  39         check_pgt_cache();
  40
  41         put_cpu_var(mmu_gathers);
  42 }
  43
  44 #define tlb_remove_tlb_entry(tlb,ptep,address)  do { } while (0)
  45 //#define tlb_start_vma(tlb,vma)                  do { } while (0)
  46 //FIXME - ARM32 uses this now that things changed in the kernel. seems like it may be pointless on arm26, however to get things compiling...
  47 #define tlb_start_vma(tlb,vma)                                          \
  48         do {                                                            \
  49                 if (!tlb->fullmm)                                       \
  50                         flush_cache_range(vma, vma->vm_start, vma->vm_end); \
  51         } while (0)
  52 #define tlb_end_vma(tlb,vma)                    do { } while (0)
  53
  54 static inline void
  55 tlb_remove_page(struct mmu_gather *tlb, struct page *page)
  56 {
  57         tlb->need_flush = 1;
  58         free_page_and_swap_cache(page);
  59 }
  60
  61 #define pte_free_tlb(tlb,ptep)          pte_free(ptep)
  62 #define pmd_free_tlb(tlb,pmdp)          pmd_free(pmdp)
  63
  64 #endif