patch-2_6_7-vs1_9_1_12
[linux-2.6.git] / include / asm-h8300 / bitops.h
1 #ifndef _H8300_BITOPS_H
2 #define _H8300_BITOPS_H
3
4 /*
5  * Copyright 1992, Linus Torvalds.
6  * Copyright 2002, Yoshinori Sato
7  */
8
9 #include <linux/kernel.h>
10 #include <linux/config.h>
11 #include <linux/compiler.h>
12 #include <asm/byteorder.h>      /* swab32 */
13 #include <asm/system.h>
14
15 #ifdef __KERNEL__
16 /*
17  * Function prototypes to keep gcc -Wall happy
18  */
19
20 /*
21  * ffz = Find First Zero in word. Undefined if no zero exists,
22  * so code should check against ~0UL first..
23  */
24 static __inline__ unsigned long ffz(unsigned long word)
25 {
26         unsigned long result;
27
28         result = -1;
29         __asm__("1:\n\t"
30                 "shlr.l %2\n\t"
31                 "adds #1,%0\n\t"
32                 "bcs 1b"
33                 : "=r" (result)
34                 : "0"  (result),"r" (word));
35         return result;
36 }
37
38 #define H8300_GEN_BITOP_CONST(OP,BIT)                       \
39         case BIT:                                           \
40         __asm__(OP " #" #BIT ",@%0"::"r"(b_addr):"memory"); \
41         break;
42
43 #define H8300_GEN_BITOP(FNAME,OP)                                     \
44 static __inline__ void FNAME(int nr, volatile unsigned long* addr)    \
45 {                                                                     \
46         volatile unsigned char *b_addr;                               \
47         b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3);    \
48         if (__builtin_constant_p(nr)) {                               \
49                 switch(nr & 7) {                                      \
50                         H8300_GEN_BITOP_CONST(OP,0)                   \
51                         H8300_GEN_BITOP_CONST(OP,1)                   \
52                         H8300_GEN_BITOP_CONST(OP,2)                   \
53                         H8300_GEN_BITOP_CONST(OP,3)                   \
54                         H8300_GEN_BITOP_CONST(OP,4)                   \
55                         H8300_GEN_BITOP_CONST(OP,5)                   \
56                         H8300_GEN_BITOP_CONST(OP,6)                   \
57                         H8300_GEN_BITOP_CONST(OP,7)                   \
58                 }                                                     \
59         } else {                                                      \
60                 __asm__(OP " %w0,@%1"::"r"(nr),"r"(b_addr):"memory"); \
61         }                                                             \
62 }
63
64 /*
65  * clear_bit() doesn't provide any barrier for the compiler.
66  */
67 #define smp_mb__before_clear_bit()      barrier()
68 #define smp_mb__after_clear_bit()       barrier()
69
70 H8300_GEN_BITOP(set_bit   ,"bset")
71 H8300_GEN_BITOP(clear_bit ,"bclr")
72 H8300_GEN_BITOP(change_bit,"bnot")
73 #define __set_bit(nr,addr)    set_bit((nr),(addr))
74 #define __clear_bit(nr,addr)  clear_bit((nr),(addr))
75 #define __change_bit(nr,addr) change_bit((nr),(addr))
76
77 #undef H8300_GEN_BITOP
78 #undef H8300_GEN_BITOP_CONST
79
80 static __inline__ int test_bit(int nr, const unsigned long* addr)
81 {
82         return (*((volatile unsigned char *)addr + 
83                ((nr >> 3) ^ 3)) & (1UL << (nr & 7))) != 0;
84 }
85
86 #define __test_bit(nr, addr) test_bit(nr, addr)
87
88 #define H8300_GEN_TEST_BITOP_CONST_INT(OP,BIT)                       \
89         case BIT:                                                    \
90         __asm__("stc ccr,%w1\n\t"                                    \
91                 "orc #0x80,ccr\n\t"                                  \
92                 "bld #" #BIT ",@%4\n\t"                              \
93                 OP " #" #BIT ",@%4\n\t"                              \
94                 "rotxl.l %0\n\t"                                     \
95                 "ldc %w1,ccr"                                        \
96                 : "=r"(retval),"=&r"(ccrsave),"=m"(*b_addr)          \
97                 : "0" (retval),"r" (b_addr)                          \
98                 : "memory");                                         \
99         break;
100
101 #define H8300_GEN_TEST_BITOP_CONST(OP,BIT)                           \
102         case BIT:                                                    \
103         __asm__("bld #" #BIT ",@%3\n\t"                              \
104                 OP " #" #BIT ",@%3\n\t"                              \
105                 "rotxl.l %0\n\t"                                     \
106                 : "=r"(retval),"=m"(*b_addr)                         \
107                 : "0" (retval),"r" (b_addr)                          \
108                 : "memory");                                         \
109         break;
110
111 #define H8300_GEN_TEST_BITOP(FNNAME,OP)                              \
112 static __inline__ int FNNAME(int nr, volatile void * addr)           \
113 {                                                                    \
114         int retval = 0;                                              \
115         char ccrsave;                                                \
116         volatile unsigned char *b_addr;                              \
117         b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3);   \
118         if (__builtin_constant_p(nr)) {                              \
119                 switch(nr & 7) {                                     \
120                         H8300_GEN_TEST_BITOP_CONST_INT(OP,0)         \
121                         H8300_GEN_TEST_BITOP_CONST_INT(OP,1)         \
122                         H8300_GEN_TEST_BITOP_CONST_INT(OP,2)         \
123                         H8300_GEN_TEST_BITOP_CONST_INT(OP,3)         \
124                         H8300_GEN_TEST_BITOP_CONST_INT(OP,4)         \
125                         H8300_GEN_TEST_BITOP_CONST_INT(OP,5)         \
126                         H8300_GEN_TEST_BITOP_CONST_INT(OP,6)         \
127                         H8300_GEN_TEST_BITOP_CONST_INT(OP,7)         \
128                 }                                                    \
129         } else {                                                     \
130                 __asm__("stc ccr,%w1\n\t"                            \
131                         "orc #0x80,ccr\n\t"                          \
132                         "btst %w5,@%4\n\t"                           \
133                         OP " %w5,@%4\n\t"                            \
134                         "beq 1f\n\t"                                 \
135                         "inc.l #1,%0\n"                              \
136                         "1:\n\t"                                     \
137                         "ldc %w1,ccr"                                \
138                         : "=r"(retval),"=&r"(ccrsave),"=m"(*b_addr)  \
139                         : "0" (retval),"r" (b_addr),"r"(nr)          \
140                         : "memory");                                 \
141         }                                                            \
142         return retval;                                               \
143 }                                                                    \
144                                                                      \
145 static __inline__ int __ ## FNNAME(int nr, volatile void * addr)     \
146 {                                                                    \
147         int retval = 0;                                              \
148         volatile unsigned char *b_addr;                              \
149         b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3);   \
150         if (__builtin_constant_p(nr)) {                              \
151                 switch(nr & 7) {                                     \
152                         H8300_GEN_TEST_BITOP_CONST(OP,0)             \
153                         H8300_GEN_TEST_BITOP_CONST(OP,1)             \
154                         H8300_GEN_TEST_BITOP_CONST(OP,2)             \
155                         H8300_GEN_TEST_BITOP_CONST(OP,3)             \
156                         H8300_GEN_TEST_BITOP_CONST(OP,4)             \
157                         H8300_GEN_TEST_BITOP_CONST(OP,5)             \
158                         H8300_GEN_TEST_BITOP_CONST(OP,6)             \
159                         H8300_GEN_TEST_BITOP_CONST(OP,7)             \
160                 }                                                    \
161         } else {                                                     \
162                 __asm__("btst %w4,@%3\n\t"                           \
163                         OP " %w4,@%3\n\t"                            \
164                         "beq 1f\n\t"                                 \
165                         "inc.l #1,%0\n"                              \
166                         "1:"                                         \
167                         : "=r"(retval),"=m"(*b_addr)                 \
168                         : "0" (retval),"r" (b_addr),"r"(nr)          \
169                         : "memory");                                 \
170         }                                                            \
171         return retval;                                               \
172 }
173
174 H8300_GEN_TEST_BITOP(test_and_set_bit,   "bset")
175 H8300_GEN_TEST_BITOP(test_and_clear_bit, "bclr")
176 H8300_GEN_TEST_BITOP(test_and_change_bit,"bnot")
177 #undef H8300_GEN_TEST_BITOP_CONST
178 #undef H8300_GEN_TEST_BITOP_CONST_INT
179 #undef H8300_GEN_TEST_BITOP
180
181 #define find_first_zero_bit(addr, size) \
182         find_next_zero_bit((addr), (size), 0)
183
184 static __inline__ unsigned long __ffs(unsigned long word)
185 {
186         unsigned long result;
187
188         result = -1;
189         __asm__("1:\n\t"
190                 "shlr.l %2\n\t"
191                 "adds #1,%0\n\t"
192                 "bcc 1b"
193                 : "=r" (result)
194                 : "0"(result),"r"(word));
195         return result;
196 }
197
198 #define ffs(x) generic_ffs(x)
199 #define fls(x) generic_fls(x)
200
201 static __inline__ int find_next_zero_bit (void * addr, int size, int offset)
202 {
203         unsigned long *p = (unsigned long *)(((unsigned long)addr + (offset >> 3)) & ~3);
204         unsigned long result = offset & ~31UL;
205         unsigned long tmp;
206
207         if (offset >= size)
208                 return size;
209         size -= result;
210         offset &= 31UL;
211         if (offset) {
212                 tmp = *(p++);
213                 tmp |= ~0UL >> (32-offset);
214                 if (size < 32)
215                         goto found_first;
216                 if (~tmp)
217                         goto found_middle;
218                 size -= 32;
219                 result += 32;
220         }
221         while (size & ~31UL) {
222                 if (~(tmp = *(p++)))
223                         goto found_middle;
224                 result += 32;
225                 size -= 32;
226         }
227         if (!size)
228                 return result;
229         tmp = *p;
230
231 found_first:
232         tmp |= ~0UL >> size;
233 found_middle:
234         return result + ffz(tmp);
235 }
236
237 static __inline__ unsigned long find_next_bit(const unsigned long *addr,
238         unsigned long size, unsigned long offset)
239 {
240         unsigned long *p = (unsigned long *)(((unsigned long)addr + (offset >> 3)) & ~3);
241         unsigned int result = offset & ~31UL;
242         unsigned int tmp;
243
244         if (offset >= size)
245                 return size;
246         size -= result;
247         offset &= 31UL;
248         if (offset) {
249                 tmp = *(p++);
250                 tmp &= ~0UL << offset;
251                 if (size < 32)
252                         goto found_first;
253                 if (tmp)
254                         goto found_middle;
255                 size -= 32;
256                 result += 32;
257         }
258         while (size >= 32) {
259                 if ((tmp = *p++) != 0)
260                         goto found_middle;
261                 result += 32;
262                 size -= 32;
263         }
264         if (!size)
265                 return result;
266         tmp = *p;
267
268 found_first:
269         tmp &= ~0UL >> (32 - size);
270         if (tmp == 0UL)
271                 return result + size;
272 found_middle:
273         return result + __ffs(tmp);
274 }
275
276 /*
277  * Every architecture must define this function. It's the fastest
278  * way of searching a 140-bit bitmap where the first 100 bits are
279  * unlikely to be set. It's guaranteed that at least one of the 140
280  * bits is cleared.
281  */
282 static inline int sched_find_first_bit(unsigned long *b)
283 {
284         if (unlikely(b[0]))
285                 return __ffs(b[0]);
286         if (unlikely(b[1]))
287                 return __ffs(b[1]) + 32;
288         if (unlikely(b[2]))
289                 return __ffs(b[2]) + 64;
290         if (b[3])
291                 return __ffs(b[3]) + 96;
292         return __ffs(b[4]) + 128;
293 }
294
295 /*
296  * hweightN: returns the hamming weight (i.e. the number
297  * of bits set) of a N-bit word
298  */
299
300 #define hweight32(x) generic_hweight32(x)
301 #define hweight16(x) generic_hweight16(x)
302 #define hweight8(x) generic_hweight8(x)
303
304 static __inline__ int ext2_set_bit(int nr, volatile void * addr)
305 {
306         int             mask, retval;
307         unsigned long   flags;
308         volatile unsigned char  *ADDR = (unsigned char *) addr;
309
310         ADDR += nr >> 3;
311         mask = 1 << (nr & 0x07);
312         local_irq_save(flags);
313         retval = (mask & *ADDR) != 0;
314         *ADDR |= mask;
315         local_irq_restore(flags);
316         return retval;
317 }
318 #define ext2_set_bit_atomic(lock, nr, addr) ext2_set_bit(nr, addr)
319
320 static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
321 {
322         int             mask, retval;
323         unsigned long   flags;
324         volatile unsigned char  *ADDR = (unsigned char *) addr;
325
326         ADDR += nr >> 3;
327         mask = 1 << (nr & 0x07);
328         local_irq_save(flags);
329         retval = (mask & *ADDR) != 0;
330         *ADDR &= ~mask;
331         local_irq_restore(flags);
332         return retval;
333 }
334 #define ext2_clear_bit_atomic(lock, nr, addr) ext2_set_bit(nr, addr)
335
336 static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
337 {
338         int                     mask;
339         const volatile unsigned char    *ADDR = (const unsigned char *) addr;
340
341         ADDR += nr >> 3;
342         mask = 1 << (nr & 0x07);
343         return ((mask & *ADDR) != 0);
344 }
345
346 #define ext2_find_first_zero_bit(addr, size) \
347         ext2_find_next_zero_bit((addr), (size), 0)
348
349 static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
350 {
351         unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
352         unsigned long result = offset & ~31UL;
353         unsigned long tmp;
354
355         if (offset >= size)
356                 return size;
357         size -= result;
358         offset &= 31UL;
359         if(offset) {
360                 /* We hold the little endian value in tmp, but then the
361                  * shift is illegal. So we could keep a big endian value
362                  * in tmp, like this:
363                  *
364                  * tmp = __swab32(*(p++));
365                  * tmp |= ~0UL >> (32-offset);
366                  *
367                  * but this would decrease performance, so we change the
368                  * shift:
369                  */
370                 tmp = *(p++);
371                 tmp |= __swab32(~0UL >> (32-offset));
372                 if(size < 32)
373                         goto found_first;
374                 if(~tmp)
375                         goto found_middle;
376                 size -= 32;
377                 result += 32;
378         }
379         while(size & ~31UL) {
380                 if(~(tmp = *(p++)))
381                         goto found_middle;
382                 result += 32;
383                 size -= 32;
384         }
385         if(!size)
386                 return result;
387         tmp = *p;
388
389 found_first:
390         /* tmp is little endian, so we would have to swab the shift,
391          * see above. But then we have to swab tmp below for ffz, so
392          * we might as well do this here.
393          */
394         return result + ffz(__swab32(tmp) | (~0UL << size));
395 found_middle:
396         return result + ffz(__swab32(tmp));
397 }
398
399 /* Bitmap functions for the minix filesystem.  */
400 #define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
401 #define minix_set_bit(nr,addr) set_bit(nr,addr)
402 #define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
403 #define minix_test_bit(nr,addr) test_bit(nr,addr)
404 #define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
405
406 #endif /* __KERNEL__ */
407
408 #endif /* _H8300_BITOPS_H */