1 #ifndef __ASM_MACH_APIC_H
2 #define __ASM_MACH_APIC_H
4 #include <linux/config.h>
7 #define esr_disable (1)
8 #define NO_BALANCE_IRQ (0)
10 #define NO_IOAPIC_CHECK (1) /* Don't check I/O APIC ID for xAPIC */
12 /* In clustered mode, the high nibble of APIC ID is a cluster number.
13 * The low nibble is a 4-bit bitmap. */
14 #define XAPIC_DEST_CPUS_SHIFT 4
15 #define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
16 #define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
18 #define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
20 static inline cpumask_t target_cpus(void)
24 #define TARGET_CPUS (target_cpus())
26 #define INT_DELIVERY_MODE (dest_Fixed)
27 #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
29 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
34 /* we don't use the phys_cpu_present_map to indicate apicid presence */
35 static inline unsigned long check_apicid_present(int bit)
40 #define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
42 extern u8 bios_cpu_apicid[];
43 extern u8 cpu_2_logical_apicid[];
45 static inline void init_apic_ldr(void)
47 unsigned long val, id;
50 u8 my_id = (u8)hard_smp_processor_id();
51 u8 my_cluster = (u8)apicid_cluster(my_id);
53 /* Create logical APIC IDs by counting CPUs already in cluster. */
54 for (count = 0, i = NR_CPUS; --i >= 0; ) {
55 lid = cpu_2_logical_apicid[i];
56 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
59 /* We only have a 4 wide bitmap in cluster mode. If a deranged
60 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
61 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
62 id = my_cluster | (1UL << count);
63 apic_write_around(APIC_DFR, APIC_DFR_VALUE);
64 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
65 val |= SET_APIC_LOGICAL_ID(id);
66 apic_write_around(APIC_LDR, val);
69 static inline int multi_timer_check(int apic, int irq)
74 static inline int apic_id_registered(void)
79 static inline void clustered_apic_check(void)
81 printk("Enabling APIC mode: Summit. Using %d I/O APICs\n",
85 static inline int apicid_to_node(int logical_apicid)
87 return logical_apicid >> 5; /* 2 clusterids per CEC */
90 /* Mapping from cpu number to logical apicid */
91 static inline int cpu_to_logical_apicid(int cpu)
95 return (int)cpu_2_logical_apicid[cpu];
98 static inline int cpu_present_to_apicid(int mps_cpu)
100 if (mps_cpu < NR_CPUS)
101 return (int)bios_cpu_apicid[mps_cpu];
106 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
108 /* For clustered we don't have a good way to do this yet - hack */
109 return physids_promote(0x0F);
112 static inline physid_mask_t apicid_to_cpu_present(int apicid)
114 return physid_mask_of_physid(0);
117 static inline int mpc_apic_id(struct mpc_config_processor *m,
118 struct mpc_config_translation *translation_record)
120 printk("Processor #%d %ld:%ld APIC version %d\n",
122 (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
123 (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
125 return (m->mpc_apicid);
128 static inline void setup_portio_remap(void)
132 static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
137 static inline void enable_apic_mode(void)
141 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
148 num_bits_set = cpus_weight(cpumask);
149 /* Return id to all */
150 if (num_bits_set == NR_CPUS)
153 * The cpus in the mask must all be on the apic cluster. If are not
154 * on the same apicid cluster return default value of TARGET_CPUS.
156 cpu = first_cpu(cpumask);
157 apicid = cpu_to_logical_apicid(cpu);
158 while (cpus_found < num_bits_set) {
159 if (cpu_isset(cpu, cpumask)) {
160 int new_apicid = cpu_to_logical_apicid(cpu);
161 if (apicid_cluster(apicid) !=
162 apicid_cluster(new_apicid)){
163 printk ("%s: Not a valid mask!\n",__FUNCTION__);
166 apicid = apicid | new_apicid;
174 /* cpuid returns the value latched in the HW at reset, not the APIC ID
175 * register's value. For any box whose BIOS changes APIC IDs, like
176 * clustered APIC systems, we must use hard_smp_processor_id.
178 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
180 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
182 return hard_smp_processor_id() >> index_msb;
185 #endif /* __ASM_MACH_APIC_H */