4 #include <linux/string.h>
5 #include <linux/compiler.h>
8 * This file contains the definitions for the x86 IO instructions
9 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
10 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
11 * versions of the single-IO instructions (inb_p/inw_p/..).
13 * This file is not meant to be obfuscating: it's just complicated
14 * to (a) handle it all in a way that makes gcc able to optimize it
15 * as well as possible and (b) trying to avoid writing the same thing
16 * over and over again with slight variations and possibly making a
21 * Thanks to James van Artsdalen for a better timing-fix than
22 * the two short jumps: using outb's to a nonexistent port seems
23 * to guarantee better timings even on fast machines.
25 * On the other hand, I'd like to be sure of a non-existent port:
26 * I feel a bit unsafe about using 0x80 (should be safe, though)
32 * Bit simplified and optimized by Jan Hubicka
33 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
35 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
36 * isa_read[wl] and isa_write[wl] fixed
37 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
40 #define IO_SPACE_LIMIT 0xffff
42 #define XQUAD_PORTIO_BASE 0xfe400000
43 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
47 #include <asm-generic/iomap.h>
49 #include <linux/vmalloc.h>
50 #include <asm/fixmap.h>
53 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
56 #define xlate_dev_mem_ptr(p) __va(p)
59 * Convert a virtual cached pointer to an uncached pointer
61 #define xlate_dev_kmem_ptr(p) p
64 * virt_to_phys - map virtual addresses to physical
65 * @address: address to remap
67 * The returned physical address is the physical (CPU) mapping for
68 * the memory address given. It is only valid to use this function on
69 * addresses directly mapped or allocated via kmalloc.
71 * This function does not give bus mappings for DMA transfers. In
72 * almost all conceivable cases a device driver should not be using
76 static inline unsigned long virt_to_phys(volatile void * address)
82 * phys_to_virt - map physical address to virtual
83 * @address: address to remap
85 * The returned virtual address is a current CPU mapping for
86 * the memory address given. It is only valid to use this function on
87 * addresses that have a kernel mapping
89 * This function does not handle bus mappings for DMA transfers. In
90 * almost all conceivable cases a device driver should not be using
94 static inline void * phys_to_virt(unsigned long address)
100 * Change "struct page" to physical address.
102 #define page_to_pseudophys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
103 #define page_to_phys(page) (phys_to_machine(page_to_pseudophys(page)))
104 #define page_to_bus(page) (phys_to_machine(page_to_pseudophys(page)))
106 #define bio_to_pseudophys(bio) (page_to_pseudophys(bio_page((bio))) + \
107 (unsigned long) bio_offset((bio)))
108 #define bvec_to_pseudophys(bv) (page_to_pseudophys((bv)->bv_page) + \
109 (unsigned long) (bv)->bv_offset)
111 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
112 (((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2))) && \
113 ((bvec_to_pseudophys((vec1)) + (vec1)->bv_len) == \
114 bvec_to_pseudophys((vec2))))
116 extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
119 * ioremap - map bus memory into CPU space
120 * @offset: bus address of the memory
121 * @size: size of the resource to map
123 * ioremap performs a platform specific sequence of operations to
124 * make bus memory CPU accessible via the readb/readw/readl/writeb/
125 * writew/writel functions and the other mmio helpers. The returned
126 * address is not guaranteed to be usable directly as a virtual
130 static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
132 return __ioremap(offset, size, 0);
135 extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
136 extern void iounmap(volatile void __iomem *addr);
139 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
140 * mappings, before the real ioremap() is functional.
141 * A boot-time mapping is currently limited to at most 16 pages.
143 extern void *bt_ioremap(unsigned long offset, unsigned long size);
144 extern void bt_iounmap(void *addr, unsigned long size);
146 /* Use early IO mappings for DMI because it's initialized early */
147 #define dmi_ioremap bt_ioremap
148 #define dmi_iounmap bt_iounmap
149 #define dmi_alloc alloc_bootmem
152 * ISA I/O bus memory addresses are 1:1 with the physical address.
154 #define isa_virt_to_bus(_x) isa_virt_to_bus_is_UNSUPPORTED->x
155 #define isa_page_to_bus(_x) isa_page_to_bus_is_UNSUPPORTED->x
157 static inline void *isa_bus_to_virt(unsigned long address)
159 return (void *)(__fix_to_virt(FIX_ISAMAP_BEGIN) + address);
163 * However PCI ones are not necessarily 1:1 and therefore these interfaces
164 * are forbidden in portable PCI drivers.
166 * Allow them on x86 for legacy drivers, though.
168 #define virt_to_bus(_x) phys_to_machine(__pa(_x))
169 #define bus_to_virt(_x) __va(machine_to_phys(_x))
172 * readX/writeX() are used to access memory mapped devices. On some
173 * architectures the memory mapped IO stuff needs to be accessed
174 * differently. On the x86 architecture, we just read/write the
175 * memory location directly.
178 static inline unsigned char readb(const volatile void __iomem *addr)
180 return *(volatile unsigned char __force *) addr;
182 static inline unsigned short readw(const volatile void __iomem *addr)
184 return *(volatile unsigned short __force *) addr;
186 static inline unsigned int readl(const volatile void __iomem *addr)
188 return *(volatile unsigned int __force *) addr;
190 #define readb_relaxed(addr) readb(addr)
191 #define readw_relaxed(addr) readw(addr)
192 #define readl_relaxed(addr) readl(addr)
193 #define __raw_readb readb
194 #define __raw_readw readw
195 #define __raw_readl readl
197 static inline void writeb(unsigned char b, volatile void __iomem *addr)
199 *(volatile unsigned char __force *) addr = b;
201 static inline void writew(unsigned short b, volatile void __iomem *addr)
203 *(volatile unsigned short __force *) addr = b;
205 static inline void writel(unsigned int b, volatile void __iomem *addr)
207 *(volatile unsigned int __force *) addr = b;
209 #define __raw_writeb writeb
210 #define __raw_writew writew
211 #define __raw_writel writel
215 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
217 memset((void __force *) addr, val, count);
219 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
221 __memcpy(dst, (void __force *) src, count);
223 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
225 __memcpy((void __force *) dst, src, count);
229 * ISA space is 'always mapped' on a typical x86 system, no need to
230 * explicitly ioremap() it. The fact that the ISA IO space is mapped
231 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
232 * are physical addresses. The following constant pointer can be
233 * used as the IO-area pointer (it can be iounmapped as well, so the
234 * analogy with PCI is quite large):
236 #define __ISA_IO_base ((char __iomem *)(fix_to_virt(FIX_ISAMAP_BEGIN)))
239 * Again, i386 does not require mem IO specific function.
242 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
247 * This needed for two cases
248 * 1. Out of order aware processors
249 * 2. Accidentally out of order processors (PPro errata #51)
252 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
254 static inline void flush_write_buffers(void)
256 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
259 #define dma_cache_inv(_start,_size) flush_write_buffers()
260 #define dma_cache_wback(_start,_size) flush_write_buffers()
261 #define dma_cache_wback_inv(_start,_size) flush_write_buffers()
267 #define dma_cache_inv(_start,_size) do { } while (0)
268 #define dma_cache_wback(_start,_size) do { } while (0)
269 #define dma_cache_wback_inv(_start,_size) do { } while (0)
270 #define flush_write_buffers()
274 #endif /* __KERNEL__ */
276 #if defined(CONFIG_PARAVIRT)
277 #include <asm/paravirt.h>
280 #define __SLOW_DOWN_IO "outb %%al,$0x80;"
282 static inline void slow_down_io(void) {
283 __asm__ __volatile__(
285 #ifdef REALLY_SLOW_IO
286 __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
293 #ifdef CONFIG_X86_NUMAQ
294 extern void *xquad_portio; /* Where the IO area was mapped */
295 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
296 #define __BUILDIO(bwl,bw,type) \
297 static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
299 write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
301 out##bwl##_local(value, port); \
303 static inline void out##bwl(unsigned type value, int port) { \
304 out##bwl##_quad(value, port, 0); \
306 static inline unsigned type in##bwl##_quad(int port, int quad) { \
308 return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
310 return in##bwl##_local(port); \
312 static inline unsigned type in##bwl(int port) { \
313 return in##bwl##_quad(port, 0); \
316 #define __BUILDIO(bwl,bw,type) \
317 static inline void out##bwl(unsigned type value, int port) { \
318 out##bwl##_local(value, port); \
320 static inline unsigned type in##bwl(int port) { \
321 return in##bwl##_local(port); \
326 #define BUILDIO(bwl,bw,type) \
327 static inline void out##bwl##_local(unsigned type value, int port) { \
328 __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
330 static inline unsigned type in##bwl##_local(int port) { \
331 unsigned type value; \
332 __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
335 static inline void out##bwl##_local_p(unsigned type value, int port) { \
336 out##bwl##_local(value, port); \
339 static inline unsigned type in##bwl##_local_p(int port) { \
340 unsigned type value = in##bwl##_local(port); \
344 __BUILDIO(bwl,bw,type) \
345 static inline void out##bwl##_p(unsigned type value, int port) { \
346 out##bwl(value, port); \
349 static inline unsigned type in##bwl##_p(int port) { \
350 unsigned type value = in##bwl(port); \
354 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
355 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
357 static inline void ins##bwl(int port, void *addr, unsigned long count) { \
358 __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
365 /* We will be supplying our own /dev/mem implementation */
366 #define ARCH_HAS_DEV_MEM