include/asm-i386/mmu_context.h

   1 #ifndef __I386_SCHED_H
   2 #define __I386_SCHED_H
   3
   4 #include <linux/config.h>
   5 #include <asm/desc.h>
   6 #include <asm/atomic.h>
   7 #include <asm/pgalloc.h>
   8 #include <asm/tlbflush.h>
   9
  10 /*
  11  * Used for LDT copy/destruction.
  12  */
  13 int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
  14 void destroy_context(struct mm_struct *mm);
  15
  16
  17 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  18 {
  19 #ifdef CONFIG_SMP
  20         unsigned cpu = smp_processor_id();
  21         if (cpu_tlbstate[cpu].state == TLBSTATE_OK)
  22                 cpu_tlbstate[cpu].state = TLBSTATE_LAZY;
  23 #endif
  24 }
  25
  26 static inline void switch_mm(struct mm_struct *prev,
  27                              struct mm_struct *next,
  28                              struct task_struct *tsk)
  29 {
  30         int cpu = smp_processor_id();
  31
  32 #ifdef CONFIG_X86_SWITCH_PAGETABLES
  33         if (tsk->mm)
  34                 tsk->thread_info->user_pgd = (void *)__pa(tsk->mm->pgd);
  35 #endif
  36         if (likely(prev != next)) {
  37                 /* stop flush ipis for the previous mm */
  38                 cpu_clear(cpu, prev->cpu_vm_mask);
  39 #ifdef CONFIG_SMP
  40                 cpu_tlbstate[cpu].state = TLBSTATE_OK;
  41                 cpu_tlbstate[cpu].active_mm = next;
  42 #endif
  43                 cpu_set(cpu, next->cpu_vm_mask);
  44
  45                 /* Re-load page tables */
  46 #if !defined(CONFIG_X86_SWITCH_PAGETABLES)
  47                 load_cr3(next->pgd);
  48 #endif
  49
  50                 /*
  51                  * load the LDT, if the LDT is different:
  52                  */
  53                 if (unlikely(prev->context.size + next->context.size))
  54                         load_LDT_nolock(&next->context, cpu);
  55         }
  56 #ifdef CONFIG_SMP
  57         else {
  58                 cpu_tlbstate[cpu].state = TLBSTATE_OK;
  59                 BUG_ON(cpu_tlbstate[cpu].active_mm != next);
  60
  61                 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
  62                         /* We were in lazy tlb mode and leave_mm disabled
  63                          * tlb flush IPI delivery. We must reload %cr3.
  64                          */
  65 #if !defined(CONFIG_X86_SWITCH_PAGETABLES)
  66                         load_cr3(next->pgd);
  67 #endif
  68                         load_LDT_nolock(&next->context, cpu);
  69                 }
  70         }
  71 #endif
  72 }
  73
  74 #define deactivate_mm(tsk, mm) \
  75         asm("movl %0,%%fs ; movl %0,%%gs": :"r" (0))
  76
  77 #define activate_mm(prev, next) \
  78         switch_mm((prev),(next),current)
  79
  80 #endif