VServer 1.9.2 (patch-2.6.8.1-vs1.9.2.diff)
[linux-2.6.git] / include / asm-i386 / spinlock.h
1 #ifndef __ASM_SPINLOCK_H
2 #define __ASM_SPINLOCK_H
3
4 #include <asm/atomic.h>
5 #include <asm/rwlock.h>
6 #include <asm/page.h>
7 #include <linux/config.h>
8 #include <linux/compiler.h>
9
10 asmlinkage int printk(const char * fmt, ...)
11         __attribute__ ((format (printf, 1, 2)));
12
13 /*
14  * Your basic SMP spinlocks, allowing only a single CPU anywhere
15  */
16
17 typedef struct {
18         volatile unsigned int lock;
19 #ifdef CONFIG_DEBUG_SPINLOCK
20         unsigned magic;
21 #endif
22 } spinlock_t;
23
24 #define SPINLOCK_MAGIC  0xdead4ead
25
26 #ifdef CONFIG_DEBUG_SPINLOCK
27 #define SPINLOCK_MAGIC_INIT     , SPINLOCK_MAGIC
28 #else
29 #define SPINLOCK_MAGIC_INIT     /* */
30 #endif
31
32 #define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 SPINLOCK_MAGIC_INIT }
33
34 #define spin_lock_init(x)       do { *(x) = SPIN_LOCK_UNLOCKED; } while(0)
35
36 /*
37  * Simple spin lock operations.  There are two variants, one clears IRQ's
38  * on the local processor, one does not.
39  *
40  * We make no fairness assumptions. They have a cost.
41  */
42
43 #define spin_is_locked(x)       (*(volatile signed char *)(&(x)->lock) <= 0)
44 #define spin_unlock_wait(x)     do { barrier(); } while(spin_is_locked(x))
45
46 #define spin_lock_string \
47         "\n1:\t" \
48         "lock ; decb %0\n\t" \
49         "js 2f\n" \
50         LOCK_SECTION_START("") \
51         "2:\t" \
52         "rep;nop\n\t" \
53         "cmpb $0,%0\n\t" \
54         "jle 2b\n\t" \
55         "jmp 1b\n" \
56         LOCK_SECTION_END
57
58 #define spin_lock_string_flags \
59         "\n1:\t" \
60         "lock ; decb %0\n\t" \
61         "js 2f\n\t" \
62         LOCK_SECTION_START("") \
63         "2:\t" \
64         "testl $0x200, %1\n\t" \
65         "jz 3f\n\t" \
66         "sti\n\t" \
67         "3:\t" \
68         "rep;nop\n\t" \
69         "cmpb $0, %0\n\t" \
70         "jle 3b\n\t" \
71         "cli\n\t" \
72         "jmp 1b\n" \
73         LOCK_SECTION_END
74
75 /*
76  * This works. Despite all the confusion.
77  * (except on PPro SMP or if we are using OOSTORE)
78  * (PPro errata 66, 92)
79  */
80  
81 #if !defined(CONFIG_X86_OOSTORE) && !defined(CONFIG_X86_PPRO_FENCE)
82
83 #define spin_unlock_string \
84         "movb $1,%0" \
85                 :"=m" (lock->lock) : : "memory"
86
87
88 static inline void _raw_spin_unlock(spinlock_t *lock)
89 {
90 #ifdef CONFIG_DEBUG_SPINLOCK
91         BUG_ON(lock->magic != SPINLOCK_MAGIC);
92         BUG_ON(!spin_is_locked(lock));
93 #endif
94         __asm__ __volatile__(
95                 spin_unlock_string
96         );
97 }
98
99 #else
100
101 #define spin_unlock_string \
102         "xchgb %b0, %1" \
103                 :"=q" (oldval), "=m" (lock->lock) \
104                 :"0" (oldval) : "memory"
105
106 static inline void _raw_spin_unlock(spinlock_t *lock)
107 {
108         char oldval = 1;
109 #ifdef CONFIG_DEBUG_SPINLOCK
110         BUG_ON(lock->magic != SPINLOCK_MAGIC);
111         BUG_ON(!spin_is_locked(lock));
112 #endif
113         __asm__ __volatile__(
114                 spin_unlock_string
115         );
116 }
117
118 #endif
119
120 static inline int _raw_spin_trylock(spinlock_t *lock)
121 {
122         char oldval;
123         __asm__ __volatile__(
124                 "xchgb %b0,%1"
125                 :"=q" (oldval), "=m" (lock->lock)
126                 :"0" (0) : "memory");
127         return oldval > 0;
128 }
129
130 static inline void _raw_spin_lock(spinlock_t *lock)
131 {
132 #ifdef CONFIG_DEBUG_SPINLOCK
133         __label__ here;
134 here:
135         if (unlikely(lock->magic != SPINLOCK_MAGIC)) {
136                 printk("eip: %p\n", &&here);
137                 BUG();
138         }
139 #endif
140         __asm__ __volatile__(
141                 spin_lock_string
142                 :"=m" (lock->lock) : : "memory");
143 }
144
145 static inline void _raw_spin_lock_flags (spinlock_t *lock, unsigned long flags)
146 {
147 #ifdef CONFIG_DEBUG_SPINLOCK
148         __label__ here;
149 here:
150         if (unlikely(lock->magic != SPINLOCK_MAGIC)) {
151                 printk("eip: %p\n", &&here);
152                 BUG();
153         }
154 #endif
155         __asm__ __volatile__(
156                 spin_lock_string_flags
157                 :"=m" (lock->lock) : "r" (flags) : "memory");
158 }
159
160 /*
161  * Read-write spinlocks, allowing multiple readers
162  * but only one writer.
163  *
164  * NOTE! it is quite common to have readers in interrupts
165  * but no interrupt writers. For those circumstances we
166  * can "mix" irq-safe locks - any writer needs to get a
167  * irq-safe write-lock, but readers can get non-irqsafe
168  * read-locks.
169  */
170 typedef struct {
171         volatile unsigned int lock;
172 #ifdef CONFIG_DEBUG_SPINLOCK
173         unsigned magic;
174 #endif
175 } rwlock_t;
176
177 #define RWLOCK_MAGIC    0xdeaf1eed
178
179 #ifdef CONFIG_DEBUG_SPINLOCK
180 #define RWLOCK_MAGIC_INIT       , RWLOCK_MAGIC
181 #else
182 #define RWLOCK_MAGIC_INIT       /* */
183 #endif
184
185 #define RW_LOCK_UNLOCKED (rwlock_t) { RW_LOCK_BIAS RWLOCK_MAGIC_INIT }
186
187 #define rwlock_init(x)  do { *(x) = RW_LOCK_UNLOCKED; } while(0)
188
189 #define rwlock_is_locked(x) ((x)->lock != RW_LOCK_BIAS)
190
191 /*
192  * On x86, we implement read-write locks as a 32-bit counter
193  * with the high bit (sign) being the "contended" bit.
194  *
195  * The inline assembly is non-obvious. Think about it.
196  *
197  * Changed to use the same technique as rw semaphores.  See
198  * semaphore.h for details.  -ben
199  */
200 /* the spinlock helpers are in arch/i386/kernel/semaphore.c */
201
202 static inline void _raw_read_lock(rwlock_t *rw)
203 {
204 #ifdef CONFIG_DEBUG_SPINLOCK
205         BUG_ON(rw->magic != RWLOCK_MAGIC);
206 #endif
207         __build_read_lock(rw, "__read_lock_failed");
208 }
209
210 static inline void _raw_write_lock(rwlock_t *rw)
211 {
212 #ifdef CONFIG_DEBUG_SPINLOCK
213         BUG_ON(rw->magic != RWLOCK_MAGIC);
214 #endif
215         __build_write_lock(rw, "__write_lock_failed");
216 }
217
218 #define _raw_read_unlock(rw)            asm volatile("lock ; incl %0" :"=m" ((rw)->lock) : : "memory")
219 #define _raw_write_unlock(rw)   asm volatile("lock ; addl $" RW_LOCK_BIAS_STR ",%0":"=m" ((rw)->lock) : : "memory")
220
221 static inline int _raw_write_trylock(rwlock_t *lock)
222 {
223         atomic_t *count = (atomic_t *)lock;
224         if (atomic_sub_and_test(RW_LOCK_BIAS, count))
225                 return 1;
226         atomic_add(RW_LOCK_BIAS, count);
227         return 0;
228 }
229
230 #endif /* __ASM_SPINLOCK_H */