Merge to Fedora kernel-2.6.18-1.2224_FC5 patched with stable patch-2.6.18.1-vs2.0...
[linux-2.6.git] / include / asm-ia64 / intel_intrin.h
1 #ifndef _ASM_IA64_INTEL_INTRIN_H
2 #define _ASM_IA64_INTEL_INTRIN_H
3 /*
4  * Intel Compiler Intrinsics
5  *
6  * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
7  * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
8  * Copyright (C) 2005,2006 Hongjiu Lu <hongjiu.lu@intel.com>
9  *
10  */
11 #include <ia64intrin.h>
12
13 #define ia64_barrier()          __memory_barrier()
14
15 #define ia64_stop()     /* Nothing: As of now stop bit is generated for each
16                          * intrinsic
17                          */
18
19 #define __ia64_getreg           __getReg
20 #define __ia64_setreg           __setReg
21
22 #define __ia64_hint(x)
23
24 #define ia64_hint               __hint
25 #define ia64_hint_pause         __hint_pause
26
27 #define ia64_mux1_brcst         _m64_mux1_brcst
28 #define ia64_mux1_mix           _m64_mux1_mix
29 #define ia64_mux1_shuf          _m64_mux1_shuf
30 #define ia64_mux1_alt           _m64_mux1_alt
31 #define ia64_mux1_rev           _m64_mux1_rev
32
33 #define ia64_mux1(x,v)          _m_to_int64(_m64_mux1(_m_from_int64(x), (v)))
34 #define ia64_popcnt             _m64_popcnt
35 #define ia64_getf_exp           __getf_exp
36 #define ia64_shrp               _m64_shrp
37
38 #define __ia64_tpa              __tpa
39 #define ia64_invala             __invala
40 #define ia64_invala_gr          __invala_gr
41 #define ia64_invala_fr          __invala_fr
42 #define ia64_nop                __nop
43 #define ia64_sum                __sum
44 #define __ia64_ssm              __ssm
45 #define ia64_rum                __rum
46 #define __ia64_rsm              __rsm
47 #define __ia64_fc               __fc
48
49 #define ia64_ldfs               __ldfs
50 #define ia64_ldfd               __ldfd
51 #define ia64_ldfe               __ldfe
52 #define ia64_ldf8               __ldf8
53 #define ia64_ldf_fill           __ldf_fill
54
55 #define ia64_stfs               __stfs
56 #define ia64_stfd               __stfd
57 #define ia64_stfe               __stfe
58 #define ia64_stf8               __stf8
59 #define ia64_stf_spill          __stf_spill
60
61 #define ia64_mf                 __mf
62 #define ia64_mfa                __mfa
63
64 #define ia64_fetchadd4_acq      __fetchadd4_acq
65 #define ia64_fetchadd4_rel      __fetchadd4_rel
66 #define ia64_fetchadd8_acq      __fetchadd8_acq
67 #define ia64_fetchadd8_rel      __fetchadd8_rel
68
69 #define ia64_xchg1              _InterlockedExchange8
70 #define ia64_xchg2              _InterlockedExchange16
71 #define ia64_xchg4              _InterlockedExchange
72 #define ia64_xchg8              _InterlockedExchange64
73
74 #define ia64_cmpxchg1_rel       _InterlockedCompareExchange8_rel
75 #define ia64_cmpxchg1_acq       _InterlockedCompareExchange8_acq
76 #define ia64_cmpxchg2_rel       _InterlockedCompareExchange16_rel
77 #define ia64_cmpxchg2_acq       _InterlockedCompareExchange16_acq
78 #define ia64_cmpxchg4_rel       _InterlockedCompareExchange_rel
79 #define ia64_cmpxchg4_acq       _InterlockedCompareExchange_acq
80 #define ia64_cmpxchg8_rel       _InterlockedCompareExchange64_rel
81 #define ia64_cmpxchg8_acq       _InterlockedCompareExchange64_acq
82
83 #define __ia64_set_dbr(index, val)      \
84                 __setIndReg(_IA64_REG_INDR_DBR, index, val)
85 #define __ia64_set_ibr(index, val)      \
86                 __setIndReg(_IA64_REG_INDR_IBR, index, val)
87 #define __ia64_set_pkr(index, val)      \
88                 __setIndReg(_IA64_REG_INDR_PKR, index, val)
89 #define __ia64_set_pmc(index, val)      \
90                 __setIndReg(_IA64_REG_INDR_PMC, index, val)
91 #define __ia64_set_pmd(index, val)      \
92                 __setIndReg(_IA64_REG_INDR_PMD, index, val)
93 #define __ia64_set_rr(index, val)       \
94                 __setIndReg(_IA64_REG_INDR_RR, index, val)
95
96 #define __ia64_get_cpuid(index)         __getIndReg(_IA64_REG_INDR_CPUID, index)
97 #define __ia64_get_dbr(index)   __getIndReg(_IA64_REG_INDR_DBR, index)
98 #define __ia64_get_ibr(index)   __getIndReg(_IA64_REG_INDR_IBR, index)
99 #define __ia64_get_pkr(index)   __getIndReg(_IA64_REG_INDR_PKR, index)
100 #define __ia64_get_pmc(index)   __getIndReg(_IA64_REG_INDR_PMC, index)
101 #define __ia64_get_pmd(index)   __getIndReg(_IA64_REG_INDR_PMD, index)
102 #define __ia64_get_rr(index)    __getIndReg(_IA64_REG_INDR_RR, index)
103
104 #define ia64_srlz_d             __dsrlz
105 #define ia64_srlz_i             __isrlz
106
107 #define ia64_dv_serialize_data()
108 #define ia64_dv_serialize_instruction()
109
110 #define ia64_st1_rel            __st1_rel
111 #define ia64_st2_rel            __st2_rel
112 #define ia64_st4_rel            __st4_rel
113 #define ia64_st8_rel            __st8_rel
114
115 #define ia64_ld1_acq            __ld1_acq
116 #define ia64_ld2_acq            __ld2_acq
117 #define ia64_ld4_acq            __ld4_acq
118 #define ia64_ld8_acq            __ld8_acq
119
120 #define ia64_sync_i             __synci
121 #define __ia64_thash            __thash
122 #define __ia64_ttag             __ttag
123 #define __ia64_itcd             __itcd
124 #define __ia64_itci             __itci
125 #define __ia64_itrd             __itrd
126 #define __ia64_itri             __itri
127 #define __ia64_ptce             __ptce
128 #define __ia64_ptcl             __ptcl
129 #define __ia64_ptcg             __ptcg
130 #define __ia64_ptcga            __ptcga
131 #define __ia64_ptri             __ptri
132 #define __ia64_ptrd             __ptrd
133 #define ia64_dep_mi             _m64_dep_mi
134
135 /* Values for lfhint in __lfetch and __lfetch_fault */
136
137 #define ia64_lfhint_none        __lfhint_none
138 #define ia64_lfhint_nt1         __lfhint_nt1
139 #define ia64_lfhint_nt2         __lfhint_nt2
140 #define ia64_lfhint_nta         __lfhint_nta
141
142 #define ia64_lfetch             __lfetch
143 #define ia64_lfetch_excl        __lfetch_excl
144 #define ia64_lfetch_fault       __lfetch_fault
145 #define ia64_lfetch_fault_excl  __lfetch_fault_excl
146
147 #define __ia64_intrin_local_irq_restore(x)              \
148 do {                                                    \
149         if ((x) != 0) {                                 \
150                 __ia64_ssm(IA64_PSR_I);                 \
151                 ia64_srlz_d();                          \
152         } else {                                        \
153                 __ia64_rsm(IA64_PSR_I);                 \
154         }                                               \
155 } while (0)
156
157 #define __ia64_get_psr_i()      (__ia64_getreg(_IA64_REG_PSR) & 0x4000UL)
158
159 #define __builtin_trap()        __break(0);
160
161 #endif /* _ASM_IA64_INTEL_INTRIN_H */