include/asm-ia64/mca.h

   1 /*
   2  * File:        mca.h
   3  * Purpose:     Machine check handling specific defines
   4  *
   5  * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
   6  * Copyright (C) Vijay Chander (vijay@engr.sgi.com)
   7  * Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
   8  */
   9
  10 #ifndef _ASM_IA64_MCA_H
  11 #define _ASM_IA64_MCA_H
  12
  13 #if !defined(__ASSEMBLY__)
  14
  15 #include <linux/interrupt.h>
  16 #include <linux/types.h>
  17
  18 #include <asm/param.h>
  19 #include <asm/sal.h>
  20 #include <asm/processor.h>
  21 #include <asm/mca_asm.h>
  22
  23 #define IA64_MCA_RENDEZ_TIMEOUT         (20 * 1000)     /* value in milliseconds - 20 seconds */
  24
  25 typedef union cmcv_reg_u {
  26         u64     cmcv_regval;
  27         struct  {
  28                 u64     cmcr_vector             : 8;
  29                 u64     cmcr_reserved1          : 4;
  30                 u64     cmcr_ignored1           : 1;
  31                 u64     cmcr_reserved2          : 3;
  32                 u64     cmcr_mask               : 1;
  33                 u64     cmcr_ignored2           : 47;
  34         } cmcv_reg_s;
  35
  36 } cmcv_reg_t;
  37
  38 #define cmcv_mask               cmcv_reg_s.cmcr_mask
  39 #define cmcv_vector             cmcv_reg_s.cmcr_vector
  40
  41 enum {
  42         IA64_MCA_RENDEZ_CHECKIN_NOTDONE =       0x0,
  43         IA64_MCA_RENDEZ_CHECKIN_DONE    =       0x1
  44 };
  45
  46 /* the following data structure is used for TLB error recovery purposes */
  47 extern struct ia64_mca_tlb_info {
  48         u64     cr_lid;
  49         u64     percpu_paddr;
  50         u64     ptce_base;
  51         u32     ptce_count[2];
  52         u32     ptce_stride[2];
  53         u64     pal_paddr;
  54         u64     pal_base;
  55 } ia64_mca_tlb_list[NR_CPUS];
  56
  57 /* Information maintained by the MC infrastructure */
  58 typedef struct ia64_mc_info_s {
  59         u64             imi_mca_handler;
  60         size_t          imi_mca_handler_size;
  61         u64             imi_monarch_init_handler;
  62         size_t          imi_monarch_init_handler_size;
  63         u64             imi_slave_init_handler;
  64         size_t          imi_slave_init_handler_size;
  65         u8              imi_rendez_checkin[NR_CPUS];
  66
  67 } ia64_mc_info_t;
  68
  69 typedef struct ia64_mca_sal_to_os_state_s {
  70         u64             imsto_os_gp;            /* GP of the os registered with the SAL */
  71         u64             imsto_pal_proc;         /* PAL_PROC entry point - physical addr */
  72         u64             imsto_sal_proc;         /* SAL_PROC entry point - physical addr */
  73         u64             imsto_sal_gp;           /* GP of the SAL - physical */
  74         u64             imsto_rendez_state;     /* Rendez state information */
  75         u64             imsto_sal_check_ra;     /* Return address in SAL_CHECK while going
  76                                                  * back to SAL from OS after MCA handling.
  77                                                  */
  78         u64             pal_min_state;          /* from PAL in r17 */
  79         u64             proc_state_param;       /* from PAL in r18. See SDV 2:268 11.3.2.1 */
  80 } ia64_mca_sal_to_os_state_t;
  81
  82 enum {
  83         IA64_MCA_CORRECTED      =       0x0,    /* Error has been corrected by OS_MCA */
  84         IA64_MCA_WARM_BOOT      =       -1,     /* Warm boot of the system need from SAL */
  85         IA64_MCA_COLD_BOOT      =       -2,     /* Cold boot of the system need from SAL */
  86         IA64_MCA_HALT           =       -3      /* System to be halted by SAL */
  87 };
  88
  89 enum {
  90         IA64_MCA_SAME_CONTEXT   =       0x0,    /* SAL to return to same context */
  91         IA64_MCA_NEW_CONTEXT    =       -1      /* SAL to return to new context */
  92 };
  93
  94 typedef struct ia64_mca_os_to_sal_state_s {
  95         u64             imots_os_status;        /*   OS status to SAL as to what happened
  96                                                  *   with the MCA handling.
  97                                                  */
  98         u64             imots_sal_gp;           /* GP of the SAL - physical */
  99         u64             imots_context;          /* 0 if return to same context
 100                                                    1 if return to new context */
 101         u64             *imots_new_min_state;   /* Pointer to structure containing
 102                                                  * new values of registers in the min state
 103                                                  * save area.
 104                                                  */
 105         u64             imots_sal_check_ra;     /* Return address in SAL_CHECK while going
 106                                                  * back to SAL from OS after MCA handling.
 107                                                  */
 108 } ia64_mca_os_to_sal_state_t;
 109
 110 extern void ia64_mca_init(void);
 111 extern void ia64_os_mca_dispatch(void);
 112 extern void ia64_os_mca_dispatch_end(void);
 113 extern void ia64_mca_ucmc_handler(void);
 114 extern void ia64_monarch_init_handler(void);
 115 extern void ia64_slave_init_handler(void);
 116 extern void ia64_mca_cmc_vector_setup(void);
 117
 118 #endif /* !__ASSEMBLY__ */
 119 #endif /* _ASM_IA64_MCA_H */