include/asm-ia64/sn/iograph.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
   7  */
   8 #ifndef _ASM_IA64_SN_IOGRAPH_H
   9 #define _ASM_IA64_SN_IOGRAPH_H
  10
  11 #include <asm/sn/xtalk/xbow.h>  /* For get MAX_PORT_NUM */
  12
  13 /*
  14  * During initialization, platform-dependent kernel code establishes some
  15  * basic elements of the hardware graph.  This file contains edge and
  16  * info labels that are used across various platforms -- it serves as an
  17  * ad-hoc registry.
  18  */
  19
  20 /* edges names */
  21 #define EDGE_LBL_BUS                    "bus"
  22 #define EDGE_LBL_CONN                   ".connection"
  23 #define EDGE_LBL_GUEST                  ".guest"        /* For IOC3 */
  24 #define EDGE_LBL_HOST                   ".host"         /* For IOC3 */
  25 #define EDGE_LBL_PERFMON                "mon"
  26 #define EDGE_LBL_USRPCI                 "usrpci"
  27 #define EDGE_LBL_BLOCK                  "block"
  28 #define EDGE_LBL_BOARD                  "board"
  29 #define EDGE_LBL_CHAR                   "char"
  30 #define EDGE_LBL_CONTROLLER             "controller"
  31 #define EDGE_LBL_CPU                    "cpu"
  32 #define EDGE_LBL_CPUNUM                 "cpunum"
  33 #define EDGE_LBL_DIRECT                 "direct"
  34 #define EDGE_LBL_DISABLED               "disabled"
  35 #define EDGE_LBL_DISK                   "disk"
  36 #define EDGE_LBL_HUB                    "hub"           /* For SN0 */
  37 #define EDGE_LBL_HW                     "hw"
  38 #define EDGE_LBL_INTERCONNECT           "link"
  39 #define EDGE_LBL_IO                     "io"
  40 #define EDGE_LBL_LUN                    "lun"
  41 #define EDGE_LBL_LINUX                  "linux"
  42 #define EDGE_LBL_LINUX_BUS              EDGE_LBL_LINUX "/bus/pci-x"
  43 #define EDGE_LBL_MACHDEP                "machdep"       /* Platform depedent devices */
  44 #define EDGE_LBL_MASTER                 ".master"
  45 #define EDGE_LBL_MEMORY                 "memory"
  46 #define EDGE_LBL_META_ROUTER            "metarouter"
  47 #define EDGE_LBL_MIDPLANE               "midplane"
  48 #define EDGE_LBL_MODULE                 "module"
  49 #define EDGE_LBL_NODE                   "node"
  50 #define EDGE_LBL_NODENUM                "nodenum"
  51 #define EDGE_LBL_NVRAM                  "nvram"
  52 #define EDGE_LBL_PARTITION              "partition"
  53 #define EDGE_LBL_PCI                    "pci"
  54 #define EDGE_LBL_PCIX                   "pci-x"
  55 #define EDGE_LBL_PCIX_0                 EDGE_LBL_PCIX "/0"
  56 #define EDGE_LBL_PCIX_1                 EDGE_LBL_PCIX "/1"
  57 #define EDGE_LBL_AGP                    "agp"
  58 #define EDGE_LBL_AGP_0                  EDGE_LBL_AGP "/0"
  59 #define EDGE_LBL_AGP_1                  EDGE_LBL_AGP "/1"
  60 #define EDGE_LBL_PORT                   "port"
  61 #define EDGE_LBL_PROM                   "prom"
  62 #define EDGE_LBL_RACK                   "rack"
  63 #define EDGE_LBL_RDISK                  "rdisk"
  64 #define EDGE_LBL_REPEATER_ROUTER        "repeaterrouter"
  65 #define EDGE_LBL_ROUTER                 "router"
  66 #define EDGE_LBL_RPOS                   "bay"           /* Position in rack */
  67 #define EDGE_LBL_SCSI                   "scsi"
  68 #define EDGE_LBL_SCSI_CTLR              "scsi_ctlr"
  69 #define EDGE_LBL_SLOT                   "slot"
  70 #define EDGE_LBL_TARGET                 "target"
  71 #define EDGE_LBL_UNKNOWN                "unknown"
  72 #define EDGE_LBL_XBOW                   "xbow"
  73 #define EDGE_LBL_XIO                    "xio"
  74 #define EDGE_LBL_XSWITCH                ".xswitch"
  75 #define EDGE_LBL_XTALK                  "xtalk"
  76 #define EDGE_LBL_XWIDGET                "xwidget"
  77 #define EDGE_LBL_ELSC                   "elsc"
  78 #define EDGE_LBL_L1                     "L1"
  79 #define EDGE_LBL_XPLINK                 "xplink"        /* Cross partition */
  80 #define EDGE_LBL_XPLINK_NET             "net"           /* XP network devs */
  81 #define EDGE_LBL_XPLINK_RAW             "raw"           /* XP Raw devs */
  82 #define EDGE_LBL_SLAB                   "slab"          /* Slab of a module */
  83 #define EDGE_LBL_XPLINK_KERNEL          "kernel"        /* XP kernel devs */
  84 #define EDGE_LBL_XPLINK_ADMIN           "admin"         /* Partition admin */
  85 #define EDGE_LBL_IOBRICK                "iobrick"
  86 #define EDGE_LBL_PXBRICK                "PXbrick"
  87 #define EDGE_LBL_OPUSBRICK              "onboardio"
  88 #define EDGE_LBL_IXBRICK                "IXbrick"
  89 #define EDGE_LBL_CGBRICK                "CGbrick"
  90 #define EDGE_LBL_CPUBUS                 "cpubus"        /* CPU Interfaces (SysAd) */
  91
  92 /* vertex info labels in hwgraph */
  93 #define INFO_LBL_CNODEID                "_cnodeid"
  94 #define INFO_LBL_CONTROLLER_NAME        "_controller_name"
  95 #define INFO_LBL_CPUBUS                 "_cpubus"
  96 #define INFO_LBL_CPUID                  "_cpuid"
  97 #define INFO_LBL_CPU_INFO               "_cpu"
  98 #define INFO_LBL_DETAIL_INVENT          "_detail_invent" /* inventory data*/
  99 #define INFO_LBL_DIAGVAL                "_diag_reason"   /* Reason disabled */
 100 #define INFO_LBL_DRIVER                 "_driver"       /* points to attached device_driver_t */
 101 #define INFO_LBL_ELSC                   "_elsc"
 102 #define INFO_LBL_SUBCH                  "_subch"        /* system controller subchannel */
 103 #define INFO_LBL_HUB_INFO               "_hubinfo"
 104 #define INFO_LBL_HWGFSLIST              "_hwgfs_list"
 105 #define INFO_LBL_TRAVERSE               "_hwg_traverse" /* hwgraph traverse function */
 106 #define INFO_LBL_MODULE_INFO            "_module"       /* module data ptr */
 107 #define INFO_LBL_MDPERF_DATA            "_mdperf"       /* mdperf monitoring*/
 108 #define INFO_LBL_NODE_INFO              "_node"
 109 #define INFO_LBL_PCIBR_HINTS            "_pcibr_hints"
 110 #define INFO_LBL_PCIIO                  "_pciio"
 111 #define INFO_LBL_PFUNCS                 "_pciio_ops"    /* ops vector for gio providers */
 112 #define INFO_LBL_PERMISSIONS            "_permissions"  /* owner, uid, gid */
 113 #define INFO_LBL_ROUTER_INFO            "_router"
 114 #define INFO_LBL_SUBDEVS                "_subdevs"      /* subdevice enable bits */
 115 #define INFO_LBL_XSWITCH                "_xswitch"
 116 #define INFO_LBL_XSWITCH_ID             "_xswitch_id"
 117 #define INFO_LBL_XSWITCH_VOL            "_xswitch_volunteer"
 118 #define INFO_LBL_XFUNCS                 "_xtalk_ops"    /* ops vector for gio providers */
 119 #define INFO_LBL_XWIDGET                "_xwidget"
 120
 121
 122 #ifdef __KERNEL__
 123 void init_all_devices(void);
 124 #endif /* __KERNEL__ */
 125
 126 int io_brick_map_widget(int, int);
 127
 128 /*
 129  * Map a brick's widget number to a meaningful int
 130  */
 131
 132 struct io_brick_map_s {
 133     int                 ibm_type;                  /* brick type */
 134     int                 ibm_map_wid[MAX_PORT_NUM]; /* wid to int map */
 135 };
 136
 137 #endif /* _ASM_IA64_SN_IOGRAPH_H */