include/asm-mips/marvell.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2004 by Ralf Baechle
   7  */
   8 #ifndef __ASM_MIPS_MARVELL_H
   9 #define __ASM_MIPS_MARVELL_H
  10
  11 #include <linux/pci.h>
  12
  13 #include <asm/byteorder.h>
  14 #include <asm/pci_channel.h>
  15
  16 extern unsigned long marvell_base;
  17
  18 /*
  19  * Because of an error/peculiarity in the Galileo chip, we need to swap the
  20  * bytes when running bigendian.
  21  */
  22 #define __MV_READ(ofs)                                                  \
  23         (*(volatile u32 *)(marvell_base+(ofs)))
  24 #define __MV_WRITE(ofs, data)                                           \
  25         do { *(volatile u32 *)(marvell_base+(ofs)) = (data); } while (0)
  26
  27 #define MV_READ(ofs)            le32_to_cpu(__MV_READ(ofs))
  28 #define MV_WRITE(ofs, data)     __MV_WRITE(ofs, cpu_to_le32(data))
  29
  30 #define MV_READ_16(ofs)                                                 \
  31         le16_to_cpu(*(volatile u16 *)(marvell_base+(ofs)))
  32 #define MV_WRITE_16(ofs, data)  \
  33         *(volatile u16 *)(marvell_base+(ofs)) = cpu_to_le16(data)
  34
  35 #define MV_READ_8(ofs)                                                  \
  36         *(volatile u8 *)(marvell_base+(ofs))
  37 #define MV_WRITE_8(ofs, data)                                           \
  38         *(volatile u8 *)(marvell_base+(ofs)) = data
  39
  40 #define MV_SET_REG_BITS(ofs, bits)                                      \
  41         (*((volatile u32 *)(marvell_base + (ofs)))) |= ((u32)cpu_to_le32(bits))
  42 #define MV_RESET_REG_BITS(ofs, bits)                                    \
  43         (*((volatile u32 *)(marvell_base + (ofs)))) &= ~((u32)cpu_to_le32(bits))
  44
  45 extern struct pci_ops mv_pci_ops;
  46
  47 struct mv_pci_controller {
  48         struct pci_controller   pcic;
  49
  50         /*
  51          * GT-64240/MV-64340 specific, per host bus information
  52          */
  53         unsigned long   config_addr;
  54         unsigned long   config_vreg;
  55 };
  56
  57 #endif  /* __ASM_MIPS_MARVELL_H */