2 * Switch a MMU context.
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 1996, 1997, 1998, 1999 by Ralf Baechle
9 * Copyright (C) 1999 Silicon Graphics, Inc.
11 #ifndef _ASM_MMU_CONTEXT_H
12 #define _ASM_MMU_CONTEXT_H
14 #include <linux/config.h>
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/slab.h>
18 #include <asm/cacheflush.h>
19 #include <asm/tlbflush.h>
22 * For the fast tlb miss handlers, we currently keep a per cpu array
23 * of pointers to the current pgd for each processor. Also, the proc.
24 * id is stuffed into the context register. This should be changed to
25 * use the processor id via current->processor, where current is stored
26 * in watchhi/lo. The context register should be used to contiguously
27 * map the page tables.
29 #define TLBMISS_HANDLER_SETUP_PGD(pgd) \
30 pgd_current[smp_processor_id()] = (unsigned long)(pgd)
32 #define TLBMISS_HANDLER_SETUP() \
33 write_c0_context((unsigned long) smp_processor_id() << 23); \
34 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
37 #define TLBMISS_HANDLER_SETUP() \
38 write_c0_context((unsigned long) &pgd_current[smp_processor_id()] << 23); \
39 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
41 extern unsigned long pgd_current[];
43 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
46 #define ASID_MASK 0xfc0
48 #elif defined(CONFIG_CPU_R8000)
51 #define ASID_MASK 0xff0
53 #elif defined(CONFIG_CPU_RM9000)
56 #define ASID_MASK 0xfff
58 #else /* FIXME: not correct for R6000 */
61 #define ASID_MASK 0xff
65 #define cpu_context(cpu, mm) ((mm)->context[cpu])
66 #define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK)
67 #define asid_cache(cpu) (cpu_data[cpu].asid_cache)
69 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
74 * All unused by hardware upper bits will be considered
75 * as a software asid extension.
77 #define ASID_VERSION_MASK ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
78 #define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1)
81 get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
83 unsigned long asid = asid_cache(cpu);
85 if (! ((asid += ASID_INC) & ASID_MASK) ) {
86 if (cpu_has_vtag_icache)
88 local_flush_tlb_all(); /* start new asid cycle */
89 if (!asid) /* fix version if needed */
90 asid = ASID_FIRST_VERSION;
92 cpu_context(cpu, mm) = asid_cache(cpu) = asid;
96 * Initialize the context related info for a new mm_struct
100 init_new_context(struct task_struct *tsk, struct mm_struct *mm)
104 for (i = 0; i < num_online_cpus(); i++)
105 cpu_context(i, mm) = 0;
110 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
111 struct task_struct *tsk)
113 unsigned int cpu = smp_processor_id();
116 local_irq_save(flags);
118 /* Check if our ASID is of an older version and thus invalid */
119 if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK)
120 get_new_mmu_context(next, cpu);
122 write_c0_entryhi(cpu_context(cpu, next));
123 TLBMISS_HANDLER_SETUP_PGD(next->pgd);
126 * Mark current->active_mm as not "active" anymore.
127 * We don't want to mislead possible IPI tlb flush routines.
129 clear_bit(cpu, &prev->cpu_vm_mask);
130 set_bit(cpu, &next->cpu_vm_mask);
132 local_irq_restore(flags);
136 * Destroy context related info for an mm_struct that is about
139 static inline void destroy_context(struct mm_struct *mm)
143 #define deactivate_mm(tsk,mm) do { } while (0)
146 * After we have set current->mm to a new value, this activates
147 * the context for the new mm so we see the new mappings.
150 activate_mm(struct mm_struct *prev, struct mm_struct *next)
153 int cpu = smp_processor_id();
155 local_irq_save(flags);
157 /* Unconditionally get a new ASID. */
158 get_new_mmu_context(next, cpu);
160 write_c0_entryhi(cpu_context(cpu, next));
161 TLBMISS_HANDLER_SETUP_PGD(next->pgd);
163 /* mark mmu ownership change */
164 clear_bit(cpu, &prev->cpu_vm_mask);
165 set_bit(cpu, &next->cpu_vm_mask);
167 local_irq_restore(flags);
171 * If mm is currently active_mm, we can't really drop it. Instead,
172 * we will get a new one for it.
175 drop_mmu_context(struct mm_struct *mm, unsigned cpu)
179 local_irq_save(flags);
181 if (test_bit(cpu, &mm->cpu_vm_mask)) {
182 get_new_mmu_context(mm, cpu);
183 write_c0_entryhi(cpu_asid(cpu, mm));
185 /* will get a new context next time */
186 cpu_context(cpu, mm) = 0;
189 local_irq_restore(flags);
192 #endif /* _ASM_MMU_CONTEXT_H */