include/asm-mips/string.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle
   7  * Copyright (c) 2000 by Silicon Graphics, Inc.
   8  * Copyright (c) 2001 MIPS Technologies, Inc.
   9  */
  10 #ifndef _ASM_STRING_H
  11 #define _ASM_STRING_H
  12
  13 #include <linux/config.h>
  14
  15 /*
  16  * Most of the inline functions are rather naive implementations so I just
  17  * didn't bother updating them for 64-bit ...
  18  */
  19 #ifdef CONFIG_MIPS32
  20
  21 #define __HAVE_ARCH_STRCPY
  22 static __inline__ char *strcpy(char *__dest, __const__ char *__src)
  23 {
  24   char *__xdest = __dest;
  25
  26   __asm__ __volatile__(
  27         ".set\tnoreorder\n\t"
  28         ".set\tnoat\n"
  29         "1:\tlbu\t$1,(%1)\n\t"
  30         "addiu\t%1,1\n\t"
  31         "sb\t$1,(%0)\n\t"
  32         "bnez\t$1,1b\n\t"
  33         "addiu\t%0,1\n\t"
  34         ".set\tat\n\t"
  35         ".set\treorder"
  36         : "=r" (__dest), "=r" (__src)
  37         : "0" (__dest), "1" (__src)
  38         : "memory");
  39
  40   return __xdest;
  41 }
  42
  43 #define __HAVE_ARCH_STRNCPY
  44 static __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n)
  45 {
  46   char *__xdest = __dest;
  47
  48   if (__n == 0)
  49     return __xdest;
  50
  51   __asm__ __volatile__(
  52         ".set\tnoreorder\n\t"
  53         ".set\tnoat\n"
  54         "1:\tlbu\t$1,(%1)\n\t"
  55         "subu\t%2,1\n\t"
  56         "sb\t$1,(%0)\n\t"
  57         "beqz\t$1,2f\n\t"
  58         "addiu\t%0,1\n\t"
  59         "bnez\t%2,1b\n\t"
  60         "addiu\t%1,1\n"
  61         "2:\n\t"
  62         ".set\tat\n\t"
  63         ".set\treorder"
  64         : "=r" (__dest), "=r" (__src), "=r" (__n)
  65         : "0" (__dest), "1" (__src), "2" (__n)
  66         : "memory");
  67
  68   return __xdest;
  69 }
  70
  71 #define __HAVE_ARCH_STRCMP
  72 static __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct)
  73 {
  74   int __res;
  75
  76   __asm__ __volatile__(
  77         ".set\tnoreorder\n\t"
  78         ".set\tnoat\n\t"
  79         "lbu\t%2,(%0)\n"
  80         "1:\tlbu\t$1,(%1)\n\t"
  81         "addiu\t%0,1\n\t"
  82         "bne\t$1,%2,2f\n\t"
  83         "addiu\t%1,1\n\t"
  84         "bnez\t%2,1b\n\t"
  85         "lbu\t%2,(%0)\n\t"
  86 #if defined(CONFIG_CPU_R3000)
  87         "nop\n\t"
  88 #endif
  89         "move\t%2,$1\n"
  90         "2:\tsubu\t%2,$1\n"
  91         "3:\t.set\tat\n\t"
  92         ".set\treorder"
  93         : "=r" (__cs), "=r" (__ct), "=r" (__res)
  94         : "0" (__cs), "1" (__ct));
  95
  96   return __res;
  97 }
  98
  99 #define __HAVE_ARCH_STRNCMP
 100 static __inline__ int
 101 strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
 102 {
 103         int __res;
 104
 105         __asm__ __volatile__(
 106         ".set\tnoreorder\n\t"
 107         ".set\tnoat\n"
 108         "1:\tlbu\t%3,(%0)\n\t"
 109         "beqz\t%2,2f\n\t"
 110         "lbu\t$1,(%1)\n\t"
 111         "subu\t%2,1\n\t"
 112         "bne\t$1,%3,3f\n\t"
 113         "addiu\t%0,1\n\t"
 114         "bnez\t%3,1b\n\t"
 115         "addiu\t%1,1\n"
 116         "2:\n\t"
 117 #if defined(CONFIG_CPU_R3000)
 118         "nop\n\t"
 119 #endif
 120         "move\t%3,$1\n"
 121         "3:\tsubu\t%3,$1\n\t"
 122         ".set\tat\n\t"
 123         ".set\treorder"
 124         : "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res)
 125         : "0" (__cs), "1" (__ct), "2" (__count));
 126
 127         return __res;
 128 }
 129 #endif /* CONFIG_MIPS32 */
 130
 131 #define __HAVE_ARCH_MEMSET
 132 extern void *memset(void *__s, int __c, size_t __count);
 133
 134 #define __HAVE_ARCH_MEMCPY
 135 extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
 136
 137 #define __HAVE_ARCH_MEMMOVE
 138 extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
 139
 140 /* Don't build bcopy at all ...  */
 141 #define __HAVE_ARCH_BCOPY
 142
 143 #ifdef CONFIG_MIPS32
 144 #define __HAVE_ARCH_MEMSCAN
 145 static __inline__ void *memscan(void *__addr, int __c, size_t __size)
 146 {
 147         char *__end = (char *)__addr + __size;
 148         unsigned char __uc = (unsigned char) __c;
 149
 150         __asm__(".set\tpush\n\t"
 151                 ".set\tnoat\n\t"
 152                 ".set\treorder\n\t"
 153                 "1:\tbeq\t%0,%1,2f\n\t"
 154                 "addiu\t%0,1\n\t"
 155                 "lbu\t$1,-1(%0)\n\t"
 156                 "bne\t$1,%z4,1b\n"
 157                 "2:\t.set\tpop"
 158                 : "=r" (__addr), "=r" (__end)
 159                 : "0" (__addr), "1" (__end), "Jr" (__uc));
 160
 161         return __addr;
 162 }
 163 #endif /* CONFIG_MIPS32 */
 164
 165 #endif /* _ASM_STRING_H */