include/asm-parisc/cacheflush.h

   1 #ifndef _PARISC_CACHEFLUSH_H
   2 #define _PARISC_CACHEFLUSH_H
   3
   4 #include <linux/config.h>
   5 #include <linux/mm.h>
   6
   7 /* The usual comment is "Caches aren't brain-dead on the <architecture>".
   8  * Unfortunately, that doesn't apply to PA-RISC. */
   9
  10 /* Cache flush operations */
  11
  12 #ifdef CONFIG_SMP
  13 #define flush_cache_mm(mm) flush_cache_all()
  14 #else
  15 #define flush_cache_mm(mm) flush_cache_all_local()
  16 #endif
  17
  18 #define flush_kernel_dcache_range(start,size) \
  19         flush_kernel_dcache_range_asm((start), (start)+(size));
  20
  21 extern void flush_cache_all_local(void);
  22
  23 static inline void cacheflush_h_tmp_function(void *dummy)
  24 {
  25         flush_cache_all_local();
  26 }
  27
  28 static inline void flush_cache_all(void)
  29 {
  30         on_each_cpu(cacheflush_h_tmp_function, NULL, 1, 1);
  31 }
  32
  33 #define flush_cache_vmap(start, end)            flush_cache_all()
  34 #define flush_cache_vunmap(start, end)          flush_cache_all()
  35
  36 /* The following value needs to be tuned and probably scaled with the
  37  * cache size.
  38  */
  39
  40 #define FLUSH_THRESHOLD 0x80000
  41
  42 static inline void
  43 flush_user_dcache_range(unsigned long start, unsigned long end)
  44 {
  45 #ifdef CONFIG_SMP
  46         flush_user_dcache_range_asm(start,end);
  47 #else
  48         if ((end - start) < FLUSH_THRESHOLD)
  49                 flush_user_dcache_range_asm(start,end);
  50         else
  51                 flush_data_cache();
  52 #endif
  53 }
  54
  55 static inline void
  56 flush_user_icache_range(unsigned long start, unsigned long end)
  57 {
  58 #ifdef CONFIG_SMP
  59         flush_user_icache_range_asm(start,end);
  60 #else
  61         if ((end - start) < FLUSH_THRESHOLD)
  62                 flush_user_icache_range_asm(start,end);
  63         else
  64                 flush_instruction_cache();
  65 #endif
  66 }
  67
  68 extern void __flush_dcache_page(struct page *page);
  69
  70 static inline void flush_dcache_page(struct page *page)
  71 {
  72         struct address_space *mapping = page_mapping(page);
  73
  74         if (mapping && !mapping_mapped(mapping)) {
  75                 set_bit(PG_dcache_dirty, &page->flags);
  76         } else {
  77                 __flush_dcache_page(page);
  78         }
  79 }
  80
  81 #define flush_icache_page(vma,page)     do { flush_kernel_dcache_page(page_address(page)); flush_kernel_icache_page(page_address(page)); } while (0)
  82
  83 #define flush_icache_range(s,e)         do { flush_kernel_dcache_range_asm(s,e); flush_kernel_icache_range_asm(s,e); } while (0)
  84
  85 #define flush_icache_user_range(vma, page, addr, len) do { \
  86         flush_user_dcache_range(addr, addr + len); \
  87         flush_user_icache_range(addr, addr + len); } while (0)
  88
  89 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
  90 do { memcpy(dst, src, len); \
  91      flush_icache_user_range(vma, page, vaddr, len); \
  92 } while (0)
  93 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
  94         memcpy(dst, src, len)
  95
  96 static inline void flush_cache_range(struct vm_area_struct *vma,
  97                 unsigned long start, unsigned long end)
  98 {
  99         int sr3;
 100
 101         if (!vma->vm_mm->context) {
 102                 BUG();
 103                 return;
 104         }
 105
 106         sr3 = mfsp(3);
 107         if (vma->vm_mm->context == sr3) {
 108                 flush_user_dcache_range(start,end);
 109                 flush_user_icache_range(start,end);
 110         } else {
 111                 flush_cache_all();
 112         }
 113 }
 114
 115 static inline void
 116 flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr)
 117 {
 118         int sr3;
 119
 120         if (!vma->vm_mm->context) {
 121                 BUG();
 122                 return;
 123         }
 124
 125         sr3 = mfsp(3);
 126         if (vma->vm_mm->context == sr3) {
 127                 flush_user_dcache_range(vmaddr,vmaddr + PAGE_SIZE);
 128                 if (vma->vm_flags & VM_EXEC)
 129                         flush_user_icache_range(vmaddr,vmaddr + PAGE_SIZE);
 130         } else {
 131                 if (vma->vm_flags & VM_EXEC)
 132                         flush_cache_all();
 133                 else
 134                         flush_data_cache();
 135         }
 136 }
 137 #endif
 138