1 #ifndef __ASM_PARISC_PCI_H
2 #define __ASM_PARISC_PCI_H
4 #include <linux/config.h>
5 #include <asm/scatterlist.h>
8 ** HP PCI platforms generally support multiple bus adapters.
9 ** (workstations 1-~4, servers 2-~32)
11 ** Newer platforms number the busses across PCI bus adapters *sparsely*.
14 ** Under a PCI bus, most HP platforms support PPBs up to two or three
15 ** levels deep. See "Bit3" product line.
17 #define PCI_MAX_BUSSES 256
20 ** Who the hell can develop stuff without ASSERT or VASSERT?
21 ** No one understands all the modules across all platforms.
22 ** For linux add another dimension - processor architectures.
24 ** This should be a standard/global macro used liberally
25 ** in all code. Every respectable engineer I know in HP
26 ** would support this argument. - grant
30 #define ASSERT(expr) \
32 printk("\n%s:%d: Assertion " #expr " failed!\n", \
33 __FILE__, __LINE__); \
42 ** pci_hba_data (aka H2P_OBJECT in HP/UX)
44 ** This is the "common" or "base" data structure which HBA drivers
45 ** (eg Dino or LBA) are required to place at the top of their own
46 ** platform_data structure. I've heard this called "C inheritance" too.
48 ** Data needed by pcibios layer belongs here.
51 unsigned long base_addr; /* aka Host Physical Address */
52 const struct parisc_device *dev; /* device from PA bus walk */
53 struct pci_bus *hba_bus; /* primary PCI bus below HBA */
54 int hba_num; /* I/O port space access "key" */
55 struct resource bus_num; /* PCI bus numbers */
56 struct resource io_space; /* PIOP */
57 struct resource lmmio_space; /* bus addresses < 4Gb */
58 struct resource elmmio_space; /* additional bus addresses < 4Gb */
59 struct resource gmmio_space; /* bus addresses > 4Gb */
60 /* NOTE: Dino code assumes it can use *all* of the lmmio_space,
61 * elmmio_space and gmmio_space as a contiguous array of
62 * resources. This #define represents the array size */
63 #define DINO_MAX_LMMIO_RESOURCES 3
65 unsigned long lmmio_space_offset; /* CPU view - PCI view */
66 void * iommu; /* IOMMU this device is under */
67 /* REVISIT - spinlock to protect resources? */
70 #define HBA_DATA(d) ((struct pci_hba_data *) (d))
73 ** We support 2^16 I/O ports per HBA. These are set up in the form
74 ** 0xbbxxxx, where bb is the bus number and xxxx is the I/O port
77 #define HBA_PORT_SPACE_BITS 16
79 #define HBA_PORT_BASE(h) ((h) << HBA_PORT_SPACE_BITS)
80 #define HBA_PORT_SPACE_SIZE (1UL << HBA_PORT_SPACE_BITS)
82 #define PCI_PORT_HBA(a) ((a) >> HBA_PORT_SPACE_BITS)
83 #define PCI_PORT_ADDR(a) ((a) & (HBA_PORT_SPACE_SIZE - 1))
86 ** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
87 ** Note that we currently support only LMMIO.
89 #define PCI_BUS_ADDR(hba,a) ((a) - hba->lmmio_space_offset)
90 #define PCI_HOST_ADDR(hba,a) ((a) + hba->lmmio_space_offset)
93 ** KLUGE: linux/pci.h include asm/pci.h BEFORE declaring struct pci_bus
94 ** (This eliminates some of the warnings).
99 /* The PCI address space does equal the physical memory
100 * address space. The networking and block device layers use
101 * this boolean for bounce buffer decisions.
103 #define PCI_DMA_BUS_IS_PHYS (1)
106 ** Most PCI devices (eg Tulip, NCR720) also export the same registers
107 ** to both MMIO and I/O port space. Due to poor performance of I/O Port
108 ** access under HP PCI bus adapters, strongly reccomend use of MMIO
111 ** While I'm at it more PA programming notes:
113 ** 1) MMIO stores (writes) are posted operations. This means the processor
114 ** gets an "ACK" before the write actually gets to the device. A read
115 ** to the same device (or typically the bus adapter above it) will
116 ** force in-flight write transaction(s) out to the targeted device
117 ** before the read can complete.
119 ** 2) The Programmed I/O (PIO) data may not always be strongly ordered with
120 ** respect to DMA on all platforms. Ie PIO data can reach the processor
121 ** before in-flight DMA reaches memory. Since most SMP PA platforms
122 ** are I/O coherent, it generally doesn't matter...but sometimes
125 ** I've helped device driver writers debug both types of problems.
127 struct pci_port_ops {
128 u8 (*inb) (struct pci_hba_data *hba, u16 port);
129 u16 (*inw) (struct pci_hba_data *hba, u16 port);
130 u32 (*inl) (struct pci_hba_data *hba, u16 port);
131 void (*outb) (struct pci_hba_data *hba, u16 port, u8 data);
132 void (*outw) (struct pci_hba_data *hba, u16 port, u16 data);
133 void (*outl) (struct pci_hba_data *hba, u16 port, u32 data);
137 struct pci_bios_ops {
139 void (*fixup_bus)(struct pci_bus *bus);
142 /* pci_unmap_{single,page} is not a nop, thus... */
143 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
144 dma_addr_t ADDR_NAME;
145 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
147 #define pci_unmap_addr(PTR, ADDR_NAME) \
149 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
150 (((PTR)->ADDR_NAME) = (VAL))
151 #define pci_unmap_len(PTR, LEN_NAME) \
153 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
154 (((PTR)->LEN_NAME) = (VAL))
157 ** Stuff declared in arch/parisc/kernel/pci.c
159 extern struct pci_port_ops *pci_port;
160 extern struct pci_bios_ops *pci_bios;
161 extern int pci_post_reset_delay; /* delay after de-asserting #RESET */
162 extern int pci_hba_count;
163 extern struct pci_hba_data *parisc_pci_hba[];
166 extern void pcibios_register_hba(struct pci_hba_data *);
167 extern void pcibios_set_master(struct pci_dev *);
169 extern inline void pcibios_register_hba(struct pci_hba_data *x)
175 ** used by drivers/pci/pci.c:pci_do_scan_bus()
176 ** 0 == check if bridge is numbered before re-numbering.
177 ** 1 == pci_do_scan_bus() should automatically number all PCI-PCI bridges.
180 ** To date, only alpha sets this to one. We'll need to set this
181 ** to zero for legacy platforms and one for PAT platforms.
183 #define pcibios_assign_all_busses() (pdc_type == PDC_TYPE_PAT)
184 #define pcibios_scan_all_fns(a, b) 0
186 #define PCIBIOS_MIN_IO 0x10
187 #define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */
189 /* Don't support DAC yet. */
190 #define pci_dac_dma_supported(pci_dev, mask) (0)
192 /* export the pci_ DMA API in terms of the dma_ one */
193 #include <asm-generic/pci-dma-compat.h>
196 pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
197 struct resource *res);
199 static inline void pcibios_add_platform_entries(struct pci_dev *dev)
203 #endif /* __ASM_PARISC_PCI_H */