1 #ifndef _PARISC_PGTABLE_H
2 #define _PARISC_PGTABLE_H
4 #include <linux/config.h>
5 #include <asm/fixmap.h>
9 * we simulate an x86-style page table for the linux mm code
12 #include <linux/spinlock.h>
13 #include <asm/processor.h>
14 #include <asm/cache.h>
15 #include <asm/bitops.h>
18 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
19 * memory. For the return value to be meaningful, ADDR must be >=
20 * PAGE_OFFSET. This operation can be relatively expensive (e.g.,
21 * require a hash-, or multi-level tree-lookup or something of that
22 * sort) but it guarantees to return TRUE only if accessing the page
23 * at that address does not cause an error. Note that there may be
24 * addresses for which kern_addr_valid() returns FALSE even though an
25 * access would not cause an error (e.g., this is typically true for
26 * memory mapped I/O regions.
28 * XXX Need to implement this for parisc.
30 #define kern_addr_valid(addr) (1)
32 /* Certain architectures need to do special things when PTEs
33 * within a page table are directly modified. Thus, the following
34 * hook is made available.
36 #define set_pte(pteptr, pteval) \
38 *(pteptr) = (pteval); \
41 #endif /* !__ASSEMBLY__ */
43 #define pte_ERROR(e) \
44 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
45 #define pmd_ERROR(e) \
46 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
47 #define pgd_ERROR(e) \
48 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
50 /* Note: If you change ISTACK_SIZE, you need to change the corresponding
51 * values in vmlinux.lds and vmlinux64.lds (init_istack section). Also,
52 * the "order" and size need to agree.
55 #define ISTACK_SIZE 32768 /* Interrupt Stack Size */
56 #define ISTACK_ORDER 3
59 * NOTE: Many of the below macros use PT_NLEVELS because
60 * it is convenient that PT_NLEVELS == LOG2(pte size in bytes),
61 * i.e. we use 3 level page tables when we use 8 byte pte's
62 * (for 64 bit) and 2 level page tables when we use 4 byte pte's
67 #define PT_INITIAL 4 /* Number of initial page tables */
70 #define PT_INITIAL 2 /* Number of initial page tables */
73 #define MAX_ADDRBITS (PAGE_SHIFT + (PT_NLEVELS)*(PAGE_SHIFT - PT_NLEVELS))
74 #define MAX_ADDRESS (1UL << MAX_ADDRBITS)
76 #define SPACEID_SHIFT (MAX_ADDRBITS - 32)
78 /* Definitions for 1st level */
80 #define PGDIR_SHIFT (PAGE_SHIFT + (PT_NLEVELS - 1)*(PAGE_SHIFT - PT_NLEVELS))
81 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
82 #define PGDIR_MASK (~(PGDIR_SIZE-1))
83 #define PTRS_PER_PGD (1UL << (PAGE_SHIFT - PT_NLEVELS))
84 #define USER_PTRS_PER_PGD PTRS_PER_PGD
86 /* Definitions for 2nd level */
87 #define pgtable_cache_init() do { } while (0)
89 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PT_NLEVELS))
90 #define PMD_SIZE (1UL << PMD_SHIFT)
91 #define PMD_MASK (~(PMD_SIZE-1))
93 #define PTRS_PER_PMD (1UL << (PAGE_SHIFT - PT_NLEVELS))
95 #define PTRS_PER_PMD 1
98 /* Definitions for 3rd level */
100 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT - PT_NLEVELS))
103 * pgd entries used up by user/kernel:
106 #define FIRST_USER_PGD_NR 0
109 extern void *vmalloc_start;
110 #define PCXL_DMA_MAP_SIZE (8*1024*1024)
111 #define VMALLOC_START ((unsigned long)vmalloc_start)
112 /* this is a fixmap remnant, see fixmap.h */
113 #define VMALLOC_END (TMPALIAS_MAP_START)
116 /* NB: The tlb miss handlers make certain assumptions about the order */
117 /* of the following bits, so be careful (One example, bits 25-31 */
118 /* are moved together in one instruction). */
120 #define _PAGE_READ_BIT 31 /* (0x001) read access allowed */
121 #define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */
122 #define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */
123 #define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */
124 #define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */
125 #define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */
126 #define _PAGE_FILE_BIT _PAGE_DIRTY_BIT /* overload this bit */
127 #define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */
128 #define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
129 #define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
130 #define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
131 #define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */
132 /* for cache flushing only */
133 #define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
135 /* N.B. The bits are defined in terms of a 32 bit word above, so the */
136 /* following macro is ok for both 32 and 64 bit. */
138 #define xlate_pabit(x) (31 - x)
140 /* this defines the shift to the usable bits in the PTE it is set so
141 * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
143 #define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT)
145 /* this is how many bits may be used by the file functions */
146 #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
148 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
149 #define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
151 #define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT))
152 #define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT))
153 #define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
154 #define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT))
155 #define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
156 #define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT))
157 #define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT))
158 #define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
159 #define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
160 #define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
161 #define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
162 #define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
163 #define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
164 #define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
166 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
167 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
168 #define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
172 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
173 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
174 /* Others seem to make this executable, I don't know if that's correct
175 or not. The stack is mapped this way though so this is necessary
176 in the short term - dhd@linuxcare.com, 2000-08-08 */
177 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
178 #define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
179 #define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
180 #define PAGE_COPY PAGE_EXECREAD
181 #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
182 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
183 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_DIRTY | _PAGE_ACCESSED)
184 #define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
185 #define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
186 #define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
190 * We could have an execute only page using "gateway - promote to priv
191 * level 3", but that is kind of silly. So, the way things are defined
192 * now, we must always have read permission for pages with execute
193 * permission. For the fun of it we'll go ahead and support write only
198 #define __P000 PAGE_NONE
199 #define __P001 PAGE_READONLY
200 #define __P010 __P000 /* copy on write */
201 #define __P011 __P001 /* copy on write */
202 #define __P100 PAGE_EXECREAD
203 #define __P101 PAGE_EXECREAD
204 #define __P110 __P100 /* copy on write */
205 #define __P111 __P101 /* copy on write */
207 #define __S000 PAGE_NONE
208 #define __S001 PAGE_READONLY
209 #define __S010 PAGE_WRITEONLY
210 #define __S011 PAGE_SHARED
211 #define __S100 PAGE_EXECREAD
212 #define __S101 PAGE_EXECREAD
213 #define __S110 PAGE_RWX
214 #define __S111 PAGE_RWX
216 extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
218 /* initial page tables for 0-8MB for kernel */
220 extern unsigned long pg0[];
222 /* zero page used for uninitialized stuff */
224 extern unsigned long *empty_zero_page;
227 * ZERO_PAGE is a global shared page that is always zero: used
228 * for zero-mapped memory areas etc..
231 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
233 #define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
234 #define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
235 #define pte_clear(xp) do { pte_val(*(xp)) = 0; } while (0)
237 #define pmd_none(x) (!pmd_val(x))
238 #define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _PAGE_TABLE)
239 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
240 #define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0)
245 #define pgd_page(pgd) ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
247 /* For 64 bit we have three level tables */
249 #define pgd_none(x) (!pgd_val(x))
250 #define pgd_bad(x) ((pgd_val(x) & ~PAGE_MASK) != _PAGE_TABLE)
251 #define pgd_present(x) (pgd_val(x) & _PAGE_PRESENT)
252 #define pgd_clear(xp) do { pgd_val(*(xp)) = 0; } while (0)
255 * The "pgd_xxx()" functions here are trivial for a folded two-level
256 * setup: the pgd is never bad, and a pmd always exists (as it's folded
257 * into the pgd entry)
259 extern inline int pgd_none(pgd_t pgd) { return 0; }
260 extern inline int pgd_bad(pgd_t pgd) { return 0; }
261 extern inline int pgd_present(pgd_t pgd) { return 1; }
262 extern inline void pgd_clear(pgd_t * pgdp) { }
266 * The following only work if pte_present() is true.
267 * Undefined behaviour if not..
269 extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; }
270 extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
271 extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
272 extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
273 extern inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
274 extern inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
276 extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_READ; return pte; }
277 extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
278 extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
279 extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
280 extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_READ; return pte; }
281 extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
282 extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
283 extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
286 * Conversion functions: convert a page and protection to a page entry,
287 * and a page entry and page directory to the page they refer to.
289 #define __mk_pte(addr,pgprot) \
293 pte_val(__pte) = ((addr)+pgprot_val(pgprot)); \
298 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
300 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
303 pte_val(pte) = (pfn << PAGE_SHIFT) | pgprot_val(pgprot);
307 /* This takes a physical page address that is used by the remapping functions */
308 #define mk_pte_phys(physpage, pgprot) \
309 ({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; })
311 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
312 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
314 /* Permanent address of a page. On parisc we don't have highmem. */
316 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
318 #ifdef CONFIG_DISCONTIGMEM
319 #define pte_page(x) (phys_to_page(pte_val(x)))
321 #define pte_page(x) (mem_map+(pte_val(x) >> PAGE_SHIFT))
324 #define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
326 #define __pmd_page(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
327 #define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
329 #define pgd_index(address) ((address) >> PGDIR_SHIFT)
331 /* to find an entry in a page-table-directory */
332 #define pgd_offset(mm, address) \
333 ((mm)->pgd + ((address) >> PGDIR_SHIFT))
335 /* to find an entry in a kernel page-table-directory */
336 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
338 /* Find an entry in the second-level page table.. */
341 #define pmd_offset(dir,address) \
342 ((pmd_t *) pgd_page(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
344 #define pmd_offset(dir,addr) ((pmd_t *) dir)
347 /* Find an entry in the third-level page table.. */
348 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
349 #define pte_offset_kernel(pmd, address) \
350 ((pte_t *) pmd_page_kernel(*(pmd)) + pte_index(address))
351 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
352 #define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
353 #define pte_unmap(pte) do { } while (0)
354 #define pte_unmap_nested(pte) do { } while (0)
356 #define pte_unmap(pte) do { } while (0)
357 #define pte_unmap_nested(pte) do { } while (0)
359 extern void paging_init (void);
361 /* Used for deferring calls to flush_dcache_page() */
363 #define PG_dcache_dirty PG_arch_1
365 struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
366 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
368 /* Encode and de-code a swap entry */
370 #define __swp_type(x) ((x).val & 0x1f)
371 #define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \
372 (((x).val >> 8) & ~0x7) )
373 #define __swp_entry(type, offset) ((swp_entry_t) { (type) | \
374 ((offset & 0x7) << 6) | \
375 ((offset & ~0x7) << 8) })
376 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
377 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
379 static inline int ptep_test_and_clear_young(pte_t *ptep)
382 return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), ptep);
387 set_pte(ptep, pte_mkold(pte));
392 static inline int ptep_test_and_clear_dirty(pte_t *ptep)
395 return test_and_clear_bit(xlate_pabit(_PAGE_DIRTY_BIT), ptep);
400 set_pte(ptep, pte_mkclean(pte));
406 extern spinlock_t pa_dbit_lock;
408 static int pa_dbit_lock; /* dummy to keep the compilers happy */
411 static inline pte_t ptep_get_and_clear(pte_t *ptep)
416 spin_lock(&pa_dbit_lock);
417 pte = old_pte = *ptep;
418 pte_val(pte) &= ~_PAGE_PRESENT;
419 pte_val(pte) |= _PAGE_FLUSH;
421 spin_unlock(&pa_dbit_lock);
426 static inline void ptep_set_wrprotect(pte_t *ptep)
429 unsigned long new, old;
432 old = pte_val(*ptep);
433 new = pte_val(pte_wrprotect(__pte (old)));
434 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
436 pte_t old_pte = *ptep;
437 set_pte(ptep, pte_wrprotect(old_pte));
441 static inline void ptep_mkdirty(pte_t *ptep)
444 set_bit(xlate_pabit(_PAGE_DIRTY_BIT), ptep);
446 pte_t old_pte = *ptep;
447 set_pte(ptep, pte_mkdirty(old_pte));
451 #define pte_same(A,B) (pte_val(A) == pte_val(B))
453 typedef pte_t *pte_addr_t;
455 #endif /* !__ASSEMBLY__ */
457 #define io_remap_page_range remap_page_range
459 /* We provide our own get_unmapped_area to provide cache coherency */
461 #define HAVE_ARCH_UNMAPPED_AREA
463 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
464 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
465 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
466 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
467 #define __HAVE_ARCH_PTEP_MKDIRTY
468 #define __HAVE_ARCH_PTE_SAME
469 #include <asm-generic/pgtable.h>
471 #endif /* _PARISC_PGTABLE_H */