1 #ifndef _PPC64_PGTABLE_H
2 #define _PPC64_PGTABLE_H
4 #include <asm-generic/4level-fixup.h>
7 * This file contains the functions and defines necessary to modify and use
8 * the ppc64 hashed page table.
12 #include <linux/config.h>
13 #include <linux/stddef.h>
14 #include <asm/processor.h> /* For TASK_SIZE */
17 #include <asm/tlbflush.h>
18 #endif /* __ASSEMBLY__ */
20 /* PMD_SHIFT determines what a second-level page table entry can map */
21 #define PMD_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)
22 #define PMD_SIZE (1UL << PMD_SHIFT)
23 #define PMD_MASK (~(PMD_SIZE-1))
25 /* PGDIR_SHIFT determines what a third-level page table entry can map */
26 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3) + (PAGE_SHIFT - 2))
27 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
28 #define PGDIR_MASK (~(PGDIR_SIZE-1))
31 * Entries per page directory level. The PTE level must use a 64b record
32 * for each page table entry. The PMD and PGD level use a 32b record for
33 * each entry by assuming that each entry is page aligned.
35 #define PTE_INDEX_SIZE 9
36 #define PMD_INDEX_SIZE 10
37 #define PGD_INDEX_SIZE 10
39 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
40 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
41 #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
43 #define USER_PTRS_PER_PGD (1024)
44 #define FIRST_USER_PGD_NR 0
46 #define EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
47 PGD_INDEX_SIZE + PAGE_SHIFT)
50 * Size of EA range mapped by our pagetables.
52 #define PGTABLE_EA_BITS 41
53 #define PGTABLE_EA_MASK ((1UL<<PGTABLE_EA_BITS)-1)
56 * Define the address range of the vmalloc VM area.
58 #define VMALLOC_START (0xD000000000000000ul)
59 #define VMALLOC_END (VMALLOC_START + PGTABLE_EA_MASK)
62 * Define the address range of the imalloc VM area.
65 #define IMALLOC_START (ioremap_bot)
66 #define IMALLOC_VMADDR(x) ((unsigned long)(x))
67 #define PHBS_IO_BASE (0xE000000000000000ul) /* Reserve 2 gigs for PHBs */
68 #define IMALLOC_BASE (0xE000000080000000ul)
69 #define IMALLOC_END (IMALLOC_BASE + PGTABLE_EA_MASK)
72 * Define the user address range
74 #define USER_START (0UL)
75 #define USER_END (USER_START + PGTABLE_EA_MASK)
79 * Bits in a linux-style PTE. These match the bits in the
80 * (hardware-defined) PowerPC PTE as closely as possible.
82 #define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
83 #define _PAGE_USER 0x0002 /* matches one of the PP bits */
84 #define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
85 #define _PAGE_RW 0x0004 /* software: user write access allowed */
86 #define _PAGE_GUARDED 0x0008
87 #define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
88 #define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
89 #define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
90 #define _PAGE_DIRTY 0x0080 /* C: page changed */
91 #define _PAGE_ACCESSED 0x0100 /* R: page referenced */
92 #define _PAGE_EXEC 0x0200 /* software: i-cache coherence required */
93 #define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
94 #define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
95 #define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */
96 #define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */
97 #define _PAGE_HUGE 0x10000 /* 16MB page */
98 /* Bits 0x7000 identify the index within an HPT Group */
99 #define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | _PAGE_SECONDARY | _PAGE_GROUP_IX)
100 /* PAGE_MASK gives the right answer below, but only by accident */
101 /* It should be preserving the high 48 bits and then specifically */
102 /* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */
103 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HPTEFLAGS)
105 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
107 #define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
109 /* __pgprot defined in asm-ppc64/page.h */
110 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
112 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
113 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
114 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
115 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
116 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
117 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
118 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
119 #define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
120 _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
123 * The PowerPC can only do execute protection on a segment (256MB) basis,
124 * not on a page basis. So we consider execute permission the same as read.
125 * Also, write permissions imply read permissions.
126 * This is the closest we can get..
128 #define __P000 PAGE_NONE
129 #define __P001 PAGE_READONLY_X
130 #define __P010 PAGE_COPY
131 #define __P011 PAGE_COPY_X
132 #define __P100 PAGE_READONLY
133 #define __P101 PAGE_READONLY_X
134 #define __P110 PAGE_COPY
135 #define __P111 PAGE_COPY_X
137 #define __S000 PAGE_NONE
138 #define __S001 PAGE_READONLY_X
139 #define __S010 PAGE_SHARED
140 #define __S011 PAGE_SHARED_X
141 #define __S100 PAGE_READONLY
142 #define __S101 PAGE_READONLY_X
143 #define __S110 PAGE_SHARED
144 #define __S111 PAGE_SHARED_X
149 * ZERO_PAGE is a global shared page that is always zero: used
150 * for zero-mapped memory areas etc..
152 extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
153 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
154 #endif /* __ASSEMBLY__ */
156 /* shift to put page number into pte */
157 #define PTE_SHIFT (17)
159 /* We allow 2^41 bytes of real memory, so we need 29 bits in the PMD
160 * to give the PTE page number. The bottom two bits are for flags. */
161 #define PMD_TO_PTEPAGE_SHIFT (2)
163 #ifdef CONFIG_HUGETLB_PAGE
166 int hash_huge_page(struct mm_struct *mm, unsigned long access,
167 unsigned long ea, unsigned long vsid, int local);
169 void hugetlb_mm_free_pgd(struct mm_struct *mm);
170 #endif /* __ASSEMBLY__ */
172 #define HAVE_ARCH_UNMAPPED_AREA
173 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
176 #define hash_huge_page(mm,a,ea,vsid,local) -1
177 #define hugetlb_mm_free_pgd(mm) do {} while (0)
184 * Conversion functions: convert a page and protection to a page entry,
185 * and a page entry and page directory to the page they refer to.
187 * mk_pte takes a (struct page *) as input
189 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
191 #define pfn_pte(pfn,pgprot) \
194 pte_val(pte) = ((unsigned long)(pfn) << PTE_SHIFT) | \
195 pgprot_val(pgprot); \
199 #define pte_modify(_pte, newprot) \
200 (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
202 #define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
203 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
205 /* pte_clear moved to later in this file */
207 #define pte_pfn(x) ((unsigned long)((pte_val(x) >> PTE_SHIFT)))
208 #define pte_page(x) pfn_to_page(pte_pfn(x))
210 #define pmd_set(pmdp, ptep) \
211 (pmd_val(*(pmdp)) = (__ba_to_bpn(ptep) << PMD_TO_PTEPAGE_SHIFT))
212 #define pmd_none(pmd) (!pmd_val(pmd))
213 #define pmd_bad(pmd) (pmd_val(pmd) == 0)
214 #define pmd_present(pmd) (pmd_val(pmd) != 0)
215 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
216 #define pmd_page_kernel(pmd) \
217 (__bpn_to_ba(pmd_val(pmd) >> PMD_TO_PTEPAGE_SHIFT))
218 #define pmd_page(pmd) virt_to_page(pmd_page_kernel(pmd))
219 #define pgd_set(pgdp, pmdp) (pgd_val(*(pgdp)) = (__ba_to_bpn(pmdp)))
220 #define pgd_none(pgd) (!pgd_val(pgd))
221 #define pgd_bad(pgd) ((pgd_val(pgd)) == 0)
222 #define pgd_present(pgd) (pgd_val(pgd) != 0UL)
223 #define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0UL)
224 #define pgd_page(pgd) (__bpn_to_ba(pgd_val(pgd)))
227 * Find an entry in a page-table-directory. We combine the address region
228 * (the high order N bits) and the pgd portion of the address.
230 /* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
231 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x7ff)
233 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
235 /* Find an entry in the second-level page table.. */
236 #define pmd_offset(dir,addr) \
237 ((pmd_t *) pgd_page(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
239 /* Find an entry in the third-level page table.. */
240 #define pte_offset_kernel(dir,addr) \
241 ((pte_t *) pmd_page_kernel(*(dir)) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
243 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
244 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
245 #define pte_unmap(pte) do { } while(0)
246 #define pte_unmap_nested(pte) do { } while(0)
248 /* to find an entry in a kernel page-table-directory */
249 /* This now only contains the vmalloc pages */
250 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
252 /* to find an entry in the ioremap page-table-directory */
253 #define pgd_offset_i(address) (ioremap_pgd + pgd_index(address))
255 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
258 * The following only work if pte_present() is true.
259 * Undefined behaviour if not..
261 static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER;}
262 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
263 static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC;}
264 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
265 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
266 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
267 static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE;}
269 static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
270 static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
272 static inline pte_t pte_rdprotect(pte_t pte) {
273 pte_val(pte) &= ~_PAGE_USER; return pte; }
274 static inline pte_t pte_exprotect(pte_t pte) {
275 pte_val(pte) &= ~_PAGE_EXEC; return pte; }
276 static inline pte_t pte_wrprotect(pte_t pte) {
277 pte_val(pte) &= ~(_PAGE_RW); return pte; }
278 static inline pte_t pte_mkclean(pte_t pte) {
279 pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
280 static inline pte_t pte_mkold(pte_t pte) {
281 pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
283 static inline pte_t pte_mkread(pte_t pte) {
284 pte_val(pte) |= _PAGE_USER; return pte; }
285 static inline pte_t pte_mkexec(pte_t pte) {
286 pte_val(pte) |= _PAGE_USER | _PAGE_EXEC; return pte; }
287 static inline pte_t pte_mkwrite(pte_t pte) {
288 pte_val(pte) |= _PAGE_RW; return pte; }
289 static inline pte_t pte_mkdirty(pte_t pte) {
290 pte_val(pte) |= _PAGE_DIRTY; return pte; }
291 static inline pte_t pte_mkyoung(pte_t pte) {
292 pte_val(pte) |= _PAGE_ACCESSED; return pte; }
293 static inline pte_t pte_mkhuge(pte_t pte) {
294 pte_val(pte) |= _PAGE_HUGE; return pte; }
296 /* Atomic PTE updates */
297 static inline unsigned long pte_update(pte_t *p, unsigned long clr)
299 unsigned long old, tmp;
301 __asm__ __volatile__(
302 "1: ldarx %0,0,%3 # pte_update\n\
308 : "=&r" (old), "=&r" (tmp), "=m" (*p)
309 : "r" (p), "r" (clr), "m" (*p), "i" (_PAGE_BUSY)
314 /* PTE updating functions, this function puts the PTE in the
315 * batch, doesn't actually triggers the hash flush immediately,
316 * you need to call flush_tlb_pending() to do that.
318 extern void hpte_update(pte_t *ptep, unsigned long pte, int wrprot);
320 static inline int ptep_test_and_clear_young(pte_t *ptep)
324 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
326 old = pte_update(ptep, _PAGE_ACCESSED);
327 if (old & _PAGE_HASHPTE) {
328 hpte_update(ptep, old, 0);
331 return (old & _PAGE_ACCESSED) != 0;
335 * On RW/DIRTY bit transitions we can avoid flushing the hpte. For the
336 * moment we always flush but we need to fix hpte_update and test if the
337 * optimisation is worth it.
339 static inline int ptep_test_and_clear_dirty(pte_t *ptep)
343 if ((pte_val(*ptep) & _PAGE_DIRTY) == 0)
345 old = pte_update(ptep, _PAGE_DIRTY);
346 if (old & _PAGE_HASHPTE)
347 hpte_update(ptep, old, 0);
348 return (old & _PAGE_DIRTY) != 0;
351 static inline void ptep_set_wrprotect(pte_t *ptep)
355 if ((pte_val(*ptep) & _PAGE_RW) == 0)
357 old = pte_update(ptep, _PAGE_RW);
358 if (old & _PAGE_HASHPTE)
359 hpte_update(ptep, old, 0);
363 * We currently remove entries from the hashtable regardless of whether
364 * the entry was young or dirty. The generic routines only flush if the
365 * entry was young or dirty which is not good enough.
367 * We should be more intelligent about this but for the moment we override
368 * these functions and force a tlb flush unconditionally
370 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
371 #define ptep_clear_flush_young(__vma, __address, __ptep) \
373 int __young = ptep_test_and_clear_young(__ptep); \
377 #define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
378 #define ptep_clear_flush_dirty(__vma, __address, __ptep) \
380 int __dirty = ptep_test_and_clear_dirty(__ptep); \
381 flush_tlb_page(__vma, __address); \
385 static inline pte_t ptep_get_and_clear(pte_t *ptep)
387 unsigned long old = pte_update(ptep, ~0UL);
389 if (old & _PAGE_HASHPTE)
390 hpte_update(ptep, old, 0);
394 static inline void pte_clear(pte_t * ptep)
396 unsigned long old = pte_update(ptep, ~0UL);
398 if (old & _PAGE_HASHPTE)
399 hpte_update(ptep, old, 0);
403 * set_pte stores a linux PTE into the linux page table.
405 static inline void set_pte(pte_t *ptep, pte_t pte)
407 if (pte_present(*ptep)) {
411 *ptep = __pte(pte_val(pte)) & ~_PAGE_HPTEFLAGS;
414 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
415 * function doesn't need to flush the hash entry
417 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
418 static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
420 unsigned long bits = pte_val(entry) &
421 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW);
422 unsigned long old, tmp;
424 __asm__ __volatile__(
431 :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
432 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
435 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
437 __ptep_set_access_flags(__ptep, __entry, __dirty); \
438 flush_tlb_page_nohash(__vma, __address); \
442 * Macro to mark a page protection value as "uncacheable".
444 #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
446 #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
448 extern unsigned long ioremap_bot, ioremap_base;
450 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
451 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
453 #define pte_ERROR(e) \
454 printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
455 #define pmd_ERROR(e) \
456 printk("%s:%d: bad pmd %08x.\n", __FILE__, __LINE__, pmd_val(e))
457 #define pgd_ERROR(e) \
458 printk("%s:%d: bad pgd %08x.\n", __FILE__, __LINE__, pgd_val(e))
460 extern pgd_t swapper_pg_dir[1024];
461 extern pgd_t ioremap_dir[1024];
463 extern void paging_init(void);
466 void hugetlb_free_pgtables(struct mmu_gather *tlb, struct vm_area_struct *prev,
467 unsigned long start, unsigned long end);
470 * This gets called at the end of handling a page fault, when
471 * the kernel has put a new PTE into the page table for the process.
472 * We use it to put a corresponding HPTE into the hash table
473 * ahead of time, instead of waiting for the inevitable extra
474 * hash-table miss exception.
476 struct vm_area_struct;
477 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
479 /* Encode and de-code a swap entry */
480 #define __swp_type(entry) (((entry).val >> 1) & 0x3f)
481 #define __swp_offset(entry) ((entry).val >> 8)
482 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
483 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> PTE_SHIFT })
484 #define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_SHIFT })
485 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
486 #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_SHIFT)|_PAGE_FILE})
487 #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
490 * kern_addr_valid is intended to indicate whether an address is a valid
491 * kernel address. Most 32-bit archs define it as always true (like this)
492 * but most 64-bit archs actually perform a test. What should we do here?
493 * The only use is in fs/ncpfs/dir.c
495 #define kern_addr_valid(addr) (1)
497 #define io_remap_page_range(vma, vaddr, paddr, size, prot) \
498 remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
500 void pgtable_cache_init(void);
502 extern void hpte_init_native(void);
503 extern void hpte_init_lpar(void);
504 extern void hpte_init_iSeries(void);
506 /* imalloc region types */
507 #define IM_REGION_UNUSED 0x1
508 #define IM_REGION_SUBSET 0x2
509 #define IM_REGION_EXISTS 0x4
510 #define IM_REGION_OVERLAP 0x8
511 #define IM_REGION_SUPERSET 0x10
513 extern struct vm_struct * im_get_free_area(unsigned long size);
514 extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
516 unsigned long im_free(void *addr);
518 extern long pSeries_lpar_hpte_insert(unsigned long hpte_group,
519 unsigned long va, unsigned long prpn,
520 int secondary, unsigned long hpteflags,
521 int bolted, int large);
523 extern long native_hpte_insert(unsigned long hpte_group, unsigned long va,
524 unsigned long prpn, int secondary,
525 unsigned long hpteflags, int bolted, int large);
528 * find_linux_pte returns the address of a linux pte for a given
529 * effective address and directory. If not found, it returns zero.
531 static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
538 pg = pgdir + pgd_index(ea);
539 if (!pgd_none(*pg)) {
541 pm = pmd_offset(pg, ea);
542 if (pmd_present(*pm)) {
543 pt = pte_offset_kernel(pm, ea);
545 if (!pte_present(pte))
553 #endif /* __ASSEMBLY__ */
555 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
556 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
557 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
558 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
559 #define __HAVE_ARCH_PTEP_MKDIRTY
560 #define __HAVE_ARCH_PTE_SAME
561 #include <asm-generic/pgtable.h>
563 #endif /* _PPC64_PGTABLE_H */