1 #ifndef _PPC64_PGTABLE_H
2 #define _PPC64_PGTABLE_H
5 * This file contains the functions and defines necessary to modify and use
6 * the ppc64 hashed page table.
10 #include <linux/config.h>
11 #include <linux/stddef.h>
12 #include <asm/processor.h> /* For TASK_SIZE */
15 #include <asm/tlbflush.h>
16 #endif /* __ASSEMBLY__ */
18 /* PMD_SHIFT determines what a second-level page table entry can map */
19 #define PMD_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)
20 #define PMD_SIZE (1UL << PMD_SHIFT)
21 #define PMD_MASK (~(PMD_SIZE-1))
23 /* PGDIR_SHIFT determines what a third-level page table entry can map */
24 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3) + (PAGE_SHIFT - 2))
25 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
26 #define PGDIR_MASK (~(PGDIR_SIZE-1))
29 * Entries per page directory level. The PTE level must use a 64b record
30 * for each page table entry. The PMD and PGD level use a 32b record for
31 * each entry by assuming that each entry is page aligned.
33 #define PTE_INDEX_SIZE 9
34 #define PMD_INDEX_SIZE 10
35 #define PGD_INDEX_SIZE 10
37 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
38 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
39 #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
41 #define USER_PTRS_PER_PGD (1024)
42 #define FIRST_USER_PGD_NR 0
44 #define EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
45 PGD_INDEX_SIZE + PAGE_SHIFT)
48 * Size of EA range mapped by our pagetables.
50 #define PGTABLE_EA_BITS 41
51 #define PGTABLE_EA_MASK ((1UL<<PGTABLE_EA_BITS)-1)
54 * Define the address range of the vmalloc VM area.
56 #define VMALLOC_START (0xD000000000000000ul)
57 #define VMALLOC_END (VMALLOC_START + PGTABLE_EA_MASK)
60 * Define the address range of the imalloc VM area.
63 #define IMALLOC_START (ioremap_bot)
64 #define IMALLOC_VMADDR(x) ((unsigned long)(x))
65 #define PHBS_IO_BASE (0xE000000000000000ul) /* Reserve 2 gigs for PHBs */
66 #define IMALLOC_BASE (0xE000000080000000ul)
67 #define IMALLOC_END (IMALLOC_BASE + PGTABLE_EA_MASK)
70 * Define the address range mapped virt <-> physical
72 #define KRANGE_START KERNELBASE
73 #define KRANGE_END (KRANGE_START + PGTABLE_EA_MASK)
76 * Define the user address range
78 #define USER_START (0UL)
79 #define USER_END (USER_START + PGTABLE_EA_MASK)
83 * Bits in a linux-style PTE. These match the bits in the
84 * (hardware-defined) PowerPC PTE as closely as possible.
86 #define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
87 #define _PAGE_USER 0x0002 /* matches one of the PP bits */
88 #define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
89 #define _PAGE_RW 0x0004 /* software: user write access allowed */
90 #define _PAGE_GUARDED 0x0008
91 #define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
92 #define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
93 #define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
94 #define _PAGE_DIRTY 0x0080 /* C: page changed */
95 #define _PAGE_ACCESSED 0x0100 /* R: page referenced */
96 #define _PAGE_EXEC 0x0200 /* software: i-cache coherence required */
97 #define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
98 #define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
99 #define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */
100 #define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */
101 /* Bits 0x7000 identify the index within an HPT Group */
102 #define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | _PAGE_SECONDARY | _PAGE_GROUP_IX)
103 /* PAGE_MASK gives the right answer below, but only by accident */
104 /* It should be preserving the high 48 bits and then specifically */
105 /* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */
106 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HPTEFLAGS)
108 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
110 #define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
112 /* __pgprot defined in asm-ppc64/page.h */
113 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
115 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
116 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
117 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
118 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
119 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
120 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
121 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
122 #define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
123 _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
126 * The PowerPC can only do execute protection on a segment (256MB) basis,
127 * not on a page basis. So we consider execute permission the same as read.
128 * Also, write permissions imply read permissions.
129 * This is the closest we can get..
131 #define __P000 PAGE_NONE
132 #define __P001 PAGE_READONLY_X
133 #define __P010 PAGE_COPY
134 #define __P011 PAGE_COPY_X
135 #define __P100 PAGE_READONLY
136 #define __P101 PAGE_READONLY_X
137 #define __P110 PAGE_COPY
138 #define __P111 PAGE_COPY_X
140 #define __S000 PAGE_NONE
141 #define __S001 PAGE_READONLY_X
142 #define __S010 PAGE_SHARED
143 #define __S011 PAGE_SHARED_X
144 #define __S100 PAGE_READONLY
145 #define __S101 PAGE_READONLY_X
146 #define __S110 PAGE_SHARED
147 #define __S111 PAGE_SHARED_X
152 * ZERO_PAGE is a global shared page that is always zero: used
153 * for zero-mapped memory areas etc..
155 extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
156 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
157 #endif /* __ASSEMBLY__ */
159 /* shift to put page number into pte */
160 #define PTE_SHIFT (16)
162 /* We allow 2^41 bytes of real memory, so we need 29 bits in the PMD
163 * to give the PTE page number. The bottom two bits are for flags. */
164 #define PMD_TO_PTEPAGE_SHIFT (2)
166 #ifdef CONFIG_HUGETLB_PAGE
167 #define _PMD_HUGEPAGE 0x00000001U
168 #define HUGEPTE_BATCH_SIZE (1<<(HPAGE_SHIFT-PMD_SHIFT))
171 int hash_huge_page(struct mm_struct *mm, unsigned long access,
172 unsigned long ea, unsigned long vsid, int local);
173 #endif /* __ASSEMBLY__ */
175 #define HAVE_ARCH_UNMAPPED_AREA
176 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
179 #define hash_huge_page(mm,a,ea,vsid,local) -1
180 #define _PMD_HUGEPAGE 0
187 * Conversion functions: convert a page and protection to a page entry,
188 * and a page entry and page directory to the page they refer to.
190 * mk_pte takes a (struct page *) as input
192 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
194 #define pfn_pte(pfn,pgprot) \
197 pte_val(pte) = ((unsigned long)(pfn) << PTE_SHIFT) | \
198 pgprot_val(pgprot); \
202 #define pte_modify(_pte, newprot) \
203 (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
205 #define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
206 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
208 /* pte_clear moved to later in this file */
210 #define pte_pfn(x) ((unsigned long)((pte_val(x) >> PTE_SHIFT)))
211 #define pte_page(x) pfn_to_page(pte_pfn(x))
213 #define pmd_set(pmdp, ptep) \
214 (pmd_val(*(pmdp)) = (__ba_to_bpn(ptep) << PMD_TO_PTEPAGE_SHIFT))
215 #define pmd_none(pmd) (!pmd_val(pmd))
216 #define pmd_hugepage(pmd) (!!(pmd_val(pmd) & _PMD_HUGEPAGE))
217 #define pmd_bad(pmd) (((pmd_val(pmd)) == 0) || pmd_hugepage(pmd))
218 #define pmd_present(pmd) ((!pmd_hugepage(pmd)) \
219 && (pmd_val(pmd) & ~_PMD_HUGEPAGE) != 0)
220 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
221 #define pmd_page_kernel(pmd) \
222 (__bpn_to_ba(pmd_val(pmd) >> PMD_TO_PTEPAGE_SHIFT))
223 #define pmd_page(pmd) virt_to_page(pmd_page_kernel(pmd))
224 #define pgd_set(pgdp, pmdp) (pgd_val(*(pgdp)) = (__ba_to_bpn(pmdp)))
225 #define pgd_none(pgd) (!pgd_val(pgd))
226 #define pgd_bad(pgd) ((pgd_val(pgd)) == 0)
227 #define pgd_present(pgd) (pgd_val(pgd) != 0UL)
228 #define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0UL)
229 #define pgd_page(pgd) (__bpn_to_ba(pgd_val(pgd)))
232 * Find an entry in a page-table-directory. We combine the address region
233 * (the high order N bits) and the pgd portion of the address.
235 /* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
236 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x7ff)
238 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
240 /* Find an entry in the second-level page table.. */
241 #define pmd_offset(dir,addr) \
242 ((pmd_t *) pgd_page(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
244 /* Find an entry in the third-level page table.. */
245 #define pte_offset_kernel(dir,addr) \
246 ((pte_t *) pmd_page_kernel(*(dir)) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
248 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
249 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
250 #define pte_unmap(pte) do { } while(0)
251 #define pte_unmap_nested(pte) do { } while(0)
253 /* to find an entry in a kernel page-table-directory */
254 /* This now only contains the vmalloc pages */
255 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
257 /* to find an entry in the ioremap page-table-directory */
258 #define pgd_offset_i(address) (ioremap_pgd + pgd_index(address))
260 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
263 * The following only work if pte_present() is true.
264 * Undefined behaviour if not..
266 static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER;}
267 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
268 static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC;}
269 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
270 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
271 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
273 static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
274 static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
276 static inline pte_t pte_rdprotect(pte_t pte) {
277 pte_val(pte) &= ~_PAGE_USER; return pte; }
278 static inline pte_t pte_exprotect(pte_t pte) {
279 pte_val(pte) &= ~_PAGE_EXEC; return pte; }
280 static inline pte_t pte_wrprotect(pte_t pte) {
281 pte_val(pte) &= ~(_PAGE_RW); return pte; }
282 static inline pte_t pte_mkclean(pte_t pte) {
283 pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
284 static inline pte_t pte_mkold(pte_t pte) {
285 pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
287 static inline pte_t pte_mkread(pte_t pte) {
288 pte_val(pte) |= _PAGE_USER; return pte; }
289 static inline pte_t pte_mkexec(pte_t pte) {
290 pte_val(pte) |= _PAGE_USER | _PAGE_EXEC; return pte; }
291 static inline pte_t pte_mkwrite(pte_t pte) {
292 pte_val(pte) |= _PAGE_RW; return pte; }
293 static inline pte_t pte_mkdirty(pte_t pte) {
294 pte_val(pte) |= _PAGE_DIRTY; return pte; }
295 static inline pte_t pte_mkyoung(pte_t pte) {
296 pte_val(pte) |= _PAGE_ACCESSED; return pte; }
298 /* Atomic PTE updates */
299 static inline unsigned long pte_update(pte_t *p, unsigned long clr)
301 unsigned long old, tmp;
303 __asm__ __volatile__(
304 "1: ldarx %0,0,%3 # pte_update\n\
310 : "=&r" (old), "=&r" (tmp), "=m" (*p)
311 : "r" (p), "r" (clr), "m" (*p), "i" (_PAGE_BUSY)
316 /* PTE updating functions, this function puts the PTE in the
317 * batch, doesn't actually triggers the hash flush immediately,
318 * you need to call flush_tlb_pending() to do that.
320 extern void hpte_update(pte_t *ptep, unsigned long pte, int wrprot);
322 static inline int ptep_test_and_clear_young(pte_t *ptep)
326 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
328 old = pte_update(ptep, _PAGE_ACCESSED);
329 if (old & _PAGE_HASHPTE) {
330 hpte_update(ptep, old, 0);
333 return (old & _PAGE_ACCESSED) != 0;
337 * On RW/DIRTY bit transitions we can avoid flushing the hpte. For the
338 * moment we always flush but we need to fix hpte_update and test if the
339 * optimisation is worth it.
341 static inline int ptep_test_and_clear_dirty(pte_t *ptep)
345 if ((pte_val(*ptep) & _PAGE_DIRTY) == 0)
347 old = pte_update(ptep, _PAGE_DIRTY);
348 if (old & _PAGE_HASHPTE)
349 hpte_update(ptep, old, 0);
350 return (old & _PAGE_DIRTY) != 0;
353 static inline void ptep_set_wrprotect(pte_t *ptep)
357 if ((pte_val(*ptep) & _PAGE_RW) == 0)
359 old = pte_update(ptep, _PAGE_RW);
360 if (old & _PAGE_HASHPTE)
361 hpte_update(ptep, old, 0);
365 * We currently remove entries from the hashtable regardless of whether
366 * the entry was young or dirty. The generic routines only flush if the
367 * entry was young or dirty which is not good enough.
369 * We should be more intelligent about this but for the moment we override
370 * these functions and force a tlb flush unconditionally
372 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
373 #define ptep_clear_flush_young(__vma, __address, __ptep) \
375 int __young = ptep_test_and_clear_young(__ptep); \
379 #define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
380 #define ptep_clear_flush_dirty(__vma, __address, __ptep) \
382 int __dirty = ptep_test_and_clear_dirty(__ptep); \
383 flush_tlb_page(__vma, __address); \
387 static inline pte_t ptep_get_and_clear(pte_t *ptep)
389 unsigned long old = pte_update(ptep, ~0UL);
391 if (old & _PAGE_HASHPTE)
392 hpte_update(ptep, old, 0);
396 static inline void pte_clear(pte_t * ptep)
398 unsigned long old = pte_update(ptep, ~0UL);
400 if (old & _PAGE_HASHPTE)
401 hpte_update(ptep, old, 0);
405 * set_pte stores a linux PTE into the linux page table.
407 static inline void set_pte(pte_t *ptep, pte_t pte)
409 if (pte_present(*ptep)) {
413 *ptep = __pte(pte_val(pte)) & ~_PAGE_HPTEFLAGS;
416 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
417 * function doesn't need to flush the hash entry
419 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
420 static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
422 unsigned long bits = pte_val(entry) &
423 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW);
424 unsigned long old, tmp;
426 __asm__ __volatile__(
433 :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
434 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
437 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
439 __ptep_set_access_flags(__ptep, __entry, __dirty); \
440 flush_tlb_page_nohash(__vma, __address); \
444 * Macro to mark a page protection value as "uncacheable".
446 #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
448 #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
450 extern unsigned long ioremap_bot, ioremap_base;
452 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
453 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
455 #define pte_ERROR(e) \
456 printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
457 #define pmd_ERROR(e) \
458 printk("%s:%d: bad pmd %08x.\n", __FILE__, __LINE__, pmd_val(e))
459 #define pgd_ERROR(e) \
460 printk("%s:%d: bad pgd %08x.\n", __FILE__, __LINE__, pgd_val(e))
462 extern pgd_t swapper_pg_dir[1024];
463 extern pgd_t ioremap_dir[1024];
465 extern void paging_init(void);
468 * This gets called at the end of handling a page fault, when
469 * the kernel has put a new PTE into the page table for the process.
470 * We use it to put a corresponding HPTE into the hash table
471 * ahead of time, instead of waiting for the inevitable extra
472 * hash-table miss exception.
474 struct vm_area_struct;
475 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
477 /* Encode and de-code a swap entry */
478 #define __swp_type(entry) (((entry).val >> 1) & 0x3f)
479 #define __swp_offset(entry) ((entry).val >> 8)
480 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
481 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> PTE_SHIFT })
482 #define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_SHIFT })
483 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
484 #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_SHIFT)|_PAGE_FILE})
485 #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
488 * kern_addr_valid is intended to indicate whether an address is a valid
489 * kernel address. Most 32-bit archs define it as always true (like this)
490 * but most 64-bit archs actually perform a test. What should we do here?
491 * The only use is in fs/ncpfs/dir.c
493 #define kern_addr_valid(addr) (1)
495 #define io_remap_page_range remap_page_range
497 void pgtable_cache_init(void);
499 extern void hpte_init_native(void);
500 extern void hpte_init_lpar(void);
501 extern void hpte_init_iSeries(void);
503 /* imalloc region types */
504 #define IM_REGION_UNUSED 0x1
505 #define IM_REGION_SUBSET 0x2
506 #define IM_REGION_EXISTS 0x4
507 #define IM_REGION_OVERLAP 0x8
508 #define IM_REGION_SUPERSET 0x10
510 extern struct vm_struct * im_get_free_area(unsigned long size);
511 extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
513 unsigned long im_free(void *addr);
515 extern long pSeries_lpar_hpte_insert(unsigned long hpte_group,
516 unsigned long va, unsigned long prpn,
517 int secondary, unsigned long hpteflags,
518 int bolted, int large);
520 extern long native_hpte_insert(unsigned long hpte_group, unsigned long va,
521 unsigned long prpn, int secondary,
522 unsigned long hpteflags, int bolted, int large);
525 * find_linux_pte returns the address of a linux pte for a given
526 * effective address and directory. If not found, it returns zero.
528 static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
535 pg = pgdir + pgd_index(ea);
536 if (!pgd_none(*pg)) {
538 pm = pmd_offset(pg, ea);
539 if (pmd_present(*pm)) {
540 pt = pte_offset_kernel(pm, ea);
542 if (!pte_present(pte))
550 #endif /* __ASSEMBLY__ */
552 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
553 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
554 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
555 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
556 #define __HAVE_ARCH_PTEP_MKDIRTY
557 #define __HAVE_ARCH_PTE_SAME
558 #include <asm-generic/pgtable.h>
560 #endif /* _PPC64_PGTABLE_H */