include/asm-s390/spinlock.h

   1 /*
   2  *  include/asm-s390/spinlock.h
   3  *
   4  *  S390 version
   5  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
   6  *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
   7  *
   8  *  Derived from "include/asm-i386/spinlock.h"
   9  */
  10
  11 #ifndef __ASM_SPINLOCK_H
  12 #define __ASM_SPINLOCK_H
  13
  14 #ifdef __s390x__
  15 /*
  16  * Grmph, take care of %&#! user space programs that include
  17  * asm/spinlock.h. The diagnose is only available in kernel
  18  * context.
  19  */
  20 #ifdef __KERNEL__
  21 #include <asm/lowcore.h>
  22 #define __DIAG44_INSN "ex"
  23 #define __DIAG44_OPERAND __LC_DIAG44_OPCODE
  24 #else
  25 #define __DIAG44_INSN "#"
  26 #define __DIAG44_OPERAND 0
  27 #endif
  28 #endif /* __s390x__ */
  29
  30 /*
  31  * Simple spin lock operations.  There are two variants, one clears IRQ's
  32  * on the local processor, one does not.
  33  *
  34  * We make no fairness assumptions. They have a cost.
  35  */
  36
  37 typedef struct {
  38         volatile unsigned int lock;
  39 } __attribute__ ((aligned (4))) spinlock_t;
  40
  41 #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
  42 #define spin_lock_init(lp) do { (lp)->lock = 0; } while(0)
  43 #define spin_unlock_wait(lp)    do { barrier(); } while(((volatile spinlock_t *)(lp))->lock)
  44 #define spin_is_locked(x) ((x)->lock != 0)
  45
  46 extern inline void _raw_spin_lock(spinlock_t *lp)
  47 {
  48 #ifndef __s390x__
  49         unsigned int reg1, reg2;
  50         __asm__ __volatile("    bras  %0,1f\n"
  51                            "0:  diag  0,0,68\n"
  52                            "1:  slr   %1,%1\n"
  53                            "    cs    %1,%0,0(%3)\n"
  54                            "    jl    0b\n"
  55                            : "=&d" (reg1), "=&d" (reg2), "=m" (lp->lock)
  56                            : "a" (&lp->lock), "m" (lp->lock)
  57                            : "cc", "memory" );
  58 #else /* __s390x__ */
  59         unsigned long reg1, reg2;
  60         __asm__ __volatile("    bras  %1,1f\n"
  61                            "0:  " __DIAG44_INSN " 0,%4\n"
  62                            "1:  slr   %0,%0\n"
  63                            "    cs    %0,%1,0(%3)\n"
  64                            "    jl    0b\n"
  65                            : "=&d" (reg1), "=&d" (reg2), "=m" (lp->lock)
  66                            : "a" (&lp->lock), "i" (__DIAG44_OPERAND),
  67                              "m" (lp->lock) : "cc", "memory" );
  68 #endif /* __s390x__ */
  69 }
  70
  71 extern inline int _raw_spin_trylock(spinlock_t *lp)
  72 {
  73         unsigned long reg;
  74         unsigned int result;
  75
  76         __asm__ __volatile("    basr  %1,0\n"
  77                            "0:  cs    %0,%1,0(%3)"
  78                            : "=d" (result), "=&d" (reg), "=m" (lp->lock)
  79                            : "a" (&lp->lock), "m" (lp->lock), "0" (0)
  80                            : "cc", "memory" );
  81         return !result;
  82 }
  83
  84 extern inline void _raw_spin_unlock(spinlock_t *lp)
  85 {
  86         unsigned int old;
  87
  88         __asm__ __volatile("cs %0,%3,0(%4)"
  89                            : "=d" (old), "=m" (lp->lock)
  90                            : "0" (lp->lock), "d" (0), "a" (lp)
  91                            : "cc", "memory" );
  92 }
  93
  94 /*
  95  * Read-write spinlocks, allowing multiple readers
  96  * but only one writer.
  97  *
  98  * NOTE! it is quite common to have readers in interrupts
  99  * but no interrupt writers. For those circumstances we
 100  * can "mix" irq-safe locks - any writer needs to get a
 101  * irq-safe write-lock, but readers can get non-irqsafe
 102  * read-locks.
 103  */
 104 typedef struct {
 105         volatile unsigned long lock;
 106         volatile unsigned long owner_pc;
 107 } rwlock_t;
 108
 109 #define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0 }
 110
 111 #define rwlock_init(x)  do { *(x) = RW_LOCK_UNLOCKED; } while(0)
 112
 113 #define rwlock_is_locked(x) ((x)->lock != 0)
 114
 115 #ifndef __s390x__
 116 #define _raw_read_lock(rw)   \
 117         asm volatile("   l     2,0(%1)\n"   \
 118                      "   j     1f\n"     \
 119                      "0: diag  0,0,68\n" \
 120                      "1: la    2,0(2)\n"     /* clear high (=write) bit */ \
 121                      "   la    3,1(2)\n"     /* one more reader */ \
 122                      "   cs    2,3,0(%1)\n"  /* try to write new value */ \
 123                      "   jl    0b"       \
 124                      : "=m" ((rw)->lock) : "a" (&(rw)->lock), \
 125                        "m" ((rw)->lock) : "2", "3", "cc", "memory" )
 126 #else /* __s390x__ */
 127 #define _raw_read_lock(rw)   \
 128         asm volatile("   lg    2,0(%1)\n"   \
 129                      "   j     1f\n"     \
 130                      "0: " __DIAG44_INSN " 0,%2\n" \
 131                      "1: nihh  2,0x7fff\n" /* clear high (=write) bit */ \
 132                      "   la    3,1(2)\n"   /* one more reader */  \
 133                      "   csg   2,3,0(%1)\n" /* try to write new value */ \
 134                      "   jl    0b"       \
 135                      : "=m" ((rw)->lock) \
 136                      : "a" (&(rw)->lock), "i" (__DIAG44_OPERAND), \
 137                        "m" ((rw)->lock) : "2", "3", "cc", "memory" )
 138 #endif /* __s390x__ */
 139
 140 #ifndef __s390x__
 141 #define _raw_read_unlock(rw) \
 142         asm volatile("   l     2,0(%1)\n"   \
 143                      "   j     1f\n"     \
 144                      "0: diag  0,0,68\n" \
 145                      "1: lr    3,2\n"    \
 146                      "   ahi   3,-1\n"    /* one less reader */ \
 147                      "   cs    2,3,0(%1)\n" \
 148                      "   jl    0b"       \
 149                      : "=m" ((rw)->lock) : "a" (&(rw)->lock), \
 150                        "m" ((rw)->lock) : "2", "3", "cc", "memory" )
 151 #else /* __s390x__ */
 152 #define _raw_read_unlock(rw) \
 153         asm volatile("   lg    2,0(%1)\n"   \
 154                      "   j     1f\n"     \
 155                      "0: " __DIAG44_INSN " 0,%2\n" \
 156                      "1: lgr   3,2\n"    \
 157                      "   bctgr 3,0\n"    /* one less reader */ \
 158                      "   csg   2,3,0(%1)\n" \
 159                      "   jl    0b"       \
 160                      : "=m" ((rw)->lock) \
 161                      : "a" (&(rw)->lock), "i" (__DIAG44_OPERAND), \
 162                        "m" ((rw)->lock) : "2", "3", "cc", "memory" )
 163 #endif /* __s390x__ */
 164
 165 #ifndef __s390x__
 166 #define _raw_write_lock(rw) \
 167         asm volatile("   lhi   3,1\n"    \
 168                      "   sll   3,31\n"    /* new lock value = 0x80000000 */ \
 169                      "   j     1f\n"     \
 170                      "0: diag  0,0,68\n" \
 171                      "1: slr   2,2\n"     /* old lock value must be 0 */ \
 172                      "   cs    2,3,0(%1)\n" \
 173                      "   jl    0b"       \
 174                      : "=m" ((rw)->lock) : "a" (&(rw)->lock), \
 175                        "m" ((rw)->lock) : "2", "3", "cc", "memory" )
 176 #else /* __s390x__ */
 177 #define _raw_write_lock(rw) \
 178         asm volatile("   llihh 3,0x8000\n" /* new lock value = 0x80...0 */ \
 179                      "   j     1f\n"       \
 180                      "0: " __DIAG44_INSN " 0,%2\n"   \
 181                      "1: slgr  2,2\n"      /* old lock value must be 0 */ \
 182                      "   csg   2,3,0(%1)\n" \
 183                      "   jl    0b"         \
 184                      : "=m" ((rw)->lock) \
 185                      : "a" (&(rw)->lock), "i" (__DIAG44_OPERAND), \
 186                        "m" ((rw)->lock) : "2", "3", "cc", "memory" )
 187 #endif /* __s390x__ */
 188
 189 #ifndef __s390x__
 190 #define _raw_write_unlock(rw) \
 191         asm volatile("   slr   3,3\n"     /* new lock value = 0 */ \
 192                      "   j     1f\n"     \
 193                      "0: diag  0,0,68\n" \
 194                      "1: lhi   2,1\n"    \
 195                      "   sll   2,31\n"    /* old lock value must be 0x80000000 */ \
 196                      "   cs    2,3,0(%1)\n" \
 197                      "   jl    0b"       \
 198                      : "=m" ((rw)->lock) : "a" (&(rw)->lock), \
 199                        "m" ((rw)->lock) : "2", "3", "cc", "memory" )
 200 #else /* __s390x__ */
 201 #define _raw_write_unlock(rw) \
 202         asm volatile("   slgr  3,3\n"      /* new lock value = 0 */ \
 203                      "   j     1f\n"       \
 204                      "0: " __DIAG44_INSN " 0,%2\n"   \
 205                      "1: llihh 2,0x8000\n" /* old lock value must be 0x8..0 */\
 206                      "   csg   2,3,0(%1)\n"   \
 207                      "   jl    0b"         \
 208                      : "=m" ((rw)->lock) \
 209                      : "a" (&(rw)->lock), "i" (__DIAG44_OPERAND), \
 210                        "m" ((rw)->lock) : "2", "3", "cc", "memory" )
 211 #endif /* __s390x__ */
 212
 213 extern inline int _raw_write_trylock(rwlock_t *rw)
 214 {
 215         unsigned long result, reg;
 216
 217         __asm__ __volatile__(
 218 #ifndef __s390x__
 219                              "   lhi  %1,1\n"
 220                              "   sll  %1,31\n"
 221                              "   cs   %0,%1,0(%3)"
 222 #else /* __s390x__ */
 223                              "   llihh %1,0x8000\n"
 224                              "0: csg %0,%1,0(%3)\n"
 225 #endif /* __s390x__ */
 226                              : "=d" (result), "=&d" (reg), "=m" (rw->lock)
 227                              : "a" (&rw->lock), "m" (rw->lock), "0" (0UL)
 228                              : "cc", "memory" );
 229         return result == 0;
 230 }
 231
 232 #endif /* __ASM_SPINLOCK_H */