4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 #ifndef __ASM_SH_UBC_H
12 #define __ASM_SH_UBC_H
14 #include <asm/cpu/ubc.h>
16 /* User Break Controller */
17 #if defined(CONFIG_CPU_SUBTYPE_SH7709)
18 #define UBC_TYPE_SH7729 (cpu_data->type == CPU_SH7729)
20 #define UBC_TYPE_SH7729 0
23 #define BAMR_ASID (1 << 2)
31 #define BBR_INST (1 << 4)
32 #define BBR_DATA (2 << 4)
33 #define BBR_READ (1 << 2)
34 #define BBR_WRITE (2 << 2)
38 #define BBR_QUAD (1 << 6) /* SH7750 */
39 #define BBR_CPU (1 << 6) /* SH7709A,SH7729 */
40 #define BBR_DMA (2 << 6) /* SH7709A,SH7729 */
42 #define BRCR_CMFA (1 << 15)
43 #define BRCR_CMFB (1 << 14)
44 #define BRCR_PCTE (1 << 11)
45 #define BRCR_PCBA (1 << 10) /* 1: after execution */
46 #define BRCR_DBEB (1 << 7)
47 #define BRCR_PCBB (1 << 6)
48 #define BRCR_SEQ (1 << 3)
49 #define BRCR_UBDE (1 << 0)
52 /* arch/sh/kernel/ubc.S */
53 extern void ubc_wakeup(void);
54 extern void ubc_sleep(void);
57 #endif /* __ASM_SH_UBC_H */