1 #ifndef __ASM_SH64_IO_H
2 #define __ASM_SH64_IO_H
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
9 * include/asm-sh64/io.h
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
18 * read{b,w,l}/write{b,w,l} are for PCI,
19 * while in{b,w,l}/out{b,w,l} are for ISA
20 * These may (will) be platform specific function.
22 * In addition, we have
23 * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
24 * which are processor specific. Address should be the result of
28 #include <asm/cache.h>
29 #include <asm/system.h>
32 #define virt_to_bus virt_to_phys
33 #define bus_to_virt phys_to_virt
34 #define page_to_bus page_to_phys
37 * Nothing overly special here.. instead of doing the same thing
38 * over and over again, we just define a set of sh64_in/out functions
39 * with an implicit size. The traditional read{b,w,l}/write{b,w,l}
40 * mess is wrapped to this, as are the SH-specific ctrl_in/out routines.
42 static inline unsigned char sh64_in8(unsigned long addr)
44 return *(volatile unsigned char *)addr;
47 static inline unsigned short sh64_in16(unsigned long addr)
49 return *(volatile unsigned short *)addr;
52 static inline unsigned long sh64_in32(unsigned long addr)
54 return *(volatile unsigned long *)addr;
57 static inline unsigned long long sh64_in64(unsigned long addr)
59 return *(volatile unsigned long long *)addr;
62 static inline void sh64_out8(unsigned char b, unsigned long addr)
64 *(volatile unsigned char *)addr = b;
68 static inline void sh64_out16(unsigned short b, unsigned long addr)
70 *(volatile unsigned short *)addr = b;
74 static inline void sh64_out32(unsigned long b, unsigned long addr)
76 *(volatile unsigned long *)addr = b;
80 static inline void sh64_out64(unsigned long long b, unsigned long addr)
82 *(volatile unsigned long long *)addr = b;
86 #define readb(addr) sh64_in8(addr)
87 #define readw(addr) sh64_in16(addr)
88 #define readl(addr) sh64_in32(addr)
89 #define readb_relaxed(addr) sh64_in8(addr)
90 #define readw_relaxed(addr) sh64_in16(addr)
91 #define readl_relaxed(addr) sh64_in32(addr)
93 #define writeb(b, addr) sh64_out8(b, addr)
94 #define writew(b, addr) sh64_out16(b, addr)
95 #define writel(b, addr) sh64_out32(b, addr)
97 #define ctrl_inb(addr) sh64_in8(addr)
98 #define ctrl_inw(addr) sh64_in16(addr)
99 #define ctrl_inl(addr) sh64_in32(addr)
101 #define ctrl_outb(b, addr) sh64_out8(b, addr)
102 #define ctrl_outw(b, addr) sh64_out16(b, addr)
103 #define ctrl_outl(b, addr) sh64_out32(b, addr)
105 unsigned long inb(unsigned long port);
106 unsigned long inw(unsigned long port);
107 unsigned long inl(unsigned long port);
108 void outb(unsigned long value, unsigned long port);
109 void outw(unsigned long value, unsigned long port);
110 void outl(unsigned long value, unsigned long port);
116 #ifdef CONFIG_SH_CAYMAN
117 extern unsigned long smsc_superio_virt;
120 extern unsigned long pciio_virt;
123 #define IO_SPACE_LIMIT 0xffffffff
126 * Change virtual addresses to physical addresses and vv.
127 * These are trivial on the 1:1 Linux/SuperH mapping
129 extern __inline__ unsigned long virt_to_phys(volatile void * address)
131 return __pa(address);
134 extern __inline__ void * phys_to_virt(unsigned long address)
136 return __va(address);
139 extern void * __ioremap(unsigned long phys_addr, unsigned long size,
140 unsigned long flags);
142 extern __inline__ void * ioremap(unsigned long phys_addr, unsigned long size)
144 return __ioremap(phys_addr, size, 1);
147 extern __inline__ void * ioremap_nocache (unsigned long phys_addr, unsigned long size)
149 return __ioremap(phys_addr, size, 0);
152 extern void iounmap(void *addr);
154 unsigned long onchip_remap(unsigned long addr, unsigned long size, const char* name);
155 extern void onchip_unmap(unsigned long vaddr);
157 static __inline__ int check_signature(unsigned long io_addr,
158 const unsigned char *signature, int length)
162 if (readb(io_addr) != *signature)
174 * The caches on some architectures aren't dma-coherent and have need to
175 * handle this in software. There are three types of operations that
176 * can be applied to dma buffers.
178 * - dma_cache_wback_inv(start, size) makes caches and RAM coherent by
179 * writing the content of the caches back to memory, if necessary.
180 * The function also invalidates the affected part of the caches as
181 * necessary before DMA transfers from outside to memory.
182 * - dma_cache_inv(start, size) invalidates the affected parts of the
183 * caches. Dirty lines of the caches may be written back or simply
184 * be discarded. This operation is necessary before dma operations
186 * - dma_cache_wback(start, size) writes back any dirty lines but does
187 * not invalidate the cache. This can be used before DMA reads from
191 static __inline__ void dma_cache_wback_inv (unsigned long start, unsigned long size)
193 unsigned long s = start & L1_CACHE_ALIGN_MASK;
194 unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
196 for (; s <= e; s += L1_CACHE_BYTES)
197 asm volatile ("ocbp %0, 0" : : "r" (s));
200 static __inline__ void dma_cache_inv (unsigned long start, unsigned long size)
202 // Note that caller has to be careful with overzealous
203 // invalidation should there be partial cache lines at the extremities
204 // of the specified range
205 unsigned long s = start & L1_CACHE_ALIGN_MASK;
206 unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
208 for (; s <= e; s += L1_CACHE_BYTES)
209 asm volatile ("ocbi %0, 0" : : "r" (s));
212 static __inline__ void dma_cache_wback (unsigned long start, unsigned long size)
214 unsigned long s = start & L1_CACHE_ALIGN_MASK;
215 unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
217 for (; s <= e; s += L1_CACHE_BYTES)
218 asm volatile ("ocbwb %0, 0" : : "r" (s));
221 #endif /* __KERNEL__ */
222 #endif /* __ASM_SH64_IO_H */