1 /* $Id: pgtable.h,v 1.156 2002/02/09 19:49:31 davem Exp $
2 * pgtable.h: SpitFire page table operations.
4 * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 #ifndef _SPARC64_PGTABLE_H
9 #define _SPARC64_PGTABLE_H
11 /* This file contains the functions and defines necessary to modify and use
12 * the SpitFire page tables.
15 #include <linux/config.h>
16 #include <asm/spitfire.h>
18 #include <asm/system.h>
20 #include <asm/processor.h>
21 #include <asm/const.h>
23 /* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 16MB).
24 * The page copy blockops use 0x1000000 to 0x18000000 (16MB --> 24MB).
25 * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
26 * The vmalloc area spans 0x140000000 to 0x200000000.
27 * There is a single static kernel PMD which maps from 0x0 to address
30 #define TLBTEMP_BASE _AC(0x0000000001000000,UL)
31 #define MODULES_VADDR _AC(0x0000000002000000,UL)
32 #define MODULES_LEN _AC(0x000000007e000000,UL)
33 #define MODULES_END _AC(0x0000000080000000,UL)
34 #define VMALLOC_START _AC(0x0000000140000000,UL)
35 #define VMALLOC_END _AC(0x0000000200000000,UL)
36 #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
37 #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
39 /* XXX All of this needs to be rethought so we can take advantage
40 * XXX cheetah's full 64-bit virtual address space, ie. no more hole
41 * XXX in the middle like on spitfire. -DaveM
44 * Given a virtual address, the lowest PAGE_SHIFT bits determine offset
45 * into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
46 * in the proper pagetable (the -3 is from the 8 byte ptes, and each page
47 * table is a single page long). The next higher PMD_BITS determine pmd#
48 * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2)
49 * since the pmd entries are 4 bytes, and each pmd page is a single page
50 * long). Finally, the higher few bits determine pgde#.
53 /* PMD_SHIFT determines the size of the area a second-level page
56 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3))
57 #define PMD_SIZE (1UL << PMD_SHIFT)
58 #define PMD_MASK (~(PMD_SIZE-1))
61 /* PGDIR_SHIFT determines what a third-level page table entry can map */
62 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
63 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
64 #define PGDIR_MASK (~(PGDIR_SIZE-1))
68 #include <linux/sched.h>
70 /* Certain architectures need to do special things when pte's
71 * within a page table are directly modified. Thus, the following
72 * hook is made available.
74 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
76 /* Entries per page directory level. */
77 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3))
79 /* We the first one in this file, what we export to the kernel
80 * is different so we can optimize correctly for 32-bit tasks.
82 #define REAL_PTRS_PER_PMD (1UL << PMD_BITS)
83 #define PTRS_PER_PMD ((const int)(test_thread_flag(TIF_32BIT) ? \
84 (1UL << (32 - (PAGE_SHIFT-3) - PAGE_SHIFT)) : \
88 * We cannot use the top address range because VPTE table lives there. This
89 * formula finds the total legal virtual space in the processor, subtracts the
90 * vpte size, then aligns it to the number of bytes mapped by one pgde, and
91 * thus calculates the number of pgdes needed.
93 #define PTRS_PER_PGD (((1UL << VA_BITS) - VPTE_SIZE + (1UL << (PAGE_SHIFT + \
94 (PAGE_SHIFT-3) + PMD_BITS)) - 1) / (1UL << (PAGE_SHIFT + \
95 (PAGE_SHIFT-3) + PMD_BITS)))
97 /* Kernel has a separate 44bit address space. */
98 #define USER_PTRS_PER_PGD ((const int)(test_thread_flag(TIF_32BIT)) ? \
100 #define FIRST_USER_PGD_NR 0
102 #define pte_ERROR(e) __builtin_trap()
103 #define pmd_ERROR(e) __builtin_trap()
104 #define pgd_ERROR(e) __builtin_trap()
106 #endif /* !(__ASSEMBLY__) */
108 /* Spitfire/Cheetah TTE bits. */
109 #define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */
110 #define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit up to date */
111 #define _PAGE_SZ4MB _AC(0x6000000000000000,UL) /* 4MB Page */
112 #define _PAGE_SZ512K _AC(0x4000000000000000,UL) /* 512K Page */
113 #define _PAGE_SZ64K _AC(0x2000000000000000,UL) /* 64K Page */
114 #define _PAGE_SZ8K _AC(0x0000000000000000,UL) /* 8K Page */
115 #define _PAGE_NFO _AC(0x1000000000000000,UL) /* No Fault Only */
116 #define _PAGE_IE _AC(0x0800000000000000,UL) /* Invert Endianness */
117 #define _PAGE_SN _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */
118 #define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL) /* (Spitfire) paddr [40:13]*/
119 #define _PAGE_PADDR _AC(0x000007FFFFFFE000,UL) /* (Cheetah) paddr [42:13] */
120 #define _PAGE_SOFT _AC(0x0000000000001F80,UL) /* Software bits */
121 #define _PAGE_L _AC(0x0000000000000040,UL) /* Locked TTE */
122 #define _PAGE_CP _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */
123 #define _PAGE_CV _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */
124 #define _PAGE_E _AC(0x0000000000000008,UL) /* side-Effect */
125 #define _PAGE_P _AC(0x0000000000000004,UL) /* Privileged Page */
126 #define _PAGE_W _AC(0x0000000000000002,UL) /* Writable */
127 #define _PAGE_G _AC(0x0000000000000001,UL) /* Global */
129 /* Here are the SpitFire software bits we use in the TTE's. */
130 #define _PAGE_FILE _AC(0x0000000000001000,UL) /* Pagecache page */
131 #define _PAGE_MODIFIED _AC(0x0000000000000800,UL) /* Modified (dirty) */
132 #define _PAGE_ACCESSED _AC(0x0000000000000400,UL) /* Accessed (ref'd) */
133 #define _PAGE_READ _AC(0x0000000000000200,UL) /* Readable SW Bit */
134 #define _PAGE_WRITE _AC(0x0000000000000100,UL) /* Writable SW Bit */
135 #define _PAGE_PRESENT _AC(0x0000000000000080,UL) /* Present */
138 #define _PAGE_SZBITS _PAGE_SZ8K
139 #elif PAGE_SHIFT == 16
140 #define _PAGE_SZBITS _PAGE_SZ64K
141 #elif PAGE_SHIFT == 19
142 #define _PAGE_SZBITS _PAGE_SZ512K
143 #elif PAGE_SHIFT == 22
144 #define _PAGE_SZBITS _PAGE_SZ4MB
146 #error Wrong PAGE_SHIFT specified
149 #if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
150 #define _PAGE_SZHUGE _PAGE_SZ4MB
151 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
152 #define _PAGE_SZHUGE _PAGE_SZ512K
153 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
154 #define _PAGE_SZHUGE _PAGE_SZ64K
157 #define _PAGE_CACHE (_PAGE_CP | _PAGE_CV)
159 #define __DIRTY_BITS (_PAGE_MODIFIED | _PAGE_WRITE | _PAGE_W)
160 #define __ACCESS_BITS (_PAGE_ACCESSED | _PAGE_READ | _PAGE_R)
161 #define __PRIV_BITS _PAGE_P
163 #define PAGE_NONE __pgprot (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_CACHE)
165 /* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */
166 #define PAGE_SHARED __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
167 __ACCESS_BITS | _PAGE_WRITE)
169 #define PAGE_COPY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
172 #define PAGE_READONLY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
175 #define PAGE_KERNEL __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
176 __PRIV_BITS | __ACCESS_BITS | __DIRTY_BITS)
178 #define _PFN_MASK _PAGE_PADDR
180 #define pg_iobits (_PAGE_VALID | _PAGE_PRESENT | __DIRTY_BITS | \
181 __ACCESS_BITS | _PAGE_E)
183 #define __P000 PAGE_NONE
184 #define __P001 PAGE_READONLY
185 #define __P010 PAGE_COPY
186 #define __P011 PAGE_COPY
187 #define __P100 PAGE_READONLY
188 #define __P101 PAGE_READONLY
189 #define __P110 PAGE_COPY
190 #define __P111 PAGE_COPY
192 #define __S000 PAGE_NONE
193 #define __S001 PAGE_READONLY
194 #define __S010 PAGE_SHARED
195 #define __S011 PAGE_SHARED
196 #define __S100 PAGE_READONLY
197 #define __S101 PAGE_READONLY
198 #define __S110 PAGE_SHARED
199 #define __S111 PAGE_SHARED
203 extern unsigned long phys_base;
204 extern unsigned long pfn_base;
206 extern struct page *mem_map_zero;
207 #define ZERO_PAGE(vaddr) (mem_map_zero)
209 /* PFNs are real physical page numbers. However, mem_map only begins to record
210 * per-page information starting at pfn_base. This is to handle systems where
211 * the first physical page in the machine is at some huge physical address, such
212 * as 4GB. This is common on a partitioned E10000, for example.
215 #define pfn_pte(pfn, prot) \
216 __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot) | _PAGE_SZBITS)
217 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
219 #define pte_pfn(x) ((pte_val(x) & _PAGE_PADDR)>>PAGE_SHIFT)
220 #define pte_page(x) pfn_to_page(pte_pfn(x))
222 #define page_pte_prot(page, prot) mk_pte(page, prot)
223 #define page_pte(page) page_pte_prot(page, __pgprot(0))
225 static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
228 const unsigned long preserve_mask = (_PFN_MASK |
229 _PAGE_MODIFIED | _PAGE_ACCESSED |
230 _PAGE_CACHE | _PAGE_E |
231 _PAGE_PRESENT | _PAGE_SZBITS);
233 pte_val(__pte) = (pte_val(orig_pte) & preserve_mask) |
234 (pgprot_val(new_prot) & ~preserve_mask);
238 #define pmd_set(pmdp, ptep) \
239 (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
240 #define pgd_set(pgdp, pmdp) \
241 (pgd_val(*(pgdp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
242 #define __pmd_page(pmd) \
243 ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
244 #define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
245 #define pgd_page(pgd) \
246 ((unsigned long) __va((((unsigned long)pgd_val(pgd))<<11UL)))
247 #define pte_none(pte) (!pte_val(pte))
248 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
249 #define pte_clear(pte) (pte_val(*(pte)) = 0UL)
250 #define pmd_none(pmd) (!pmd_val(pmd))
251 #define pmd_bad(pmd) (0)
252 #define pmd_present(pmd) (pmd_val(pmd) != 0U)
253 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U)
254 #define pgd_none(pgd) (!pgd_val(pgd))
255 #define pgd_bad(pgd) (0)
256 #define pgd_present(pgd) (pgd_val(pgd) != 0U)
257 #define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0U)
259 /* The following only work if pte_present() is true.
260 * Undefined behaviour if not..
262 #define pte_read(pte) (pte_val(pte) & _PAGE_READ)
263 #define pte_exec(pte) pte_read(pte)
264 #define pte_write(pte) (pte_val(pte) & _PAGE_WRITE)
265 #define pte_dirty(pte) (pte_val(pte) & _PAGE_MODIFIED)
266 #define pte_young(pte) (pte_val(pte) & _PAGE_ACCESSED)
267 #define pte_wrprotect(pte) (__pte(pte_val(pte) & ~(_PAGE_WRITE|_PAGE_W)))
268 #define pte_rdprotect(pte) \
269 (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_READ))
270 #define pte_mkclean(pte) \
271 (__pte(pte_val(pte) & ~(_PAGE_MODIFIED|_PAGE_W)))
272 #define pte_mkold(pte) \
273 (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_ACCESSED))
275 /* Permanent address of a page. */
276 #define __page_address(page) page_address(page)
278 /* Be very careful when you change these three, they are delicate. */
279 #define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R))
280 #define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_WRITE))
281 #define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W))
283 /* to find an entry in a page-table-directory. */
284 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD))
285 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
287 /* to find an entry in a kernel page-table-directory */
288 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
290 /* Find an entry in the second-level page table.. */
291 #define pmd_offset(dir, address) \
292 ((pmd_t *) pgd_page(*(dir)) + \
293 ((address >> PMD_SHIFT) & (REAL_PTRS_PER_PMD-1)))
295 /* Find an entry in the third-level page table.. */
296 #define pte_index(dir, address) \
297 ((pte_t *) __pmd_page(*(dir)) + \
298 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
299 #define pte_offset_kernel pte_index
300 #define pte_offset_map pte_index
301 #define pte_offset_map_nested pte_index
302 #define pte_unmap(pte) do { } while (0)
303 #define pte_unmap_nested(pte) do { } while (0)
305 extern pgd_t swapper_pg_dir[1];
307 /* These do nothing with the way I have things setup. */
308 #define mmu_lockarea(vaddr, len) (vaddr)
309 #define mmu_unlockarea(vaddr, len) do { } while(0)
311 struct vm_area_struct;
312 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
314 /* Make a non-present pseudo-TTE. */
315 static inline pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space)
318 pte_val(pte) = (((page) | pgprot_val(prot) | _PAGE_E) &
319 ~(unsigned long)_PAGE_CACHE);
320 pte_val(pte) |= (((unsigned long)space) << 32);
324 /* Encode and de-code a swap entry */
325 #define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL)
326 #define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL))
327 #define __swp_entry(type, offset) \
330 (((long)(type) << PAGE_SHIFT) | \
331 ((long)(offset) << (PAGE_SHIFT + 8UL))) \
333 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
334 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
336 /* File offset in PTE support. */
337 #define pte_file(pte) (pte_val(pte) & _PAGE_FILE)
338 #define pte_to_pgoff(pte) (pte_val(pte) >> PAGE_SHIFT)
339 #define pgoff_to_pte(off) (__pte(((off) << PAGE_SHIFT) | _PAGE_FILE))
340 #define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL)
342 extern unsigned long prom_virt_to_phys(unsigned long, int *);
344 static __inline__ unsigned long
345 sun4u_get_pte (unsigned long addr)
351 if (addr >= PAGE_OFFSET)
352 return addr & _PAGE_PADDR;
353 if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
354 return prom_virt_to_phys(addr, 0);
355 pgdp = pgd_offset_k(addr);
356 pmdp = pmd_offset(pgdp, addr);
357 ptep = pte_offset_kernel(pmdp, addr);
358 return pte_val(*ptep) & _PAGE_PADDR;
361 static __inline__ unsigned long
362 __get_phys (unsigned long addr)
364 return sun4u_get_pte (addr);
367 static __inline__ int
368 __get_iospace (unsigned long addr)
370 return ((sun4u_get_pte (addr) & 0xf0000000) >> 28);
373 extern unsigned long *sparc64_valid_addr_bitmap;
375 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
376 #define kern_addr_valid(addr) \
377 (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
379 extern int io_remap_page_range(struct vm_area_struct *vma, unsigned long from,
380 unsigned long offset,
381 unsigned long size, pgprot_t prot, int space);
383 #include <asm-generic/pgtable.h>
385 /* We provide our own get_unmapped_area to cope with VA holes for userland */
386 #define HAVE_ARCH_UNMAPPED_AREA
388 /* We provide a special get_unmapped_area for framebuffer mmaps to try and use
389 * the largest alignment possible such that larget PTEs can be used.
391 extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long,
392 unsigned long, unsigned long,
394 #define HAVE_ARCH_FB_UNMAPPED_AREA
397 * No page table caches to initialise
399 #define pgtable_cache_init() do { } while (0)
401 extern void check_pgt_cache(void);
403 #endif /* !(__ASSEMBLY__) */
405 #endif /* !(_SPARC64_PGTABLE_H) */