include/asm-x86_64/mach-xen/asm/mmu_context.h

   1 #ifndef __X86_64_MMU_CONTEXT_H
   2 #define __X86_64_MMU_CONTEXT_H
   3
   4 #include <linux/config.h>
   5 #include <asm/desc.h>
   6 #include <asm/atomic.h>
   7 #include <asm/pgalloc.h>
   8 #include <asm/page.h>
   9 #include <asm/pda.h>
  10 #include <asm/pgtable.h>
  11 #include <asm/tlbflush.h>
  12
  13 /*
  14  * possibly do the LDT unload here?
  15  */
  16 int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
  17 void destroy_context(struct mm_struct *mm);
  18
  19 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  20 {
  21 #if defined(CONFIG_SMP) && !defined(CONFIG_XEN)
  22         if (read_pda(mmu_state) == TLBSTATE_OK)
  23                 write_pda(mmu_state, TLBSTATE_LAZY);
  24 #endif
  25 }
  26
  27 #define prepare_arch_switch(next)       __prepare_arch_switch()
  28
  29 static inline void __prepare_arch_switch(void)
  30 {
  31         /*
  32          * Save away %es, %ds, %fs and %gs. Must happen before reload
  33          * of cr3/ldt (i.e., not in __switch_to).
  34          */
  35         __asm__ __volatile__ (
  36                 "mov %%es,%0 ; mov %%ds,%1 ; mov %%fs,%2 ; mov %%gs,%3"
  37                 : "=m" (current->thread.es),
  38                   "=m" (current->thread.ds),
  39                   "=m" (current->thread.fsindex),
  40                   "=m" (current->thread.gsindex) );
  41
  42         if (current->thread.ds)
  43                 __asm__ __volatile__ ( "movl %0,%%ds" : : "r" (0) );
  44
  45         if (current->thread.es)
  46                 __asm__ __volatile__ ( "movl %0,%%es" : : "r" (0) );
  47
  48         if (current->thread.fsindex) {
  49                 __asm__ __volatile__ ( "movl %0,%%fs" : : "r" (0) );
  50                 current->thread.fs = 0;
  51         }
  52
  53         if (current->thread.gsindex) {
  54                 load_gs_index(0);
  55                 current->thread.gs = 0;
  56         }
  57 }
  58
  59 extern void mm_pin(struct mm_struct *mm);
  60 extern void mm_unpin(struct mm_struct *mm);
  61 void mm_pin_all(void);
  62
  63 static inline void load_cr3(pgd_t *pgd)
  64 {
  65         asm volatile("movq %0,%%cr3" :: "r" (phys_to_machine(__pa(pgd))) :
  66                      "memory");
  67 }
  68
  69 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  70                              struct task_struct *tsk)
  71 {
  72         unsigned cpu = smp_processor_id();
  73         struct mmuext_op _op[3], *op = _op;
  74
  75         if (likely(prev != next)) {
  76                 BUG_ON(!next->context.pinned);
  77
  78                 /* stop flush ipis for the previous mm */
  79                 cpu_clear(cpu, prev->cpu_vm_mask);
  80 #if defined(CONFIG_SMP) && !defined(CONFIG_XEN)
  81                 write_pda(mmu_state, TLBSTATE_OK);
  82                 write_pda(active_mm, next);
  83 #endif
  84                 cpu_set(cpu, next->cpu_vm_mask);
  85
  86                 /* load_cr3(next->pgd) */
  87                 op->cmd = MMUEXT_NEW_BASEPTR;
  88                 op->arg1.mfn = pfn_to_mfn(__pa(next->pgd) >> PAGE_SHIFT);
  89                 op++;
  90
  91                 /* xen_new_user_pt(__pa(__user_pgd(next->pgd))) */
  92                 op->cmd = MMUEXT_NEW_USER_BASEPTR;
  93                 op->arg1.mfn = pfn_to_mfn(__pa(__user_pgd(next->pgd)) >> PAGE_SHIFT);
  94                 op++;
  95
  96                 if (unlikely(next->context.ldt != prev->context.ldt)) {
  97                         /* load_LDT_nolock(&next->context, cpu) */
  98                         op->cmd = MMUEXT_SET_LDT;
  99                         op->arg1.linear_addr = (unsigned long)next->context.ldt;
 100                         op->arg2.nr_ents     = next->context.size;
 101                         op++;
 102                 }
 103
 104                 BUG_ON(HYPERVISOR_mmuext_op(_op, op-_op, NULL, DOMID_SELF));
 105         }
 106 #if defined(CONFIG_SMP) && !defined(CONFIG_XEN)
 107         else {
 108                 write_pda(mmu_state, TLBSTATE_OK);
 109                 if (read_pda(active_mm) != next)
 110                         out_of_line_bug();
 111                 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
 112                         /* We were in lazy tlb mode and leave_mm disabled
 113                          * tlb flush IPI delivery. We must reload CR3
 114                          * to make sure to use no freed page tables.
 115                          */
 116                         load_cr3(next->pgd);
 117                         xen_new_user_pt(__pa(__user_pgd(next->pgd)));
 118                         load_LDT_nolock(&next->context, cpu);
 119                 }
 120         }
 121 #endif
 122 }
 123
 124 #define deactivate_mm(tsk,mm)   do { \
 125         load_gs_index(0); \
 126         asm volatile("movl %0,%%fs"::"r"(0));  \
 127 } while(0)
 128
 129 static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
 130 {
 131         if (!next->context.pinned)
 132                 mm_pin(next);
 133         switch_mm(prev, next, NULL);
 134 }
 135
 136 #endif