sound/drivers/opl3/opl3_lib.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>,
   3  *                   Hannu Savolainen 1993-1996,
   4  *                   Rob Hooft
   5  *
   6  *  Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)
   7  *
   8  *  Most if code is ported from OSS/Lite.
   9  *
  10  *   This program is free software; you can redistribute it and/or modify
  11  *   it under the terms of the GNU General Public License as published by
  12  *   the Free Software Foundation; either version 2 of the License, or
  13  *   (at your option) any later version.
  14  *
  15  *   This program is distributed in the hope that it will be useful,
  16  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *   GNU General Public License for more details.
  19  *
  20  *   You should have received a copy of the GNU General Public License
  21  *   along with this program; if not, write to the Free Software
  22  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  23  *
  24  */
  25
  26 #include <sound/opl3.h>
  27 #include <asm/io.h>
  28 #include <linux/delay.h>
  29 #include <linux/init.h>
  30 #include <linux/slab.h>
  31 #include <linux/ioport.h>
  32 #include <sound/minors.h>
  33
  34 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Hannu Savolainen 1993-1996, Rob Hooft");
  35 MODULE_DESCRIPTION("Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)");
  36 MODULE_LICENSE("GPL");
  37
  38 extern char snd_opl3_regmap[MAX_OPL2_VOICES][4];
  39
  40 void snd_opl2_command(opl3_t * opl3, unsigned short cmd, unsigned char val)
  41 {
  42         unsigned long flags;
  43         unsigned long port;
  44
  45         /*
  46          * The original 2-OP synth requires a quite long delay
  47          * after writing to a register.
  48          */
  49
  50         port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
  51
  52         spin_lock_irqsave(&opl3->reg_lock, flags);
  53
  54         outb((unsigned char) cmd, port);
  55         udelay(10);
  56
  57         outb((unsigned char) val, port + 1);
  58         udelay(30);
  59
  60         spin_unlock_irqrestore(&opl3->reg_lock, flags);
  61 }
  62
  63 void snd_opl3_command(opl3_t * opl3, unsigned short cmd, unsigned char val)
  64 {
  65         unsigned long flags;
  66         unsigned long port;
  67
  68         /*
  69          * The OPL-3 survives with just two INBs
  70          * after writing to a register.
  71          */
  72
  73         port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
  74
  75         spin_lock_irqsave(&opl3->reg_lock, flags);
  76
  77         outb((unsigned char) cmd, port);
  78         inb(opl3->l_port);
  79         inb(opl3->l_port);
  80
  81         outb((unsigned char) val, port + 1);
  82         inb(opl3->l_port);
  83         inb(opl3->l_port);
  84
  85         spin_unlock_irqrestore(&opl3->reg_lock, flags);
  86 }
  87
  88 void snd_opl3_cs4281_command(opl3_t * opl3, unsigned short cmd, unsigned char val)
  89 {
  90         unsigned long flags;
  91         unsigned long port;
  92
  93         /*
  94          * CS4281 requires a special access to I/O registers
  95          */
  96
  97         port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
  98
  99         spin_lock_irqsave(&opl3->reg_lock, flags);
 100
 101         writel((unsigned int)cmd, port << 2);
 102         udelay(10);
 103
 104         writel((unsigned int)val, (port + 1) << 2);
 105         udelay(30);
 106
 107         spin_unlock_irqrestore(&opl3->reg_lock, flags);
 108 }
 109
 110 static int snd_opl3_detect(opl3_t * opl3)
 111 {
 112         /*
 113          * This function returns 1 if the FM chip is present at the given I/O port
 114          * The detection algorithm plays with the timer built in the FM chip and
 115          * looks for a change in the status register.
 116          *
 117          * Note! The timers of the FM chip are not connected to AdLib (and compatible)
 118          * boards.
 119          *
 120          * Note2! The chip is initialized if detected.
 121          */
 122
 123         unsigned char stat1, stat2, signature;
 124
 125         /* Reset timers 1 and 2 */
 126         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
 127         /* Reset the IRQ of the FM chip */
 128         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
 129         signature = stat1 = inb(opl3->l_port);  /* Status register */
 130         if ((stat1 & 0xe0) != 0x00) {   /* Should be 0x00 */
 131                 snd_printd("OPL3: stat1 = 0x%x\n", stat1);
 132                 return -ENODEV;
 133         }
 134         /* Set timer1 to 0xff */
 135         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 0xff);
 136         /* Unmask and start timer 1 */
 137         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER2_MASK | OPL3_TIMER1_START);
 138         /* Now we have to delay at least 80us */
 139         udelay(200);
 140         /* Read status after timers have expired */
 141         stat2 = inb(opl3->l_port);
 142         /* Stop the timers */
 143         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
 144         /* Reset the IRQ of the FM chip */
 145         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
 146         if ((stat2 & 0xe0) != 0xc0) {   /* There is no YM3812 */
 147                 snd_printd("OPL3: stat2 = 0x%x\n", stat2);
 148                 return -ENODEV;
 149         }
 150
 151         /* If the toplevel code knows exactly the type of chip, don't try
 152            to detect it. */
 153         if (opl3->hardware != OPL3_HW_AUTO)
 154                 return 0;
 155
 156         /* There is a FM chip on this address. Detect the type (OPL2 to OPL4) */
 157         if (signature == 0x06) {        /* OPL2 */
 158                 opl3->hardware = OPL3_HW_OPL2;
 159         } else {
 160                 /*
 161                  * If we had an OPL4 chip, opl3->hardware would have been set
 162                  * by the OPL4 driver; so we can assume OPL3 here.
 163                  */
 164                 snd_assert(opl3->r_port != 0, return -ENODEV);
 165                 opl3->hardware = OPL3_HW_OPL3;
 166         }
 167         return 0;
 168 }
 169
 170 /*
 171  *  AdLib timers
 172  */
 173
 174 /*
 175  *  Timer 1 - 80us
 176  */
 177
 178 static int snd_opl3_timer1_start(snd_timer_t * timer)
 179 {
 180         unsigned long flags;
 181         unsigned char tmp;
 182         unsigned int ticks;
 183         opl3_t *opl3;
 184
 185         opl3 = snd_timer_chip(timer);
 186         spin_lock_irqsave(&opl3->timer_lock, flags);
 187         ticks = timer->sticks;
 188         tmp = (opl3->timer_enable | OPL3_TIMER1_START) & ~OPL3_TIMER1_MASK;
 189         opl3->timer_enable = tmp;
 190         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks);  /* timer 1 count */
 191         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp);   /* enable timer 1 IRQ */
 192         spin_unlock_irqrestore(&opl3->timer_lock, flags);
 193         return 0;
 194 }
 195
 196 static int snd_opl3_timer1_stop(snd_timer_t * timer)
 197 {
 198         unsigned long flags;
 199         unsigned char tmp;
 200         opl3_t *opl3;
 201
 202         opl3 = snd_timer_chip(timer);
 203         spin_lock_irqsave(&opl3->timer_lock, flags);
 204         tmp = (opl3->timer_enable | OPL3_TIMER1_MASK) & ~OPL3_TIMER1_START;
 205         opl3->timer_enable = tmp;
 206         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp);   /* disable timer #1 */
 207         spin_unlock_irqrestore(&opl3->timer_lock, flags);
 208         return 0;
 209 }
 210
 211 /*
 212  *  Timer 2 - 320us
 213  */
 214
 215 static int snd_opl3_timer2_start(snd_timer_t * timer)
 216 {
 217         unsigned long flags;
 218         unsigned char tmp;
 219         unsigned int ticks;
 220         opl3_t *opl3;
 221
 222         opl3 = snd_timer_chip(timer);
 223         spin_lock_irqsave(&opl3->timer_lock, flags);
 224         ticks = timer->sticks;
 225         tmp = (opl3->timer_enable | OPL3_TIMER2_START) & ~OPL3_TIMER2_MASK;
 226         opl3->timer_enable = tmp;
 227         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks);  /* timer 1 count */
 228         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp);   /* enable timer 1 IRQ */
 229         spin_unlock_irqrestore(&opl3->timer_lock, flags);
 230         return 0;
 231 }
 232
 233 static int snd_opl3_timer2_stop(snd_timer_t * timer)
 234 {
 235         unsigned long flags;
 236         unsigned char tmp;
 237         opl3_t *opl3;
 238
 239         opl3 = snd_timer_chip(timer);
 240         spin_lock_irqsave(&opl3->timer_lock, flags);
 241         tmp = (opl3->timer_enable | OPL3_TIMER2_MASK) & ~OPL3_TIMER2_START;
 242         opl3->timer_enable = tmp;
 243         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp);   /* disable timer #1 */
 244         spin_unlock_irqrestore(&opl3->timer_lock, flags);
 245         return 0;
 246 }
 247
 248 /*
 249
 250  */
 251
 252 static struct _snd_timer_hardware snd_opl3_timer1 =
 253 {
 254         .flags =        SNDRV_TIMER_HW_STOP,
 255         .resolution =   80000,
 256         .ticks =        256,
 257         .start =        snd_opl3_timer1_start,
 258         .stop =         snd_opl3_timer1_stop,
 259 };
 260
 261 static struct _snd_timer_hardware snd_opl3_timer2 =
 262 {
 263         .flags =        SNDRV_TIMER_HW_STOP,
 264         .resolution =   320000,
 265         .ticks =        256,
 266         .start =        snd_opl3_timer2_start,
 267         .stop =         snd_opl3_timer2_stop,
 268 };
 269
 270 static int snd_opl3_timer1_init(opl3_t * opl3, int timer_no)
 271 {
 272         snd_timer_t *timer = NULL;
 273         snd_timer_id_t tid;
 274         int err;
 275
 276         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
 277         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
 278         tid.card = opl3->card->number;
 279         tid.device = timer_no;
 280         tid.subdevice = 0;
 281         if ((err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer)) >= 0) {
 282                 strcpy(timer->name, "AdLib timer #1");
 283                 timer->private_data = opl3;
 284                 timer->hw = snd_opl3_timer1;
 285         }
 286         opl3->timer1 = timer;
 287         return err;
 288 }
 289
 290 static int snd_opl3_timer2_init(opl3_t * opl3, int timer_no)
 291 {
 292         snd_timer_t *timer = NULL;
 293         snd_timer_id_t tid;
 294         int err;
 295
 296         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
 297         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
 298         tid.card = opl3->card->number;
 299         tid.device = timer_no;
 300         tid.subdevice = 0;
 301         if ((err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer)) >= 0) {
 302                 strcpy(timer->name, "AdLib timer #2");
 303                 timer->private_data = opl3;
 304                 timer->hw = snd_opl3_timer2;
 305         }
 306         opl3->timer2 = timer;
 307         return err;
 308 }
 309
 310 /*
 311
 312  */
 313
 314 void snd_opl3_interrupt(snd_hwdep_t * hw)
 315 {
 316         unsigned char status;
 317         opl3_t *opl3;
 318         snd_timer_t *timer;
 319
 320         if (hw == NULL)
 321                 return;
 322
 323         opl3 = hw->private_data;
 324         status = inb(opl3->l_port);
 325 #if 0
 326         snd_printk("AdLib IRQ status = 0x%x\n", status);
 327 #endif
 328         if (!(status & 0x80))
 329                 return;
 330
 331         if (status & 0x40) {
 332                 timer = opl3->timer1;
 333                 snd_timer_interrupt(timer, timer->sticks);
 334         }
 335         if (status & 0x20) {
 336                 timer = opl3->timer2;
 337                 snd_timer_interrupt(timer, timer->sticks);
 338         }
 339 }
 340
 341 /*
 342
 343  */
 344
 345 static int snd_opl3_free(opl3_t *opl3)
 346 {
 347         if (opl3->res_l_port) {
 348                 release_resource(opl3->res_l_port);
 349                 kfree_nocheck(opl3->res_l_port);
 350         }
 351         if (opl3->res_r_port) {
 352                 release_resource(opl3->res_r_port);
 353                 kfree_nocheck(opl3->res_r_port);
 354         }
 355         kfree(opl3);
 356         return 0;
 357 }
 358
 359 static int snd_opl3_dev_free(snd_device_t *device)
 360 {
 361         opl3_t *opl3 = device->device_data;
 362         return snd_opl3_free(opl3);
 363 }
 364
 365 int snd_opl3_create(snd_card_t * card,
 366                     unsigned long l_port,
 367                     unsigned long r_port,
 368                     unsigned short hardware,
 369                     int integrated,
 370                     opl3_t ** ropl3)
 371 {
 372         opl3_t *opl3;
 373         int err;
 374         static snd_device_ops_t ops = {
 375                 .dev_free = snd_opl3_dev_free,
 376         };
 377
 378         *ropl3 = NULL;
 379
 380         opl3 = kcalloc(1, sizeof(*opl3), GFP_KERNEL);
 381         if (opl3 == NULL)
 382                 return -ENOMEM;
 383
 384         if (integrated)
 385                 goto __step1; /* ports are already reserved */
 386
 387         if ((opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)")) == NULL) {
 388                 snd_printk(KERN_ERR "opl3: can't grab left port 0x%lx\n", l_port);
 389                 snd_opl3_free(opl3);
 390                 return -EBUSY;
 391         }
 392         if (r_port != 0 &&
 393             (opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)")) == NULL) {
 394                 snd_printk(KERN_ERR "opl3: can't grab right port 0x%lx\n", r_port);
 395                 snd_opl3_free(opl3);
 396                 return -EBUSY;
 397         }
 398
 399       __step1:
 400
 401         opl3->card = card;
 402         opl3->hardware = hardware;
 403         opl3->l_port = l_port;
 404         opl3->r_port = r_port;
 405
 406         spin_lock_init(&opl3->reg_lock);
 407         spin_lock_init(&opl3->timer_lock);
 408         init_MUTEX(&opl3->access_mutex);
 409
 410         switch (opl3->hardware) {
 411         /* some hardware doesn't support timers */
 412         case OPL3_HW_OPL3_SV:
 413         case OPL3_HW_OPL3_CS:
 414         case OPL3_HW_OPL3_FM801:
 415                 opl3->command = &snd_opl3_command;
 416                 break;
 417         case OPL3_HW_OPL3_CS4281:
 418                 opl3->command = &snd_opl3_cs4281_command;
 419                 break;
 420         default:
 421                 opl3->command = &snd_opl2_command;
 422                 if ((err = snd_opl3_detect(opl3)) < 0) {
 423                         snd_printd("OPL2/3 chip not detected at 0x%lx/0x%lx\n",
 424                                    opl3->l_port, opl3->r_port);
 425                         snd_opl3_free(opl3);
 426                         return err;
 427                 }
 428                 /* detect routine returns correct hardware type */
 429                 switch (opl3->hardware & OPL3_HW_MASK) {
 430                 case OPL3_HW_OPL3:
 431                 case OPL3_HW_OPL4:
 432                         opl3->command = &snd_opl3_command;
 433                 }
 434         }
 435
 436         opl3->command(opl3, OPL3_LEFT | OPL3_REG_TEST, OPL3_ENABLE_WAVE_SELECT);
 437         opl3->command(opl3, OPL3_LEFT | OPL3_REG_PERCUSSION, 0x00);     /* Melodic mode */
 438
 439         switch (opl3->hardware & OPL3_HW_MASK) {
 440         case OPL3_HW_OPL2:
 441                 opl3->max_voices = MAX_OPL2_VOICES;
 442                 break;
 443         case OPL3_HW_OPL3:
 444         case OPL3_HW_OPL4:
 445                 opl3->max_voices = MAX_OPL3_VOICES;
 446                 snd_assert(opl3->r_port != 0, snd_opl3_free(opl3); return -ENODEV);
 447                 opl3->command(opl3, OPL3_RIGHT | OPL3_REG_MODE, OPL3_OPL3_ENABLE);      /* Enter OPL3 mode */
 448         }
 449         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, opl3, &ops)) < 0) {
 450                 snd_opl3_free(opl3);
 451                 return err;
 452         }
 453
 454         *ropl3 = opl3;
 455         return 0;
 456 }
 457
 458 int snd_opl3_timer_new(opl3_t * opl3, int timer1_dev, int timer2_dev)
 459 {
 460         int err;
 461
 462         if (timer1_dev >= 0)
 463                 if ((err = snd_opl3_timer1_init(opl3, timer1_dev)) < 0)
 464                         return err;
 465         if (timer2_dev >= 0) {
 466                 if ((err = snd_opl3_timer2_init(opl3, timer2_dev)) < 0) {
 467                         snd_device_free(opl3->card, opl3->timer1);
 468                         opl3->timer1 = NULL;
 469                         return err;
 470                 }
 471         }
 472         return 0;
 473 }
 474
 475 int snd_opl3_hwdep_new(opl3_t * opl3,
 476                        int device, int seq_device,
 477                        snd_hwdep_t ** rhwdep)
 478 {
 479         snd_hwdep_t *hw;
 480         snd_card_t *card = opl3->card;
 481         int err;
 482
 483         if (rhwdep)
 484                 *rhwdep = NULL;
 485
 486         /* create hardware dependent device (direct FM) */
 487
 488         if ((err = snd_hwdep_new(card, "OPL2/OPL3", device, &hw)) < 0) {
 489                 snd_device_free(card, opl3);
 490                 return err;
 491         }
 492         hw->private_data = opl3;
 493 #ifdef CONFIG_SND_OSSEMUL
 494         if (device == 0) {
 495                 hw->oss_type = SNDRV_OSS_DEVICE_TYPE_DMFM;
 496                 sprintf(hw->oss_dev, "dmfm%i", card->number);
 497         }
 498 #endif
 499         strcpy(hw->name, hw->id);
 500         switch (opl3->hardware & OPL3_HW_MASK) {
 501         case OPL3_HW_OPL2:
 502                 strcpy(hw->name, "OPL2 FM");
 503                 hw->iface = SNDRV_HWDEP_IFACE_OPL2;
 504                 break;
 505         case OPL3_HW_OPL3:
 506                 strcpy(hw->name, "OPL3 FM");
 507                 hw->iface = SNDRV_HWDEP_IFACE_OPL3;
 508                 break;
 509         case OPL3_HW_OPL4:
 510                 strcpy(hw->name, "OPL4 FM");
 511                 hw->iface = SNDRV_HWDEP_IFACE_OPL4;
 512                 break;
 513         }
 514
 515         /* operators - only ioctl */
 516         hw->ops.open = snd_opl3_open;
 517         hw->ops.ioctl = snd_opl3_ioctl;
 518         hw->ops.release = snd_opl3_release;
 519
 520         opl3->seq_dev_num = seq_device;
 521 #if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
 522         if (snd_seq_device_new(card, seq_device, SNDRV_SEQ_DEV_ID_OPL3,
 523                                sizeof(opl3_t*), &opl3->seq_dev) >= 0) {
 524                 strcpy(opl3->seq_dev->name, hw->name);
 525                 *(opl3_t**)SNDRV_SEQ_DEVICE_ARGPTR(opl3->seq_dev) = opl3;
 526         }
 527 #endif
 528         if (rhwdep)
 529                 *rhwdep = hw;
 530         return 0;
 531 }
 532
 533 EXPORT_SYMBOL(snd_opl3_interrupt);
 534 EXPORT_SYMBOL(snd_opl3_create);
 535 EXPORT_SYMBOL(snd_opl3_timer_new);
 536 EXPORT_SYMBOL(snd_opl3_hwdep_new);
 537
 538 /* opl3_synth.c */
 539 EXPORT_SYMBOL(snd_opl3_regmap);
 540 EXPORT_SYMBOL(snd_opl3_reset);
 541
 542 /*
 543  *  INIT part
 544  */
 545
 546 static int __init alsa_opl3_init(void)
 547 {
 548         return 0;
 549 }
 550
 551 static void __exit alsa_opl3_exit(void)
 552 {
 553 }
 554
 555 module_init(alsa_opl3_init)
 556 module_exit(alsa_opl3_exit)