sound/i2c/other/ak4117.c

   1 /*
   2  *  Routines for control of the AK4117 via 4-wire serial interface
   3  *  IEC958 (S/PDIF) receiver by Asahi Kasei
   4  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   5  *
   6  *
   7  *   This program is free software; you can redistribute it and/or modify
   8  *   it under the terms of the GNU General Public License as published by
   9  *   the Free Software Foundation; either version 2 of the License, or
  10  *   (at your option) any later version.
  11  *
  12  *   This program is distributed in the hope that it will be useful,
  13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *   GNU General Public License for more details.
  16  *
  17  *   You should have received a copy of the GNU General Public License
  18  *   along with this program; if not, write to the Free Software
  19  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  *
  21  */
  22
  23 #include <sound/driver.h>
  24 #include <linux/slab.h>
  25 #include <linux/delay.h>
  26 #include <sound/core.h>
  27 #include <sound/control.h>
  28 #include <sound/pcm.h>
  29 #include <sound/ak4117.h>
  30 #include <sound/asoundef.h>
  31
  32 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  33 MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
  34 MODULE_LICENSE("GPL");
  35
  36 #define chip_t ak4117_t
  37
  38 #define AK4117_ADDR                     0x00 /* fixed address */
  39
  40 static void snd_ak4117_timer(unsigned long data);
  41
  42 static void reg_write(ak4117_t *ak4117, unsigned char reg, unsigned char val)
  43 {
  44         ak4117->write(ak4117->private_data, reg, val);
  45         if (reg < sizeof(ak4117->regmap))
  46                 ak4117->regmap[reg] = val;
  47 }
  48
  49 static inline unsigned char reg_read(ak4117_t *ak4117, unsigned char reg)
  50 {
  51         return ak4117->read(ak4117->private_data, reg);
  52 }
  53
  54 #if 0
  55 static void reg_dump(ak4117_t *ak4117)
  56 {
  57         int i;
  58
  59         printk("AK4117 REG DUMP:\n");
  60         for (i = 0; i < 0x1b; i++)
  61                 printk("reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
  62 }
  63 #endif
  64
  65 static void snd_ak4117_free(ak4117_t *chip)
  66 {
  67         del_timer(&chip->timer);
  68         snd_magic_kfree(chip);
  69 }
  70
  71 static int snd_ak4117_dev_free(snd_device_t *device)
  72 {
  73         ak4117_t *chip = snd_magic_cast(ak4117_t, device->device_data, return -ENXIO);
  74         snd_ak4117_free(chip);
  75         return 0;
  76 }
  77
  78 int snd_ak4117_create(snd_card_t *card, ak4117_read_t *read, ak4117_write_t *write,
  79                       unsigned char pgm[5], void *private_data, ak4117_t **r_ak4117)
  80 {
  81         ak4117_t *chip;
  82         int err = 0;
  83         unsigned char reg;
  84         static snd_device_ops_t ops = {
  85                 .dev_free =     snd_ak4117_dev_free,
  86         };
  87
  88         chip = (ak4117_t *)snd_magic_kcalloc(ak4117_t, 0, GFP_KERNEL);
  89         if (chip == NULL)
  90                 return -ENOMEM;
  91         spin_lock_init(&chip->lock);
  92         chip->card = card;
  93         chip->read = read;
  94         chip->write = write;
  95         chip->private_data = private_data;
  96         init_timer(&chip->timer);
  97         chip->timer.data = (unsigned long)chip;
  98         chip->timer.function = snd_ak4117_timer;
  99
 100         for (reg = 0; reg < 5; reg++)
 101                 chip->regmap[reg] = pgm[reg];
 102         snd_ak4117_reinit(chip);
 103
 104         chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
 105         chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
 106         chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
 107
 108         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
 109                 goto __fail;
 110
 111         if (r_ak4117)
 112                 *r_ak4117 = chip;
 113         return 0;
 114
 115       __fail:
 116         snd_ak4117_free(chip);
 117         return err < 0 ? err : -EIO;
 118 }
 119
 120 void snd_ak4117_reg_write(ak4117_t *chip, unsigned char reg, unsigned char mask, unsigned char val)
 121 {
 122         if (reg >= 5)
 123                 return;
 124         reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
 125 }
 126
 127 void snd_ak4117_reinit(ak4117_t *chip)
 128 {
 129         unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
 130
 131         del_timer(&chip->timer);
 132         chip->init = 1;
 133         /* bring the chip to reset state and powerdown state */
 134         reg_write(chip, AK4117_REG_PWRDN, 0);
 135         udelay(200);
 136         /* release reset, but leave powerdown */
 137         reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
 138         udelay(200);
 139         for (reg = 1; reg < 5; reg++)
 140                 reg_write(chip, reg, chip->regmap[reg]);
 141         /* release powerdown, everything is initialized now */
 142         reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
 143         chip->init = 0;
 144         chip->timer.expires = 1 + jiffies;
 145         add_timer(&chip->timer);
 146 }
 147
 148 static unsigned int external_rate(unsigned char rcs1)
 149 {
 150         switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
 151         case AK4117_FS_32000HZ: return 32000;
 152         case AK4117_FS_44100HZ: return 44100;
 153         case AK4117_FS_48000HZ: return 48000;
 154         case AK4117_FS_88200HZ: return 88200;
 155         case AK4117_FS_96000HZ: return 96000;
 156         case AK4117_FS_176400HZ: return 176400;
 157         case AK4117_FS_192000HZ: return 192000;
 158         default:                return 0;
 159         }
 160 }
 161
 162 static int snd_ak4117_in_error_info(snd_kcontrol_t *kcontrol,
 163                                     snd_ctl_elem_info_t *uinfo)
 164 {
 165         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 166         uinfo->count = 1;
 167         uinfo->value.integer.min = 0;
 168         uinfo->value.integer.max = LONG_MAX;
 169         return 0;
 170 }
 171
 172 static int snd_ak4117_in_error_get(snd_kcontrol_t *kcontrol,
 173                                    snd_ctl_elem_value_t *ucontrol)
 174 {
 175         ak4117_t *chip = snd_kcontrol_chip(kcontrol);
 176         long *ptr;
 177
 178         spin_lock_irq(&chip->lock);
 179         ptr = (long *)(((char *)chip) + kcontrol->private_value);
 180         ucontrol->value.integer.value[0] = *ptr;
 181         *ptr = 0;
 182         spin_unlock_irq(&chip->lock);
 183         return 0;
 184 }
 185
 186 static int snd_ak4117_in_bit_info(snd_kcontrol_t *kcontrol,
 187                                   snd_ctl_elem_info_t *uinfo)
 188 {
 189         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
 190         uinfo->count = 1;
 191         uinfo->value.integer.min = 0;
 192         uinfo->value.integer.max = 1;
 193         return 0;
 194 }
 195
 196 static int snd_ak4117_in_bit_get(snd_kcontrol_t *kcontrol,
 197                                  snd_ctl_elem_value_t *ucontrol)
 198 {
 199         ak4117_t *chip = snd_kcontrol_chip(kcontrol);
 200         unsigned char reg = kcontrol->private_value & 0xff;
 201         unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
 202         unsigned char inv = (kcontrol->private_value >> 31) & 1;
 203
 204         ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
 205         return 0;
 206 }
 207
 208 static int snd_ak4117_rx_info(snd_kcontrol_t *kcontrol,
 209                               snd_ctl_elem_info_t *uinfo)
 210 {
 211         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 212         uinfo->count = 1;
 213         uinfo->value.integer.min = 0;
 214         uinfo->value.integer.max = 1;
 215         return 0;
 216 }
 217
 218 static int snd_ak4117_rx_get(snd_kcontrol_t *kcontrol,
 219                              snd_ctl_elem_value_t *ucontrol)
 220 {
 221         ak4117_t *chip = snd_kcontrol_chip(kcontrol);
 222
 223         ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
 224         return 0;
 225 }
 226
 227 static int snd_ak4117_rx_put(snd_kcontrol_t *kcontrol,
 228                              snd_ctl_elem_value_t *ucontrol)
 229 {
 230         ak4117_t *chip = snd_kcontrol_chip(kcontrol);
 231         int change;
 232         u8 old_val;
 233
 234         spin_lock_irq(&chip->lock);
 235         old_val = chip->regmap[AK4117_REG_IO];
 236         change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
 237         if (change)
 238                 reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
 239         spin_unlock_irq(&chip->lock);
 240         return change;
 241 }
 242
 243 static int snd_ak4117_rate_info(snd_kcontrol_t *kcontrol,
 244                                 snd_ctl_elem_info_t *uinfo)
 245 {
 246         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 247         uinfo->count = 1;
 248         uinfo->value.integer.min = 0;
 249         uinfo->value.integer.max = 192000;
 250         return 0;
 251 }
 252
 253 static int snd_ak4117_rate_get(snd_kcontrol_t *kcontrol,
 254                                snd_ctl_elem_value_t *ucontrol)
 255 {
 256         ak4117_t *chip = snd_kcontrol_chip(kcontrol);
 257
 258         ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
 259         return 0;
 260 }
 261
 262 static int snd_ak4117_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 263 {
 264         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 265         uinfo->count = 1;
 266         return 0;
 267 }
 268
 269 static int snd_ak4117_spdif_get(snd_kcontrol_t * kcontrol,
 270                                 snd_ctl_elem_value_t * ucontrol)
 271 {
 272         ak4117_t *chip = snd_kcontrol_chip(kcontrol);
 273         unsigned i;
 274
 275         for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
 276                 ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
 277         return 0;
 278 }
 279
 280 static int snd_ak4117_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 281 {
 282         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 283         uinfo->count = 1;
 284         return 0;
 285 }
 286
 287 static int snd_ak4117_spdif_mask_get(snd_kcontrol_t * kcontrol,
 288                                       snd_ctl_elem_value_t * ucontrol)
 289 {
 290         memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
 291         return 0;
 292 }
 293
 294 static int snd_ak4117_spdif_pinfo(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 295 {
 296         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 297         uinfo->value.integer.min = 0;
 298         uinfo->value.integer.max = 0xffff;
 299         uinfo->count = 4;
 300         return 0;
 301 }
 302
 303 static int snd_ak4117_spdif_pget(snd_kcontrol_t * kcontrol,
 304                                  snd_ctl_elem_value_t * ucontrol)
 305 {
 306         ak4117_t *chip = snd_kcontrol_chip(kcontrol);
 307         unsigned short tmp;
 308
 309         ucontrol->value.integer.value[0] = 0xf8f2;
 310         ucontrol->value.integer.value[1] = 0x4e1f;
 311         tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
 312         ucontrol->value.integer.value[2] = tmp;
 313         tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
 314         ucontrol->value.integer.value[3] = tmp;
 315         return 0;
 316 }
 317
 318 static int snd_ak4117_spdif_qinfo(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 319 {
 320         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 321         uinfo->count = AK4117_REG_QSUB_SIZE;
 322         return 0;
 323 }
 324
 325 static int snd_ak4117_spdif_qget(snd_kcontrol_t * kcontrol,
 326                                  snd_ctl_elem_value_t * ucontrol)
 327 {
 328         ak4117_t *chip = snd_kcontrol_chip(kcontrol);
 329         unsigned i;
 330
 331         for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
 332                 ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
 333         return 0;
 334 }
 335
 336 /* Don't forget to change AK4117_CONTROLS define!!! */
 337 static snd_kcontrol_new_t snd_ak4117_iec958_controls[] = {
 338 {
 339         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 340         .name =         "IEC958 Parity Errors",
 341         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 342         .info =         snd_ak4117_in_error_info,
 343         .get =          snd_ak4117_in_error_get,
 344         .private_value = offsetof(ak4117_t, parity_errors),
 345 },
 346 {
 347         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 348         .name =         "IEC958 V-Bit Errors",
 349         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 350         .info =         snd_ak4117_in_error_info,
 351         .get =          snd_ak4117_in_error_get,
 352         .private_value = offsetof(ak4117_t, v_bit_errors),
 353 },
 354 {
 355         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 356         .name =         "IEC958 C-CRC Errors",
 357         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 358         .info =         snd_ak4117_in_error_info,
 359         .get =          snd_ak4117_in_error_get,
 360         .private_value = offsetof(ak4117_t, ccrc_errors),
 361 },
 362 {
 363         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 364         .name =         "IEC958 Q-CRC Errors",
 365         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 366         .info =         snd_ak4117_in_error_info,
 367         .get =          snd_ak4117_in_error_get,
 368         .private_value = offsetof(ak4117_t, qcrc_errors),
 369 },
 370 {
 371         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 372         .name =         "IEC958 External Rate",
 373         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 374         .info =         snd_ak4117_rate_info,
 375         .get =          snd_ak4117_rate_get,
 376 },
 377 {
 378         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 379         .name =         SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
 380         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
 381         .info =         snd_ak4117_spdif_mask_info,
 382         .get =          snd_ak4117_spdif_mask_get,
 383 },
 384 {
 385         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 386         .name =         SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
 387         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 388         .info =         snd_ak4117_spdif_info,
 389         .get =          snd_ak4117_spdif_get,
 390 },
 391 {
 392         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 393         .name =         "IEC958 Preample Capture Default",
 394         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 395         .info =         snd_ak4117_spdif_pinfo,
 396         .get =          snd_ak4117_spdif_pget,
 397 },
 398 {
 399         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 400         .name =         "IEC958 Q-subcode Capture Default",
 401         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 402         .info =         snd_ak4117_spdif_qinfo,
 403         .get =          snd_ak4117_spdif_qget,
 404 },
 405 {
 406         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 407         .name =         "IEC958 Audio",
 408         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 409         .info =         snd_ak4117_in_bit_info,
 410         .get =          snd_ak4117_in_bit_get,
 411         .private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
 412 },
 413 {
 414         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 415         .name =         "IEC958 Non-PCM Bitstream",
 416         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 417         .info =         snd_ak4117_in_bit_info,
 418         .get =          snd_ak4117_in_bit_get,
 419         .private_value = (5<<8) | AK4117_REG_RCS1,
 420 },
 421 {
 422         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 423         .name =         "IEC958 DTS Bitstream",
 424         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 425         .info =         snd_ak4117_in_bit_info,
 426         .get =          snd_ak4117_in_bit_get,
 427         .private_value = (6<<8) | AK4117_REG_RCS1,
 428 },
 429 {
 430         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 431         .name =         "AK4117 Input Select",
 432         .access =       SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
 433         .info =         snd_ak4117_rx_info,
 434         .get =          snd_ak4117_rx_get,
 435         .put =          snd_ak4117_rx_put,
 436 }
 437 };
 438
 439 int snd_ak4117_build(ak4117_t *ak4117, snd_pcm_substream_t *cap_substream)
 440 {
 441         snd_kcontrol_t *kctl;
 442         unsigned int idx;
 443         int err;
 444
 445         snd_assert(cap_substream, return -EINVAL);
 446         ak4117->substream = cap_substream;
 447         for (idx = 0; idx < AK4117_CONTROLS; idx++) {
 448                 kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
 449                 if (kctl == NULL)
 450                         return -ENOMEM;
 451                 kctl->id.device = cap_substream->pcm->device;
 452                 kctl->id.subdevice = cap_substream->number;
 453                 err = snd_ctl_add(ak4117->card, kctl);
 454                 if (err < 0)
 455                         return err;
 456                 ak4117->kctls[idx] = kctl;
 457         }
 458         return 0;
 459 }
 460
 461 int snd_ak4117_external_rate(ak4117_t *ak4117)
 462 {
 463         unsigned char rcs1;
 464
 465         rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
 466         return external_rate(rcs1);
 467 }
 468
 469 int snd_ak4117_check_rate_and_errors(ak4117_t *ak4117, unsigned int flags)
 470 {
 471         snd_pcm_runtime_t *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
 472         unsigned long _flags;
 473         int res = 0;
 474         unsigned char rcs0, rcs1, rcs2;
 475         unsigned char c0, c1;
 476
 477         rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
 478         if (flags & AK4117_CHECK_NO_STAT)
 479                 goto __rate;
 480         rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
 481         rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
 482         // printk("AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
 483         spin_lock_irqsave(&ak4117->lock, _flags);
 484         if (rcs0 & AK4117_PAR)
 485                 ak4117->parity_errors++;
 486         if (rcs0 & AK4117_V)
 487                 ak4117->v_bit_errors++;
 488         if (rcs2 & AK4117_CCRC)
 489                 ak4117->ccrc_errors++;
 490         if (rcs2 & AK4117_QCRC)
 491                 ak4117->qcrc_errors++;
 492         c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
 493                      (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
 494         c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
 495                      (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
 496         ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
 497         ak4117->rcs1 = rcs1;
 498         ak4117->rcs2 = rcs2;
 499         spin_unlock_irqrestore(&ak4117->lock, _flags);
 500
 501         if (rcs0 & AK4117_PAR)
 502                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
 503         if (rcs0 & AK4117_V)
 504                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
 505         if (rcs2 & AK4117_CCRC)
 506                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
 507         if (rcs2 & AK4117_QCRC)
 508                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
 509
 510         /* rate change */
 511         if (c1 & 0x0f)
 512                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
 513
 514         if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
 515                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
 516         if (c0 & AK4117_QINT)
 517                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
 518
 519         if (c0 & AK4117_AUDION)
 520                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
 521         if (c1 & AK4117_NPCM)
 522                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
 523         if (c1 & AK4117_DTSCD)
 524                 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
 525
 526         if (ak4117->change_callback && (c0 | c1) != 0)
 527                 ak4117->change_callback(ak4117, c0, c1);
 528
 529       __rate:
 530         /* compare rate */
 531         res = external_rate(rcs1);
 532         if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
 533                 snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
 534                 if (snd_pcm_running(ak4117->substream)) {
 535                         // printk("rate changed (%i <- %i)\n", runtime->rate, res);
 536                         snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
 537                         wake_up(&runtime->sleep);
 538                         res = 1;
 539                 }
 540                 snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
 541         }
 542         return res;
 543 }
 544
 545 static void snd_ak4117_timer(unsigned long data)
 546 {
 547         ak4117_t *chip = snd_magic_cast(ak4117_t, (void *)data, return);
 548
 549         if (chip->init)
 550                 return;
 551         snd_ak4117_check_rate_and_errors(chip, 0);
 552         chip->timer.expires = 1 + jiffies;
 553         add_timer(&chip->timer);
 554 }
 555
 556 EXPORT_SYMBOL(snd_ak4117_create);
 557 EXPORT_SYMBOL(snd_ak4117_reg_write);
 558 EXPORT_SYMBOL(snd_ak4117_reinit);
 559 EXPORT_SYMBOL(snd_ak4117_build);
 560 EXPORT_SYMBOL(snd_ak4117_external_rate);
 561 EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);