2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
6 * - sometimes record brokes playback with WSS portion of
8 * - CS4231 (GUS MAX) - still trouble with occasional noises
9 * - broken initialization?
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <sound/driver.h>
28 #include <linux/delay.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/slab.h>
33 #include <linux/ioport.h>
34 #include <sound/core.h>
35 #include <sound/cs4231.h>
36 #include <sound/pcm_params.h>
42 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
43 MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
44 MODULE_LICENSE("GPL");
46 #define chip_t cs4231_t
49 #define SNDRV_DEBUG_MCE
56 static unsigned char freq_bits[14] = {
57 /* 5510 */ 0x00 | CS4231_XTAL2,
58 /* 6620 */ 0x0E | CS4231_XTAL2,
59 /* 8000 */ 0x00 | CS4231_XTAL1,
60 /* 9600 */ 0x0E | CS4231_XTAL1,
61 /* 11025 */ 0x02 | CS4231_XTAL2,
62 /* 16000 */ 0x02 | CS4231_XTAL1,
63 /* 18900 */ 0x04 | CS4231_XTAL2,
64 /* 22050 */ 0x06 | CS4231_XTAL2,
65 /* 27042 */ 0x04 | CS4231_XTAL1,
66 /* 32000 */ 0x06 | CS4231_XTAL1,
67 /* 33075 */ 0x0C | CS4231_XTAL2,
68 /* 37800 */ 0x08 | CS4231_XTAL2,
69 /* 44100 */ 0x0A | CS4231_XTAL2,
70 /* 48000 */ 0x0C | CS4231_XTAL1
73 static unsigned int rates[14] = {
74 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
75 27042, 32000, 33075, 37800, 44100, 48000
78 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
84 static int snd_cs4231_xrate(snd_pcm_runtime_t *runtime)
86 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
89 static unsigned char snd_cs4231_original_image[32] =
91 0x00, /* 00/00 - lic */
92 0x00, /* 01/01 - ric */
93 0x9f, /* 02/02 - la1ic */
94 0x9f, /* 03/03 - ra1ic */
95 0x9f, /* 04/04 - la2ic */
96 0x9f, /* 05/05 - ra2ic */
97 0xbf, /* 06/06 - loc */
98 0xbf, /* 07/07 - roc */
99 0x20, /* 08/08 - pdfr */
100 CS4231_AUTOCALIB, /* 09/09 - ic */
101 0x00, /* 0a/10 - pc */
102 0x00, /* 0b/11 - ti */
103 CS4231_MODE2, /* 0c/12 - mi */
104 0xfc, /* 0d/13 - lbc */
105 0x00, /* 0e/14 - pbru */
106 0x00, /* 0f/15 - pbrl */
107 0x80, /* 10/16 - afei */
108 0x01, /* 11/17 - afeii */
109 0x9f, /* 12/18 - llic */
110 0x9f, /* 13/19 - rlic */
111 0x00, /* 14/20 - tlb */
112 0x00, /* 15/21 - thb */
113 0x00, /* 16/22 - la3mic/reserved */
114 0x00, /* 17/23 - ra3mic/reserved */
115 0x00, /* 18/24 - afs */
116 0x00, /* 19/25 - lamoc/version */
117 0xcf, /* 1a/26 - mioc */
118 0x00, /* 1b/27 - ramoc/reserved */
119 0x20, /* 1c/28 - cdfr */
120 0x00, /* 1d/29 - res4 */
121 0x00, /* 1e/30 - cbru */
122 0x00, /* 1f/31 - cbrl */
126 * Basic I/O functions
129 #if !defined(EBUS_SUPPORT) && !defined(SBUS_SUPPORT)
130 #define __CS4231_INLINE__ inline
132 #define __CS4231_INLINE__ /* nothing */
135 static __CS4231_INLINE__ void cs4231_outb(cs4231_t *chip, u8 offset, u8 val)
138 if (chip->ebus->flag) {
139 writeb(val, chip->port + (offset << 2));
143 sbus_writeb(val, chip->port + (offset << 2));
148 #ifdef LEGACY_SUPPORT
149 outb(val, chip->port + offset);
153 static __CS4231_INLINE__ u8 cs4231_inb(cs4231_t *chip, u8 offset)
156 if (chip->ebus_flag) {
157 return readb(chip->port + (offset << 2));
161 return sbus_readb(chip->port + (offset << 2));
166 #ifdef LEGACY_SUPPORT
167 return inb(chip->port + offset);
171 void snd_cs4231_outm(cs4231_t *chip, unsigned char reg,
172 unsigned char mask, unsigned char value)
178 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
181 #ifdef CONFIG_SND_DEBUG
182 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
183 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
185 if (chip->calibrate_mute) {
186 chip->image[reg] &= mask;
187 chip->image[reg] |= value;
189 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
191 tmp = (chip->image[reg] & mask) | value;
192 cs4231_outb(chip, CS4231P(REG), tmp);
193 chip->image[reg] = tmp;
198 static void snd_cs4231_dout(cs4231_t *chip, unsigned char reg, unsigned char value)
203 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
206 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
207 cs4231_outb(chip, CS4231P(REG), value);
211 void snd_cs4231_out(cs4231_t *chip, unsigned char reg, unsigned char value)
216 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
219 #ifdef CONFIG_SND_DEBUG
220 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
221 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
223 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
224 cs4231_outb(chip, CS4231P(REG), value);
225 chip->image[reg] = value;
228 printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
232 unsigned char snd_cs4231_in(cs4231_t *chip, unsigned char reg)
237 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
240 #ifdef CONFIG_SND_DEBUG
241 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
242 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
244 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
246 return cs4231_inb(chip, CS4231P(REG));
249 void snd_cs4236_ext_out(cs4231_t *chip, unsigned char reg, unsigned char val)
251 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
252 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
253 cs4231_outb(chip, CS4231P(REG), val);
254 chip->eimage[CS4236_REG(reg)] = val;
256 printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
260 unsigned char snd_cs4236_ext_in(cs4231_t *chip, unsigned char reg)
262 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
263 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
265 return cs4231_inb(chip, CS4231P(REG));
269 res = cs4231_inb(chip, CS4231P(REG));
270 printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
276 #ifdef CONFIG_SND_DEBUG
278 void snd_cs4231_debug(cs4231_t *chip)
280 printk("CS4231 REGS: INDEX = 0x%02x ", cs4231_inb(chip, CS4231P(REGSEL)));
281 printk(" STATUS = 0x%02x\n", cs4231_inb(chip, CS4231P(STATUS)));
282 printk(" 0x00: left input = 0x%02x ", snd_cs4231_in(chip, 0x00));
283 printk(" 0x10: alt 1 (CFIG 2) = 0x%02x\n", snd_cs4231_in(chip, 0x10));
284 printk(" 0x01: right input = 0x%02x ", snd_cs4231_in(chip, 0x01));
285 printk(" 0x11: alt 2 (CFIG 3) = 0x%02x\n", snd_cs4231_in(chip, 0x11));
286 printk(" 0x02: GF1 left input = 0x%02x ", snd_cs4231_in(chip, 0x02));
287 printk(" 0x12: left line in = 0x%02x\n", snd_cs4231_in(chip, 0x12));
288 printk(" 0x03: GF1 right input = 0x%02x ", snd_cs4231_in(chip, 0x03));
289 printk(" 0x13: right line in = 0x%02x\n", snd_cs4231_in(chip, 0x13));
290 printk(" 0x04: CD left input = 0x%02x ", snd_cs4231_in(chip, 0x04));
291 printk(" 0x14: timer low = 0x%02x\n", snd_cs4231_in(chip, 0x14));
292 printk(" 0x05: CD right input = 0x%02x ", snd_cs4231_in(chip, 0x05));
293 printk(" 0x15: timer high = 0x%02x\n", snd_cs4231_in(chip, 0x15));
294 printk(" 0x06: left output = 0x%02x ", snd_cs4231_in(chip, 0x06));
295 printk(" 0x16: left MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x16));
296 printk(" 0x07: right output = 0x%02x ", snd_cs4231_in(chip, 0x07));
297 printk(" 0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
298 printk(" 0x08: playback format = 0x%02x ", snd_cs4231_in(chip, 0x08));
299 printk(" 0x18: IRQ status = 0x%02x\n", snd_cs4231_in(chip, 0x18));
300 printk(" 0x09: iface (CFIG 1) = 0x%02x ", snd_cs4231_in(chip, 0x09));
301 printk(" 0x19: left line out = 0x%02x\n", snd_cs4231_in(chip, 0x19));
302 printk(" 0x0a: pin control = 0x%02x ", snd_cs4231_in(chip, 0x0a));
303 printk(" 0x1a: mono control = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
304 printk(" 0x0b: init & status = 0x%02x ", snd_cs4231_in(chip, 0x0b));
305 printk(" 0x1b: right line out = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
306 printk(" 0x0c: revision & mode = 0x%02x ", snd_cs4231_in(chip, 0x0c));
307 printk(" 0x1c: record format = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
308 printk(" 0x0d: loopback = 0x%02x ", snd_cs4231_in(chip, 0x0d));
309 printk(" 0x1d: var freq (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
310 printk(" 0x0e: ply upr count = 0x%02x ", snd_cs4231_in(chip, 0x0e));
311 printk(" 0x1e: ply lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
312 printk(" 0x0f: rec upr count = 0x%02x ", snd_cs4231_in(chip, 0x0f));
313 printk(" 0x1f: rec lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
319 * CS4231 detection / MCE routines
322 static void snd_cs4231_busy_wait(cs4231_t *chip)
326 /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
327 for (timeout = 5; timeout > 0; timeout--)
328 cs4231_inb(chip, CS4231P(REGSEL));
329 /* end of cleanup sequence */
331 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
336 void snd_cs4231_mce_up(cs4231_t *chip)
341 for (timeout = 250; timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT); timeout--)
343 #ifdef CONFIG_SND_DEBUG
344 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
345 snd_printk("mce_up - auto calibration time out (0)\n");
347 spin_lock_irqsave(&chip->reg_lock, flags);
348 chip->mce_bit |= CS4231_MCE;
349 timeout = cs4231_inb(chip, CS4231P(REGSEL));
351 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
352 if (!(timeout & CS4231_MCE))
353 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
354 spin_unlock_irqrestore(&chip->reg_lock, flags);
357 void snd_cs4231_mce_down(cs4231_t *chip)
363 snd_cs4231_busy_wait(chip);
365 printk("(1) timeout = %i\n", timeout);
367 #ifdef CONFIG_SND_DEBUG
368 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
369 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
371 spin_lock_irqsave(&chip->reg_lock, flags);
372 chip->mce_bit &= ~CS4231_MCE;
373 timeout = cs4231_inb(chip, CS4231P(REGSEL));
374 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
375 spin_unlock_irqrestore(&chip->reg_lock, flags);
377 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
378 if ((timeout & CS4231_MCE) == 0 ||
379 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
382 snd_cs4231_busy_wait(chip);
384 /* calibration process */
386 for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
388 if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
389 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
393 printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
395 timeout = HZ / 4 / 2;
397 while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
398 set_current_state(TASK_INTERRUPTIBLE);
399 time = schedule_timeout(time);
404 snd_printk("mce_down - auto calibration time out (2)\n");
409 printk("(3) jiffies = %li\n", jiffies);
411 timeout = HZ / 10 / 2;
413 while (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
414 set_current_state(TASK_INTERRUPTIBLE);
415 time = schedule_timeout(time);
420 snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
425 printk("(4) jiffies = %li\n", jiffies);
426 snd_printk("mce_down - exit = 0x%x\n", cs4231_inb(chip, CS4231P(REGSEL)));
430 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
432 switch (format & 0xe0) {
433 case CS4231_LINEAR_16:
434 case CS4231_LINEAR_16_BIG:
437 case CS4231_ADPCM_16:
440 if (format & CS4231_STEREO)
445 static int snd_cs4231_trigger(snd_pcm_substream_t *substream,
448 cs4231_t *chip = snd_pcm_substream_chip(substream);
451 struct list_head *pos;
452 snd_pcm_substream_t *s;
456 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, cs4231_inb(chip, CS4231P(STATUS)));
460 case SNDRV_PCM_TRIGGER_START:
461 case SNDRV_PCM_TRIGGER_RESUME:
463 case SNDRV_PCM_TRIGGER_STOP:
464 case SNDRV_PCM_TRIGGER_SUSPEND:
471 snd_pcm_group_for_each(pos, substream) {
472 s = snd_pcm_group_substream_entry(pos);
473 if (s == chip->playback_substream) {
474 what |= CS4231_PLAYBACK_ENABLE;
475 snd_pcm_trigger_done(s, substream);
476 } else if (s == chip->capture_substream) {
477 what |= CS4231_RECORD_ENABLE;
478 snd_pcm_trigger_done(s, substream);
481 spin_lock(&chip->reg_lock);
483 chip->image[CS4231_IFACE_CTRL] |= what;
485 chip->trigger(chip, what, 1);
487 chip->image[CS4231_IFACE_CTRL] &= ~what;
489 chip->trigger(chip, what, 0);
491 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
492 spin_unlock(&chip->reg_lock);
494 snd_cs4231_debug(chip);
503 static unsigned char snd_cs4231_get_rate(unsigned int rate)
507 for (i = 0; i < 14; i++)
508 if (rate == rates[i])
511 return freq_bits[13];
514 static unsigned char snd_cs4231_get_format(cs4231_t *chip,
518 unsigned char rformat;
520 rformat = CS4231_LINEAR_8;
522 case SNDRV_PCM_FORMAT_MU_LAW: rformat = CS4231_ULAW_8; break;
523 case SNDRV_PCM_FORMAT_A_LAW: rformat = CS4231_ALAW_8; break;
524 case SNDRV_PCM_FORMAT_S16_LE: rformat = CS4231_LINEAR_16; break;
525 case SNDRV_PCM_FORMAT_S16_BE: rformat = CS4231_LINEAR_16_BIG; break;
526 case SNDRV_PCM_FORMAT_IMA_ADPCM: rformat = CS4231_ADPCM_16; break;
529 rformat |= CS4231_STEREO;
531 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
536 static void snd_cs4231_calibrate_mute(cs4231_t *chip, int mute)
541 spin_lock_irqsave(&chip->reg_lock, flags);
542 if (chip->calibrate_mute == mute) {
543 spin_unlock_irqrestore(&chip->reg_lock, flags);
547 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, chip->image[CS4231_LEFT_INPUT]);
548 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, chip->image[CS4231_RIGHT_INPUT]);
549 snd_cs4231_dout(chip, CS4231_LOOPBACK, chip->image[CS4231_LOOPBACK]);
551 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
552 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
553 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
554 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
555 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
556 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
557 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
558 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
559 snd_cs4231_dout(chip, CS4231_MONO_CTRL, mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
560 if (chip->hardware == CS4231_HW_INTERWAVE) {
561 snd_cs4231_dout(chip, CS4231_LEFT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_LEFT_MIC_INPUT]);
562 snd_cs4231_dout(chip, CS4231_RIGHT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_MIC_INPUT]);
563 snd_cs4231_dout(chip, CS4231_LINE_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_LEFT_OUTPUT]);
564 snd_cs4231_dout(chip, CS4231_LINE_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_RIGHT_OUTPUT]);
566 chip->calibrate_mute = mute;
567 spin_unlock_irqrestore(&chip->reg_lock, flags);
570 static void snd_cs4231_playback_format(cs4231_t *chip,
571 snd_pcm_hw_params_t *params,
577 down(&chip->mce_mutex);
578 snd_cs4231_calibrate_mute(chip, 1);
579 if (chip->hardware == CS4231_HW_CS4231A ||
580 (chip->hardware & CS4231_HW_CS4232_MASK)) {
581 spin_lock_irqsave(&chip->reg_lock, flags);
582 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) { /* rate is same? */
583 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x10);
584 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
585 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
586 udelay(100); /* Fixes audible clicks at least on GUS MAX */
589 spin_unlock_irqrestore(&chip->reg_lock, flags);
592 snd_cs4231_mce_up(chip);
593 spin_lock_irqsave(&chip->reg_lock, flags);
594 if (chip->hardware != CS4231_HW_INTERWAVE && !chip->single_dma) {
595 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
596 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
597 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
600 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
602 spin_unlock_irqrestore(&chip->reg_lock, flags);
603 snd_cs4231_mce_down(chip);
605 snd_cs4231_calibrate_mute(chip, 0);
606 up(&chip->mce_mutex);
609 static void snd_cs4231_capture_format(cs4231_t *chip,
610 snd_pcm_hw_params_t *params,
616 down(&chip->mce_mutex);
617 snd_cs4231_calibrate_mute(chip, 1);
618 if (chip->hardware == CS4231_HW_CS4231A ||
619 (chip->hardware & CS4231_HW_CS4232_MASK)) {
620 spin_lock_irqsave(&chip->reg_lock, flags);
621 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) || /* rate is same? */
622 (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
623 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x20);
624 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT] = cdfr);
625 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
628 spin_unlock_irqrestore(&chip->reg_lock, flags);
631 snd_cs4231_mce_up(chip);
632 spin_lock_irqsave(&chip->reg_lock, flags);
633 if (chip->hardware != CS4231_HW_INTERWAVE) {
634 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
635 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
636 ((chip->single_dma ? cdfr : chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
638 spin_unlock_irqrestore(&chip->reg_lock, flags);
639 snd_cs4231_mce_down(chip);
640 snd_cs4231_mce_up(chip);
641 spin_lock_irqsave(&chip->reg_lock, flags);
644 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
645 spin_unlock_irqrestore(&chip->reg_lock, flags);
646 snd_cs4231_mce_down(chip);
648 snd_cs4231_calibrate_mute(chip, 0);
649 up(&chip->mce_mutex);
656 static unsigned long snd_cs4231_timer_resolution(snd_timer_t * timer)
658 cs4231_t *chip = snd_timer_chip(timer);
659 if (chip->hardware & CS4231_HW_CS4236B_MASK)
662 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
665 static int snd_cs4231_timer_start(snd_timer_t * timer)
669 cs4231_t *chip = snd_timer_chip(timer);
670 spin_lock_irqsave(&chip->reg_lock, flags);
671 ticks = timer->sticks;
672 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
673 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
674 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
675 snd_cs4231_out(chip, CS4231_TIMER_HIGH, chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8));
676 snd_cs4231_out(chip, CS4231_TIMER_LOW, chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks);
677 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
679 spin_unlock_irqrestore(&chip->reg_lock, flags);
683 static int snd_cs4231_timer_stop(snd_timer_t * timer)
686 cs4231_t *chip = snd_timer_chip(timer);
687 spin_lock_irqsave(&chip->reg_lock, flags);
688 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
689 spin_unlock_irqrestore(&chip->reg_lock, flags);
693 static void snd_cs4231_init(cs4231_t *chip)
697 snd_cs4231_mce_down(chip);
699 #ifdef SNDRV_DEBUGq_MCE
700 snd_printk("init: (1)\n");
702 snd_cs4231_mce_up(chip);
703 spin_lock_irqsave(&chip->reg_lock, flags);
704 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
705 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
707 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
708 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
709 spin_unlock_irqrestore(&chip->reg_lock, flags);
710 snd_cs4231_mce_down(chip);
712 #ifdef SNDRV_DEBUG_MCE
713 snd_printk("init: (2)\n");
716 snd_cs4231_mce_up(chip);
717 spin_lock_irqsave(&chip->reg_lock, flags);
718 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
719 spin_unlock_irqrestore(&chip->reg_lock, flags);
720 snd_cs4231_mce_down(chip);
722 #ifdef SNDRV_DEBUG_MCE
723 snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
726 spin_lock_irqsave(&chip->reg_lock, flags);
727 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
728 spin_unlock_irqrestore(&chip->reg_lock, flags);
730 snd_cs4231_mce_up(chip);
731 spin_lock_irqsave(&chip->reg_lock, flags);
732 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
733 spin_unlock_irqrestore(&chip->reg_lock, flags);
734 snd_cs4231_mce_down(chip);
736 #ifdef SNDRV_DEBUG_MCE
737 snd_printk("init: (4)\n");
740 snd_cs4231_mce_up(chip);
741 spin_lock_irqsave(&chip->reg_lock, flags);
742 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
743 spin_unlock_irqrestore(&chip->reg_lock, flags);
744 snd_cs4231_mce_down(chip);
746 #ifdef SNDRV_DEBUG_MCE
747 snd_printk("init: (5)\n");
751 static int snd_cs4231_open(cs4231_t *chip, unsigned int mode)
755 down(&chip->open_mutex);
756 if ((chip->mode & mode) ||
757 ((chip->mode & CS4231_MODE_OPEN) && chip->single_dma)) {
758 up(&chip->open_mutex);
761 if (chip->mode & CS4231_MODE_OPEN) {
763 up(&chip->open_mutex);
766 /* ok. now enable and ack CODEC IRQ */
767 spin_lock_irqsave(&chip->reg_lock, flags);
768 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
771 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
772 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
773 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
774 chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
775 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
776 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
779 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
780 spin_unlock_irqrestore(&chip->reg_lock, flags);
783 up(&chip->open_mutex);
787 static void snd_cs4231_close(cs4231_t *chip, unsigned int mode)
791 down(&chip->open_mutex);
793 if (chip->mode & CS4231_MODE_OPEN) {
794 up(&chip->open_mutex);
797 snd_cs4231_calibrate_mute(chip, 1);
800 spin_lock_irqsave(&chip->reg_lock, flags);
801 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
802 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
803 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
804 chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
805 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
807 /* now disable record & playback */
809 if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
810 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
811 spin_unlock_irqrestore(&chip->reg_lock, flags);
812 snd_cs4231_mce_up(chip);
813 spin_lock_irqsave(&chip->reg_lock, flags);
814 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
815 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
816 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
817 spin_unlock_irqrestore(&chip->reg_lock, flags);
818 snd_cs4231_mce_down(chip);
819 spin_lock_irqsave(&chip->reg_lock, flags);
822 /* clear IRQ again */
823 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
824 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
825 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
826 spin_unlock_irqrestore(&chip->reg_lock, flags);
828 snd_cs4231_calibrate_mute(chip, 0);
831 up(&chip->open_mutex);
838 static int snd_cs4231_timer_open(snd_timer_t * timer)
840 cs4231_t *chip = snd_timer_chip(timer);
841 snd_cs4231_open(chip, CS4231_MODE_TIMER);
845 static int snd_cs4231_timer_close(snd_timer_t * timer)
847 cs4231_t *chip = snd_timer_chip(timer);
848 snd_cs4231_close(chip, CS4231_MODE_TIMER);
852 static struct _snd_timer_hardware snd_cs4231_timer_table =
854 .flags = SNDRV_TIMER_HW_AUTO,
857 .open = snd_cs4231_timer_open,
858 .close = snd_cs4231_timer_close,
859 .c_resolution = snd_cs4231_timer_resolution,
860 .start = snd_cs4231_timer_start,
861 .stop = snd_cs4231_timer_stop,
865 * ok.. exported functions..
868 static int snd_cs4231_playback_hw_params(snd_pcm_substream_t * substream,
869 snd_pcm_hw_params_t * hw_params)
871 cs4231_t *chip = snd_pcm_substream_chip(substream);
872 unsigned char new_pdfr;
875 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
877 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
878 snd_cs4231_get_rate(params_rate(hw_params));
879 chip->set_playback_format(chip, hw_params, new_pdfr);
883 static int snd_cs4231_playback_hw_free(snd_pcm_substream_t * substream)
885 return snd_pcm_lib_free_pages(substream);
888 #ifdef LEGACY_SUPPORT
889 static int snd_cs4231_playback_prepare(snd_pcm_substream_t * substream)
891 cs4231_t *chip = snd_pcm_substream_chip(substream);
892 snd_pcm_runtime_t *runtime = substream->runtime;
894 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
895 unsigned int count = snd_pcm_lib_period_bytes(substream);
897 spin_lock_irqsave(&chip->reg_lock, flags);
898 chip->p_dma_size = size;
899 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
900 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
901 count = snd_cs4231_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
902 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
903 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
904 spin_unlock_irqrestore(&chip->reg_lock, flags);
906 snd_cs4231_debug(chip);
910 #endif /* LEGACY_SUPPORT */
912 static int snd_cs4231_capture_hw_params(snd_pcm_substream_t * substream,
913 snd_pcm_hw_params_t * hw_params)
915 cs4231_t *chip = snd_pcm_substream_chip(substream);
916 unsigned char new_cdfr;
919 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
921 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
922 snd_cs4231_get_rate(params_rate(hw_params));
923 chip->set_capture_format(chip, hw_params, new_cdfr);
927 static int snd_cs4231_capture_hw_free(snd_pcm_substream_t * substream)
929 return snd_pcm_lib_free_pages(substream);
932 #ifdef LEGACY_SUPPORT
933 static int snd_cs4231_capture_prepare(snd_pcm_substream_t * substream)
935 cs4231_t *chip = snd_pcm_substream_chip(substream);
936 snd_pcm_runtime_t *runtime = substream->runtime;
938 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
939 unsigned int count = snd_pcm_lib_period_bytes(substream);
941 spin_lock_irqsave(&chip->reg_lock, flags);
942 chip->c_dma_size = size;
943 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
944 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
945 count = snd_cs4231_get_count(chip->image[CS4231_REC_FORMAT], count) - 1;
946 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
947 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
948 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
950 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
951 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, (unsigned char) (count >> 8));
953 spin_unlock_irqrestore(&chip->reg_lock, flags);
958 static void snd_cs4231_overrange(cs4231_t *chip)
963 spin_lock_irqsave(&chip->reg_lock, flags);
964 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
965 spin_unlock_irqrestore(&chip->reg_lock, flags);
966 if (res & (0x08 | 0x02)) /* detect overrange only above 0dB; may be user selectable? */
967 chip->capture_substream->runtime->overrange++;
970 irqreturn_t snd_cs4231_interrupt(int irq, void *dev_id, struct pt_regs *regs)
972 cs4231_t *chip = snd_magic_cast(cs4231_t, dev_id, return IRQ_NONE);
973 unsigned char status;
975 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
976 if (status & CS4231_TIMER_IRQ) {
978 snd_timer_interrupt(chip->timer, chip->timer->sticks);
980 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
981 if (status & CS4231_PLAYBACK_IRQ) {
982 if (chip->mode & CS4231_MODE_PLAY) {
983 if (chip->playback_substream)
984 snd_pcm_period_elapsed(chip->playback_substream);
986 if (chip->mode & CS4231_MODE_RECORD) {
987 if (chip->capture_substream) {
988 snd_cs4231_overrange(chip);
989 snd_pcm_period_elapsed(chip->capture_substream);
994 if (status & CS4231_PLAYBACK_IRQ) {
995 if (chip->playback_substream)
996 snd_pcm_period_elapsed(chip->playback_substream);
998 if (status & CS4231_RECORD_IRQ) {
999 if (chip->capture_substream) {
1000 snd_cs4231_overrange(chip);
1001 snd_pcm_period_elapsed(chip->capture_substream);
1006 spin_lock(&chip->reg_lock);
1007 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1008 spin_unlock(&chip->reg_lock);
1012 #ifdef LEGACY_SUPPORT
1013 static snd_pcm_uframes_t snd_cs4231_playback_pointer(snd_pcm_substream_t * substream)
1015 cs4231_t *chip = snd_pcm_substream_chip(substream);
1018 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1020 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
1021 return bytes_to_frames(substream->runtime, ptr);
1024 static snd_pcm_uframes_t snd_cs4231_capture_pointer(snd_pcm_substream_t * substream)
1026 cs4231_t *chip = snd_pcm_substream_chip(substream);
1029 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1031 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
1032 return bytes_to_frames(substream->runtime, ptr);
1034 #endif /* LEGACY_SUPPORT */
1040 int snd_cs4231_probe(cs4231_t *chip)
1042 unsigned long flags;
1048 snd_cs4231_debug(chip);
1051 for (i = 0; i < 50; i++) {
1053 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
1056 spin_lock_irqsave(&chip->reg_lock, flags);
1057 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1058 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1059 spin_unlock_irqrestore(&chip->reg_lock, flags);
1061 break; /* this is valid value */
1064 snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1066 return -ENODEV; /* no valid device found */
1068 if (((hw = chip->hardware) & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1069 rev = snd_cs4231_in(chip, CS4231_VERSION) & 0xe7;
1070 snd_printdd("CS4231: VERSION (I25) = 0x%x\n", rev);
1072 unsigned char tmp = snd_cs4231_in(chip, 23);
1073 snd_cs4231_out(chip, 23, ~tmp);
1074 if (snd_cs4231_in(chip, 23) != tmp)
1075 chip->hardware = CS4231_HW_AD1845;
1077 chip->hardware = CS4231_HW_CS4231;
1078 } else if (rev == 0xa0) {
1079 chip->hardware = CS4231_HW_CS4231A;
1080 } else if (rev == 0xa2) {
1081 chip->hardware = CS4231_HW_CS4232;
1082 } else if (rev == 0xb2) {
1083 chip->hardware = CS4231_HW_CS4232A;
1084 } else if (rev == 0x83) {
1085 chip->hardware = CS4231_HW_CS4236;
1086 } else if (rev == 0x03) {
1087 chip->hardware = CS4231_HW_CS4236B;
1089 snd_printk("unknown CS chip with version 0x%x\n", rev);
1090 return -ENODEV; /* unknown CS4231 chip? */
1093 spin_lock_irqsave(&chip->reg_lock, flags);
1094 cs4231_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
1095 cs4231_outb(chip, CS4231P(STATUS), 0);
1097 spin_unlock_irqrestore(&chip->reg_lock, flags);
1099 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1100 switch (chip->hardware) {
1101 case CS4231_HW_INTERWAVE:
1102 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1104 case CS4231_HW_CS4235:
1105 case CS4231_HW_CS4236B:
1106 case CS4231_HW_CS4237B:
1107 case CS4231_HW_CS4238B:
1108 case CS4231_HW_CS4239:
1109 if (hw == CS4231_HW_DETECT3)
1110 chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1112 chip->hardware = CS4231_HW_CS4236;
1116 chip->image[CS4231_IFACE_CTRL] =
1117 (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1118 (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1119 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1120 chip->image[CS4231_ALT_FEATURE_2] = chip->hardware == CS4231_HW_INTERWAVE ? 0xc2 : 0x01;
1121 ptr = (unsigned char *) &chip->image;
1122 snd_cs4231_mce_down(chip);
1123 spin_lock_irqsave(&chip->reg_lock, flags);
1124 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1125 snd_cs4231_out(chip, i, *ptr++);
1126 spin_unlock_irqrestore(&chip->reg_lock, flags);
1127 snd_cs4231_mce_up(chip);
1128 snd_cs4231_mce_down(chip);
1132 /* ok.. try check hardware version for CS4236+ chips */
1133 if ((hw & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1134 if (chip->hardware == CS4231_HW_CS4236B) {
1135 rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1136 snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1137 id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1138 snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1139 snd_printdd("CS4231: ext version; rev = 0x%x, id = 0x%x\n", rev, id);
1140 if ((id & 0x1f) == 0x1d) { /* CS4235 */
1141 chip->hardware = CS4231_HW_CS4235;
1148 snd_printk("unknown CS4235 chip (enhanced version = 0x%x)\n", id);
1150 } else if ((id & 0x1f) == 0x0b) { /* CS4236/B */
1156 chip->hardware = CS4231_HW_CS4236B;
1159 snd_printk("unknown CS4236 chip (enhanced version = 0x%x)\n", id);
1161 } else if ((id & 0x1f) == 0x08) { /* CS4237B */
1162 chip->hardware = CS4231_HW_CS4237B;
1170 snd_printk("unknown CS4237B chip (enhanced version = 0x%x)\n", id);
1172 } else if ((id & 0x1f) == 0x09) { /* CS4238B */
1173 chip->hardware = CS4231_HW_CS4238B;
1180 snd_printk("unknown CS4238B chip (enhanced version = 0x%x)\n", id);
1182 } else if ((id & 0x1f) == 0x1e) { /* CS4239 */
1183 chip->hardware = CS4231_HW_CS4239;
1190 snd_printk("unknown CS4239 chip (enhanced version = 0x%x)\n", id);
1193 snd_printk("unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n", id);
1197 return 0; /* all things are ok.. */
1204 static snd_pcm_hardware_t snd_cs4231_playback =
1206 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1207 SNDRV_PCM_INFO_MMAP_VALID |
1208 SNDRV_PCM_INFO_RESUME |
1209 SNDRV_PCM_INFO_SYNC_START),
1210 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1211 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1212 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1217 .buffer_bytes_max = (128*1024),
1218 .period_bytes_min = 64,
1219 .period_bytes_max = (128*1024),
1221 .periods_max = 1024,
1225 static snd_pcm_hardware_t snd_cs4231_capture =
1227 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1228 SNDRV_PCM_INFO_MMAP_VALID |
1229 SNDRV_PCM_INFO_RESUME |
1230 SNDRV_PCM_INFO_SYNC_START),
1231 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1232 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1233 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1238 .buffer_bytes_max = (128*1024),
1239 .period_bytes_min = 64,
1240 .period_bytes_max = (128*1024),
1242 .periods_max = 1024,
1250 static int snd_cs4231_playback_open(snd_pcm_substream_t * substream)
1252 cs4231_t *chip = snd_pcm_substream_chip(substream);
1253 snd_pcm_runtime_t *runtime = substream->runtime;
1256 runtime->hw = snd_cs4231_playback;
1258 /* hardware bug in InterWave chipset */
1259 if (chip->hardware == CS4231_HW_INTERWAVE && chip->dma1 > 3)
1260 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_MU_LAW;
1262 /* hardware limitation of cheap chips */
1263 if (chip->hardware == CS4231_HW_CS4235 ||
1264 chip->hardware == CS4231_HW_CS4239)
1265 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1267 #ifdef LEGACY_SUPPORT
1268 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1269 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1271 if (chip->claim_dma) {
1272 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0)
1277 if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1278 #ifdef LEGACY_SUPPORT
1279 if (chip->release_dma)
1280 chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1282 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1285 chip->playback_substream = substream;
1286 #if defined(SBUS_SUPPORT) || defined(EBUS_SUPPORT)
1287 chip->p_periods_sent = 0;
1289 snd_pcm_set_sync(substream);
1290 chip->rate_constraint(runtime);
1294 static int snd_cs4231_capture_open(snd_pcm_substream_t * substream)
1296 cs4231_t *chip = snd_pcm_substream_chip(substream);
1297 snd_pcm_runtime_t *runtime = substream->runtime;
1300 runtime->hw = snd_cs4231_capture;
1302 /* hardware limitation of cheap chips */
1303 if (chip->hardware == CS4231_HW_CS4235 ||
1304 chip->hardware == CS4231_HW_CS4239)
1305 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1307 #ifdef LEGACY_SUPPORT
1308 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1309 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1311 if (chip->claim_dma) {
1312 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0)
1317 if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1318 #ifdef LEGACY_SUPPORT
1319 if (chip->release_dma)
1320 chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1322 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1325 chip->capture_substream = substream;
1326 #if defined(SBUS_SUPPORT) || defined(EBUS_SUPPORT)
1327 chip->c_periods_sent = 0;
1329 snd_pcm_set_sync(substream);
1330 chip->rate_constraint(runtime);
1334 static int snd_cs4231_playback_close(snd_pcm_substream_t * substream)
1336 cs4231_t *chip = snd_pcm_substream_chip(substream);
1338 chip->playback_substream = NULL;
1339 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1343 static int snd_cs4231_capture_close(snd_pcm_substream_t * substream)
1345 cs4231_t *chip = snd_pcm_substream_chip(substream);
1347 chip->capture_substream = NULL;
1348 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1354 /* lowlevel suspend callback for CS4231 */
1355 static void snd_cs4231_suspend(cs4231_t *chip)
1358 unsigned long flags;
1360 spin_lock_irqsave(&chip->reg_lock, flags);
1361 for (reg = 0; reg < 32; reg++)
1362 chip->image[reg] = snd_cs4231_in(chip, reg);
1363 spin_unlock_irqrestore(&chip->reg_lock, flags);
1366 /* lowlevel resume callback for CS4231 */
1367 static void snd_cs4231_resume(cs4231_t *chip)
1370 unsigned long flags;
1373 snd_cs4231_mce_up(chip);
1374 spin_lock_irqsave(&chip->reg_lock, flags);
1375 for (reg = 0; reg < 32; reg++) {
1377 case CS4231_VERSION:
1380 snd_cs4231_out(chip, reg, chip->image[reg]);
1384 spin_unlock_irqrestore(&chip->reg_lock, flags);
1386 snd_cs4231_mce_down(chip);
1388 /* The following is a workaround to avoid freeze after resume on TP600E.
1389 This is the first half of copy of snd_cs4231_mce_down(), but doesn't
1390 include rescheduling. -- iwai
1392 snd_cs4231_busy_wait(chip);
1393 spin_lock_irqsave(&chip->reg_lock, flags);
1394 chip->mce_bit &= ~CS4231_MCE;
1395 timeout = cs4231_inb(chip, CS4231P(REGSEL));
1396 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1397 spin_unlock_irqrestore(&chip->reg_lock, flags);
1398 if (timeout == 0x80)
1399 snd_printk("down [0x%lx]: serious init problem - codec still busy\n", chip->port);
1400 if ((timeout & CS4231_MCE) == 0 ||
1401 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
1404 snd_cs4231_busy_wait(chip);
1408 static int snd_cs4231_pm_suspend(snd_card_t *card, unsigned int state)
1410 cs4231_t *chip = snd_magic_cast(cs4231_t, card->pm_private_data, return -EINVAL);
1411 if (chip->suspend) {
1412 chip->suspend(chip);
1413 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1418 static int snd_cs4231_pm_resume(snd_card_t *card, unsigned int state)
1420 cs4231_t *chip = snd_magic_cast(cs4231_t, card->pm_private_data, return -EINVAL);
1423 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1427 #endif /* CONFIG_PM */
1429 #ifdef LEGACY_SUPPORT
1431 static int snd_cs4231_free(cs4231_t *chip)
1433 if (chip->res_port) {
1434 release_resource(chip->res_port);
1435 kfree_nocheck(chip->res_port);
1437 if (chip->res_cport) {
1438 release_resource(chip->res_cport);
1439 kfree_nocheck(chip->res_cport);
1441 if (chip->irq >= 0) {
1442 disable_irq(chip->irq);
1443 if (!(chip->hwshare & CS4231_HWSHARE_IRQ))
1444 free_irq(chip->irq, (void *) chip);
1446 if (!(chip->hwshare & CS4231_HWSHARE_DMA1) && chip->dma1 >= 0) {
1447 snd_dma_disable(chip->dma1);
1448 free_dma(chip->dma1);
1450 if (!(chip->hwshare & CS4231_HWSHARE_DMA2) && chip->dma2 >= 0 && chip->dma2 != chip->dma1) {
1451 snd_dma_disable(chip->dma2);
1452 free_dma(chip->dma2);
1455 snd_device_free(chip->card, chip->timer);
1456 snd_magic_kfree(chip);
1460 static int snd_cs4231_dev_free(snd_device_t *device)
1462 cs4231_t *chip = snd_magic_cast(cs4231_t, device->device_data, return -ENXIO);
1463 return snd_cs4231_free(chip);
1466 #endif /* LEGACY_SUPPORT */
1468 const char *snd_cs4231_chip_id(cs4231_t *chip)
1470 switch (chip->hardware) {
1471 case CS4231_HW_CS4231: return "CS4231";
1472 case CS4231_HW_CS4231A: return "CS4231A";
1473 case CS4231_HW_CS4232: return "CS4232";
1474 case CS4231_HW_CS4232A: return "CS4232A";
1475 case CS4231_HW_CS4235: return "CS4235";
1476 case CS4231_HW_CS4236: return "CS4236";
1477 case CS4231_HW_CS4236B: return "CS4236B";
1478 case CS4231_HW_CS4237B: return "CS4237B";
1479 case CS4231_HW_CS4238B: return "CS4238B";
1480 case CS4231_HW_CS4239: return "CS4239";
1481 case CS4231_HW_INTERWAVE: return "AMD InterWave";
1482 case CS4231_HW_OPL3SA2: return chip->card->shortname;
1483 case CS4231_HW_AD1845: return "AD1845";
1484 default: return "???";
1488 static int snd_cs4231_new(snd_card_t * card,
1489 unsigned short hardware,
1490 unsigned short hwshare,
1496 chip = snd_magic_kcalloc(cs4231_t, 0, GFP_KERNEL);
1499 chip->hardware = hardware;
1500 chip->hwshare = hwshare;
1502 spin_lock_init(&chip->reg_lock);
1503 init_MUTEX(&chip->mce_mutex);
1504 init_MUTEX(&chip->open_mutex);
1506 chip->rate_constraint = snd_cs4231_xrate;
1507 chip->set_playback_format = snd_cs4231_playback_format;
1508 chip->set_capture_format = snd_cs4231_capture_format;
1509 memcpy(&chip->image, &snd_cs4231_original_image, sizeof(snd_cs4231_original_image));
1515 #ifdef LEGACY_SUPPORT
1517 int snd_cs4231_create(snd_card_t * card,
1519 unsigned long cport,
1520 int irq, int dma1, int dma2,
1521 unsigned short hardware,
1522 unsigned short hwshare,
1525 static snd_device_ops_t ops = {
1526 .dev_free = snd_cs4231_dev_free,
1531 err = snd_cs4231_new(card, hardware, hwshare, &chip);
1539 if ((chip->res_port = request_region(port, 4, "CS4231")) == NULL) {
1540 snd_printk(KERN_ERR "cs4231: can't grab port 0x%lx\n", port);
1541 snd_cs4231_free(chip);
1545 if ((long)cport >= 0 && (chip->res_cport = request_region(cport, 8, "CS4232 Control")) == NULL) {
1546 snd_printk(KERN_ERR "cs4231: can't grab control port 0x%lx\n", cport);
1547 snd_cs4231_free(chip);
1550 chip->cport = cport;
1551 if (!(hwshare & CS4231_HWSHARE_IRQ) && request_irq(irq, snd_cs4231_interrupt, SA_INTERRUPT, "CS4231", (void *) chip)) {
1552 snd_printk(KERN_ERR "cs4231: can't grab IRQ %d\n", irq);
1553 snd_cs4231_free(chip);
1557 if (!(hwshare & CS4231_HWSHARE_DMA1) && request_dma(dma1, "CS4231 - 1")) {
1558 snd_printk(KERN_ERR "cs4231: can't grab DMA1 %d\n", dma1);
1559 snd_cs4231_free(chip);
1563 if (!(hwshare & CS4231_HWSHARE_DMA2) && dma1 != dma2 && dma2 >= 0 && request_dma(dma2, "CS4231 - 2")) {
1564 snd_printk(KERN_ERR "cs4231: can't grab DMA2 %d\n", dma2);
1565 snd_cs4231_free(chip);
1568 if (dma1 == dma2 || dma2 < 0) {
1569 chip->single_dma = 1;
1570 chip->dma2 = chip->dma1;
1575 if (snd_cs4231_probe(chip) < 0) {
1576 snd_cs4231_free(chip);
1579 snd_cs4231_init(chip);
1581 if (chip->hardware & CS4231_HW_CS4232_MASK) {
1582 if (chip->res_cport == NULL)
1583 snd_printk("CS4232 control port features are not accessible\n");
1586 /* Register device */
1587 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1588 snd_cs4231_free(chip);
1593 /* Power Management */
1594 chip->suspend = snd_cs4231_suspend;
1595 chip->resume = snd_cs4231_resume;
1596 snd_card_set_isa_pm_callback(card, snd_cs4231_pm_suspend, snd_cs4231_pm_resume, chip);
1603 #endif /* LEGACY_SUPPORT */
1605 static snd_pcm_ops_t snd_cs4231_playback_ops = {
1606 .open = snd_cs4231_playback_open,
1607 .close = snd_cs4231_playback_close,
1608 .ioctl = snd_pcm_lib_ioctl,
1609 .hw_params = snd_cs4231_playback_hw_params,
1610 .hw_free = snd_cs4231_playback_hw_free,
1611 .prepare = snd_cs4231_playback_prepare,
1612 .trigger = snd_cs4231_trigger,
1613 .pointer = snd_cs4231_playback_pointer,
1616 static snd_pcm_ops_t snd_cs4231_capture_ops = {
1617 .open = snd_cs4231_capture_open,
1618 .close = snd_cs4231_capture_close,
1619 .ioctl = snd_pcm_lib_ioctl,
1620 .hw_params = snd_cs4231_capture_hw_params,
1621 .hw_free = snd_cs4231_capture_hw_free,
1622 .prepare = snd_cs4231_capture_prepare,
1623 .trigger = snd_cs4231_trigger,
1624 .pointer = snd_cs4231_capture_pointer,
1627 static void snd_cs4231_pcm_free(snd_pcm_t *pcm)
1629 cs4231_t *chip = snd_magic_cast(cs4231_t, pcm->private_data, return);
1631 snd_pcm_lib_preallocate_free_for_all(pcm);
1634 int snd_cs4231_pcm(cs4231_t *chip, int device, snd_pcm_t **rpcm)
1639 if ((err = snd_pcm_new(chip->card, "CS4231", device, 1, 1, &pcm)) < 0)
1642 spin_lock_init(&chip->reg_lock);
1643 init_MUTEX(&chip->mce_mutex);
1644 init_MUTEX(&chip->open_mutex);
1646 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1647 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1650 pcm->private_data = chip;
1651 pcm->private_free = snd_cs4231_pcm_free;
1652 pcm->info_flags = 0;
1653 if (chip->single_dma)
1654 pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1655 if (chip->hardware != CS4231_HW_INTERWAVE)
1656 pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1657 strcpy(pcm->name, snd_cs4231_chip_id(chip));
1659 #ifdef LEGACY_SUPPORT
1660 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1662 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1664 # ifdef EBUS_SUPPORT
1665 if (chip->ebus_flag) {
1666 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1671 # ifdef SBUS_SUPPORT
1672 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1676 # ifdef EBUS_SUPPORT
1687 static void snd_cs4231_timer_free(snd_timer_t *timer)
1689 cs4231_t *chip = snd_magic_cast(cs4231_t, timer->private_data, return);
1693 int snd_cs4231_timer(cs4231_t *chip, int device, snd_timer_t **rtimer)
1699 /* Timer initialization */
1700 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1701 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1702 tid.card = chip->card->number;
1703 tid.device = device;
1705 if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1707 strcpy(timer->name, snd_cs4231_chip_id(chip));
1708 timer->private_data = chip;
1709 timer->private_free = snd_cs4231_timer_free;
1710 timer->hw = snd_cs4231_timer_table;
1711 chip->timer = timer;
1721 static int snd_cs4231_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1723 static char *texts[4] = {
1724 "Line", "Aux", "Mic", "Mix"
1726 static char *opl3sa_texts[4] = {
1727 "Line", "CD", "Mic", "Mix"
1729 static char *gusmax_texts[4] = {
1730 "Line", "Synth", "Mic", "Mix"
1732 char **ptexts = texts;
1733 cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1735 snd_assert(chip->card != NULL, return -EINVAL);
1736 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1738 uinfo->value.enumerated.items = 4;
1739 if (uinfo->value.enumerated.item > 3)
1740 uinfo->value.enumerated.item = 3;
1741 if (!strcmp(chip->card->driver, "GUS MAX"))
1742 ptexts = gusmax_texts;
1743 switch (chip->hardware) {
1744 case CS4231_HW_INTERWAVE: ptexts = gusmax_texts; break;
1745 case CS4231_HW_OPL3SA2: ptexts = opl3sa_texts; break;
1747 strcpy(uinfo->value.enumerated.name, ptexts[uinfo->value.enumerated.item]);
1751 static int snd_cs4231_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1753 cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1754 unsigned long flags;
1756 spin_lock_irqsave(&chip->reg_lock, flags);
1757 ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1758 ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1759 spin_unlock_irqrestore(&chip->reg_lock, flags);
1763 static int snd_cs4231_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1765 cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1766 unsigned long flags;
1767 unsigned short left, right;
1770 if (ucontrol->value.enumerated.item[0] > 3 ||
1771 ucontrol->value.enumerated.item[1] > 3)
1773 left = ucontrol->value.enumerated.item[0] << 6;
1774 right = ucontrol->value.enumerated.item[1] << 6;
1775 spin_lock_irqsave(&chip->reg_lock, flags);
1776 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1777 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1778 change = left != chip->image[CS4231_LEFT_INPUT] ||
1779 right != chip->image[CS4231_RIGHT_INPUT];
1780 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1781 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1782 spin_unlock_irqrestore(&chip->reg_lock, flags);
1786 int snd_cs4231_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1788 int mask = (kcontrol->private_value >> 16) & 0xff;
1790 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1792 uinfo->value.integer.min = 0;
1793 uinfo->value.integer.max = mask;
1797 int snd_cs4231_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1799 cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1800 unsigned long flags;
1801 int reg = kcontrol->private_value & 0xff;
1802 int shift = (kcontrol->private_value >> 8) & 0xff;
1803 int mask = (kcontrol->private_value >> 16) & 0xff;
1804 int invert = (kcontrol->private_value >> 24) & 0xff;
1806 spin_lock_irqsave(&chip->reg_lock, flags);
1807 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1808 spin_unlock_irqrestore(&chip->reg_lock, flags);
1810 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1814 int snd_cs4231_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1816 cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1817 unsigned long flags;
1818 int reg = kcontrol->private_value & 0xff;
1819 int shift = (kcontrol->private_value >> 8) & 0xff;
1820 int mask = (kcontrol->private_value >> 16) & 0xff;
1821 int invert = (kcontrol->private_value >> 24) & 0xff;
1825 val = (ucontrol->value.integer.value[0] & mask);
1829 spin_lock_irqsave(&chip->reg_lock, flags);
1830 val = (chip->image[reg] & ~(mask << shift)) | val;
1831 change = val != chip->image[reg];
1832 snd_cs4231_out(chip, reg, val);
1833 spin_unlock_irqrestore(&chip->reg_lock, flags);
1837 int snd_cs4231_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1839 int mask = (kcontrol->private_value >> 24) & 0xff;
1841 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1843 uinfo->value.integer.min = 0;
1844 uinfo->value.integer.max = mask;
1848 int snd_cs4231_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1850 cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1851 unsigned long flags;
1852 int left_reg = kcontrol->private_value & 0xff;
1853 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1854 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1855 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1856 int mask = (kcontrol->private_value >> 24) & 0xff;
1857 int invert = (kcontrol->private_value >> 22) & 1;
1859 spin_lock_irqsave(&chip->reg_lock, flags);
1860 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1861 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1862 spin_unlock_irqrestore(&chip->reg_lock, flags);
1864 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1865 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1870 int snd_cs4231_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1872 cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1873 unsigned long flags;
1874 int left_reg = kcontrol->private_value & 0xff;
1875 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1876 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1877 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1878 int mask = (kcontrol->private_value >> 24) & 0xff;
1879 int invert = (kcontrol->private_value >> 22) & 1;
1881 unsigned short val1, val2;
1883 val1 = ucontrol->value.integer.value[0] & mask;
1884 val2 = ucontrol->value.integer.value[1] & mask;
1889 val1 <<= shift_left;
1890 val2 <<= shift_right;
1891 spin_lock_irqsave(&chip->reg_lock, flags);
1892 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1893 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1894 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1895 snd_cs4231_out(chip, left_reg, val1);
1896 snd_cs4231_out(chip, right_reg, val2);
1897 spin_unlock_irqrestore(&chip->reg_lock, flags);
1901 #define CS4231_CONTROLS (sizeof(snd_cs4231_controls)/sizeof(snd_kcontrol_new_t))
1903 static snd_kcontrol_new_t snd_cs4231_controls[] = {
1904 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1905 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1906 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1907 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1908 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1909 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1910 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1911 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1912 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1913 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1914 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1915 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1916 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1918 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1919 .name = "Capture Source",
1920 .info = snd_cs4231_info_mux,
1921 .get = snd_cs4231_get_mux,
1922 .put = snd_cs4231_put_mux,
1924 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1925 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1926 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1)
1929 int snd_cs4231_mixer(cs4231_t *chip)
1935 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1939 strcpy(card->mixername, chip->pcm->name);
1941 for (idx = 0; idx < CS4231_CONTROLS; idx++) {
1942 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4231_controls[idx], chip))) < 0)
1948 EXPORT_SYMBOL(snd_cs4231_out);
1949 EXPORT_SYMBOL(snd_cs4231_in);
1950 EXPORT_SYMBOL(snd_cs4231_outm);
1951 EXPORT_SYMBOL(snd_cs4236_ext_out);
1952 EXPORT_SYMBOL(snd_cs4236_ext_in);
1953 EXPORT_SYMBOL(snd_cs4231_mce_up);
1954 EXPORT_SYMBOL(snd_cs4231_mce_down);
1955 EXPORT_SYMBOL(snd_cs4231_interrupt);
1956 EXPORT_SYMBOL(snd_cs4231_chip_id);
1957 EXPORT_SYMBOL(snd_cs4231_create);
1958 EXPORT_SYMBOL(snd_cs4231_pcm);
1959 EXPORT_SYMBOL(snd_cs4231_mixer);
1960 EXPORT_SYMBOL(snd_cs4231_timer);
1961 EXPORT_SYMBOL(snd_cs4231_info_single);
1962 EXPORT_SYMBOL(snd_cs4231_get_single);
1963 EXPORT_SYMBOL(snd_cs4231_put_single);
1964 EXPORT_SYMBOL(snd_cs4231_info_double);
1965 EXPORT_SYMBOL(snd_cs4231_get_double);
1966 EXPORT_SYMBOL(snd_cs4231_put_double);
1972 static int __init alsa_cs4231_init(void)
1977 static void __exit alsa_cs4231_exit(void)
1981 module_init(alsa_cs4231_init)
1982 module_exit(alsa_cs4231_exit)