vserver 1.9.3
[linux-2.6.git] / sound / isa / cs423x / cs4231_lib.c
1 /*
2  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3  *  Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
4  *
5  *  Bugs:
6  *     - sometimes record brokes playback with WSS portion of 
7  *       Yamaha OPL3-SA3 chip
8  *     - CS4231 (GUS MAX) - still trouble with occasional noises
9  *                        - broken initialization?
10  *
11  *   This program is free software; you can redistribute it and/or modify
12  *   it under the terms of the GNU General Public License as published by
13  *   the Free Software Foundation; either version 2 of the License, or
14  *   (at your option) any later version.
15  *
16  *   This program is distributed in the hope that it will be useful,
17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  *   GNU General Public License for more details.
20  *
21  *   You should have received a copy of the GNU General Public License
22  *   along with this program; if not, write to the Free Software
23  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
24  *
25  */
26
27 #include <sound/driver.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/slab.h>
33 #include <linux/ioport.h>
34 #include <sound/core.h>
35 #include <sound/cs4231.h>
36 #include <sound/pcm_params.h>
37
38 #include <asm/io.h>
39 #include <asm/dma.h>
40 #include <asm/irq.h>
41
42 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
43 MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
44 MODULE_LICENSE("GPL");
45
46 #if 0
47 #define SNDRV_DEBUG_MCE
48 #endif
49
50 /*
51  *  Some variables
52  */
53
54 static unsigned char freq_bits[14] = {
55         /* 5510 */      0x00 | CS4231_XTAL2,
56         /* 6620 */      0x0E | CS4231_XTAL2,
57         /* 8000 */      0x00 | CS4231_XTAL1,
58         /* 9600 */      0x0E | CS4231_XTAL1,
59         /* 11025 */     0x02 | CS4231_XTAL2,
60         /* 16000 */     0x02 | CS4231_XTAL1,
61         /* 18900 */     0x04 | CS4231_XTAL2,
62         /* 22050 */     0x06 | CS4231_XTAL2,
63         /* 27042 */     0x04 | CS4231_XTAL1,
64         /* 32000 */     0x06 | CS4231_XTAL1,
65         /* 33075 */     0x0C | CS4231_XTAL2,
66         /* 37800 */     0x08 | CS4231_XTAL2,
67         /* 44100 */     0x0A | CS4231_XTAL2,
68         /* 48000 */     0x0C | CS4231_XTAL1
69 };
70
71 static unsigned int rates[14] = {
72         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
73         27042, 32000, 33075, 37800, 44100, 48000
74 };
75
76 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
77         .count = 14,
78         .list = rates,
79         .mask = 0,
80 };
81
82 static int snd_cs4231_xrate(snd_pcm_runtime_t *runtime)
83 {
84         return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
85 }
86
87 static unsigned char snd_cs4231_original_image[32] =
88 {
89         0x00,                   /* 00/00 - lic */
90         0x00,                   /* 01/01 - ric */
91         0x9f,                   /* 02/02 - la1ic */
92         0x9f,                   /* 03/03 - ra1ic */
93         0x9f,                   /* 04/04 - la2ic */
94         0x9f,                   /* 05/05 - ra2ic */
95         0xbf,                   /* 06/06 - loc */
96         0xbf,                   /* 07/07 - roc */
97         0x20,                   /* 08/08 - pdfr */
98         CS4231_AUTOCALIB,       /* 09/09 - ic */
99         0x00,                   /* 0a/10 - pc */
100         0x00,                   /* 0b/11 - ti */
101         CS4231_MODE2,           /* 0c/12 - mi */
102         0xfc,                   /* 0d/13 - lbc */
103         0x00,                   /* 0e/14 - pbru */
104         0x00,                   /* 0f/15 - pbrl */
105         0x80,                   /* 10/16 - afei */
106         0x01,                   /* 11/17 - afeii */
107         0x9f,                   /* 12/18 - llic */
108         0x9f,                   /* 13/19 - rlic */
109         0x00,                   /* 14/20 - tlb */
110         0x00,                   /* 15/21 - thb */
111         0x00,                   /* 16/22 - la3mic/reserved */
112         0x00,                   /* 17/23 - ra3mic/reserved */
113         0x00,                   /* 18/24 - afs */
114         0x00,                   /* 19/25 - lamoc/version */
115         0xcf,                   /* 1a/26 - mioc */
116         0x00,                   /* 1b/27 - ramoc/reserved */
117         0x20,                   /* 1c/28 - cdfr */
118         0x00,                   /* 1d/29 - res4 */
119         0x00,                   /* 1e/30 - cbru */
120         0x00,                   /* 1f/31 - cbrl */
121 };
122
123 /*
124  *  Basic I/O functions
125  */
126
127 #if !defined(EBUS_SUPPORT) && !defined(SBUS_SUPPORT)
128 #define __CS4231_INLINE__ inline
129 #else
130 #define __CS4231_INLINE__ /* nothing */
131 #endif
132
133 static __CS4231_INLINE__ void cs4231_outb(cs4231_t *chip, u8 offset, u8 val)
134 {
135 #ifdef EBUS_SUPPORT
136         if (chip->ebus->flag) {
137                 writeb(val, chip->port + (offset << 2));
138         } else {
139 #endif
140 #ifdef SBUS_SUPPORT
141                 sbus_writeb(val, chip->port + (offset << 2));
142 #endif
143 #ifdef EBUS_SUPPORT
144         }
145 #endif
146 #ifdef LEGACY_SUPPORT
147         outb(val, chip->port + offset);
148 #endif
149 }
150
151 static __CS4231_INLINE__ u8 cs4231_inb(cs4231_t *chip, u8 offset)
152 {
153 #ifdef EBUS_SUPPORT
154         if (chip->ebus_flag) {
155                 return readb(chip->port + (offset << 2));
156         } else {
157 #endif
158 #ifdef SBUS_SUPPORT
159                 return sbus_readb(chip->port + (offset << 2));
160 #endif
161 #ifdef EBUS_SUPPORT
162         }
163 #endif
164 #ifdef LEGACY_SUPPORT
165         return inb(chip->port + offset);
166 #endif
167 }
168
169 void snd_cs4231_outm(cs4231_t *chip, unsigned char reg,
170                      unsigned char mask, unsigned char value)
171 {
172         int timeout;
173         unsigned char tmp;
174
175         for (timeout = 250;
176              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
177              timeout--)
178                 udelay(100);
179 #ifdef CONFIG_SND_DEBUG
180         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
181                 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
182 #endif
183         if (chip->calibrate_mute) {
184                 chip->image[reg] &= mask;
185                 chip->image[reg] |= value;
186         } else {
187                 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
188                 mb();
189                 tmp = (chip->image[reg] & mask) | value;
190                 cs4231_outb(chip, CS4231P(REG), tmp);
191                 chip->image[reg] = tmp;
192                 mb();
193         }
194 }
195
196 static void snd_cs4231_dout(cs4231_t *chip, unsigned char reg, unsigned char value)
197 {
198         int timeout;
199
200         for (timeout = 250;
201              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
202              timeout--)
203                 udelay(10);
204         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
205         cs4231_outb(chip, CS4231P(REG), value);
206         mb();
207 }
208
209 void snd_cs4231_out(cs4231_t *chip, unsigned char reg, unsigned char value)
210 {
211         int timeout;
212
213         for (timeout = 250;
214              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
215              timeout--)
216                 udelay(100);
217 #ifdef CONFIG_SND_DEBUG
218         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
219                 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
220 #endif
221         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
222         cs4231_outb(chip, CS4231P(REG), value);
223         chip->image[reg] = value;
224         mb();
225 #if 0
226         printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
227 #endif
228 }
229
230 unsigned char snd_cs4231_in(cs4231_t *chip, unsigned char reg)
231 {
232         int timeout;
233
234         for (timeout = 250;
235              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
236              timeout--)
237                 udelay(100);
238 #ifdef CONFIG_SND_DEBUG
239         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
240                 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
241 #endif
242         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
243         mb();
244         return cs4231_inb(chip, CS4231P(REG));
245 }
246
247 void snd_cs4236_ext_out(cs4231_t *chip, unsigned char reg, unsigned char val)
248 {
249         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
250         cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
251         cs4231_outb(chip, CS4231P(REG), val);
252         chip->eimage[CS4236_REG(reg)] = val;
253 #if 0
254         printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
255 #endif
256 }
257
258 unsigned char snd_cs4236_ext_in(cs4231_t *chip, unsigned char reg)
259 {
260         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
261         cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
262 #if 1
263         return cs4231_inb(chip, CS4231P(REG));
264 #else
265         {
266                 unsigned char res;
267                 res = cs4231_inb(chip, CS4231P(REG));
268                 printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
269                 return res;
270         }
271 #endif
272 }
273
274 #ifdef CONFIG_SND_DEBUG
275
276 void snd_cs4231_debug(cs4231_t *chip)
277 {
278         printk("CS4231 REGS:      INDEX = 0x%02x  ", cs4231_inb(chip, CS4231P(REGSEL)));
279         printk("                 STATUS = 0x%02x\n", cs4231_inb(chip, CS4231P(STATUS)));
280         printk("  0x00: left input      = 0x%02x  ", snd_cs4231_in(chip, 0x00));
281         printk("  0x10: alt 1 (CFIG 2)  = 0x%02x\n", snd_cs4231_in(chip, 0x10));
282         printk("  0x01: right input     = 0x%02x  ", snd_cs4231_in(chip, 0x01));
283         printk("  0x11: alt 2 (CFIG 3)  = 0x%02x\n", snd_cs4231_in(chip, 0x11));
284         printk("  0x02: GF1 left input  = 0x%02x  ", snd_cs4231_in(chip, 0x02));
285         printk("  0x12: left line in    = 0x%02x\n", snd_cs4231_in(chip, 0x12));
286         printk("  0x03: GF1 right input = 0x%02x  ", snd_cs4231_in(chip, 0x03));
287         printk("  0x13: right line in   = 0x%02x\n", snd_cs4231_in(chip, 0x13));
288         printk("  0x04: CD left input   = 0x%02x  ", snd_cs4231_in(chip, 0x04));
289         printk("  0x14: timer low       = 0x%02x\n", snd_cs4231_in(chip, 0x14));
290         printk("  0x05: CD right input  = 0x%02x  ", snd_cs4231_in(chip, 0x05));
291         printk("  0x15: timer high      = 0x%02x\n", snd_cs4231_in(chip, 0x15));
292         printk("  0x06: left output     = 0x%02x  ", snd_cs4231_in(chip, 0x06));
293         printk("  0x16: left MIC (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x16));
294         printk("  0x07: right output    = 0x%02x  ", snd_cs4231_in(chip, 0x07));
295         printk("  0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
296         printk("  0x08: playback format = 0x%02x  ", snd_cs4231_in(chip, 0x08));
297         printk("  0x18: IRQ status      = 0x%02x\n", snd_cs4231_in(chip, 0x18));
298         printk("  0x09: iface (CFIG 1)  = 0x%02x  ", snd_cs4231_in(chip, 0x09));
299         printk("  0x19: left line out   = 0x%02x\n", snd_cs4231_in(chip, 0x19));
300         printk("  0x0a: pin control     = 0x%02x  ", snd_cs4231_in(chip, 0x0a));
301         printk("  0x1a: mono control    = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
302         printk("  0x0b: init & status   = 0x%02x  ", snd_cs4231_in(chip, 0x0b));
303         printk("  0x1b: right line out  = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
304         printk("  0x0c: revision & mode = 0x%02x  ", snd_cs4231_in(chip, 0x0c));
305         printk("  0x1c: record format   = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
306         printk("  0x0d: loopback        = 0x%02x  ", snd_cs4231_in(chip, 0x0d));
307         printk("  0x1d: var freq (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
308         printk("  0x0e: ply upr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0e));
309         printk("  0x1e: ply lwr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
310         printk("  0x0f: rec upr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0f));
311         printk("  0x1f: rec lwr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
312 }
313
314 #endif
315
316 /*
317  *  CS4231 detection / MCE routines
318  */
319
320 static void snd_cs4231_busy_wait(cs4231_t *chip)
321 {
322         int timeout;
323
324         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
325         for (timeout = 5; timeout > 0; timeout--)
326                 cs4231_inb(chip, CS4231P(REGSEL));
327         /* end of cleanup sequence */
328         for (timeout = 250;
329              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
330              timeout--)
331                 udelay(10);
332 }
333
334 void snd_cs4231_mce_up(cs4231_t *chip)
335 {
336         unsigned long flags;
337         int timeout;
338
339         for (timeout = 250; timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT); timeout--)
340                 udelay(100);
341 #ifdef CONFIG_SND_DEBUG
342         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
343                 snd_printk("mce_up - auto calibration time out (0)\n");
344 #endif
345         spin_lock_irqsave(&chip->reg_lock, flags);
346         chip->mce_bit |= CS4231_MCE;
347         timeout = cs4231_inb(chip, CS4231P(REGSEL));
348         if (timeout == 0x80)
349                 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
350         if (!(timeout & CS4231_MCE))
351                 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
352         spin_unlock_irqrestore(&chip->reg_lock, flags);
353 }
354
355 void snd_cs4231_mce_down(cs4231_t *chip)
356 {
357         unsigned long flags;
358         int timeout;
359         signed long time;
360
361         snd_cs4231_busy_wait(chip);
362 #if 0
363         printk("(1) timeout = %i\n", timeout);
364 #endif
365 #ifdef CONFIG_SND_DEBUG
366         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
367                 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
368 #endif
369         spin_lock_irqsave(&chip->reg_lock, flags);
370         chip->mce_bit &= ~CS4231_MCE;
371         timeout = cs4231_inb(chip, CS4231P(REGSEL));
372         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
373         spin_unlock_irqrestore(&chip->reg_lock, flags);
374         if (timeout == 0x80)
375                 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
376         if ((timeout & CS4231_MCE) == 0 ||
377             !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
378                 return;
379         }
380         snd_cs4231_busy_wait(chip);
381
382         /* calibration process */
383
384         for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
385                 udelay(10);
386         if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
387                 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
388                 return;
389         }
390 #if 0
391         printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
392 #endif
393         timeout = HZ / 4 / 2;
394         time = 2;
395         while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
396                 set_current_state(TASK_INTERRUPTIBLE);
397                 time = schedule_timeout(time);
398                 if (time > 0)
399                         continue;
400                 time = 2;
401                 if (--timeout < 0) {
402                         snd_printk("mce_down - auto calibration time out (2)\n");
403                         return;
404                 }
405         }
406 #if 0
407         printk("(3) jiffies = %li\n", jiffies);
408 #endif
409         timeout = HZ / 10 / 2;
410         time = 2;
411         while (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
412                 set_current_state(TASK_INTERRUPTIBLE);          
413                 time = schedule_timeout(time);
414                 if (time > 0)
415                         continue;
416                 time = 2;
417                 if (--timeout < 0) {
418                         snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
419                         return;
420                 }
421         }
422 #if 0
423         printk("(4) jiffies = %li\n", jiffies);
424         snd_printk("mce_down - exit = 0x%x\n", cs4231_inb(chip, CS4231P(REGSEL)));
425 #endif
426 }
427
428 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
429 {
430         switch (format & 0xe0) {
431         case CS4231_LINEAR_16:
432         case CS4231_LINEAR_16_BIG:
433                 size >>= 1;
434                 break;
435         case CS4231_ADPCM_16:
436                 return size >> 2;
437         }
438         if (format & CS4231_STEREO)
439                 size >>= 1;
440         return size;
441 }
442
443 static int snd_cs4231_trigger(snd_pcm_substream_t *substream,
444                               int cmd)
445 {
446         cs4231_t *chip = snd_pcm_substream_chip(substream);
447         int result = 0;
448         unsigned int what;
449         struct list_head *pos;
450         snd_pcm_substream_t *s;
451         int do_start;
452
453 #if 0
454         printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, cs4231_inb(chip, CS4231P(STATUS)));
455 #endif
456
457         switch (cmd) {
458         case SNDRV_PCM_TRIGGER_START:
459         case SNDRV_PCM_TRIGGER_RESUME:
460                 do_start = 1; break;
461         case SNDRV_PCM_TRIGGER_STOP:
462         case SNDRV_PCM_TRIGGER_SUSPEND:
463                 do_start = 0; break;
464         default:
465                 return -EINVAL;
466         }
467
468         what = 0;
469         snd_pcm_group_for_each(pos, substream) {
470                 s = snd_pcm_group_substream_entry(pos);
471                 if (s == chip->playback_substream) {
472                         what |= CS4231_PLAYBACK_ENABLE;
473                         snd_pcm_trigger_done(s, substream);
474                 } else if (s == chip->capture_substream) {
475                         what |= CS4231_RECORD_ENABLE;
476                         snd_pcm_trigger_done(s, substream);
477                 }
478         }
479         spin_lock(&chip->reg_lock);
480         if (do_start) {
481                 chip->image[CS4231_IFACE_CTRL] |= what;
482                 if (chip->trigger)
483                         chip->trigger(chip, what, 1);
484         } else {
485                 chip->image[CS4231_IFACE_CTRL] &= ~what;
486                 if (chip->trigger)
487                         chip->trigger(chip, what, 0);
488         }
489         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
490         spin_unlock(&chip->reg_lock);
491 #if 0
492         snd_cs4231_debug(chip);
493 #endif
494         return result;
495 }
496
497 /*
498  *  CODEC I/O
499  */
500
501 static unsigned char snd_cs4231_get_rate(unsigned int rate)
502 {
503         int i;
504
505         for (i = 0; i < 14; i++)
506                 if (rate == rates[i])
507                         return freq_bits[i];
508         // snd_BUG();
509         return freq_bits[13];
510 }
511
512 static unsigned char snd_cs4231_get_format(cs4231_t *chip,
513                                            int format,
514                                            int channels)
515 {
516         unsigned char rformat;
517
518         rformat = CS4231_LINEAR_8;
519         switch (format) {
520         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
521         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
522         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
523         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
524         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
525         }
526         if (channels > 1)
527                 rformat |= CS4231_STEREO;
528 #if 0
529         snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
530 #endif
531         return rformat;
532 }
533
534 static void snd_cs4231_calibrate_mute(cs4231_t *chip, int mute)
535 {
536         unsigned long flags;
537
538         mute = mute ? 1 : 0;
539         spin_lock_irqsave(&chip->reg_lock, flags);
540         if (chip->calibrate_mute == mute) {
541                 spin_unlock_irqrestore(&chip->reg_lock, flags);
542                 return;
543         }
544         if (!mute) {
545                 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, chip->image[CS4231_LEFT_INPUT]);
546                 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, chip->image[CS4231_RIGHT_INPUT]);
547                 snd_cs4231_dout(chip, CS4231_LOOPBACK, chip->image[CS4231_LOOPBACK]);
548         }
549         snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
550         snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
551         snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
552         snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
553         snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
554         snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
555         snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
556         snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
557         snd_cs4231_dout(chip, CS4231_MONO_CTRL, mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
558         if (chip->hardware == CS4231_HW_INTERWAVE) {
559                 snd_cs4231_dout(chip, CS4231_LEFT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_LEFT_MIC_INPUT]);
560                 snd_cs4231_dout(chip, CS4231_RIGHT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_MIC_INPUT]);               
561                 snd_cs4231_dout(chip, CS4231_LINE_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_LEFT_OUTPUT]);
562                 snd_cs4231_dout(chip, CS4231_LINE_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_RIGHT_OUTPUT]);
563         }
564         chip->calibrate_mute = mute;
565         spin_unlock_irqrestore(&chip->reg_lock, flags);
566 }
567
568 static void snd_cs4231_playback_format(cs4231_t *chip,
569                                        snd_pcm_hw_params_t *params,
570                                        unsigned char pdfr)
571 {
572         unsigned long flags;
573         int full_calib = 1;
574
575         down(&chip->mce_mutex);
576         snd_cs4231_calibrate_mute(chip, 1);
577         if (chip->hardware == CS4231_HW_CS4231A ||
578             (chip->hardware & CS4231_HW_CS4232_MASK)) {
579                 spin_lock_irqsave(&chip->reg_lock, flags);
580                 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) {      /* rate is same? */
581                         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x10);
582                         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
583                         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
584                         udelay(100); /* Fixes audible clicks at least on GUS MAX */
585                         full_calib = 0;
586                 }
587                 spin_unlock_irqrestore(&chip->reg_lock, flags);
588         }
589         if (full_calib) {
590                 snd_cs4231_mce_up(chip);
591                 spin_lock_irqsave(&chip->reg_lock, flags);
592                 if (chip->hardware != CS4231_HW_INTERWAVE && !chip->single_dma) {
593                         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
594                                         (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
595                                         (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
596                                         pdfr);
597                 } else {
598                         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
599                 }
600                 spin_unlock_irqrestore(&chip->reg_lock, flags);
601                 snd_cs4231_mce_down(chip);
602         }
603         snd_cs4231_calibrate_mute(chip, 0);
604         up(&chip->mce_mutex);
605 }
606
607 static void snd_cs4231_capture_format(cs4231_t *chip,
608                                       snd_pcm_hw_params_t *params,
609                                       unsigned char cdfr)
610 {
611         unsigned long flags;
612         int full_calib = 1;
613
614         down(&chip->mce_mutex);
615         snd_cs4231_calibrate_mute(chip, 1);
616         if (chip->hardware == CS4231_HW_CS4231A ||
617             (chip->hardware & CS4231_HW_CS4232_MASK)) {
618                 spin_lock_irqsave(&chip->reg_lock, flags);
619                 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) ||      /* rate is same? */
620                     (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
621                         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x20);
622                         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT] = cdfr);
623                         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
624                         full_calib = 0;
625                 }
626                 spin_unlock_irqrestore(&chip->reg_lock, flags);
627         }
628         if (full_calib) {
629                 snd_cs4231_mce_up(chip);
630                 spin_lock_irqsave(&chip->reg_lock, flags);
631                 if (chip->hardware != CS4231_HW_INTERWAVE) {
632                         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
633                                 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
634                                                ((chip->single_dma ? cdfr : chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
635                                                (cdfr & 0x0f));
636                                 spin_unlock_irqrestore(&chip->reg_lock, flags);
637                                 snd_cs4231_mce_down(chip);
638                                 snd_cs4231_mce_up(chip);
639                                 spin_lock_irqsave(&chip->reg_lock, flags);
640                         }
641                 }
642                 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
643                 spin_unlock_irqrestore(&chip->reg_lock, flags);
644                 snd_cs4231_mce_down(chip);
645         }
646         snd_cs4231_calibrate_mute(chip, 0);
647         up(&chip->mce_mutex);
648 }
649
650 /*
651  *  Timer interface
652  */
653
654 static unsigned long snd_cs4231_timer_resolution(snd_timer_t * timer)
655 {
656         cs4231_t *chip = snd_timer_chip(timer);
657         if (chip->hardware & CS4231_HW_CS4236B_MASK)
658                 return 14467;
659         else
660                 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
661 }
662
663 static int snd_cs4231_timer_start(snd_timer_t * timer)
664 {
665         unsigned long flags;
666         unsigned int ticks;
667         cs4231_t *chip = snd_timer_chip(timer);
668         spin_lock_irqsave(&chip->reg_lock, flags);
669         ticks = timer->sticks;
670         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
671             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
672             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
673                 snd_cs4231_out(chip, CS4231_TIMER_HIGH, chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8));
674                 snd_cs4231_out(chip, CS4231_TIMER_LOW, chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks);
675                 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
676         }
677         spin_unlock_irqrestore(&chip->reg_lock, flags);
678         return 0;
679 }
680
681 static int snd_cs4231_timer_stop(snd_timer_t * timer)
682 {
683         unsigned long flags;
684         cs4231_t *chip = snd_timer_chip(timer);
685         spin_lock_irqsave(&chip->reg_lock, flags);
686         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
687         spin_unlock_irqrestore(&chip->reg_lock, flags);
688         return 0;
689 }
690
691 static void snd_cs4231_init(cs4231_t *chip)
692 {
693         unsigned long flags;
694
695         snd_cs4231_mce_down(chip);
696
697 #ifdef SNDRV_DEBUGq_MCE
698         snd_printk("init: (1)\n");
699 #endif
700         snd_cs4231_mce_up(chip);
701         spin_lock_irqsave(&chip->reg_lock, flags);
702         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
703                              CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
704                              CS4231_CALIB_MODE);
705         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
706         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
707         spin_unlock_irqrestore(&chip->reg_lock, flags);
708         snd_cs4231_mce_down(chip);
709
710 #ifdef SNDRV_DEBUG_MCE
711         snd_printk("init: (2)\n");
712 #endif
713
714         snd_cs4231_mce_up(chip);
715         spin_lock_irqsave(&chip->reg_lock, flags);
716         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
717         spin_unlock_irqrestore(&chip->reg_lock, flags);
718         snd_cs4231_mce_down(chip);
719
720 #ifdef SNDRV_DEBUG_MCE
721         snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
722 #endif
723
724         spin_lock_irqsave(&chip->reg_lock, flags);
725         snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
726         spin_unlock_irqrestore(&chip->reg_lock, flags);
727
728         snd_cs4231_mce_up(chip);
729         spin_lock_irqsave(&chip->reg_lock, flags);
730         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
731         spin_unlock_irqrestore(&chip->reg_lock, flags);
732         snd_cs4231_mce_down(chip);
733
734 #ifdef SNDRV_DEBUG_MCE
735         snd_printk("init: (4)\n");
736 #endif
737
738         snd_cs4231_mce_up(chip);
739         spin_lock_irqsave(&chip->reg_lock, flags);
740         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
741         spin_unlock_irqrestore(&chip->reg_lock, flags);
742         snd_cs4231_mce_down(chip);
743
744 #ifdef SNDRV_DEBUG_MCE
745         snd_printk("init: (5)\n");
746 #endif
747 }
748
749 static int snd_cs4231_open(cs4231_t *chip, unsigned int mode)
750 {
751         unsigned long flags;
752
753         down(&chip->open_mutex);
754         if ((chip->mode & mode) ||
755             ((chip->mode & CS4231_MODE_OPEN) && chip->single_dma)) {
756                 up(&chip->open_mutex);
757                 return -EAGAIN;
758         }
759         if (chip->mode & CS4231_MODE_OPEN) {
760                 chip->mode |= mode;
761                 up(&chip->open_mutex);
762                 return 0;
763         }
764         /* ok. now enable and ack CODEC IRQ */
765         spin_lock_irqsave(&chip->reg_lock, flags);
766         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
767                        CS4231_RECORD_IRQ |
768                        CS4231_TIMER_IRQ);
769         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
770         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
771         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
772         chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
773         snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
774         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
775                        CS4231_RECORD_IRQ |
776                        CS4231_TIMER_IRQ);
777         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
778         spin_unlock_irqrestore(&chip->reg_lock, flags);
779
780         chip->mode = mode;
781         up(&chip->open_mutex);
782         return 0;
783 }
784
785 static void snd_cs4231_close(cs4231_t *chip, unsigned int mode)
786 {
787         unsigned long flags;
788
789         down(&chip->open_mutex);
790         chip->mode &= ~mode;
791         if (chip->mode & CS4231_MODE_OPEN) {
792                 up(&chip->open_mutex);
793                 return;
794         }
795         snd_cs4231_calibrate_mute(chip, 1);
796
797         /* disable IRQ */
798         spin_lock_irqsave(&chip->reg_lock, flags);
799         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
800         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
801         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
802         chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
803         snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
804
805         /* now disable record & playback */
806
807         if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
808                                                CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
809                 spin_unlock_irqrestore(&chip->reg_lock, flags);
810                 snd_cs4231_mce_up(chip);
811                 spin_lock_irqsave(&chip->reg_lock, flags);
812                 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
813                                                      CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
814                 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
815                 spin_unlock_irqrestore(&chip->reg_lock, flags);
816                 snd_cs4231_mce_down(chip);
817                 spin_lock_irqsave(&chip->reg_lock, flags);
818         }
819
820         /* clear IRQ again */
821         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
822         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
823         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
824         spin_unlock_irqrestore(&chip->reg_lock, flags);
825
826         snd_cs4231_calibrate_mute(chip, 0);
827
828         chip->mode = 0;
829         up(&chip->open_mutex);
830 }
831
832 /*
833  *  timer open/close
834  */
835
836 static int snd_cs4231_timer_open(snd_timer_t * timer)
837 {
838         cs4231_t *chip = snd_timer_chip(timer);
839         snd_cs4231_open(chip, CS4231_MODE_TIMER);
840         return 0;
841 }
842
843 static int snd_cs4231_timer_close(snd_timer_t * timer)
844 {
845         cs4231_t *chip = snd_timer_chip(timer);
846         snd_cs4231_close(chip, CS4231_MODE_TIMER);
847         return 0;
848 }
849
850 static struct _snd_timer_hardware snd_cs4231_timer_table =
851 {
852         .flags =        SNDRV_TIMER_HW_AUTO,
853         .resolution =   9945,
854         .ticks =        65535,
855         .open =         snd_cs4231_timer_open,
856         .close =        snd_cs4231_timer_close,
857         .c_resolution = snd_cs4231_timer_resolution,
858         .start =        snd_cs4231_timer_start,
859         .stop =         snd_cs4231_timer_stop,
860 };
861
862 /*
863  *  ok.. exported functions..
864  */
865
866 static int snd_cs4231_playback_hw_params(snd_pcm_substream_t * substream,
867                                          snd_pcm_hw_params_t * hw_params)
868 {
869         cs4231_t *chip = snd_pcm_substream_chip(substream);
870         unsigned char new_pdfr;
871         int err;
872
873         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
874                 return err;
875         new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
876                    snd_cs4231_get_rate(params_rate(hw_params));
877         chip->set_playback_format(chip, hw_params, new_pdfr);
878         return 0;
879 }
880
881 static int snd_cs4231_playback_hw_free(snd_pcm_substream_t * substream)
882 {
883         return snd_pcm_lib_free_pages(substream);
884 }
885
886 #ifdef LEGACY_SUPPORT
887 static int snd_cs4231_playback_prepare(snd_pcm_substream_t * substream)
888 {
889         cs4231_t *chip = snd_pcm_substream_chip(substream);
890         snd_pcm_runtime_t *runtime = substream->runtime;
891         unsigned long flags;
892         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
893         unsigned int count = snd_pcm_lib_period_bytes(substream);
894
895         spin_lock_irqsave(&chip->reg_lock, flags);
896         chip->p_dma_size = size;
897         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
898         snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
899         count = snd_cs4231_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
900         snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
901         snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
902         spin_unlock_irqrestore(&chip->reg_lock, flags);
903 #if 0
904         snd_cs4231_debug(chip);
905 #endif
906         return 0;
907 }
908 #endif /* LEGACY_SUPPORT */
909
910 static int snd_cs4231_capture_hw_params(snd_pcm_substream_t * substream,
911                                         snd_pcm_hw_params_t * hw_params)
912 {
913         cs4231_t *chip = snd_pcm_substream_chip(substream);
914         unsigned char new_cdfr;
915         int err;
916
917         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
918                 return err;
919         new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
920                    snd_cs4231_get_rate(params_rate(hw_params));
921         chip->set_capture_format(chip, hw_params, new_cdfr);
922         return 0;
923 }
924
925 static int snd_cs4231_capture_hw_free(snd_pcm_substream_t * substream)
926 {
927         return snd_pcm_lib_free_pages(substream);
928 }
929
930 #ifdef LEGACY_SUPPORT
931 static int snd_cs4231_capture_prepare(snd_pcm_substream_t * substream)
932 {
933         cs4231_t *chip = snd_pcm_substream_chip(substream);
934         snd_pcm_runtime_t *runtime = substream->runtime;
935         unsigned long flags;
936         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
937         unsigned int count = snd_pcm_lib_period_bytes(substream);
938
939         spin_lock_irqsave(&chip->reg_lock, flags);
940         chip->c_dma_size = size;
941         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
942         snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
943         count = snd_cs4231_get_count(chip->image[CS4231_REC_FORMAT], count) - 1;
944         if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
945                 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
946                 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
947         } else {
948                 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
949                 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, (unsigned char) (count >> 8));
950         }
951         spin_unlock_irqrestore(&chip->reg_lock, flags);
952         return 0;
953 }
954 #endif
955
956 static void snd_cs4231_overrange(cs4231_t *chip)
957 {
958         unsigned long flags;
959         unsigned char res;
960
961         spin_lock_irqsave(&chip->reg_lock, flags);
962         res = snd_cs4231_in(chip, CS4231_TEST_INIT);
963         spin_unlock_irqrestore(&chip->reg_lock, flags);
964         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
965                 chip->capture_substream->runtime->overrange++;
966 }
967
968 irqreturn_t snd_cs4231_interrupt(int irq, void *dev_id, struct pt_regs *regs)
969 {
970         cs4231_t *chip = dev_id;
971         unsigned char status;
972
973         status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
974         if (status & CS4231_TIMER_IRQ) {
975                 if (chip->timer)
976                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
977         }               
978         if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
979                 if (status & CS4231_PLAYBACK_IRQ) {
980                         if (chip->mode & CS4231_MODE_PLAY) {
981                                 if (chip->playback_substream)
982                                         snd_pcm_period_elapsed(chip->playback_substream);
983                         }
984                         if (chip->mode & CS4231_MODE_RECORD) {
985                                 if (chip->capture_substream) {
986                                         snd_cs4231_overrange(chip);
987                                         snd_pcm_period_elapsed(chip->capture_substream);
988                                 }
989                         }
990                 }
991         } else {
992                 if (status & CS4231_PLAYBACK_IRQ) {
993                         if (chip->playback_substream)
994                                 snd_pcm_period_elapsed(chip->playback_substream);
995                 }
996                 if (status & CS4231_RECORD_IRQ) {
997                         if (chip->capture_substream) {
998                                 snd_cs4231_overrange(chip);
999                                 snd_pcm_period_elapsed(chip->capture_substream);
1000                         }
1001                 }
1002         }
1003
1004         spin_lock(&chip->reg_lock);
1005         snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1006         spin_unlock(&chip->reg_lock);
1007         return IRQ_HANDLED;
1008 }
1009
1010 #ifdef LEGACY_SUPPORT
1011 static snd_pcm_uframes_t snd_cs4231_playback_pointer(snd_pcm_substream_t * substream)
1012 {
1013         cs4231_t *chip = snd_pcm_substream_chip(substream);
1014         size_t ptr;
1015
1016         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1017                 return 0;
1018         ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
1019         return bytes_to_frames(substream->runtime, ptr);
1020 }
1021
1022 static snd_pcm_uframes_t snd_cs4231_capture_pointer(snd_pcm_substream_t * substream)
1023 {
1024         cs4231_t *chip = snd_pcm_substream_chip(substream);
1025         size_t ptr;
1026         
1027         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1028                 return 0;
1029         ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
1030         return bytes_to_frames(substream->runtime, ptr);
1031 }
1032 #endif /* LEGACY_SUPPORT */
1033
1034 /*
1035
1036  */
1037
1038 int snd_cs4231_probe(cs4231_t *chip)
1039 {
1040         unsigned long flags;
1041         int i, id, rev;
1042         unsigned char *ptr;
1043         unsigned int hw;
1044
1045 #if 0
1046         snd_cs4231_debug(chip);
1047 #endif
1048         id = 0;
1049         for (i = 0; i < 50; i++) {
1050                 mb();
1051                 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
1052                         udelay(2000);
1053                 else {
1054                         spin_lock_irqsave(&chip->reg_lock, flags);
1055                         snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1056                         id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1057                         spin_unlock_irqrestore(&chip->reg_lock, flags);
1058                         if (id == 0x0a)
1059                                 break;  /* this is valid value */
1060                 }
1061         }
1062         snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1063         if (id != 0x0a)
1064                 return -ENODEV; /* no valid device found */
1065
1066         if (((hw = chip->hardware) & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1067                 rev = snd_cs4231_in(chip, CS4231_VERSION) & 0xe7;
1068                 snd_printdd("CS4231: VERSION (I25) = 0x%x\n", rev);
1069                 if (rev == 0x80) {
1070                         unsigned char tmp = snd_cs4231_in(chip, 23);
1071                         snd_cs4231_out(chip, 23, ~tmp);
1072                         if (snd_cs4231_in(chip, 23) != tmp)
1073                                 chip->hardware = CS4231_HW_AD1845;
1074                         else
1075                                 chip->hardware = CS4231_HW_CS4231;
1076                 } else if (rev == 0xa0) {
1077                         chip->hardware = CS4231_HW_CS4231A;
1078                 } else if (rev == 0xa2) {
1079                         chip->hardware = CS4231_HW_CS4232;
1080                 } else if (rev == 0xb2) {
1081                         chip->hardware = CS4231_HW_CS4232A;
1082                 } else if (rev == 0x83) {
1083                         chip->hardware = CS4231_HW_CS4236;
1084                 } else if (rev == 0x03) {
1085                         chip->hardware = CS4231_HW_CS4236B;
1086                 } else {
1087                         snd_printk("unknown CS chip with version 0x%x\n", rev);
1088                         return -ENODEV;         /* unknown CS4231 chip? */
1089                 }
1090         }
1091         spin_lock_irqsave(&chip->reg_lock, flags);
1092         cs4231_inb(chip, CS4231P(STATUS));      /* clear any pendings IRQ */
1093         cs4231_outb(chip, CS4231P(STATUS), 0);
1094         mb();
1095         spin_unlock_irqrestore(&chip->reg_lock, flags);
1096
1097         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1098         switch (chip->hardware) {
1099         case CS4231_HW_INTERWAVE:
1100                 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1101                 break;
1102         case CS4231_HW_CS4235:
1103         case CS4231_HW_CS4236B:
1104         case CS4231_HW_CS4237B:
1105         case CS4231_HW_CS4238B:
1106         case CS4231_HW_CS4239:
1107                 if (hw == CS4231_HW_DETECT3)
1108                         chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1109                 else
1110                         chip->hardware = CS4231_HW_CS4236;
1111                 break;
1112         }
1113
1114         chip->image[CS4231_IFACE_CTRL] =
1115             (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1116             (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1117         chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1118         chip->image[CS4231_ALT_FEATURE_2] = chip->hardware == CS4231_HW_INTERWAVE ? 0xc2 : 0x01;
1119         ptr = (unsigned char *) &chip->image;
1120         snd_cs4231_mce_down(chip);
1121         spin_lock_irqsave(&chip->reg_lock, flags);
1122         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1123                 snd_cs4231_out(chip, i, *ptr++);
1124         spin_unlock_irqrestore(&chip->reg_lock, flags);
1125         snd_cs4231_mce_up(chip);
1126         snd_cs4231_mce_down(chip);
1127
1128         mdelay(2);
1129
1130         /* ok.. try check hardware version for CS4236+ chips */
1131         if ((hw & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1132                 if (chip->hardware == CS4231_HW_CS4236B) {
1133                         rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1134                         snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1135                         id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1136                         snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1137                         snd_printdd("CS4231: ext version; rev = 0x%x, id = 0x%x\n", rev, id);
1138                         if ((id & 0x1f) == 0x1d) {      /* CS4235 */
1139                                 chip->hardware = CS4231_HW_CS4235;
1140                                 switch (id >> 5) {
1141                                 case 4:
1142                                 case 5:
1143                                 case 6:
1144                                         break;
1145                                 default:
1146                                         snd_printk("unknown CS4235 chip (enhanced version = 0x%x)\n", id);
1147                                 }
1148                         } else if ((id & 0x1f) == 0x0b) {       /* CS4236/B */
1149                                 switch (id >> 5) {
1150                                 case 4:
1151                                 case 5:
1152                                 case 6:
1153                                 case 7:
1154                                         chip->hardware = CS4231_HW_CS4236B;
1155                                         break;
1156                                 default:
1157                                         snd_printk("unknown CS4236 chip (enhanced version = 0x%x)\n", id);
1158                                 }
1159                         } else if ((id & 0x1f) == 0x08) {       /* CS4237B */
1160                                 chip->hardware = CS4231_HW_CS4237B;
1161                                 switch (id >> 5) {
1162                                 case 4:
1163                                 case 5:
1164                                 case 6:
1165                                 case 7:
1166                                         break;
1167                                 default:
1168                                         snd_printk("unknown CS4237B chip (enhanced version = 0x%x)\n", id);
1169                                 }
1170                         } else if ((id & 0x1f) == 0x09) {       /* CS4238B */
1171                                 chip->hardware = CS4231_HW_CS4238B;
1172                                 switch (id >> 5) {
1173                                 case 5:
1174                                 case 6:
1175                                 case 7:
1176                                         break;
1177                                 default:
1178                                         snd_printk("unknown CS4238B chip (enhanced version = 0x%x)\n", id);
1179                                 }
1180                         } else if ((id & 0x1f) == 0x1e) {       /* CS4239 */
1181                                 chip->hardware = CS4231_HW_CS4239;
1182                                 switch (id >> 5) {
1183                                 case 4:
1184                                 case 5:
1185                                 case 6:
1186                                         break;
1187                                 default:
1188                                         snd_printk("unknown CS4239 chip (enhanced version = 0x%x)\n", id);
1189                                 }
1190                         } else {
1191                                 snd_printk("unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n", id);
1192                         }
1193                 }
1194         }
1195         return 0;               /* all things are ok.. */
1196 }
1197
1198 /*
1199
1200  */
1201
1202 static snd_pcm_hardware_t snd_cs4231_playback =
1203 {
1204         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1205                                  SNDRV_PCM_INFO_MMAP_VALID |
1206                                  SNDRV_PCM_INFO_RESUME |
1207                                  SNDRV_PCM_INFO_SYNC_START),
1208         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1209                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1210         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1211         .rate_min =             5510,
1212         .rate_max =             48000,
1213         .channels_min =         1,
1214         .channels_max =         2,
1215         .buffer_bytes_max =     (128*1024),
1216         .period_bytes_min =     64,
1217         .period_bytes_max =     (128*1024),
1218         .periods_min =          1,
1219         .periods_max =          1024,
1220         .fifo_size =            0,
1221 };
1222
1223 static snd_pcm_hardware_t snd_cs4231_capture =
1224 {
1225         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1226                                  SNDRV_PCM_INFO_MMAP_VALID |
1227                                  SNDRV_PCM_INFO_RESUME |
1228                                  SNDRV_PCM_INFO_SYNC_START),
1229         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1230                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1231         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1232         .rate_min =             5510,
1233         .rate_max =             48000,
1234         .channels_min =         1,
1235         .channels_max =         2,
1236         .buffer_bytes_max =     (128*1024),
1237         .period_bytes_min =     64,
1238         .period_bytes_max =     (128*1024),
1239         .periods_min =          1,
1240         .periods_max =          1024,
1241         .fifo_size =            0,
1242 };
1243
1244 /*
1245
1246  */
1247
1248 static int snd_cs4231_playback_open(snd_pcm_substream_t * substream)
1249 {
1250         cs4231_t *chip = snd_pcm_substream_chip(substream);
1251         snd_pcm_runtime_t *runtime = substream->runtime;
1252         int err;
1253
1254         runtime->hw = snd_cs4231_playback;
1255
1256         /* hardware bug in InterWave chipset */
1257         if (chip->hardware == CS4231_HW_INTERWAVE && chip->dma1 > 3)
1258                 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_MU_LAW;
1259         
1260         /* hardware limitation of cheap chips */
1261         if (chip->hardware == CS4231_HW_CS4235 ||
1262             chip->hardware == CS4231_HW_CS4239)
1263                 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1264
1265 #ifdef LEGACY_SUPPORT
1266         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1267         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1268
1269         if (chip->claim_dma) {
1270                 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0)
1271                         return err;
1272         }
1273 #endif
1274
1275         if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1276 #ifdef LEGACY_SUPPORT
1277                 if (chip->release_dma)
1278                         chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1279 #endif
1280                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1281                 return err;
1282         }
1283         chip->playback_substream = substream;
1284 #if defined(SBUS_SUPPORT) || defined(EBUS_SUPPORT)
1285         chip->p_periods_sent = 0;
1286 #endif
1287         snd_pcm_set_sync(substream);
1288         chip->rate_constraint(runtime);
1289         return 0;
1290 }
1291
1292 static int snd_cs4231_capture_open(snd_pcm_substream_t * substream)
1293 {
1294         cs4231_t *chip = snd_pcm_substream_chip(substream);
1295         snd_pcm_runtime_t *runtime = substream->runtime;
1296         int err;
1297
1298         runtime->hw = snd_cs4231_capture;
1299
1300         /* hardware limitation of cheap chips */
1301         if (chip->hardware == CS4231_HW_CS4235 ||
1302             chip->hardware == CS4231_HW_CS4239)
1303                 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1304
1305 #ifdef LEGACY_SUPPORT
1306         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1307         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1308
1309         if (chip->claim_dma) {
1310                 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0)
1311                         return err;
1312         }
1313 #endif
1314
1315         if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1316 #ifdef LEGACY_SUPPORT
1317                 if (chip->release_dma)
1318                         chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1319 #endif
1320                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1321                 return err;
1322         }
1323         chip->capture_substream = substream;
1324 #if defined(SBUS_SUPPORT) || defined(EBUS_SUPPORT)
1325         chip->c_periods_sent = 0;
1326 #endif
1327         snd_pcm_set_sync(substream);
1328         chip->rate_constraint(runtime);
1329         return 0;
1330 }
1331
1332 static int snd_cs4231_playback_close(snd_pcm_substream_t * substream)
1333 {
1334         cs4231_t *chip = snd_pcm_substream_chip(substream);
1335
1336         chip->playback_substream = NULL;
1337         snd_cs4231_close(chip, CS4231_MODE_PLAY);
1338         return 0;
1339 }
1340
1341 static int snd_cs4231_capture_close(snd_pcm_substream_t * substream)
1342 {
1343         cs4231_t *chip = snd_pcm_substream_chip(substream);
1344
1345         chip->capture_substream = NULL;
1346         snd_cs4231_close(chip, CS4231_MODE_RECORD);
1347         return 0;
1348 }
1349
1350 #ifdef CONFIG_PM
1351
1352 /* lowlevel suspend callback for CS4231 */
1353 static void snd_cs4231_suspend(cs4231_t *chip)
1354 {
1355         int reg;
1356         unsigned long flags;
1357         
1358         spin_lock_irqsave(&chip->reg_lock, flags);
1359         for (reg = 0; reg < 32; reg++)
1360                 chip->image[reg] = snd_cs4231_in(chip, reg);
1361         spin_unlock_irqrestore(&chip->reg_lock, flags);
1362 }
1363
1364 /* lowlevel resume callback for CS4231 */
1365 static void snd_cs4231_resume(cs4231_t *chip)
1366 {
1367         int reg;
1368         unsigned long flags;
1369         int timeout;
1370         
1371         snd_cs4231_mce_up(chip);
1372         spin_lock_irqsave(&chip->reg_lock, flags);
1373         for (reg = 0; reg < 32; reg++) {
1374                 switch (reg) {
1375                 case CS4231_VERSION:
1376                         break;
1377                 default:
1378                         snd_cs4231_out(chip, reg, chip->image[reg]);
1379                         break;
1380                 }
1381         }
1382         spin_unlock_irqrestore(&chip->reg_lock, flags);
1383 #if 0
1384         snd_cs4231_mce_down(chip);
1385 #else
1386         /* The following is a workaround to avoid freeze after resume on TP600E.
1387            This is the first half of copy of snd_cs4231_mce_down(), but doesn't
1388            include rescheduling.  -- iwai
1389            */
1390         snd_cs4231_busy_wait(chip);
1391         spin_lock_irqsave(&chip->reg_lock, flags);
1392         chip->mce_bit &= ~CS4231_MCE;
1393         timeout = cs4231_inb(chip, CS4231P(REGSEL));
1394         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1395         spin_unlock_irqrestore(&chip->reg_lock, flags);
1396         if (timeout == 0x80)
1397                 snd_printk("down [0x%lx]: serious init problem - codec still busy\n", chip->port);
1398         if ((timeout & CS4231_MCE) == 0 ||
1399             !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
1400                 return;
1401         }
1402         snd_cs4231_busy_wait(chip);
1403 #endif
1404 }
1405
1406 static int snd_cs4231_pm_suspend(snd_card_t *card, unsigned int state)
1407 {
1408         cs4231_t *chip = card->pm_private_data;
1409         if (chip->suspend) {
1410                 chip->suspend(chip);
1411                 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1412         }
1413         return 0;
1414 }
1415
1416 static int snd_cs4231_pm_resume(snd_card_t *card, unsigned int state)
1417 {
1418         cs4231_t *chip = card->pm_private_data;
1419         if (chip->resume) {
1420                 chip->resume(chip);
1421                 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1422         }
1423         return 0;
1424 }
1425 #endif /* CONFIG_PM */
1426
1427 #ifdef LEGACY_SUPPORT
1428
1429 static int snd_cs4231_free(cs4231_t *chip)
1430 {
1431         if (chip->res_port) {
1432                 release_resource(chip->res_port);
1433                 kfree_nocheck(chip->res_port);
1434         }
1435         if (chip->res_cport) {
1436                 release_resource(chip->res_cport);
1437                 kfree_nocheck(chip->res_cport);
1438         }
1439         if (chip->irq >= 0) {
1440                 disable_irq(chip->irq);
1441                 if (!(chip->hwshare & CS4231_HWSHARE_IRQ))
1442                         free_irq(chip->irq, (void *) chip);
1443         }
1444         if (!(chip->hwshare & CS4231_HWSHARE_DMA1) && chip->dma1 >= 0) {
1445                 snd_dma_disable(chip->dma1);
1446                 free_dma(chip->dma1);
1447         }
1448         if (!(chip->hwshare & CS4231_HWSHARE_DMA2) && chip->dma2 >= 0 && chip->dma2 != chip->dma1) {
1449                 snd_dma_disable(chip->dma2);
1450                 free_dma(chip->dma2);
1451         }
1452         if (chip->timer)
1453                 snd_device_free(chip->card, chip->timer);
1454         kfree(chip);
1455         return 0;
1456 }
1457
1458 static int snd_cs4231_dev_free(snd_device_t *device)
1459 {
1460         cs4231_t *chip = device->device_data;
1461         return snd_cs4231_free(chip);   
1462 }
1463
1464 #endif /* LEGACY_SUPPORT */
1465
1466 const char *snd_cs4231_chip_id(cs4231_t *chip)
1467 {
1468         switch (chip->hardware) {
1469         case CS4231_HW_CS4231:  return "CS4231";
1470         case CS4231_HW_CS4231A: return "CS4231A";
1471         case CS4231_HW_CS4232:  return "CS4232";
1472         case CS4231_HW_CS4232A: return "CS4232A";
1473         case CS4231_HW_CS4235:  return "CS4235";
1474         case CS4231_HW_CS4236:  return "CS4236";
1475         case CS4231_HW_CS4236B: return "CS4236B";
1476         case CS4231_HW_CS4237B: return "CS4237B";
1477         case CS4231_HW_CS4238B: return "CS4238B";
1478         case CS4231_HW_CS4239:  return "CS4239";
1479         case CS4231_HW_INTERWAVE: return "AMD InterWave";
1480         case CS4231_HW_OPL3SA2: return chip->card->shortname;
1481         case CS4231_HW_AD1845: return "AD1845";
1482         default: return "???";
1483         }
1484 }
1485
1486 static int snd_cs4231_new(snd_card_t * card,
1487                           unsigned short hardware,
1488                           unsigned short hwshare,
1489                           cs4231_t ** rchip)
1490 {
1491         cs4231_t *chip;
1492
1493         *rchip = NULL;
1494         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1495         if (chip == NULL)
1496                 return -ENOMEM;
1497         chip->hardware = hardware;
1498         chip->hwshare = hwshare;
1499
1500         spin_lock_init(&chip->reg_lock);
1501         init_MUTEX(&chip->mce_mutex);
1502         init_MUTEX(&chip->open_mutex);
1503         chip->card = card;
1504         chip->rate_constraint = snd_cs4231_xrate;
1505         chip->set_playback_format = snd_cs4231_playback_format;
1506         chip->set_capture_format = snd_cs4231_capture_format;
1507         memcpy(&chip->image, &snd_cs4231_original_image, sizeof(snd_cs4231_original_image));
1508         
1509         *rchip = chip;
1510         return 0;
1511 }
1512
1513 #ifdef LEGACY_SUPPORT
1514
1515 int snd_cs4231_create(snd_card_t * card,
1516                       unsigned long port,
1517                       unsigned long cport,
1518                       int irq, int dma1, int dma2,
1519                       unsigned short hardware,
1520                       unsigned short hwshare,
1521                       cs4231_t ** rchip)
1522 {
1523         static snd_device_ops_t ops = {
1524                 .dev_free =     snd_cs4231_dev_free,
1525         };
1526         cs4231_t *chip;
1527         int err;
1528
1529         err = snd_cs4231_new(card, hardware, hwshare, &chip);
1530         if (err < 0)
1531                 return err;
1532         
1533         chip->irq = -1;
1534         chip->dma1 = -1;
1535         chip->dma2 = -1;
1536
1537         if ((chip->res_port = request_region(port, 4, "CS4231")) == NULL) {
1538                 snd_printk(KERN_ERR "cs4231: can't grab port 0x%lx\n", port);
1539                 snd_cs4231_free(chip);
1540                 return -EBUSY;
1541         }
1542         chip->port = port;
1543         if ((long)cport >= 0 && (chip->res_cport = request_region(cport, 8, "CS4232 Control")) == NULL) {
1544                 snd_printk(KERN_ERR "cs4231: can't grab control port 0x%lx\n", cport);
1545                 snd_cs4231_free(chip);
1546                 return -ENODEV;
1547         }
1548         chip->cport = cport;
1549         if (!(hwshare & CS4231_HWSHARE_IRQ) && request_irq(irq, snd_cs4231_interrupt, SA_INTERRUPT, "CS4231", (void *) chip)) {
1550                 snd_printk(KERN_ERR "cs4231: can't grab IRQ %d\n", irq);
1551                 snd_cs4231_free(chip);
1552                 return -EBUSY;
1553         }
1554         chip->irq = irq;
1555         if (!(hwshare & CS4231_HWSHARE_DMA1) && request_dma(dma1, "CS4231 - 1")) {
1556                 snd_printk(KERN_ERR "cs4231: can't grab DMA1 %d\n", dma1);
1557                 snd_cs4231_free(chip);
1558                 return -EBUSY;
1559         }
1560         chip->dma1 = dma1;
1561         if (!(hwshare & CS4231_HWSHARE_DMA2) && dma1 != dma2 && dma2 >= 0 && request_dma(dma2, "CS4231 - 2")) {
1562                 snd_printk(KERN_ERR "cs4231: can't grab DMA2 %d\n", dma2);
1563                 snd_cs4231_free(chip);
1564                 return -EBUSY;
1565         }
1566         if (dma1 == dma2 || dma2 < 0) {
1567                 chip->single_dma = 1;
1568                 chip->dma2 = chip->dma1;
1569         } else
1570                 chip->dma2 = dma2;
1571
1572         /* global setup */
1573         if (snd_cs4231_probe(chip) < 0) {
1574                 snd_cs4231_free(chip);
1575                 return -ENODEV;
1576         }
1577         snd_cs4231_init(chip);
1578
1579         if (chip->hardware & CS4231_HW_CS4232_MASK) {
1580                 if (chip->res_cport == NULL)
1581                         snd_printk("CS4232 control port features are not accessible\n");
1582         }
1583
1584         /* Register device */
1585         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1586                 snd_cs4231_free(chip);
1587                 return err;
1588         }
1589
1590 #ifdef CONFIG_PM
1591         /* Power Management */
1592         chip->suspend = snd_cs4231_suspend;
1593         chip->resume = snd_cs4231_resume;
1594         snd_card_set_isa_pm_callback(card, snd_cs4231_pm_suspend, snd_cs4231_pm_resume, chip);
1595 #endif
1596
1597         *rchip = chip;
1598         return 0;
1599 }
1600
1601 #endif /* LEGACY_SUPPORT */
1602
1603 static snd_pcm_ops_t snd_cs4231_playback_ops = {
1604         .open =         snd_cs4231_playback_open,
1605         .close =        snd_cs4231_playback_close,
1606         .ioctl =        snd_pcm_lib_ioctl,
1607         .hw_params =    snd_cs4231_playback_hw_params,
1608         .hw_free =      snd_cs4231_playback_hw_free,
1609         .prepare =      snd_cs4231_playback_prepare,
1610         .trigger =      snd_cs4231_trigger,
1611         .pointer =      snd_cs4231_playback_pointer,
1612 };
1613
1614 static snd_pcm_ops_t snd_cs4231_capture_ops = {
1615         .open =         snd_cs4231_capture_open,
1616         .close =        snd_cs4231_capture_close,
1617         .ioctl =        snd_pcm_lib_ioctl,
1618         .hw_params =    snd_cs4231_capture_hw_params,
1619         .hw_free =      snd_cs4231_capture_hw_free,
1620         .prepare =      snd_cs4231_capture_prepare,
1621         .trigger =      snd_cs4231_trigger,
1622         .pointer =      snd_cs4231_capture_pointer,
1623 };
1624
1625 static void snd_cs4231_pcm_free(snd_pcm_t *pcm)
1626 {
1627         cs4231_t *chip = pcm->private_data;
1628         chip->pcm = NULL;
1629         snd_pcm_lib_preallocate_free_for_all(pcm);
1630 }
1631
1632 int snd_cs4231_pcm(cs4231_t *chip, int device, snd_pcm_t **rpcm)
1633 {
1634         snd_pcm_t *pcm;
1635         int err;
1636
1637         if ((err = snd_pcm_new(chip->card, "CS4231", device, 1, 1, &pcm)) < 0)
1638                 return err;
1639
1640         spin_lock_init(&chip->reg_lock);
1641         init_MUTEX(&chip->mce_mutex);
1642         init_MUTEX(&chip->open_mutex);
1643
1644         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1645         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1646         
1647         /* global setup */
1648         pcm->private_data = chip;
1649         pcm->private_free = snd_cs4231_pcm_free;
1650         pcm->info_flags = 0;
1651         if (chip->single_dma)
1652                 pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1653         if (chip->hardware != CS4231_HW_INTERWAVE)
1654                 pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1655         strcpy(pcm->name, snd_cs4231_chip_id(chip));
1656
1657 #ifdef LEGACY_SUPPORT
1658         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1659                                               snd_dma_isa_data(),
1660                                               64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1661 #else
1662 #  ifdef EBUS_SUPPORT
1663         if (chip->ebus_flag) {
1664                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1665                                                       chip->dev_u.pdev,
1666                                                       64*1024, 128*1024);
1667         } else {
1668 #  endif
1669 #  ifdef SBUS_SUPPORT
1670                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1671                                                       chip->dev_u.sdev,
1672                                                       64*1024, 128*1024);
1673 #  endif
1674 #  ifdef EBUS_SUPPORT
1675         }
1676 #  endif
1677 #endif
1678
1679         chip->pcm = pcm;
1680         if (rpcm)
1681                 *rpcm = pcm;
1682         return 0;
1683 }
1684
1685 static void snd_cs4231_timer_free(snd_timer_t *timer)
1686 {
1687         cs4231_t *chip = timer->private_data;
1688         chip->timer = NULL;
1689 }
1690
1691 int snd_cs4231_timer(cs4231_t *chip, int device, snd_timer_t **rtimer)
1692 {
1693         snd_timer_t *timer;
1694         snd_timer_id_t tid;
1695         int err;
1696
1697         /* Timer initialization */
1698         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1699         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1700         tid.card = chip->card->number;
1701         tid.device = device;
1702         tid.subdevice = 0;
1703         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1704                 return err;
1705         strcpy(timer->name, snd_cs4231_chip_id(chip));
1706         timer->private_data = chip;
1707         timer->private_free = snd_cs4231_timer_free;
1708         timer->hw = snd_cs4231_timer_table;
1709         chip->timer = timer;
1710         if (rtimer)
1711                 *rtimer = timer;
1712         return 0;
1713 }
1714         
1715 /*
1716  *  MIXER part
1717  */
1718
1719 static int snd_cs4231_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1720 {
1721         static char *texts[4] = {
1722                 "Line", "Aux", "Mic", "Mix"
1723         };
1724         static char *opl3sa_texts[4] = {
1725                 "Line", "CD", "Mic", "Mix"
1726         };
1727         static char *gusmax_texts[4] = {
1728                 "Line", "Synth", "Mic", "Mix"
1729         };
1730         char **ptexts = texts;
1731         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1732
1733         snd_assert(chip->card != NULL, return -EINVAL);
1734         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1735         uinfo->count = 2;
1736         uinfo->value.enumerated.items = 4;
1737         if (uinfo->value.enumerated.item > 3)
1738                 uinfo->value.enumerated.item = 3;
1739         if (!strcmp(chip->card->driver, "GUS MAX"))
1740                 ptexts = gusmax_texts;
1741         switch (chip->hardware) {
1742         case CS4231_HW_INTERWAVE: ptexts = gusmax_texts; break;
1743         case CS4231_HW_OPL3SA2: ptexts = opl3sa_texts; break;
1744         }
1745         strcpy(uinfo->value.enumerated.name, ptexts[uinfo->value.enumerated.item]);
1746         return 0;
1747 }
1748
1749 static int snd_cs4231_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1750 {
1751         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1752         unsigned long flags;
1753         
1754         spin_lock_irqsave(&chip->reg_lock, flags);
1755         ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1756         ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1757         spin_unlock_irqrestore(&chip->reg_lock, flags);
1758         return 0;
1759 }
1760
1761 static int snd_cs4231_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1762 {
1763         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1764         unsigned long flags;
1765         unsigned short left, right;
1766         int change;
1767         
1768         if (ucontrol->value.enumerated.item[0] > 3 ||
1769             ucontrol->value.enumerated.item[1] > 3)
1770                 return -EINVAL;
1771         left = ucontrol->value.enumerated.item[0] << 6;
1772         right = ucontrol->value.enumerated.item[1] << 6;
1773         spin_lock_irqsave(&chip->reg_lock, flags);
1774         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1775         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1776         change = left != chip->image[CS4231_LEFT_INPUT] ||
1777                  right != chip->image[CS4231_RIGHT_INPUT];
1778         snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1779         snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1780         spin_unlock_irqrestore(&chip->reg_lock, flags);
1781         return change;
1782 }
1783
1784 int snd_cs4231_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1785 {
1786         int mask = (kcontrol->private_value >> 16) & 0xff;
1787
1788         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1789         uinfo->count = 1;
1790         uinfo->value.integer.min = 0;
1791         uinfo->value.integer.max = mask;
1792         return 0;
1793 }
1794
1795 int snd_cs4231_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1796 {
1797         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1798         unsigned long flags;
1799         int reg = kcontrol->private_value & 0xff;
1800         int shift = (kcontrol->private_value >> 8) & 0xff;
1801         int mask = (kcontrol->private_value >> 16) & 0xff;
1802         int invert = (kcontrol->private_value >> 24) & 0xff;
1803         
1804         spin_lock_irqsave(&chip->reg_lock, flags);
1805         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1806         spin_unlock_irqrestore(&chip->reg_lock, flags);
1807         if (invert)
1808                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1809         return 0;
1810 }
1811
1812 int snd_cs4231_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1813 {
1814         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1815         unsigned long flags;
1816         int reg = kcontrol->private_value & 0xff;
1817         int shift = (kcontrol->private_value >> 8) & 0xff;
1818         int mask = (kcontrol->private_value >> 16) & 0xff;
1819         int invert = (kcontrol->private_value >> 24) & 0xff;
1820         int change;
1821         unsigned short val;
1822         
1823         val = (ucontrol->value.integer.value[0] & mask);
1824         if (invert)
1825                 val = mask - val;
1826         val <<= shift;
1827         spin_lock_irqsave(&chip->reg_lock, flags);
1828         val = (chip->image[reg] & ~(mask << shift)) | val;
1829         change = val != chip->image[reg];
1830         snd_cs4231_out(chip, reg, val);
1831         spin_unlock_irqrestore(&chip->reg_lock, flags);
1832         return change;
1833 }
1834
1835 int snd_cs4231_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1836 {
1837         int mask = (kcontrol->private_value >> 24) & 0xff;
1838
1839         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1840         uinfo->count = 2;
1841         uinfo->value.integer.min = 0;
1842         uinfo->value.integer.max = mask;
1843         return 0;
1844 }
1845
1846 int snd_cs4231_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1847 {
1848         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1849         unsigned long flags;
1850         int left_reg = kcontrol->private_value & 0xff;
1851         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1852         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1853         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1854         int mask = (kcontrol->private_value >> 24) & 0xff;
1855         int invert = (kcontrol->private_value >> 22) & 1;
1856         
1857         spin_lock_irqsave(&chip->reg_lock, flags);
1858         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1859         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1860         spin_unlock_irqrestore(&chip->reg_lock, flags);
1861         if (invert) {
1862                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1863                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1864         }
1865         return 0;
1866 }
1867
1868 int snd_cs4231_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1869 {
1870         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1871         unsigned long flags;
1872         int left_reg = kcontrol->private_value & 0xff;
1873         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1874         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1875         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1876         int mask = (kcontrol->private_value >> 24) & 0xff;
1877         int invert = (kcontrol->private_value >> 22) & 1;
1878         int change;
1879         unsigned short val1, val2;
1880         
1881         val1 = ucontrol->value.integer.value[0] & mask;
1882         val2 = ucontrol->value.integer.value[1] & mask;
1883         if (invert) {
1884                 val1 = mask - val1;
1885                 val2 = mask - val2;
1886         }
1887         val1 <<= shift_left;
1888         val2 <<= shift_right;
1889         spin_lock_irqsave(&chip->reg_lock, flags);
1890         val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1891         val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1892         change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1893         snd_cs4231_out(chip, left_reg, val1);
1894         snd_cs4231_out(chip, right_reg, val2);
1895         spin_unlock_irqrestore(&chip->reg_lock, flags);
1896         return change;
1897 }
1898
1899 static snd_kcontrol_new_t snd_cs4231_controls[] = {
1900 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1901 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1902 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1903 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1904 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1905 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1906 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1907 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1908 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1909 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1910 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1911 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1912 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1913 {
1914         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1915         .name = "Capture Source",
1916         .info = snd_cs4231_info_mux,
1917         .get = snd_cs4231_get_mux,
1918         .put = snd_cs4231_put_mux,
1919 },
1920 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1921 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1922 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1)
1923 };
1924                                         
1925 int snd_cs4231_mixer(cs4231_t *chip)
1926 {
1927         snd_card_t *card;
1928         unsigned int idx;
1929         int err;
1930
1931         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1932
1933         card = chip->card;
1934
1935         strcpy(card->mixername, chip->pcm->name);
1936
1937         for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1938                 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4231_controls[idx], chip))) < 0)
1939                         return err;
1940         }
1941         return 0;
1942 }
1943
1944 EXPORT_SYMBOL(snd_cs4231_out);
1945 EXPORT_SYMBOL(snd_cs4231_in);
1946 EXPORT_SYMBOL(snd_cs4231_outm);
1947 EXPORT_SYMBOL(snd_cs4236_ext_out);
1948 EXPORT_SYMBOL(snd_cs4236_ext_in);
1949 EXPORT_SYMBOL(snd_cs4231_mce_up);
1950 EXPORT_SYMBOL(snd_cs4231_mce_down);
1951 EXPORT_SYMBOL(snd_cs4231_interrupt);
1952 EXPORT_SYMBOL(snd_cs4231_chip_id);
1953 EXPORT_SYMBOL(snd_cs4231_create);
1954 EXPORT_SYMBOL(snd_cs4231_pcm);
1955 EXPORT_SYMBOL(snd_cs4231_mixer);
1956 EXPORT_SYMBOL(snd_cs4231_timer);
1957 EXPORT_SYMBOL(snd_cs4231_info_single);
1958 EXPORT_SYMBOL(snd_cs4231_get_single);
1959 EXPORT_SYMBOL(snd_cs4231_put_single);
1960 EXPORT_SYMBOL(snd_cs4231_info_double);
1961 EXPORT_SYMBOL(snd_cs4231_get_double);
1962 EXPORT_SYMBOL(snd_cs4231_put_double);
1963
1964 /*
1965  *  INIT part
1966  */
1967
1968 static int __init alsa_cs4231_init(void)
1969 {
1970         return 0;
1971 }
1972
1973 static void __exit alsa_cs4231_exit(void)
1974 {
1975 }
1976
1977 module_init(alsa_cs4231_init)
1978 module_exit(alsa_cs4231_exit)