sound/oss/ad1848.c

   1 /*
   2  * sound/ad1848.c
   3  *
   4  * The low level driver for the AD1848/CS4248 codec chip which
   5  * is used for example in the MS Sound System.
   6  *
   7  * The CS4231 which is used in the GUS MAX and some other cards is
   8  * upwards compatible with AD1848 and this driver is able to drive it.
   9  *
  10  * CS4231A and AD1845 are upward compatible with CS4231. However
  11  * the new features of these chips are different.
  12  *
  13  * CS4232 is a PnP audio chip which contains a CS4231A (and SB, MPU).
  14  * CS4232A is an improved version of CS4232.
  15  *
  16  *
  17  *
  18  * Copyright (C) by Hannu Savolainen 1993-1997
  19  *
  20  * OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
  21  * Version 2 (June 1991). See the "COPYING" file distributed with this software
  22  * for more info.
  23  *
  24  *
  25  * Thomas Sailer        : ioctl code reworked (vmalloc/vfree removed)
  26  *                        general sleep/wakeup clean up.
  27  * Alan Cox             : reformatted. Fixed SMP bugs. Moved to kernel alloc/free
  28  *                        of irqs. Use dev_id.
  29  * Christoph Hellwig    : adapted to module_init/module_exit
  30  * Aki Laukkanen        : added power management support
  31  * Arnaldo C. de Melo   : added missing restore_flags in ad1848_resume
  32  * Miguel Freitas       : added ISA PnP support
  33  * Alan Cox             : Added CS4236->4239 identification
  34  * Daniel T. Cobra      : Alernate config/mixer for later chips
  35  * Alan Cox             : Merged chip idents and config code
  36  *
  37  * TODO
  38  *              APM save restore assist code on IBM thinkpad
  39  *
  40  * Status:
  41  *              Tested. Believed fully functional.
  42  */
  43
  44 #include <linux/config.h>
  45 #include <linux/init.h>
  46 #include <linux/interrupt.h>
  47 #include <linux/module.h>
  48 #include <linux/stddef.h>
  49 #include <linux/pm.h>
  50 #include <linux/isapnp.h>
  51 #include <linux/pnp.h>
  52 #include <linux/spinlock.h>
  53
  54 #define DEB(x)
  55 #define DEB1(x)
  56 #include "sound_config.h"
  57
  58 #include "ad1848.h"
  59 #include "ad1848_mixer.h"
  60
  61 typedef struct
  62 {
  63         spinlock_t      lock;
  64         int             base;
  65         int             irq;
  66         int             dma1, dma2;
  67         int             dual_dma;       /* 1, when two DMA channels allocated */
  68         int             subtype;
  69         unsigned char   MCE_bit;
  70         unsigned char   saved_regs[64]; /* Includes extended register space */
  71         int             debug_flag;
  72
  73         int             audio_flags;
  74         int             record_dev, playback_dev;
  75
  76         int             xfer_count;
  77         int             audio_mode;
  78         int             open_mode;
  79         int             intr_active;
  80         char           *chip_name, *name;
  81         int             model;
  82 #define MD_1848         1
  83 #define MD_4231         2
  84 #define MD_4231A        3
  85 #define MD_1845         4
  86 #define MD_4232         5
  87 #define MD_C930         6
  88 #define MD_IWAVE        7
  89 #define MD_4235         8 /* Crystal Audio CS4235  */
  90 #define MD_1845_SSCAPE  9 /* Ensoniq Soundscape PNP*/
  91 #define MD_4236         10 /* 4236 and higher */
  92 #define MD_42xB         11 /* CS 42xB */
  93 #define MD_4239         12 /* CS4239 */
  94
  95         /* Mixer parameters */
  96         int             recmask;
  97         int             supported_devices, orig_devices;
  98         int             supported_rec_devices, orig_rec_devices;
  99         int            *levels;
 100         short           mixer_reroute[32];
 101         int             dev_no;
 102         volatile unsigned long timer_ticks;
 103         int             timer_running;
 104         int             irq_ok;
 105         mixer_ents     *mix_devices;
 106         int             mixer_output_port;
 107
 108         /* Power management */
 109         struct          pm_dev *pmdev;
 110 } ad1848_info;
 111
 112 typedef struct ad1848_port_info
 113 {
 114         int             open_mode;
 115         int             speed;
 116         unsigned char   speed_bits;
 117         int             channels;
 118         int             audio_format;
 119         unsigned char   format_bits;
 120 }
 121 ad1848_port_info;
 122
 123 static struct address_info cfg;
 124 static int nr_ad1848_devs;
 125
 126 int deskpro_xl;
 127 int deskpro_m;
 128 int soundpro;
 129
 130 static volatile signed char irq2dev[17] = {
 131         -1, -1, -1, -1, -1, -1, -1, -1,
 132         -1, -1, -1, -1, -1, -1, -1, -1, -1
 133 };
 134
 135 #ifndef EXCLUDE_TIMERS
 136 static int timer_installed = -1;
 137 #endif
 138
 139 static int loaded;
 140
 141 static int ad_format_mask[13 /*devc->model */ ] =
 142 {
 143         0,
 144         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW,
 145         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 146         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 147         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW,       /* AD1845 */
 148         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 149         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 150         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 151         AFMT_U8 | AFMT_S16_LE /* CS4235 */,
 152         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW        /* Ensoniq Soundscape*/,
 153         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 154         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 155         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM
 156 };
 157
 158 static ad1848_info adev_info[MAX_AUDIO_DEV];
 159
 160 #define io_Index_Addr(d)        ((d)->base)
 161 #define io_Indexed_Data(d)      ((d)->base+1)
 162 #define io_Status(d)            ((d)->base+2)
 163 #define io_Polled_IO(d)         ((d)->base+3)
 164
 165 static struct {
 166      unsigned char flags;
 167 #define CAP_F_TIMER 0x01
 168 } capabilities [10 /*devc->model */ ] = {
 169      {0}
 170     ,{0}           /* MD_1848  */
 171     ,{CAP_F_TIMER} /* MD_4231  */
 172     ,{CAP_F_TIMER} /* MD_4231A */
 173     ,{CAP_F_TIMER} /* MD_1845  */
 174     ,{CAP_F_TIMER} /* MD_4232  */
 175     ,{0}           /* MD_C930  */
 176     ,{CAP_F_TIMER} /* MD_IWAVE */
 177     ,{0}           /* MD_4235  */
 178     ,{CAP_F_TIMER} /* MD_1845_SSCAPE */
 179 };
 180
 181 #ifdef CONFIG_PNP
 182 static int isapnp       = 1;
 183 static int isapnpjump;
 184 static int reverse;
 185
 186 static int audio_activated;
 187 #else
 188 static int isapnp;
 189 #endif
 190
 191
 192
 193 static int      ad1848_open(int dev, int mode);
 194 static void     ad1848_close(int dev);
 195 static void     ad1848_output_block(int dev, unsigned long buf, int count, int intrflag);
 196 static void     ad1848_start_input(int dev, unsigned long buf, int count, int intrflag);
 197 static int      ad1848_prepare_for_output(int dev, int bsize, int bcount);
 198 static int      ad1848_prepare_for_input(int dev, int bsize, int bcount);
 199 static void     ad1848_halt(int dev);
 200 static void     ad1848_halt_input(int dev);
 201 static void     ad1848_halt_output(int dev);
 202 static void     ad1848_trigger(int dev, int bits);
 203 static int      ad1848_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data);
 204
 205 #ifndef EXCLUDE_TIMERS
 206 static int ad1848_tmr_install(int dev);
 207 static void ad1848_tmr_reprogram(int dev);
 208 #endif
 209
 210 static int ad_read(ad1848_info * devc, int reg)
 211 {
 212         int x;
 213         int timeout = 900000;
 214
 215         while (timeout > 0 && inb(devc->base) == 0x80)  /*Are we initializing */
 216                 timeout--;
 217
 218         if(reg < 32)
 219         {
 220                 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
 221                 x = inb(io_Indexed_Data(devc));
 222         }
 223         else
 224         {
 225                 int xreg, xra;
 226
 227                 xreg = (reg & 0xff) - 32;
 228                 xra = (((xreg & 0x0f) << 4) & 0xf0) | 0x08 | ((xreg & 0x10) >> 2);
 229                 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
 230                 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc));
 231                 x = inb(io_Indexed_Data(devc));
 232         }
 233
 234         return x;
 235 }
 236
 237 static void ad_write(ad1848_info * devc, int reg, int data)
 238 {
 239         int timeout = 900000;
 240
 241         while (timeout > 0 && inb(devc->base) == 0x80)  /* Are we initializing */
 242                 timeout--;
 243
 244         if(reg < 32)
 245         {
 246                 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
 247                 outb(((unsigned char) (data & 0xff)), io_Indexed_Data(devc));
 248         }
 249         else
 250         {
 251                 int xreg, xra;
 252
 253                 xreg = (reg & 0xff) - 32;
 254                 xra = (((xreg & 0x0f) << 4) & 0xf0) | 0x08 | ((xreg & 0x10) >> 2);
 255                 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
 256                 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc));
 257                 outb((unsigned char) (data & 0xff), io_Indexed_Data(devc));
 258         }
 259 }
 260
 261 static void wait_for_calibration(ad1848_info * devc)
 262 {
 263         int timeout = 0;
 264
 265         /*
 266          * Wait until the auto calibration process has finished.
 267          *
 268          * 1)       Wait until the chip becomes ready (reads don't return 0x80).
 269          * 2)       Wait until the ACI bit of I11 gets on and then off.
 270          */
 271
 272         timeout = 100000;
 273         while (timeout > 0 && inb(devc->base) == 0x80)
 274                 timeout--;
 275         if (inb(devc->base) & 0x80)
 276                 printk(KERN_WARNING "ad1848: Auto calibration timed out(1).\n");
 277
 278         timeout = 100;
 279         while (timeout > 0 && !(ad_read(devc, 11) & 0x20))
 280                 timeout--;
 281         if (!(ad_read(devc, 11) & 0x20))
 282                 return;
 283
 284         timeout = 80000;
 285         while (timeout > 0 && (ad_read(devc, 11) & 0x20))
 286                 timeout--;
 287         if (ad_read(devc, 11) & 0x20)
 288                 if ( (devc->model != MD_1845) || (devc->model != MD_1845_SSCAPE))
 289                         printk(KERN_WARNING "ad1848: Auto calibration timed out(3).\n");
 290 }
 291
 292 static void ad_mute(ad1848_info * devc)
 293 {
 294         int i;
 295         unsigned char prev;
 296
 297         /*
 298          * Save old register settings and mute output channels
 299          */
 300
 301         for (i = 6; i < 8; i++)
 302         {
 303                 prev = devc->saved_regs[i] = ad_read(devc, i);
 304         }
 305
 306 }
 307
 308 static void ad_unmute(ad1848_info * devc)
 309 {
 310 }
 311
 312 static void ad_enter_MCE(ad1848_info * devc)
 313 {
 314         int timeout = 1000;
 315         unsigned short prev;
 316
 317         while (timeout > 0 && inb(devc->base) == 0x80)  /*Are we initializing */
 318                 timeout--;
 319
 320         devc->MCE_bit = 0x40;
 321         prev = inb(io_Index_Addr(devc));
 322         if (prev & 0x40)
 323         {
 324                 return;
 325         }
 326         outb((devc->MCE_bit), io_Index_Addr(devc));
 327 }
 328
 329 static void ad_leave_MCE(ad1848_info * devc)
 330 {
 331         unsigned char prev, acal;
 332         int timeout = 1000;
 333
 334         while (timeout > 0 && inb(devc->base) == 0x80)  /*Are we initializing */
 335                 timeout--;
 336
 337         acal = ad_read(devc, 9);
 338
 339         devc->MCE_bit = 0x00;
 340         prev = inb(io_Index_Addr(devc));
 341         outb((0x00), io_Index_Addr(devc));      /* Clear the MCE bit */
 342
 343         if ((prev & 0x40) == 0) /* Not in MCE mode */
 344         {
 345                 return;
 346         }
 347         outb((0x00), io_Index_Addr(devc));      /* Clear the MCE bit */
 348         if (acal & 0x08)        /* Auto calibration is enabled */
 349                 wait_for_calibration(devc);
 350 }
 351
 352 static int ad1848_set_recmask(ad1848_info * devc, int mask)
 353 {
 354         unsigned char   recdev;
 355         int             i, n;
 356         unsigned long flags;
 357
 358         mask &= devc->supported_rec_devices;
 359
 360         /* Rename the mixer bits if necessary */
 361         for (i = 0; i < 32; i++)
 362         {
 363                 if (devc->mixer_reroute[i] != i)
 364                 {
 365                         if (mask & (1 << i))
 366                         {
 367                                 mask &= ~(1 << i);
 368                                 mask |= (1 << devc->mixer_reroute[i]);
 369                         }
 370                 }
 371         }
 372
 373         n = 0;
 374         for (i = 0; i < 32; i++)        /* Count selected device bits */
 375                 if (mask & (1 << i))
 376                         n++;
 377
 378         spin_lock_irqsave(&devc->lock,flags);
 379         if (!soundpro) {
 380                 if (n == 0)
 381                         mask = SOUND_MASK_MIC;
 382                 else if (n != 1) {      /* Too many devices selected */
 383                         mask &= ~devc->recmask; /* Filter out active settings */
 384
 385                         n = 0;
 386                         for (i = 0; i < 32; i++)        /* Count selected device bits */
 387                                 if (mask & (1 << i))
 388                                         n++;
 389
 390                         if (n != 1)
 391                                 mask = SOUND_MASK_MIC;
 392                 }
 393                 switch (mask) {
 394                 case SOUND_MASK_MIC:
 395                         recdev = 2;
 396                         break;
 397
 398                 case SOUND_MASK_LINE:
 399                 case SOUND_MASK_LINE3:
 400                         recdev = 0;
 401                         break;
 402
 403                 case SOUND_MASK_CD:
 404                 case SOUND_MASK_LINE1:
 405                         recdev = 1;
 406                         break;
 407
 408                 case SOUND_MASK_IMIX:
 409                         recdev = 3;
 410                         break;
 411
 412                 default:
 413                         mask = SOUND_MASK_MIC;
 414                         recdev = 2;
 415                 }
 416
 417                 recdev <<= 6;
 418                 ad_write(devc, 0, (ad_read(devc, 0) & 0x3f) | recdev);
 419                 ad_write(devc, 1, (ad_read(devc, 1) & 0x3f) | recdev);
 420         } else { /* soundpro */
 421                 unsigned char val;
 422                 int set_rec_bit;
 423                 int j;
 424
 425                 for (i = 0; i < 32; i++) {      /* For each bit */
 426                         if ((devc->supported_rec_devices & (1 << i)) == 0)
 427                                 continue;       /* Device not supported */
 428
 429                         for (j = LEFT_CHN; j <= RIGHT_CHN; j++) {
 430                                 if (devc->mix_devices[i][j].nbits == 0) /* Inexistent channel */
 431                                         continue;
 432
 433                                 /*
 434                                  * This is tricky:
 435                                  * set_rec_bit becomes 1 if the corresponding bit in mask is set
 436                                  * then it gets flipped if the polarity is inverse
 437                                  */
 438                                 set_rec_bit = ((mask & (1 << i)) != 0) ^ devc->mix_devices[i][j].recpol;
 439
 440                                 val = ad_read(devc, devc->mix_devices[i][j].recreg);
 441                                 val &= ~(1 << devc->mix_devices[i][j].recpos);
 442                                 val |= (set_rec_bit << devc->mix_devices[i][j].recpos);
 443                                 ad_write(devc, devc->mix_devices[i][j].recreg, val);
 444                         }
 445                 }
 446         }
 447         spin_unlock_irqrestore(&devc->lock,flags);
 448
 449         /* Rename the mixer bits back if necessary */
 450         for (i = 0; i < 32; i++)
 451         {
 452                 if (devc->mixer_reroute[i] != i)
 453                 {
 454                         if (mask & (1 << devc->mixer_reroute[i]))
 455                         {
 456                                 mask &= ~(1 << devc->mixer_reroute[i]);
 457                                 mask |= (1 << i);
 458                         }
 459                 }
 460         }
 461         devc->recmask = mask;
 462         return mask;
 463 }
 464
 465 static void change_bits(ad1848_info * devc, unsigned char *regval,
 466                         unsigned char *muteval, int dev, int chn, int newval)
 467 {
 468         unsigned char mask;
 469         int shift;
 470         int mute;
 471         int mutemask;
 472         int set_mute_bit;
 473
 474         set_mute_bit = (newval == 0) ^ devc->mix_devices[dev][chn].mutepol;
 475
 476         if (devc->mix_devices[dev][chn].polarity == 1)  /* Reverse */
 477                 newval = 100 - newval;
 478
 479         mask = (1 << devc->mix_devices[dev][chn].nbits) - 1;
 480         shift = devc->mix_devices[dev][chn].bitpos;
 481
 482         if (devc->mix_devices[dev][chn].mutepos == 8)
 483         {                       /* if there is no mute bit */
 484                 mute = 0;       /* No mute bit; do nothing special */
 485                 mutemask = ~0;  /* No mute bit; do nothing special */
 486         }
 487         else
 488         {
 489                 mute = (set_mute_bit << devc->mix_devices[dev][chn].mutepos);
 490                 mutemask = ~(1 << devc->mix_devices[dev][chn].mutepos);
 491         }
 492
 493         newval = (int) ((newval * mask) + 50) / 100;    /* Scale it */
 494         *regval &= ~(mask << shift);                    /* Clear bits */
 495         *regval |= (newval & mask) << shift;            /* Set new value */
 496
 497         *muteval &= mutemask;
 498         *muteval |= mute;
 499 }
 500
 501 static int ad1848_mixer_get(ad1848_info * devc, int dev)
 502 {
 503         if (!((1 << dev) & devc->supported_devices))
 504                 return -EINVAL;
 505
 506         dev = devc->mixer_reroute[dev];
 507
 508         return devc->levels[dev];
 509 }
 510
 511 static void ad1848_mixer_set_channel(ad1848_info *devc, int dev, int value, int channel)
 512 {
 513         int regoffs, muteregoffs;
 514         unsigned char val, muteval;
 515         unsigned long flags;
 516
 517         regoffs = devc->mix_devices[dev][channel].regno;
 518         muteregoffs = devc->mix_devices[dev][channel].mutereg;
 519         val = ad_read(devc, regoffs);
 520
 521         if (muteregoffs != regoffs) {
 522                 muteval = ad_read(devc, muteregoffs);
 523                 change_bits(devc, &val, &muteval, dev, channel, value);
 524         }
 525         else
 526                 change_bits(devc, &val, &val, dev, channel, value);
 527
 528         spin_lock_irqsave(&devc->lock,flags);
 529         ad_write(devc, regoffs, val);
 530         devc->saved_regs[regoffs] = val;
 531         if (muteregoffs != regoffs) {
 532                 ad_write(devc, muteregoffs, muteval);
 533                 devc->saved_regs[muteregoffs] = muteval;
 534         }
 535         spin_unlock_irqrestore(&devc->lock,flags);
 536 }
 537
 538 static int ad1848_mixer_set(ad1848_info * devc, int dev, int value)
 539 {
 540         int left = value & 0x000000ff;
 541         int right = (value & 0x0000ff00) >> 8;
 542         int retvol;
 543
 544         if (dev > 31)
 545                 return -EINVAL;
 546
 547         if (!(devc->supported_devices & (1 << dev)))
 548                 return -EINVAL;
 549
 550         dev = devc->mixer_reroute[dev];
 551
 552         if (devc->mix_devices[dev][LEFT_CHN].nbits == 0)
 553                 return -EINVAL;
 554
 555         if (left > 100)
 556                 left = 100;
 557         if (right > 100)
 558                 right = 100;
 559
 560         if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0)       /* Mono control */
 561                 right = left;
 562
 563         retvol = left | (right << 8);
 564
 565         /* Scale volumes */
 566         left = mix_cvt[left];
 567         right = mix_cvt[right];
 568
 569         devc->levels[dev] = retvol;
 570
 571         /*
 572          * Set the left channel
 573          */
 574         ad1848_mixer_set_channel(devc, dev, left, LEFT_CHN);
 575
 576         /*
 577          * Set the right channel
 578          */
 579         if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0)
 580                 goto out;
 581         ad1848_mixer_set_channel(devc, dev, right, RIGHT_CHN);
 582
 583  out:
 584         return retvol;
 585 }
 586
 587 static void ad1848_mixer_reset(ad1848_info * devc)
 588 {
 589         int i;
 590         char name[32];
 591         unsigned long flags;
 592
 593         devc->mix_devices = &(ad1848_mix_devices[0]);
 594
 595         sprintf(name, "%s_%d", devc->chip_name, nr_ad1848_devs);
 596
 597         for (i = 0; i < 32; i++)
 598                 devc->mixer_reroute[i] = i;
 599
 600         devc->supported_rec_devices = MODE1_REC_DEVICES;
 601
 602         switch (devc->model)
 603         {
 604                 case MD_4231:
 605                 case MD_4231A:
 606                 case MD_1845:
 607                 case MD_1845_SSCAPE:
 608                         devc->supported_devices = MODE2_MIXER_DEVICES;
 609                         break;
 610
 611                 case MD_C930:
 612                         devc->supported_devices = C930_MIXER_DEVICES;
 613                         devc->mix_devices = &(c930_mix_devices[0]);
 614                         break;
 615
 616                 case MD_IWAVE:
 617                         devc->supported_devices = MODE3_MIXER_DEVICES;
 618                         devc->mix_devices = &(iwave_mix_devices[0]);
 619                         break;
 620
 621                 case MD_42xB:
 622                 case MD_4239:
 623                         devc->mix_devices = &(cs42xb_mix_devices[0]);
 624                         devc->supported_devices = MODE3_MIXER_DEVICES;
 625                         break;
 626                 case MD_4232:
 627                 case MD_4235:
 628                 case MD_4236:
 629                         devc->supported_devices = MODE3_MIXER_DEVICES;
 630                         break;
 631
 632                 case MD_1848:
 633                         if (soundpro) {
 634                                 devc->supported_devices = SPRO_MIXER_DEVICES;
 635                                 devc->supported_rec_devices = SPRO_REC_DEVICES;
 636                                 devc->mix_devices = &(spro_mix_devices[0]);
 637                                 break;
 638                         }
 639
 640                 default:
 641                         devc->supported_devices = MODE1_MIXER_DEVICES;
 642         }
 643
 644         devc->orig_devices = devc->supported_devices;
 645         devc->orig_rec_devices = devc->supported_rec_devices;
 646
 647         devc->levels = load_mixer_volumes(name, default_mixer_levels, 1);
 648
 649         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
 650         {
 651                 if (devc->supported_devices & (1 << i))
 652                         ad1848_mixer_set(devc, i, devc->levels[i]);
 653         }
 654
 655         ad1848_set_recmask(devc, SOUND_MASK_MIC);
 656
 657         devc->mixer_output_port = devc->levels[31] | AUDIO_HEADPHONE | AUDIO_LINE_OUT;
 658
 659         spin_lock_irqsave(&devc->lock,flags);
 660         if (!soundpro) {
 661                 if (devc->mixer_output_port & AUDIO_SPEAKER)
 662                         ad_write(devc, 26, ad_read(devc, 26) & ~0x40);  /* Unmute mono out */
 663                 else
 664                         ad_write(devc, 26, ad_read(devc, 26) | 0x40);   /* Mute mono out */
 665         } else {
 666                 /*
 667                  * From the "wouldn't it be nice if the mixer API had (better)
 668                  * support for custom stuff" category
 669                  */
 670                 /* Enable surround mode and SB16 mixer */
 671                 ad_write(devc, 16, 0x60);
 672         }
 673         spin_unlock_irqrestore(&devc->lock,flags);
 674 }
 675
 676 static int ad1848_mixer_ioctl(int dev, unsigned int cmd, void __user *arg)
 677 {
 678         ad1848_info *devc = mixer_devs[dev]->devc;
 679         int val;
 680
 681         if (cmd == SOUND_MIXER_PRIVATE1)
 682         {
 683                 if (get_user(val, (int __user *)arg))
 684                         return -EFAULT;
 685
 686                 if (val != 0xffff)
 687                 {
 688                         unsigned long flags;
 689                         val &= (AUDIO_SPEAKER | AUDIO_HEADPHONE | AUDIO_LINE_OUT);
 690                         devc->mixer_output_port = val;
 691                         val |= AUDIO_HEADPHONE | AUDIO_LINE_OUT;        /* Always on */
 692                         devc->mixer_output_port = val;
 693                         spin_lock_irqsave(&devc->lock,flags);
 694                         if (val & AUDIO_SPEAKER)
 695                                 ad_write(devc, 26, ad_read(devc, 26) & ~0x40);  /* Unmute mono out */
 696                         else
 697                                 ad_write(devc, 26, ad_read(devc, 26) | 0x40);           /* Mute mono out */
 698                         spin_unlock_irqrestore(&devc->lock,flags);
 699                 }
 700                 val = devc->mixer_output_port;
 701                 return put_user(val, (int __user *)arg);
 702         }
 703         if (cmd == SOUND_MIXER_PRIVATE2)
 704         {
 705                 if (get_user(val, (int __user *)arg))
 706                         return -EFAULT;
 707                 return(ad1848_control(AD1848_MIXER_REROUTE, val));
 708         }
 709         if (((cmd >> 8) & 0xff) == 'M')
 710         {
 711                 if (_SIOC_DIR(cmd) & _SIOC_WRITE)
 712                 {
 713                         switch (cmd & 0xff)
 714                         {
 715                                 case SOUND_MIXER_RECSRC:
 716                                         if (get_user(val, (int __user *)arg))
 717                                                 return -EFAULT;
 718                                         val = ad1848_set_recmask(devc, val);
 719                                         break;
 720
 721                                 default:
 722                                         if (get_user(val, (int __user *)arg))
 723                                         return -EFAULT;
 724                                         val = ad1848_mixer_set(devc, cmd & 0xff, val);
 725                                         break;
 726                         }
 727                         return put_user(val, (int __user *)arg);
 728                 }
 729                 else
 730                 {
 731                         switch (cmd & 0xff)
 732                         {
 733                                 /*
 734                                  * Return parameters
 735                                  */
 736
 737                                 case SOUND_MIXER_RECSRC:
 738                                         val = devc->recmask;
 739                                         break;
 740
 741                                 case SOUND_MIXER_DEVMASK:
 742                                         val = devc->supported_devices;
 743                                         break;
 744
 745                                 case SOUND_MIXER_STEREODEVS:
 746                                         val = devc->supported_devices;
 747                                         if (devc->model != MD_C930)
 748                                                 val &= ~(SOUND_MASK_SPEAKER | SOUND_MASK_IMIX);
 749                                         break;
 750
 751                                 case SOUND_MIXER_RECMASK:
 752                                         val = devc->supported_rec_devices;
 753                                         break;
 754
 755                                 case SOUND_MIXER_CAPS:
 756                                         val=SOUND_CAP_EXCL_INPUT;
 757                                         break;
 758
 759                                 default:
 760                                         val = ad1848_mixer_get(devc, cmd & 0xff);
 761                                         break;
 762                         }
 763                         return put_user(val, (int __user *)arg);
 764                 }
 765         }
 766         else
 767                 return -EINVAL;
 768 }
 769
 770 static int ad1848_set_speed(int dev, int arg)
 771 {
 772         ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
 773         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
 774
 775         /*
 776          * The sampling speed is encoded in the least significant nibble of I8. The
 777          * LSB selects the clock source (0=24.576 MHz, 1=16.9344 MHz) and other
 778          * three bits select the divisor (indirectly):
 779          *
 780          * The available speeds are in the following table. Keep the speeds in
 781          * the increasing order.
 782          */
 783         typedef struct
 784         {
 785                 int             speed;
 786                 unsigned char   bits;
 787         }
 788         speed_struct;
 789
 790         static speed_struct speed_table[] =
 791         {
 792                 {5510, (0 << 1) | 1},
 793                 {5510, (0 << 1) | 1},
 794                 {6620, (7 << 1) | 1},
 795                 {8000, (0 << 1) | 0},
 796                 {9600, (7 << 1) | 0},
 797                 {11025, (1 << 1) | 1},
 798                 {16000, (1 << 1) | 0},
 799                 {18900, (2 << 1) | 1},
 800                 {22050, (3 << 1) | 1},
 801                 {27420, (2 << 1) | 0},
 802                 {32000, (3 << 1) | 0},
 803                 {33075, (6 << 1) | 1},
 804                 {37800, (4 << 1) | 1},
 805                 {44100, (5 << 1) | 1},
 806                 {48000, (6 << 1) | 0}
 807         };
 808
 809         int i, n, selected = -1;
 810
 811         n = sizeof(speed_table) / sizeof(speed_struct);
 812
 813         if (arg <= 0)
 814                 return portc->speed;
 815
 816         if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)    /* AD1845 has different timer than others */
 817         {
 818                 if (arg < 4000)
 819                         arg = 4000;
 820                 if (arg > 50000)
 821                         arg = 50000;
 822
 823                 portc->speed = arg;
 824                 portc->speed_bits = speed_table[3].bits;
 825                 return portc->speed;
 826         }
 827         if (arg < speed_table[0].speed)
 828                 selected = 0;
 829         if (arg > speed_table[n - 1].speed)
 830                 selected = n - 1;
 831
 832         for (i = 1 /*really */ ; selected == -1 && i < n; i++)
 833         {
 834                 if (speed_table[i].speed == arg)
 835                         selected = i;
 836                 else if (speed_table[i].speed > arg)
 837                 {
 838                         int diff1, diff2;
 839
 840                         diff1 = arg - speed_table[i - 1].speed;
 841                         diff2 = speed_table[i].speed - arg;
 842
 843                         if (diff1 < diff2)
 844                                 selected = i - 1;
 845                         else
 846                                 selected = i;
 847                 }
 848         }
 849         if (selected == -1)
 850         {
 851                 printk(KERN_WARNING "ad1848: Can't find speed???\n");
 852                 selected = 3;
 853         }
 854         portc->speed = speed_table[selected].speed;
 855         portc->speed_bits = speed_table[selected].bits;
 856         return portc->speed;
 857 }
 858
 859 static short ad1848_set_channels(int dev, short arg)
 860 {
 861         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
 862
 863         if (arg != 1 && arg != 2)
 864                 return portc->channels;
 865
 866         portc->channels = arg;
 867         return arg;
 868 }
 869
 870 static unsigned int ad1848_set_bits(int dev, unsigned int arg)
 871 {
 872         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
 873         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
 874
 875         static struct format_tbl
 876         {
 877                   int             format;
 878                   unsigned char   bits;
 879         }
 880         format2bits[] =
 881         {
 882                 {
 883                         0, 0
 884                 }
 885                 ,
 886                 {
 887                         AFMT_MU_LAW, 1
 888                 }
 889                 ,
 890                 {
 891                         AFMT_A_LAW, 3
 892                 }
 893                 ,
 894                 {
 895                         AFMT_IMA_ADPCM, 5
 896                 }
 897                 ,
 898                 {
 899                         AFMT_U8, 0
 900                 }
 901                 ,
 902                 {
 903                         AFMT_S16_LE, 2
 904                 }
 905                 ,
 906                 {
 907                         AFMT_S16_BE, 6
 908                 }
 909                 ,
 910                 {
 911                         AFMT_S8, 0
 912                 }
 913                 ,
 914                 {
 915                         AFMT_U16_LE, 0
 916                 }
 917                 ,
 918                 {
 919                         AFMT_U16_BE, 0
 920                 }
 921         };
 922         int i, n = sizeof(format2bits) / sizeof(struct format_tbl);
 923
 924         if (arg == 0)
 925                 return portc->audio_format;
 926
 927         if (!(arg & ad_format_mask[devc->model]))
 928                 arg = AFMT_U8;
 929
 930         portc->audio_format = arg;
 931
 932         for (i = 0; i < n; i++)
 933                 if (format2bits[i].format == arg)
 934                 {
 935                         if ((portc->format_bits = format2bits[i].bits) == 0)
 936                                 return portc->audio_format = AFMT_U8;           /* Was not supported */
 937
 938                         return arg;
 939                 }
 940         /* Still hanging here. Something must be terribly wrong */
 941         portc->format_bits = 0;
 942         return portc->audio_format = AFMT_U8;
 943 }
 944
 945 static struct audio_driver ad1848_audio_driver =
 946 {
 947         .owner                  = THIS_MODULE,
 948         .open                   = ad1848_open,
 949         .close                  = ad1848_close,
 950         .output_block           = ad1848_output_block,
 951         .start_input            = ad1848_start_input,
 952         .prepare_for_input      = ad1848_prepare_for_input,
 953         .prepare_for_output     = ad1848_prepare_for_output,
 954         .halt_io                = ad1848_halt,
 955         .halt_input             = ad1848_halt_input,
 956         .halt_output            = ad1848_halt_output,
 957         .trigger                = ad1848_trigger,
 958         .set_speed              = ad1848_set_speed,
 959         .set_bits               = ad1848_set_bits,
 960         .set_channels           = ad1848_set_channels
 961 };
 962
 963 static struct mixer_operations ad1848_mixer_operations =
 964 {
 965         .owner  = THIS_MODULE,
 966         .id     = "SOUNDPORT",
 967         .name   = "AD1848/CS4248/CS4231",
 968         .ioctl  = ad1848_mixer_ioctl
 969 };
 970
 971 static int ad1848_open(int dev, int mode)
 972 {
 973         ad1848_info    *devc;
 974         ad1848_port_info *portc;
 975         unsigned long   flags;
 976
 977         if (dev < 0 || dev >= num_audiodevs)
 978                 return -ENXIO;
 979
 980         devc = (ad1848_info *) audio_devs[dev]->devc;
 981         portc = (ad1848_port_info *) audio_devs[dev]->portc;
 982
 983         /* here we don't have to protect against intr */
 984         spin_lock(&devc->lock);
 985         if (portc->open_mode || (devc->open_mode & mode))
 986         {
 987                 spin_unlock(&devc->lock);
 988                 return -EBUSY;
 989         }
 990         devc->dual_dma = 0;
 991
 992         if (audio_devs[dev]->flags & DMA_DUPLEX)
 993         {
 994                 devc->dual_dma = 1;
 995         }
 996         devc->intr_active = 0;
 997         devc->audio_mode = 0;
 998         devc->open_mode |= mode;
 999         portc->open_mode = mode;
1000         spin_unlock(&devc->lock);
1001         ad1848_trigger(dev, 0);
1002
1003         if (mode & OPEN_READ)
1004                 devc->record_dev = dev;
1005         if (mode & OPEN_WRITE)
1006                 devc->playback_dev = dev;
1007 /*
1008  * Mute output until the playback really starts. This decreases clicking (hope so).
1009  */
1010         spin_lock_irqsave(&devc->lock,flags);
1011         ad_mute(devc);
1012         spin_unlock_irqrestore(&devc->lock,flags);
1013
1014         return 0;
1015 }
1016
1017 static void ad1848_close(int dev)
1018 {
1019         unsigned long   flags;
1020         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1021         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1022
1023         DEB(printk("ad1848_close(void)\n"));
1024
1025         devc->intr_active = 0;
1026         ad1848_halt(dev);
1027
1028         spin_lock_irqsave(&devc->lock,flags);
1029
1030         devc->audio_mode = 0;
1031         devc->open_mode &= ~portc->open_mode;
1032         portc->open_mode = 0;
1033
1034         ad_unmute(devc);
1035         spin_unlock_irqrestore(&devc->lock,flags);
1036 }
1037
1038 static void ad1848_output_block(int dev, unsigned long buf, int count, int intrflag)
1039 {
1040         unsigned long   flags, cnt;
1041         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1042         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1043
1044         cnt = count;
1045
1046         if (portc->audio_format == AFMT_IMA_ADPCM)
1047         {
1048                 cnt /= 4;
1049         }
1050         else
1051         {
1052                 if (portc->audio_format & (AFMT_S16_LE | AFMT_S16_BE))  /* 16 bit data */
1053                         cnt >>= 1;
1054         }
1055         if (portc->channels > 1)
1056                 cnt >>= 1;
1057         cnt--;
1058
1059         if ((devc->audio_mode & PCM_ENABLE_OUTPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) &&
1060             intrflag &&
1061             cnt == devc->xfer_count)
1062         {
1063                 devc->audio_mode |= PCM_ENABLE_OUTPUT;
1064                 devc->intr_active = 1;
1065                 return; /*
1066                          * Auto DMA mode on. No need to react
1067                          */
1068         }
1069         spin_lock_irqsave(&devc->lock,flags);
1070
1071         ad_write(devc, 15, (unsigned char) (cnt & 0xff));
1072         ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
1073
1074         devc->xfer_count = cnt;
1075         devc->audio_mode |= PCM_ENABLE_OUTPUT;
1076         devc->intr_active = 1;
1077         spin_unlock_irqrestore(&devc->lock,flags);
1078 }
1079
1080 static void ad1848_start_input(int dev, unsigned long buf, int count, int intrflag)
1081 {
1082         unsigned long   flags, cnt;
1083         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1084         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1085
1086         cnt = count;
1087         if (portc->audio_format == AFMT_IMA_ADPCM)
1088         {
1089                 cnt /= 4;
1090         }
1091         else
1092         {
1093                 if (portc->audio_format & (AFMT_S16_LE | AFMT_S16_BE))  /* 16 bit data */
1094                         cnt >>= 1;
1095         }
1096         if (portc->channels > 1)
1097                 cnt >>= 1;
1098         cnt--;
1099
1100         if ((devc->audio_mode & PCM_ENABLE_INPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) &&
1101                 intrflag &&
1102                 cnt == devc->xfer_count)
1103         {
1104                 devc->audio_mode |= PCM_ENABLE_INPUT;
1105                 devc->intr_active = 1;
1106                 return; /*
1107                          * Auto DMA mode on. No need to react
1108                          */
1109         }
1110         spin_lock_irqsave(&devc->lock,flags);
1111
1112         if (devc->model == MD_1848)
1113         {
1114                   ad_write(devc, 15, (unsigned char) (cnt & 0xff));
1115                   ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
1116         }
1117         else
1118         {
1119                   ad_write(devc, 31, (unsigned char) (cnt & 0xff));
1120                   ad_write(devc, 30, (unsigned char) ((cnt >> 8) & 0xff));
1121         }
1122
1123         ad_unmute(devc);
1124
1125         devc->xfer_count = cnt;
1126         devc->audio_mode |= PCM_ENABLE_INPUT;
1127         devc->intr_active = 1;
1128         spin_unlock_irqrestore(&devc->lock,flags);
1129 }
1130
1131 static int ad1848_prepare_for_output(int dev, int bsize, int bcount)
1132 {
1133         int             timeout;
1134         unsigned char   fs, old_fs, tmp = 0;
1135         unsigned long   flags;
1136         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1137         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1138
1139         ad_mute(devc);
1140
1141         spin_lock_irqsave(&devc->lock,flags);
1142         fs = portc->speed_bits | (portc->format_bits << 5);
1143
1144         if (portc->channels > 1)
1145                 fs |= 0x10;
1146
1147         ad_enter_MCE(devc);     /* Enables changes to the format select reg */
1148
1149         if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) /* Use alternate speed select registers */
1150         {
1151                 fs &= 0xf0;     /* Mask off the rate select bits */
1152
1153                 ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */
1154                 ad_write(devc, 23, portc->speed & 0xff);        /* Speed LSB */
1155         }
1156         old_fs = ad_read(devc, 8);
1157
1158         if (devc->model == MD_4232 || devc->model >= MD_4236)
1159         {
1160                 tmp = ad_read(devc, 16);
1161                 ad_write(devc, 16, tmp | 0x30);
1162         }
1163         if (devc->model == MD_IWAVE)
1164                 ad_write(devc, 17, 0xc2);       /* Disable variable frequency select */
1165
1166         ad_write(devc, 8, fs);
1167
1168         /*
1169          * Write to I8 starts resynchronization. Wait until it completes.
1170          */
1171
1172         timeout = 0;
1173         while (timeout < 100 && inb(devc->base) != 0x80)
1174                 timeout++;
1175         timeout = 0;
1176         while (timeout < 10000 && inb(devc->base) == 0x80)
1177                 timeout++;
1178
1179         if (devc->model >= MD_4232)
1180                 ad_write(devc, 16, tmp & ~0x30);
1181
1182         ad_leave_MCE(devc);     /*
1183                                  * Starts the calibration process.
1184                                  */
1185         spin_unlock_irqrestore(&devc->lock,flags);
1186         devc->xfer_count = 0;
1187
1188 #ifndef EXCLUDE_TIMERS
1189         if (dev == timer_installed && devc->timer_running)
1190                 if ((fs & 0x01) != (old_fs & 0x01))
1191                 {
1192                         ad1848_tmr_reprogram(dev);
1193                 }
1194 #endif
1195         ad1848_halt_output(dev);
1196         return 0;
1197 }
1198
1199 static int ad1848_prepare_for_input(int dev, int bsize, int bcount)
1200 {
1201         int timeout;
1202         unsigned char fs, old_fs, tmp = 0;
1203         unsigned long flags;
1204         ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1205         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1206
1207         if (devc->audio_mode)
1208                 return 0;
1209
1210         spin_lock_irqsave(&devc->lock,flags);
1211         fs = portc->speed_bits | (portc->format_bits << 5);
1212
1213         if (portc->channels > 1)
1214                 fs |= 0x10;
1215
1216         ad_enter_MCE(devc);     /* Enables changes to the format select reg */
1217
1218         if ((devc->model == MD_1845) || (devc->model == MD_1845_SSCAPE))        /* Use alternate speed select registers */
1219         {
1220                 fs &= 0xf0;     /* Mask off the rate select bits */
1221
1222                 ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */
1223                 ad_write(devc, 23, portc->speed & 0xff);        /* Speed LSB */
1224         }
1225         if (devc->model == MD_4232)
1226         {
1227                 tmp = ad_read(devc, 16);
1228                 ad_write(devc, 16, tmp | 0x30);
1229         }
1230         if (devc->model == MD_IWAVE)
1231                 ad_write(devc, 17, 0xc2);       /* Disable variable frequency select */
1232
1233         /*
1234          * If mode >= 2 (CS4231), set I28. It's the capture format register.
1235          */
1236
1237         if (devc->model != MD_1848)
1238         {
1239                 old_fs = ad_read(devc, 28);
1240                 ad_write(devc, 28, fs);
1241
1242                 /*
1243                  * Write to I28 starts resynchronization. Wait until it completes.
1244                  */
1245
1246                 timeout = 0;
1247                 while (timeout < 100 && inb(devc->base) != 0x80)
1248                         timeout++;
1249
1250                 timeout = 0;
1251                 while (timeout < 10000 && inb(devc->base) == 0x80)
1252                         timeout++;
1253
1254                 if (devc->model != MD_1848 && devc->model != MD_1845 && devc->model != MD_1845_SSCAPE)
1255                 {
1256                         /*
1257                          * CS4231 compatible devices don't have separate sampling rate selection
1258                          * register for recording an playback. The I8 register is shared so we have to
1259                          * set the speed encoding bits of it too.
1260                          */
1261                         unsigned char   tmp = portc->speed_bits | (ad_read(devc, 8) & 0xf0);
1262
1263                         ad_write(devc, 8, tmp);
1264                         /*
1265                          * Write to I8 starts resynchronization. Wait until it completes.
1266                          */
1267                         timeout = 0;
1268                         while (timeout < 100 && inb(devc->base) != 0x80)
1269                                 timeout++;
1270
1271                         timeout = 0;
1272                         while (timeout < 10000 && inb(devc->base) == 0x80)
1273                                 timeout++;
1274                 }
1275         }
1276         else
1277         {                       /* For AD1848 set I8. */
1278
1279                 old_fs = ad_read(devc, 8);
1280                 ad_write(devc, 8, fs);
1281                 /*
1282                  * Write to I8 starts resynchronization. Wait until it completes.
1283                  */
1284                 timeout = 0;
1285                 while (timeout < 100 && inb(devc->base) != 0x80)
1286                         timeout++;
1287                 timeout = 0;
1288                 while (timeout < 10000 && inb(devc->base) == 0x80)
1289                         timeout++;
1290         }
1291
1292         if (devc->model == MD_4232)
1293                 ad_write(devc, 16, tmp & ~0x30);
1294
1295         ad_leave_MCE(devc);     /*
1296                                  * Starts the calibration process.
1297                                  */
1298         spin_unlock_irqrestore(&devc->lock,flags);
1299         devc->xfer_count = 0;
1300
1301 #ifndef EXCLUDE_TIMERS
1302         if (dev == timer_installed && devc->timer_running)
1303         {
1304                 if ((fs & 0x01) != (old_fs & 0x01))
1305                 {
1306                         ad1848_tmr_reprogram(dev);
1307                 }
1308         }
1309 #endif
1310         ad1848_halt_input(dev);
1311         return 0;
1312 }
1313
1314 static void ad1848_halt(int dev)
1315 {
1316         ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1317         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1318
1319         unsigned char   bits = ad_read(devc, 9);
1320
1321         if (bits & 0x01 && (portc->open_mode & OPEN_WRITE))
1322                 ad1848_halt_output(dev);
1323
1324         if (bits & 0x02 && (portc->open_mode & OPEN_READ))
1325                 ad1848_halt_input(dev);
1326         devc->audio_mode = 0;
1327 }
1328
1329 static void ad1848_halt_input(int dev)
1330 {
1331         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1332         unsigned long   flags;
1333
1334         if (!(ad_read(devc, 9) & 0x02))
1335                 return;         /* Capture not enabled */
1336
1337         spin_lock_irqsave(&devc->lock,flags);
1338
1339         ad_mute(devc);
1340
1341         {
1342                 int             tmout;
1343
1344                 if(!isa_dma_bridge_buggy)
1345                         disable_dma(audio_devs[dev]->dmap_in->dma);
1346
1347                 for (tmout = 0; tmout < 100000; tmout++)
1348                         if (ad_read(devc, 11) & 0x10)
1349                                 break;
1350                 ad_write(devc, 9, ad_read(devc, 9) & ~0x02);    /* Stop capture */
1351
1352                 if(!isa_dma_bridge_buggy)
1353                         enable_dma(audio_devs[dev]->dmap_in->dma);
1354                 devc->audio_mode &= ~PCM_ENABLE_INPUT;
1355         }
1356
1357         outb(0, io_Status(devc));       /* Clear interrupt status */
1358         outb(0, io_Status(devc));       /* Clear interrupt status */
1359
1360         devc->audio_mode &= ~PCM_ENABLE_INPUT;
1361
1362         spin_unlock_irqrestore(&devc->lock,flags);
1363 }
1364
1365 static void ad1848_halt_output(int dev)
1366 {
1367         ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1368         unsigned long flags;
1369
1370         if (!(ad_read(devc, 9) & 0x01))
1371                 return;         /* Playback not enabled */
1372
1373         spin_lock_irqsave(&devc->lock,flags);
1374
1375         ad_mute(devc);
1376         {
1377                 int             tmout;
1378
1379                 if(!isa_dma_bridge_buggy)
1380                         disable_dma(audio_devs[dev]->dmap_out->dma);
1381
1382                 for (tmout = 0; tmout < 100000; tmout++)
1383                         if (ad_read(devc, 11) & 0x10)
1384                                 break;
1385                 ad_write(devc, 9, ad_read(devc, 9) & ~0x01);    /* Stop playback */
1386
1387                 if(!isa_dma_bridge_buggy)
1388                        enable_dma(audio_devs[dev]->dmap_out->dma);
1389
1390                 devc->audio_mode &= ~PCM_ENABLE_OUTPUT;
1391         }
1392
1393         outb((0), io_Status(devc));     /* Clear interrupt status */
1394         outb((0), io_Status(devc));     /* Clear interrupt status */
1395
1396         devc->audio_mode &= ~PCM_ENABLE_OUTPUT;
1397
1398         spin_unlock_irqrestore(&devc->lock,flags);
1399 }
1400
1401 static void ad1848_trigger(int dev, int state)
1402 {
1403         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1404         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1405         unsigned long   flags;
1406         unsigned char   tmp, old;
1407
1408         spin_lock_irqsave(&devc->lock,flags);
1409         state &= devc->audio_mode;
1410
1411         tmp = old = ad_read(devc, 9);
1412
1413         if (portc->open_mode & OPEN_READ)
1414         {
1415                   if (state & PCM_ENABLE_INPUT)
1416                           tmp |= 0x02;
1417                   else
1418                           tmp &= ~0x02;
1419         }
1420         if (portc->open_mode & OPEN_WRITE)
1421         {
1422                 if (state & PCM_ENABLE_OUTPUT)
1423                         tmp |= 0x01;
1424                 else
1425                         tmp &= ~0x01;
1426         }
1427         /* ad_mute(devc); */
1428         if (tmp != old)
1429         {
1430                   ad_write(devc, 9, tmp);
1431                   ad_unmute(devc);
1432         }
1433         spin_unlock_irqrestore(&devc->lock,flags);
1434 }
1435
1436 static void ad1848_init_hw(ad1848_info * devc)
1437 {
1438         int i;
1439         int *init_values;
1440
1441         /*
1442          * Initial values for the indirect registers of CS4248/AD1848.
1443          */
1444         static int      init_values_a[] =
1445         {
1446                 0xa8, 0xa8, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00,
1447                 0x00, 0x0c, 0x02, 0x00, 0x8a, 0x01, 0x00, 0x00,
1448
1449         /* Positions 16 to 31 just for CS4231/2 and ad1845 */
1450                 0x80, 0x00, 0x10, 0x10, 0x00, 0x00, 0x1f, 0x40,
1451                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
1452         };
1453
1454         static int      init_values_b[] =
1455         {
1456                 /*
1457                    Values for the newer chips
1458                    Some of the register initialization values were changed. In
1459                    order to get rid of the click that preceded PCM playback,
1460                    calibration was disabled on the 10th byte. On that same byte,
1461                    dual DMA was enabled; on the 11th byte, ADC dithering was
1462                    enabled, since that is theoretically desirable; on the 13th
1463                    byte, Mode 3 was selected, to enable access to extended
1464                    registers.
1465                  */
1466                 0xa8, 0xa8, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00,
1467                 0x00, 0x00, 0x06, 0x00, 0xe0, 0x01, 0x00, 0x00,
1468                 0x80, 0x00, 0x10, 0x10, 0x00, 0x00, 0x1f, 0x40,
1469                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
1470         };
1471
1472         /*
1473          *      Select initialisation data
1474          */
1475
1476         init_values = init_values_a;
1477         if(devc->model >= MD_4236)
1478                 init_values = init_values_b;
1479
1480         for (i = 0; i < 16; i++)
1481                 ad_write(devc, i, init_values[i]);
1482
1483
1484         ad_mute(devc);          /* Initialize some variables */
1485         ad_unmute(devc);        /* Leave it unmuted now */
1486
1487         if (devc->model > MD_1848)
1488         {
1489                 if (devc->model == MD_1845_SSCAPE)
1490                         ad_write(devc, 12, ad_read(devc, 12) | 0x50);
1491                 else
1492                         ad_write(devc, 12, ad_read(devc, 12) | 0x40);           /* Mode2 = enabled */
1493
1494                 if (devc->model == MD_IWAVE)
1495                         ad_write(devc, 12, 0x6c);       /* Select codec mode 3 */
1496
1497                 if (devc->model != MD_1845_SSCAPE)
1498                         for (i = 16; i < 32; i++)
1499                                 ad_write(devc, i, init_values[i]);
1500
1501                 if (devc->model == MD_IWAVE)
1502                         ad_write(devc, 16, 0x30);       /* Playback and capture counters enabled */
1503         }
1504         if (devc->model > MD_1848)
1505         {
1506                 if (devc->audio_flags & DMA_DUPLEX)
1507                         ad_write(devc, 9, ad_read(devc, 9) & ~0x04);    /* Dual DMA mode */
1508                 else
1509                         ad_write(devc, 9, ad_read(devc, 9) | 0x04);     /* Single DMA mode */
1510
1511                 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)
1512                         ad_write(devc, 27, ad_read(devc, 27) | 0x08);           /* Alternate freq select enabled */
1513
1514                 if (devc->model == MD_IWAVE)
1515                 {               /* Some magic Interwave specific initialization */
1516                         ad_write(devc, 12, 0x6c);       /* Select codec mode 3 */
1517                         ad_write(devc, 16, 0x30);       /* Playback and capture counters enabled */
1518                         ad_write(devc, 17, 0xc2);       /* Alternate feature enable */
1519                 }
1520         }
1521         else
1522         {
1523                   devc->audio_flags &= ~DMA_DUPLEX;
1524                   ad_write(devc, 9, ad_read(devc, 9) | 0x04);   /* Single DMA mode */
1525                   if (soundpro)
1526                           ad_write(devc, 12, ad_read(devc, 12) | 0x40); /* Mode2 = enabled */
1527         }
1528
1529         outb((0), io_Status(devc));     /* Clear pending interrupts */
1530
1531         /*
1532          * Toggle the MCE bit. It completes the initialization phase.
1533          */
1534
1535         ad_enter_MCE(devc);     /* In case the bit was off */
1536         ad_leave_MCE(devc);
1537
1538         ad1848_mixer_reset(devc);
1539 }
1540
1541 int ad1848_detect(int io_base, int *ad_flags, int *osp)
1542 {
1543         unsigned char tmp;
1544         ad1848_info *devc = &adev_info[nr_ad1848_devs];
1545         unsigned char tmp1 = 0xff, tmp2 = 0xff;
1546         int optiC930 = 0;       /* OPTi 82C930 flag */
1547         int interwave = 0;
1548         int ad1847_flag = 0;
1549         int cs4248_flag = 0;
1550         int sscape_flag = 0;
1551
1552         int i;
1553
1554         DDB(printk("ad1848_detect(%x)\n", io_base));
1555
1556         if (ad_flags)
1557         {
1558                 if (*ad_flags == 0x12345678)
1559                 {
1560                         interwave = 1;
1561                         *ad_flags = 0;
1562                 }
1563
1564                 if (*ad_flags == 0x87654321)
1565                 {
1566                         sscape_flag = 1;
1567                         *ad_flags = 0;
1568                 }
1569
1570                 if (*ad_flags == 0x12345677)
1571                 {
1572                     cs4248_flag = 1;
1573                     *ad_flags = 0;
1574                 }
1575         }
1576         if (nr_ad1848_devs >= MAX_AUDIO_DEV)
1577         {
1578                 printk(KERN_ERR "ad1848 - Too many audio devices\n");
1579                 return 0;
1580         }
1581         if (check_region(io_base, 4))
1582         {
1583                 printk(KERN_ERR "ad1848.c: Port %x not free.\n", io_base);
1584                 return 0;
1585         }
1586         spin_lock_init(&devc->lock);
1587         devc->base = io_base;
1588         devc->irq_ok = 0;
1589         devc->timer_running = 0;
1590         devc->MCE_bit = 0x40;
1591         devc->irq = 0;
1592         devc->open_mode = 0;
1593         devc->chip_name = devc->name = "AD1848";
1594         devc->model = MD_1848;  /* AD1848 or CS4248 */
1595         devc->levels = NULL;
1596         devc->debug_flag = 0;
1597
1598         /*
1599          * Check that the I/O address is in use.
1600          *
1601          * The bit 0x80 of the base I/O port is known to be 0 after the
1602          * chip has performed its power on initialization. Just assume
1603          * this has happened before the OS is starting.
1604          *
1605          * If the I/O address is unused, it typically returns 0xff.
1606          */
1607
1608         if (inb(devc->base) == 0xff)
1609         {
1610                 DDB(printk("ad1848_detect: The base I/O address appears to be dead\n"));
1611         }
1612
1613         /*
1614          * Wait for the device to stop initialization
1615          */
1616
1617         DDB(printk("ad1848_detect() - step 0\n"));
1618
1619         for (i = 0; i < 10000000; i++)
1620         {
1621                 unsigned char   x = inb(devc->base);
1622
1623                 if (x == 0xff || !(x & 0x80))
1624                         break;
1625         }
1626
1627         DDB(printk("ad1848_detect() - step A\n"));
1628
1629         if (inb(devc->base) == 0x80)    /* Not ready. Let's wait */
1630                 ad_leave_MCE(devc);
1631
1632         if ((inb(devc->base) & 0x80) != 0x00)   /* Not a AD1848 */
1633         {
1634                 DDB(printk("ad1848 detect error - step A (%02x)\n", (int) inb(devc->base)));
1635                 return 0;
1636         }
1637
1638         /*
1639          * Test if it's possible to change contents of the indirect registers.
1640          * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read only
1641          * so try to avoid using it.
1642          */
1643
1644         DDB(printk("ad1848_detect() - step B\n"));
1645         ad_write(devc, 0, 0xaa);
1646         ad_write(devc, 1, 0x45);        /* 0x55 with bit 0x10 clear */
1647
1648         if ((tmp1 = ad_read(devc, 0)) != 0xaa || (tmp2 = ad_read(devc, 1)) != 0x45)
1649         {
1650                 if (tmp2 == 0x65)       /* AD1847 has couple of bits hardcoded to 1 */
1651                         ad1847_flag = 1;
1652                 else
1653                 {
1654                         DDB(printk("ad1848 detect error - step B (%x/%x)\n", tmp1, tmp2));
1655                         return 0;
1656                 }
1657         }
1658         DDB(printk("ad1848_detect() - step C\n"));
1659         ad_write(devc, 0, 0x45);
1660         ad_write(devc, 1, 0xaa);
1661
1662         if ((tmp1 = ad_read(devc, 0)) != 0x45 || (tmp2 = ad_read(devc, 1)) != 0xaa)
1663         {
1664                 if (tmp2 == 0x8a)       /* AD1847 has few bits hardcoded to 1 */
1665                         ad1847_flag = 1;
1666                 else
1667                 {
1668                         DDB(printk("ad1848 detect error - step C (%x/%x)\n", tmp1, tmp2));
1669                         return 0;
1670                 }
1671         }
1672
1673         /*
1674          * The indirect register I12 has some read only bits. Let's
1675          * try to change them.
1676          */
1677
1678         DDB(printk("ad1848_detect() - step D\n"));
1679         tmp = ad_read(devc, 12);
1680         ad_write(devc, 12, (~tmp) & 0x0f);
1681
1682         if ((tmp & 0x0f) != ((tmp1 = ad_read(devc, 12)) & 0x0f))
1683         {
1684                 DDB(printk("ad1848 detect error - step D (%x)\n", tmp1));
1685                 return 0;
1686         }
1687
1688         /*
1689          * NOTE! Last 4 bits of the reg I12 tell the chip revision.
1690          *   0x01=RevB and 0x0A=RevC.
1691          */
1692
1693         /*
1694          * The original AD1848/CS4248 has just 15 indirect registers. This means
1695          * that I0 and I16 should return the same value (etc.).
1696          * However this doesn't work with CS4248. Actually it seems to be impossible
1697          * to detect if the chip is a CS4231 or CS4248.
1698          * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test fails
1699          * with CS4231.
1700          */
1701
1702         /*
1703          * OPTi 82C930 has mode2 control bit in another place. This test will fail
1704          * with it. Accept this situation as a possible indication of this chip.
1705          */
1706
1707         DDB(printk("ad1848_detect() - step F\n"));
1708         ad_write(devc, 12, 0);  /* Mode2=disabled */
1709
1710         for (i = 0; i < 16; i++)
1711         {
1712                 if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16)))
1713                 {
1714                         DDB(printk("ad1848 detect step F(%d/%x/%x) - OPTi chip???\n", i, tmp1, tmp2));
1715                         if (!ad1847_flag)
1716                                 optiC930 = 1;
1717                         break;
1718                 }
1719         }
1720
1721         /*
1722          * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit (0x40).
1723          * The bit 0x80 is always 1 in CS4248 and CS4231.
1724          */
1725
1726         DDB(printk("ad1848_detect() - step G\n"));
1727
1728         if (ad_flags && *ad_flags == 400)
1729                 *ad_flags = 0;
1730         else
1731                 ad_write(devc, 12, 0x40);       /* Set mode2, clear 0x80 */
1732
1733
1734         if (ad_flags)
1735                 *ad_flags = 0;
1736
1737         tmp1 = ad_read(devc, 12);
1738         if (tmp1 & 0x80)
1739         {
1740                 if (ad_flags)
1741                         *ad_flags |= AD_F_CS4248;
1742
1743                 devc->chip_name = "CS4248";     /* Our best knowledge just now */
1744         }
1745         if (optiC930 || (tmp1 & 0xc0) == (0x80 | 0x40))
1746         {
1747                 /*
1748                  *      CS4231 detected - is it?
1749                  *
1750                  *      Verify that setting I0 doesn't change I16.
1751                  */
1752
1753                 DDB(printk("ad1848_detect() - step H\n"));
1754                 ad_write(devc, 16, 0);  /* Set I16 to known value */
1755
1756                 ad_write(devc, 0, 0x45);
1757                 if ((tmp1 = ad_read(devc, 16)) != 0x45) /* No change -> CS4231? */
1758                 {
1759                         ad_write(devc, 0, 0xaa);
1760                         if ((tmp1 = ad_read(devc, 16)) == 0xaa) /* Rotten bits? */
1761                         {
1762                                 DDB(printk("ad1848 detect error - step H(%x)\n", tmp1));
1763                                 return 0;
1764                         }
1765
1766                         /*
1767                          * Verify that some bits of I25 are read only.
1768                          */
1769
1770                         DDB(printk("ad1848_detect() - step I\n"));
1771                         tmp1 = ad_read(devc, 25);       /* Original bits */
1772                         ad_write(devc, 25, ~tmp1);      /* Invert all bits */
1773                         if ((ad_read(devc, 25) & 0xe7) == (tmp1 & 0xe7))
1774                         {
1775                                 int id;
1776
1777                                 /*
1778                                  *      It's at least CS4231
1779                                  */
1780
1781                                 devc->chip_name = "CS4231";
1782                                 devc->model = MD_4231;
1783
1784                                 /*
1785                                  * It could be an AD1845 or CS4231A as well.
1786                                  * CS4231 and AD1845 report the same revision info in I25
1787                                  * while the CS4231A reports different.
1788                                  */
1789
1790                                 id = ad_read(devc, 25);
1791                                 if ((id & 0xe7) == 0x80)        /* Device busy??? */
1792                                         id = ad_read(devc, 25);
1793                                 if ((id & 0xe7) == 0x80)        /* Device still busy??? */
1794                                         id = ad_read(devc, 25);
1795                                 DDB(printk("ad1848_detect() - step J (%02x/%02x)\n", id, ad_read(devc, 25)));
1796
1797                                 if ((id & 0xe7) == 0x80) {
1798                                         /*
1799                                          * It must be a CS4231 or AD1845. The register I23 of
1800                                          * CS4231 is undefined and it appears to be read only.
1801                                          * AD1845 uses I23 for setting sample rate. Assume
1802                                          * the chip is AD1845 if I23 is changeable.
1803                                          */
1804
1805                                         unsigned char   tmp = ad_read(devc, 23);
1806                                         ad_write(devc, 23, ~tmp);
1807
1808                                         if (interwave)
1809                                         {
1810                                                 devc->model = MD_IWAVE;
1811                                                 devc->chip_name = "IWave";
1812                                         }
1813                                         else if (ad_read(devc, 23) != tmp)      /* AD1845 ? */
1814                                         {
1815                                                 devc->chip_name = "AD1845";
1816                                                 devc->model = MD_1845;
1817                                         }
1818                                         else if (cs4248_flag)
1819                                         {
1820                                                 if (ad_flags)
1821                                                           *ad_flags |= AD_F_CS4248;
1822                                                 devc->chip_name = "CS4248";
1823                                                 devc->model = MD_1848;
1824                                                 ad_write(devc, 12, ad_read(devc, 12) & ~0x40);  /* Mode2 off */
1825                                         }
1826                                         ad_write(devc, 23, tmp);        /* Restore */
1827                                 }
1828                                 else
1829                                 {
1830                                         switch (id & 0x1f) {
1831                                         case 3: /* CS4236/CS4235/CS42xB/CS4239 */
1832                                                 {
1833                                                         int xid;
1834                                                         ad_write(devc, 12, ad_read(devc, 12) | 0x60); /* switch to mode 3 */
1835                                                         ad_write(devc, 23, 0x9c); /* select extended register 25 */
1836                                                         xid = inb(io_Indexed_Data(devc));
1837                                                         ad_write(devc, 12, ad_read(devc, 12) & ~0x60); /* back to mode 0 */
1838                                                         switch (xid & 0x1f)
1839                                                         {
1840                                                                 case 0x00:
1841                                                                         devc->chip_name = "CS4237B(B)";
1842                                                                         devc->model = MD_42xB;
1843                                                                         break;
1844                                                                 case 0x08:
1845                                                                         /* Seems to be a 4238 ?? */
1846                                                                         devc->chip_name = "CS4238";
1847                                                                         devc->model = MD_42xB;
1848                                                                         break;
1849                                                                 case 0x09:
1850                                                                         devc->chip_name = "CS4238B";
1851                                                                         devc->model = MD_42xB;
1852                                                                         break;
1853                                                                 case 0x0b:
1854                                                                         devc->chip_name = "CS4236B";
1855                                                                         devc->model = MD_4236;
1856                                                                         break;
1857                                                                 case 0x10:
1858                                                                         devc->chip_name = "CS4237B";
1859                                                                         devc->model = MD_42xB;
1860                                                                         break;
1861                                                                 case 0x1d:
1862                                                                         devc->chip_name = "CS4235";
1863                                                                         devc->model = MD_4235;
1864                                                                         break;
1865                                                                 case 0x1e:
1866                                                                         devc->chip_name = "CS4239";
1867                                                                         devc->model = MD_4239;
1868                                                                         break;
1869                                                                 default:
1870                                                                         printk("Chip ident is %X.\n", xid&0x1F);
1871                                                                         devc->chip_name = "CS42xx";
1872                                                                         devc->model = MD_4232;
1873                                                                         break;
1874                                                         }
1875                                                 }
1876                                                 break;
1877
1878                                         case 2: /* CS4232/CS4232A */
1879                                                 devc->chip_name = "CS4232";
1880                                                 devc->model = MD_4232;
1881                                                 break;
1882
1883                                         case 0:
1884                                                 if ((id & 0xe0) == 0xa0)
1885                                                 {
1886                                                         devc->chip_name = "CS4231A";
1887                                                         devc->model = MD_4231A;
1888                                                 }
1889                                                 else
1890                                                 {
1891                                                         devc->chip_name = "CS4321";
1892                                                         devc->model = MD_4231;
1893                                                 }
1894                                                 break;
1895
1896                                         default: /* maybe */
1897                                                 DDB(printk("ad1848: I25 = %02x/%02x\n", ad_read(devc, 25), ad_read(devc, 25) & 0xe7));
1898                                                 if (optiC930)
1899                                                 {
1900                                                         devc->chip_name = "82C930";
1901                                                         devc->model = MD_C930;
1902                                                 }
1903                                                 else
1904                                                 {
1905                                                         devc->chip_name = "CS4231";
1906                                                         devc->model = MD_4231;
1907                                                 }
1908                                         }
1909                                 }
1910                         }
1911                         ad_write(devc, 25, tmp1);       /* Restore bits */
1912
1913                         DDB(printk("ad1848_detect() - step K\n"));
1914                 }
1915         } else if (tmp1 == 0x0a) {
1916                 /*
1917                  * Is it perhaps a SoundPro CMI8330?
1918                  * If so, then we should be able to change indirect registers
1919                  * greater than I15 after activating MODE2, even though reading
1920                  * back I12 does not show it.
1921                  */
1922
1923                 /*
1924                  * Let's try comparing register values
1925                  */
1926                 for (i = 0; i < 16; i++) {
1927                         if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16))) {
1928                                 DDB(printk("ad1848 detect step H(%d/%x/%x) - SoundPro chip?\n", i, tmp1, tmp2));
1929                                 soundpro = 1;
1930                                 devc->chip_name = "SoundPro CMI 8330";
1931                                 break;
1932                         }
1933                 }
1934         }
1935
1936         DDB(printk("ad1848_detect() - step L\n"));
1937         if (ad_flags)
1938         {
1939                   if (devc->model != MD_1848)
1940                           *ad_flags |= AD_F_CS4231;
1941         }
1942         DDB(printk("ad1848_detect() - Detected OK\n"));
1943
1944         if (devc->model == MD_1848 && ad1847_flag)
1945                 devc->chip_name = "AD1847";
1946
1947
1948         if (sscape_flag == 1)
1949                 devc->model = MD_1845_SSCAPE;
1950
1951         return 1;
1952 }
1953
1954 int ad1848_init (char *name, int io_base, int irq, int dma_playback,
1955                 int dma_capture, int share_dma, int *osp, struct module *owner)
1956 {
1957         /*
1958          * NOTE! If irq < 0, there is another driver which has allocated the IRQ
1959          *   so that this driver doesn't need to allocate/deallocate it.
1960          *   The actually used IRQ is ABS(irq).
1961          */
1962
1963         int my_dev;
1964         char dev_name[100];
1965         int e;
1966
1967         ad1848_info  *devc = &adev_info[nr_ad1848_devs];
1968
1969         ad1848_port_info *portc = NULL;
1970
1971         devc->irq = (irq > 0) ? irq : 0;
1972         devc->open_mode = 0;
1973         devc->timer_ticks = 0;
1974         devc->dma1 = dma_playback;
1975         devc->dma2 = dma_capture;
1976         devc->subtype = cfg.card_subtype;
1977         devc->audio_flags = DMA_AUTOMODE;
1978         devc->playback_dev = devc->record_dev = 0;
1979         if (name != NULL)
1980                 devc->name = name;
1981
1982         if (name != NULL && name[0] != 0)
1983                 sprintf(dev_name,
1984                         "%s (%s)", name, devc->chip_name);
1985         else
1986                 sprintf(dev_name,
1987                         "Generic audio codec (%s)", devc->chip_name);
1988
1989         if (!request_region(devc->base, 4, devc->name))
1990                 return -1;
1991
1992         conf_printf2(dev_name, devc->base, devc->irq, dma_playback, dma_capture);
1993
1994         if (devc->model == MD_1848 || devc->model == MD_C930)
1995                 devc->audio_flags |= DMA_HARDSTOP;
1996
1997         if (devc->model > MD_1848)
1998         {
1999                 if (devc->dma1 == devc->dma2 || devc->dma2 == -1 || devc->dma1 == -1)
2000                         devc->audio_flags &= ~DMA_DUPLEX;
2001                 else
2002                         devc->audio_flags |= DMA_DUPLEX;
2003         }
2004
2005         portc = (ad1848_port_info *) kmalloc(sizeof(ad1848_port_info), GFP_KERNEL);
2006         if(portc==NULL) {
2007                 release_region(devc->base, 4);
2008                 return -1;
2009         }
2010
2011         if ((my_dev = sound_install_audiodrv(AUDIO_DRIVER_VERSION,
2012                                              dev_name,
2013                                              &ad1848_audio_driver,
2014                                              sizeof(struct audio_driver),
2015                                              devc->audio_flags,
2016                                              ad_format_mask[devc->model],
2017                                              devc,
2018                                              dma_playback,
2019                                              dma_capture)) < 0)
2020         {
2021                 release_region(devc->base, 4);
2022                 kfree(portc);
2023                 return -1;
2024         }
2025
2026         audio_devs[my_dev]->portc = portc;
2027         audio_devs[my_dev]->mixer_dev = -1;
2028         if (owner)
2029                 audio_devs[my_dev]->d->owner = owner;
2030         memset((char *) portc, 0, sizeof(*portc));
2031
2032         nr_ad1848_devs++;
2033
2034         devc->pmdev = pm_register(PM_ISA_DEV, my_dev, ad1848_pm_callback);
2035         if (devc->pmdev)
2036                 devc->pmdev->data = devc;
2037
2038         ad1848_init_hw(devc);
2039
2040         if (irq > 0)
2041         {
2042                 devc->dev_no = my_dev;
2043                 if (request_irq(devc->irq, adintr, 0, devc->name, (void *)my_dev) < 0)
2044                 {
2045                         printk(KERN_WARNING "ad1848: Unable to allocate IRQ\n");
2046                         /* Don't free it either then.. */
2047                         devc->irq = 0;
2048                 }
2049                 if (capabilities[devc->model].flags & CAP_F_TIMER)
2050                 {
2051 #ifndef CONFIG_SMP
2052                         int x;
2053                         unsigned char tmp = ad_read(devc, 16);
2054 #endif
2055
2056                         devc->timer_ticks = 0;
2057
2058                         ad_write(devc, 21, 0x00);       /* Timer MSB */
2059                         ad_write(devc, 20, 0x10);       /* Timer LSB */
2060 #ifndef CONFIG_SMP
2061                         ad_write(devc, 16, tmp | 0x40); /* Enable timer */
2062                         for (x = 0; x < 100000 && devc->timer_ticks == 0; x++);
2063                         ad_write(devc, 16, tmp & ~0x40);        /* Disable timer */
2064
2065                         if (devc->timer_ticks == 0)
2066                                 printk(KERN_WARNING "ad1848: Interrupt test failed (IRQ%d)\n", irq);
2067                         else
2068                         {
2069                                 DDB(printk("Interrupt test OK\n"));
2070                                 devc->irq_ok = 1;
2071                         }
2072 #else
2073                         devc->irq_ok = 1;
2074 #endif
2075                 }
2076                 else
2077                         devc->irq_ok = 1;       /* Couldn't test. assume it's OK */
2078         } else if (irq < 0)
2079                 irq2dev[-irq] = devc->dev_no = my_dev;
2080
2081 #ifndef EXCLUDE_TIMERS
2082         if ((capabilities[devc->model].flags & CAP_F_TIMER) &&
2083             devc->irq_ok)
2084                 ad1848_tmr_install(my_dev);
2085 #endif
2086
2087         if (!share_dma)
2088         {
2089                 if (sound_alloc_dma(dma_playback, devc->name))
2090                         printk(KERN_WARNING "ad1848.c: Can't allocate DMA%d\n", dma_playback);
2091
2092                 if (dma_capture != dma_playback)
2093                         if (sound_alloc_dma(dma_capture, devc->name))
2094                                 printk(KERN_WARNING "ad1848.c: Can't allocate DMA%d\n", dma_capture);
2095         }
2096
2097         if ((e = sound_install_mixer(MIXER_DRIVER_VERSION,
2098                                      dev_name,
2099                                      &ad1848_mixer_operations,
2100                                      sizeof(struct mixer_operations),
2101                                      devc)) >= 0)
2102         {
2103                 audio_devs[my_dev]->mixer_dev = e;
2104                 if (owner)
2105                         mixer_devs[e]->owner = owner;
2106         }
2107         return my_dev;
2108 }
2109
2110 int ad1848_control(int cmd, int arg)
2111 {
2112         ad1848_info *devc;
2113         unsigned long flags;
2114
2115         if (nr_ad1848_devs < 1)
2116                 return -ENODEV;
2117
2118         devc = &adev_info[nr_ad1848_devs - 1];
2119
2120         switch (cmd)
2121         {
2122                 case AD1848_SET_XTAL:   /* Change clock frequency of AD1845 (only ) */
2123                         if (devc->model != MD_1845 || devc->model != MD_1845_SSCAPE)
2124                                 return -EINVAL;
2125                         spin_lock_irqsave(&devc->lock,flags);
2126                         ad_enter_MCE(devc);
2127                         ad_write(devc, 29, (ad_read(devc, 29) & 0x1f) | (arg << 5));
2128                         ad_leave_MCE(devc);
2129                         spin_unlock_irqrestore(&devc->lock,flags);
2130                         break;
2131
2132                 case AD1848_MIXER_REROUTE:
2133                 {
2134                         int o = (arg >> 8) & 0xff;
2135                         int n = arg & 0xff;
2136
2137                         if (o < 0 || o >= SOUND_MIXER_NRDEVICES)
2138                                 return -EINVAL;
2139
2140                         if (!(devc->supported_devices & (1 << o)) &&
2141                             !(devc->supported_rec_devices & (1 << o)))
2142                                 return -EINVAL;
2143
2144                         if (n == SOUND_MIXER_NONE)
2145                         {       /* Just hide this control */
2146                                 ad1848_mixer_set(devc, o, 0);   /* Shut up it */
2147                                 devc->supported_devices &= ~(1 << o);
2148                                 devc->supported_rec_devices &= ~(1 << o);
2149                                 break;
2150                         }
2151
2152                         /* Make the mixer control identified by o to appear as n */
2153                         if (n < 0 || n >= SOUND_MIXER_NRDEVICES)
2154                                 return -EINVAL;
2155
2156                         devc->mixer_reroute[n] = o;     /* Rename the control */
2157                         if (devc->supported_devices & (1 << o))
2158                                 devc->supported_devices |= (1 << n);
2159                         if (devc->supported_rec_devices & (1 << o))
2160                                 devc->supported_rec_devices |= (1 << n);
2161
2162                         devc->supported_devices &= ~(1 << o);
2163                         devc->supported_rec_devices &= ~(1 << o);
2164                 }
2165                 break;
2166         }
2167         return 0;
2168 }
2169
2170 void ad1848_unload(int io_base, int irq, int dma_playback, int dma_capture, int share_dma)
2171 {
2172         int i, mixer, dev = 0;
2173         ad1848_info *devc = NULL;
2174
2175         for (i = 0; devc == NULL && i < nr_ad1848_devs; i++)
2176         {
2177                 if (adev_info[i].base == io_base)
2178                 {
2179                         devc = &adev_info[i];
2180                         dev = devc->dev_no;
2181                 }
2182         }
2183
2184         if (devc != NULL)
2185         {
2186                 if(audio_devs[dev]->portc!=NULL)
2187                         kfree(audio_devs[dev]->portc);
2188                 release_region(devc->base, 4);
2189
2190                 if (!share_dma)
2191                 {
2192                         if (devc->irq > 0) /* There is no point in freeing irq, if it wasn't allocated */
2193                                 free_irq(devc->irq, (void *)devc->dev_no);
2194
2195                         sound_free_dma(dma_playback);
2196
2197                         if (dma_playback != dma_capture)
2198                                 sound_free_dma(dma_capture);
2199
2200                 }
2201                 mixer = audio_devs[devc->dev_no]->mixer_dev;
2202                 if(mixer>=0)
2203                         sound_unload_mixerdev(mixer);
2204
2205                 if (devc->pmdev)
2206                         pm_unregister(devc->pmdev);
2207
2208                 nr_ad1848_devs--;
2209                 for ( ; i < nr_ad1848_devs ; i++)
2210                         adev_info[i] = adev_info[i+1];
2211         }
2212         else
2213                 printk(KERN_ERR "ad1848: Can't find device to be unloaded. Base=%x\n", io_base);
2214 }
2215
2216 irqreturn_t adintr(int irq, void *dev_id, struct pt_regs *dummy)
2217 {
2218         unsigned char status;
2219         ad1848_info *devc;
2220         int dev;
2221         int alt_stat = 0xff;
2222         unsigned char c930_stat = 0;
2223         int cnt = 0;
2224
2225         dev = (int)dev_id;
2226         devc = (ad1848_info *) audio_devs[dev]->devc;
2227
2228 interrupt_again:                /* Jump back here if int status doesn't reset */
2229
2230         status = inb(io_Status(devc));
2231
2232         if (status == 0x80)
2233                 printk(KERN_DEBUG "adintr: Why?\n");
2234         if (devc->model == MD_1848)
2235                 outb((0), io_Status(devc));     /* Clear interrupt status */
2236
2237         if (status & 0x01)
2238         {
2239                 if (devc->model == MD_C930)
2240                 {               /* 82C930 has interrupt status register in MAD16 register MC11 */
2241
2242                         spin_lock(&devc->lock);
2243
2244                         /* 0xe0e is C930 address port
2245                          * 0xe0f is C930 data port
2246                          */
2247                         outb(11, 0xe0e);
2248                         c930_stat = inb(0xe0f);
2249                         outb((~c930_stat), 0xe0f);
2250
2251                         spin_unlock(&devc->lock);
2252
2253                         alt_stat = (c930_stat << 2) & 0x30;
2254                 }
2255                 else if (devc->model != MD_1848)
2256                 {
2257                         spin_lock(&devc->lock);
2258                         alt_stat = ad_read(devc, 24);
2259                         ad_write(devc, 24, ad_read(devc, 24) & ~alt_stat);      /* Selective ack */
2260                         spin_unlock(&devc->lock);
2261                 }
2262
2263                 if ((devc->open_mode & OPEN_READ) && (devc->audio_mode & PCM_ENABLE_INPUT) && (alt_stat & 0x20))
2264                 {
2265                         DMAbuf_inputintr(devc->record_dev);
2266                 }
2267                 if ((devc->open_mode & OPEN_WRITE) && (devc->audio_mode & PCM_ENABLE_OUTPUT) &&
2268                       (alt_stat & 0x10))
2269                 {
2270                         DMAbuf_outputintr(devc->playback_dev, 1);
2271                 }
2272                 if (devc->model != MD_1848 && (alt_stat & 0x40))        /* Timer interrupt */
2273                 {
2274                         devc->timer_ticks++;
2275 #ifndef EXCLUDE_TIMERS
2276                         if (timer_installed == dev && devc->timer_running)
2277                                 sound_timer_interrupt();
2278 #endif
2279                 }
2280         }
2281 /*
2282  * Sometimes playback or capture interrupts occur while a timer interrupt
2283  * is being handled. The interrupt will not be retriggered if we don't
2284  * handle it now. Check if an interrupt is still pending and restart
2285  * the handler in this case.
2286  */
2287         if (inb(io_Status(devc)) & 0x01 && cnt++ < 4)
2288         {
2289                   goto interrupt_again;
2290         }
2291         return IRQ_HANDLED;
2292 }
2293
2294 /*
2295  *      Experimental initialization sequence for the integrated sound system
2296  *      of the Compaq Deskpro M.
2297  */
2298
2299 static int init_deskpro_m(struct address_info *hw_config)
2300 {
2301         unsigned char   tmp;
2302
2303         if ((tmp = inb(0xc44)) == 0xff)
2304         {
2305                 DDB(printk("init_deskpro_m: Dead port 0xc44\n"));
2306                 return 0;
2307         }
2308
2309         outb(0x10, 0xc44);
2310         outb(0x40, 0xc45);
2311         outb(0x00, 0xc46);
2312         outb(0xe8, 0xc47);
2313         outb(0x14, 0xc44);
2314         outb(0x40, 0xc45);
2315         outb(0x00, 0xc46);
2316         outb(0xe8, 0xc47);
2317         outb(0x10, 0xc44);
2318
2319         return 1;
2320 }
2321
2322 /*
2323  *      Experimental initialization sequence for the integrated sound system
2324  *      of Compaq Deskpro XL.
2325  */
2326
2327 static int init_deskpro(struct address_info *hw_config)
2328 {
2329         unsigned char   tmp;
2330
2331         if ((tmp = inb(0xc44)) == 0xff)
2332         {
2333                 DDB(printk("init_deskpro: Dead port 0xc44\n"));
2334                 return 0;
2335         }
2336         outb((tmp | 0x04), 0xc44);      /* Select bank 1 */
2337         if (inb(0xc44) != 0x04)
2338         {
2339                 DDB(printk("init_deskpro: Invalid bank1 signature in port 0xc44\n"));
2340                 return 0;
2341         }
2342         /*
2343          * OK. It looks like a Deskpro so let's proceed.
2344          */
2345
2346         /*
2347          * I/O port 0xc44 Audio configuration register.
2348          *
2349          * bits 0xc0:   Audio revision bits
2350          *              0x00 = Compaq Business Audio
2351          *              0x40 = MS Sound System Compatible (reset default)
2352          *              0x80 = Reserved
2353          *              0xc0 = Reserved
2354          * bit 0x20:    No Wait State Enable
2355          *              0x00 = Disabled (reset default, DMA mode)
2356          *              0x20 = Enabled (programmed I/O mode)
2357          * bit 0x10:    MS Sound System Decode Enable
2358          *              0x00 = Decoding disabled (reset default)
2359          *              0x10 = Decoding enabled
2360          * bit 0x08:    FM Synthesis Decode Enable
2361          *              0x00 = Decoding Disabled (reset default)
2362          *              0x08 = Decoding enabled
2363          * bit 0x04     Bank select
2364          *              0x00 = Bank 0
2365          *              0x04 = Bank 1
2366          * bits 0x03    MSS Base address
2367          *              0x00 = 0x530 (reset default)
2368          *              0x01 = 0x604
2369          *              0x02 = 0xf40
2370          *              0x03 = 0xe80
2371          */
2372
2373 #ifdef DEBUGXL
2374         /* Debug printing */
2375         printk("Port 0xc44 (before): ");
2376         outb((tmp & ~0x04), 0xc44);
2377         printk("%02x ", inb(0xc44));
2378         outb((tmp | 0x04), 0xc44);
2379         printk("%02x\n", inb(0xc44));
2380 #endif
2381
2382         /* Set bank 1 of the register */
2383         tmp = 0x58;             /* MSS Mode, MSS&FM decode enabled */
2384
2385         switch (hw_config->io_base)
2386         {
2387                 case 0x530:
2388                         tmp |= 0x00;
2389                         break;
2390                 case 0x604:
2391                         tmp |= 0x01;
2392                         break;
2393                 case 0xf40:
2394                         tmp |= 0x02;
2395                         break;
2396                 case 0xe80:
2397                         tmp |= 0x03;
2398                         break;
2399                 default:
2400                         DDB(printk("init_deskpro: Invalid MSS port %x\n", hw_config->io_base));
2401                         return 0;
2402         }
2403         outb((tmp & ~0x04), 0xc44);     /* Write to bank=0 */
2404
2405 #ifdef DEBUGXL
2406         /* Debug printing */
2407         printk("Port 0xc44 (after): ");
2408         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2409         printk("%02x ", inb(0xc44));
2410         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2411         printk("%02x\n", inb(0xc44));
2412 #endif
2413
2414         /*
2415          * I/O port 0xc45 FM Address Decode/MSS ID Register.
2416          *
2417          * bank=0, bits 0xfe:   FM synthesis Decode Compare bits 7:1 (default=0x88)
2418          * bank=0, bit 0x01:    SBIC Power Control Bit
2419          *                      0x00 = Powered up
2420          *                      0x01 = Powered down
2421          * bank=1, bits 0xfc:   MSS ID (default=0x40)
2422          */
2423
2424 #ifdef DEBUGXL
2425         /* Debug printing */
2426         printk("Port 0xc45 (before): ");
2427         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2428         printk("%02x ", inb(0xc45));
2429         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2430         printk("%02x\n", inb(0xc45));
2431 #endif
2432
2433         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2434         outb((0x88), 0xc45);    /* FM base 7:0 = 0x88 */
2435         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2436         outb((0x10), 0xc45);    /* MSS ID = 0x10 (MSS port returns 0x04) */
2437
2438 #ifdef DEBUGXL
2439         /* Debug printing */
2440         printk("Port 0xc45 (after): ");
2441         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2442         printk("%02x ", inb(0xc45));
2443         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2444         printk("%02x\n", inb(0xc45));
2445 #endif
2446
2447
2448         /*
2449          * I/O port 0xc46 FM Address Decode/Address ASIC Revision Register.
2450          *
2451          * bank=0, bits 0xff:   FM synthesis Decode Compare bits 15:8 (default=0x03)
2452          * bank=1, bits 0xff:   Audio addressing ASIC id
2453          */
2454
2455 #ifdef DEBUGXL
2456         /* Debug printing */
2457         printk("Port 0xc46 (before): ");
2458         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2459         printk("%02x ", inb(0xc46));
2460         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2461         printk("%02x\n", inb(0xc46));
2462 #endif
2463
2464         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2465         outb((0x03), 0xc46);    /* FM base 15:8 = 0x03 */
2466         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2467         outb((0x11), 0xc46);    /* ASIC ID = 0x11 */
2468
2469 #ifdef DEBUGXL
2470         /* Debug printing */
2471         printk("Port 0xc46 (after): ");
2472         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2473         printk("%02x ", inb(0xc46));
2474         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2475         printk("%02x\n", inb(0xc46));
2476 #endif
2477
2478         /*
2479          * I/O port 0xc47 FM Address Decode Register.
2480          *
2481          * bank=0, bits 0xff:   Decode enable selection for various FM address bits
2482          * bank=1, bits 0xff:   Reserved
2483          */
2484
2485 #ifdef DEBUGXL
2486         /* Debug printing */
2487         printk("Port 0xc47 (before): ");
2488         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2489         printk("%02x ", inb(0xc47));
2490         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2491         printk("%02x\n", inb(0xc47));
2492 #endif
2493
2494         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2495         outb((0x7c), 0xc47);    /* FM decode enable bits = 0x7c */
2496         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2497         outb((0x00), 0xc47);    /* Reserved bank1 = 0x00 */
2498
2499 #ifdef DEBUGXL
2500         /* Debug printing */
2501         printk("Port 0xc47 (after): ");
2502         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2503         printk("%02x ", inb(0xc47));
2504         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2505         printk("%02x\n", inb(0xc47));
2506 #endif
2507
2508         /*
2509          * I/O port 0xc6f = Audio Disable Function Register
2510          */
2511
2512 #ifdef DEBUGXL
2513         printk("Port 0xc6f (before) = %02x\n", inb(0xc6f));
2514 #endif
2515
2516         outb((0x80), 0xc6f);
2517
2518 #ifdef DEBUGXL
2519         printk("Port 0xc6f (after) = %02x\n", inb(0xc6f));
2520 #endif
2521
2522         return 1;
2523 }
2524
2525 int probe_ms_sound(struct address_info *hw_config)
2526 {
2527         unsigned char   tmp;
2528
2529         DDB(printk("Entered probe_ms_sound(%x, %d)\n", hw_config->io_base, hw_config->card_subtype));
2530
2531         if (check_region(hw_config->io_base, 8))
2532         {
2533                 printk(KERN_ERR "MSS: I/O port conflict\n");
2534                 return 0;
2535         }
2536         if (hw_config->card_subtype == 1)       /* Has no IRQ/DMA registers */
2537         {
2538                 /* check_opl3(0x388, hw_config); */
2539                 return ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp);
2540         }
2541
2542         if (deskpro_xl && hw_config->card_subtype == 2) /* Compaq Deskpro XL */
2543         {
2544                 if (!init_deskpro(hw_config))
2545                         return 0;
2546         }
2547
2548         if (deskpro_m)  /* Compaq Deskpro M */
2549         {
2550                 if (!init_deskpro_m(hw_config))
2551                         return 0;
2552         }
2553
2554         /*
2555            * Check if the IO port returns valid signature. The original MS Sound
2556            * system returns 0x04 while some cards (AudioTrix Pro for example)
2557            * return 0x00 or 0x0f.
2558          */
2559
2560         if ((tmp = inb(hw_config->io_base + 3)) == 0xff)        /* Bus float */
2561         {
2562                   int             ret;
2563
2564                   DDB(printk("I/O address is inactive (%x)\n", tmp));
2565                   if (!(ret = ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp)))
2566                           return 0;
2567                   return 1;
2568         }
2569         DDB(printk("MSS signature = %x\n", tmp & 0x3f));
2570         if ((tmp & 0x3f) != 0x04 &&
2571             (tmp & 0x3f) != 0x0f &&
2572             (tmp & 0x3f) != 0x00)
2573         {
2574                 int ret;
2575
2576                 MDB(printk(KERN_ERR "No MSS signature detected on port 0x%x (0x%x)\n", hw_config->io_base, (int) inb(hw_config->io_base + 3)));
2577                 DDB(printk("Trying to detect codec anyway but IRQ/DMA may not work\n"));
2578                 if (!(ret = ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp)))
2579                         return 0;
2580
2581                 hw_config->card_subtype = 1;
2582                 return 1;
2583         }
2584         if ((hw_config->irq != 5)  &&
2585             (hw_config->irq != 7)  &&
2586             (hw_config->irq != 9)  &&
2587             (hw_config->irq != 10) &&
2588             (hw_config->irq != 11) &&
2589             (hw_config->irq != 12))
2590         {
2591                 printk(KERN_ERR "MSS: Bad IRQ %d\n", hw_config->irq);
2592                 return 0;
2593         }
2594         if (hw_config->dma != 0 && hw_config->dma != 1 && hw_config->dma != 3)
2595         {
2596                   printk(KERN_ERR "MSS: Bad DMA %d\n", hw_config->dma);
2597                   return 0;
2598         }
2599         /*
2600          * Check that DMA0 is not in use with a 8 bit board.
2601          */
2602
2603         if (hw_config->dma == 0 && inb(hw_config->io_base + 3) & 0x80)
2604         {
2605                 printk(KERN_ERR "MSS: Can't use DMA0 with a 8 bit card/slot\n");
2606                 return 0;
2607         }
2608         if (hw_config->irq > 7 && hw_config->irq != 9 && inb(hw_config->io_base + 3) & 0x80)
2609         {
2610                 printk(KERN_ERR "MSS: Can't use IRQ%d with a 8 bit card/slot\n", hw_config->irq);
2611                 return 0;
2612         }
2613         return ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp);
2614 }
2615
2616 void attach_ms_sound(struct address_info *hw_config, struct module *owner)
2617 {
2618         static signed char interrupt_bits[12] =
2619         {
2620                 -1, -1, -1, -1, -1, 0x00, -1, 0x08, -1, 0x10, 0x18, 0x20
2621         };
2622         signed char     bits;
2623         char            dma2_bit = 0;
2624
2625         static char     dma_bits[4] =
2626         {
2627                 1, 2, 0, 3
2628         };
2629
2630         int config_port = hw_config->io_base + 0;
2631         int version_port = hw_config->io_base + 3;
2632         int dma = hw_config->dma;
2633         int dma2 = hw_config->dma2;
2634
2635         if (hw_config->card_subtype == 1)       /* Has no IRQ/DMA registers */
2636         {
2637                 hw_config->slots[0] = ad1848_init("MS Sound System", hw_config->io_base + 4,
2638                                                     hw_config->irq,
2639                                                     hw_config->dma,
2640                                                     hw_config->dma2, 0,
2641                                                     hw_config->osp,
2642                                                     owner);
2643                 request_region(hw_config->io_base, 4, "WSS config");
2644                 return;
2645         }
2646         /*
2647          * Set the IRQ and DMA addresses.
2648          */
2649
2650         bits = interrupt_bits[hw_config->irq];
2651         if (bits == -1)
2652         {
2653                 printk(KERN_ERR "MSS: Bad IRQ %d\n", hw_config->irq);
2654                 return;
2655         }
2656         outb((bits | 0x40), config_port);
2657         if ((inb(version_port) & 0x40) == 0)
2658                 printk(KERN_ERR "[MSS: IRQ Conflict?]\n");
2659
2660 /*
2661  * Handle the capture DMA channel
2662  */
2663
2664         if (dma2 != -1 && dma2 != dma)
2665         {
2666                 if (!((dma == 0 && dma2 == 1) ||
2667                         (dma == 1 && dma2 == 0) ||
2668                         (dma == 3 && dma2 == 0)))
2669                 {       /* Unsupported combination. Try to swap channels */
2670                         int tmp = dma;
2671
2672                         dma = dma2;
2673                         dma2 = tmp;
2674                 }
2675                 if ((dma == 0 && dma2 == 1) ||
2676                         (dma == 1 && dma2 == 0) ||
2677                         (dma == 3 && dma2 == 0))
2678                 {
2679                         dma2_bit = 0x04;        /* Enable capture DMA */
2680                 }
2681                 else
2682                 {
2683                         printk(KERN_WARNING "MSS: Invalid capture DMA\n");
2684                         dma2 = dma;
2685                 }
2686         }
2687         else
2688         {
2689                 dma2 = dma;
2690         }
2691
2692         hw_config->dma = dma;
2693         hw_config->dma2 = dma2;
2694
2695         outb((bits | dma_bits[dma] | dma2_bit), config_port);   /* Write IRQ+DMA setup */
2696
2697         hw_config->slots[0] = ad1848_init("MS Sound System", hw_config->io_base + 4,
2698                                           hw_config->irq,
2699                                           dma, dma2, 0,
2700                                           hw_config->osp,
2701                                           THIS_MODULE);
2702         request_region(hw_config->io_base, 4, "WSS config");
2703 }
2704
2705 void unload_ms_sound(struct address_info *hw_config)
2706 {
2707         ad1848_unload(hw_config->io_base + 4,
2708                       hw_config->irq,
2709                       hw_config->dma,
2710                       hw_config->dma2, 0);
2711         sound_unload_audiodev(hw_config->slots[0]);
2712         release_region(hw_config->io_base, 4);
2713 }
2714
2715 #ifndef EXCLUDE_TIMERS
2716
2717 /*
2718  * Timer stuff (for /dev/music).
2719  */
2720
2721 static unsigned int current_interval;
2722
2723 static unsigned int ad1848_tmr_start(int dev, unsigned int usecs)
2724 {
2725         unsigned long   flags;
2726         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
2727         unsigned long   xtal_nsecs;     /* nanoseconds per xtal oscillator tick */
2728         unsigned long   divider;
2729
2730         spin_lock_irqsave(&devc->lock,flags);
2731
2732         /*
2733          * Length of the timer interval (in nanoseconds) depends on the
2734          * selected crystal oscillator. Check this from bit 0x01 of I8.
2735          *
2736          * AD1845 has just one oscillator which has cycle time of 10.050 us
2737          * (when a 24.576 MHz xtal oscillator is used).
2738          *
2739          * Convert requested interval to nanoseconds before computing
2740          * the timer divider.
2741          */
2742
2743         if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)
2744                 xtal_nsecs = 10050;
2745         else if (ad_read(devc, 8) & 0x01)
2746                 xtal_nsecs = 9920;
2747         else
2748                 xtal_nsecs = 9969;
2749
2750         divider = (usecs * 1000 + xtal_nsecs / 2) / xtal_nsecs;
2751
2752         if (divider < 100)      /* Don't allow shorter intervals than about 1ms */
2753                 divider = 100;
2754
2755         if (divider > 65535)    /* Overflow check */
2756                 divider = 65535;
2757
2758         ad_write(devc, 21, (divider >> 8) & 0xff);      /* Set upper bits */
2759         ad_write(devc, 20, divider & 0xff);     /* Set lower bits */
2760         ad_write(devc, 16, ad_read(devc, 16) | 0x40);   /* Start the timer */
2761         devc->timer_running = 1;
2762         spin_unlock_irqrestore(&devc->lock,flags);
2763
2764         return current_interval = (divider * xtal_nsecs + 500) / 1000;
2765 }
2766
2767 static void ad1848_tmr_reprogram(int dev)
2768 {
2769         /*
2770          *    Audio driver has changed sampling rate so that a different xtal
2771          *      oscillator was selected. We have to reprogram the timer rate.
2772          */
2773
2774         ad1848_tmr_start(dev, current_interval);
2775         sound_timer_syncinterval(current_interval);
2776 }
2777
2778 static void ad1848_tmr_disable(int dev)
2779 {
2780         unsigned long   flags;
2781         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
2782
2783         spin_lock_irqsave(&devc->lock,flags);
2784         ad_write(devc, 16, ad_read(devc, 16) & ~0x40);
2785         devc->timer_running = 0;
2786         spin_unlock_irqrestore(&devc->lock,flags);
2787 }
2788
2789 static void ad1848_tmr_restart(int dev)
2790 {
2791         unsigned long   flags;
2792         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
2793
2794         if (current_interval == 0)
2795                 return;
2796
2797         spin_lock_irqsave(&devc->lock,flags);
2798         ad_write(devc, 16, ad_read(devc, 16) | 0x40);
2799         devc->timer_running = 1;
2800         spin_unlock_irqrestore(&devc->lock,flags);
2801 }
2802
2803 static struct sound_lowlev_timer ad1848_tmr =
2804 {
2805         0,
2806         2,
2807         ad1848_tmr_start,
2808         ad1848_tmr_disable,
2809         ad1848_tmr_restart
2810 };
2811
2812 static int ad1848_tmr_install(int dev)
2813 {
2814         if (timer_installed != -1)
2815                 return 0;       /* Don't install another timer */
2816
2817         timer_installed = ad1848_tmr.dev = dev;
2818         sound_timer_init(&ad1848_tmr, audio_devs[dev]->name);
2819
2820         return 1;
2821 }
2822 #endif /* EXCLUDE_TIMERS */
2823
2824 static int ad1848_suspend(ad1848_info *devc)
2825 {
2826         unsigned long flags;
2827
2828         spin_lock_irqsave(&devc->lock,flags);
2829
2830         ad_mute(devc);
2831
2832         spin_unlock_irqrestore(&devc->lock,flags);
2833         return 0;
2834 }
2835
2836 static int ad1848_resume(ad1848_info *devc)
2837 {
2838         int mixer_levels[32], i;
2839
2840         /* Thinkpad is a bit more of PITA than normal. The BIOS tends to
2841            restore it in a different config to the one we use.  Need to
2842            fix this somehow */
2843
2844         /* store old mixer levels */
2845         memcpy(mixer_levels, devc->levels, sizeof (mixer_levels));
2846         ad1848_init_hw(devc);
2847
2848         /* restore mixer levels */
2849         for (i = 0; i < 32; i++)
2850                 ad1848_mixer_set(devc, devc->dev_no, mixer_levels[i]);
2851
2852         if (!devc->subtype) {
2853                 static signed char interrupt_bits[12] = { -1, -1, -1, -1, -1, 0x00, -1, 0x08, -1, 0x10, 0x18, 0x20 };
2854                 static char dma_bits[4] = { 1, 2, 0, 3 };
2855                 unsigned long flags;
2856                 signed char bits;
2857                 char dma2_bit = 0;
2858
2859                 int config_port = devc->base + 0;
2860
2861                 bits = interrupt_bits[devc->irq];
2862                 if (bits == -1) {
2863                         printk(KERN_ERR "MSS: Bad IRQ %d\n", devc->irq);
2864                         return -1;
2865                 }
2866
2867                 spin_lock_irqsave(&devc->lock,flags);
2868
2869                 outb((bits | 0x40), config_port);
2870
2871                 if (devc->dma2 != -1 && devc->dma2 != devc->dma1)
2872                         if ( (devc->dma1 == 0 && devc->dma2 == 1) ||
2873                              (devc->dma1 == 1 && devc->dma2 == 0) ||
2874                              (devc->dma1 == 3 && devc->dma2 == 0))
2875                                 dma2_bit = 0x04;
2876
2877                 outb((bits | dma_bits[devc->dma1] | dma2_bit), config_port);
2878                 spin_unlock_irqrestore(&devc->lock,flags);
2879         }
2880
2881         return 0;
2882 }
2883
2884 static int ad1848_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data)
2885 {
2886         ad1848_info *devc = dev->data;
2887         if (devc) {
2888                 DEB(printk("ad1848: pm event received: 0x%x\n", rqst));
2889
2890                 switch (rqst) {
2891                 case PM_SUSPEND:
2892                         ad1848_suspend(devc);
2893                         break;
2894                 case PM_RESUME:
2895                         ad1848_resume(devc);
2896                         break;
2897                 }
2898         }
2899         return 0;
2900 }
2901
2902
2903 EXPORT_SYMBOL(ad1848_detect);
2904 EXPORT_SYMBOL(ad1848_init);
2905 EXPORT_SYMBOL(ad1848_unload);
2906 EXPORT_SYMBOL(ad1848_control);
2907 EXPORT_SYMBOL(adintr);
2908 EXPORT_SYMBOL(probe_ms_sound);
2909 EXPORT_SYMBOL(attach_ms_sound);
2910 EXPORT_SYMBOL(unload_ms_sound);
2911
2912 static int __initdata io = -1;
2913 static int __initdata irq = -1;
2914 static int __initdata dma = -1;
2915 static int __initdata dma2 = -1;
2916 static int __initdata type = 0;
2917
2918 MODULE_PARM(io, "i");                   /* I/O for a raw AD1848 card */
2919 MODULE_PARM(irq, "i");                  /* IRQ to use */
2920 MODULE_PARM(dma, "i");                  /* First DMA channel */
2921 MODULE_PARM(dma2, "i");                 /* Second DMA channel */
2922 MODULE_PARM(type, "i");                 /* Card type */
2923 MODULE_PARM(deskpro_xl, "i");           /* Special magic for Deskpro XL boxen */
2924 MODULE_PARM(deskpro_m, "i");            /* Special magic for Deskpro M box */
2925 MODULE_PARM(soundpro, "i");             /* More special magic for SoundPro chips */
2926
2927 #ifdef CONFIG_PNP
2928 MODULE_PARM(isapnp,     "i");
2929 MODULE_PARM(isapnpjump, "i");
2930 MODULE_PARM(reverse,    "i");
2931 MODULE_PARM_DESC(isapnp,        "When set to 0, Plug & Play support will be disabled");
2932 MODULE_PARM_DESC(isapnpjump,    "Jumps to a specific slot in the driver's PnP table. Use the source, Luke.");
2933 MODULE_PARM_DESC(reverse,       "When set to 1, will reverse ISAPnP search order");
2934
2935 struct pnp_dev  *ad1848_dev  = NULL;
2936
2937 /* Please add new entries at the end of the table */
2938 static struct {
2939         char *name;
2940         unsigned short  card_vendor, card_device,
2941                         vendor, function;
2942         short mss_io, irq, dma, dma2;   /* index into isapnp table */
2943         int type;
2944 } ad1848_isapnp_list[] __initdata = {
2945         {"CMI 8330 SoundPRO",
2946                 ISAPNP_VENDOR('C','M','I'), ISAPNP_DEVICE(0x0001),
2947                 ISAPNP_VENDOR('@','@','@'), ISAPNP_FUNCTION(0x0001),
2948                 0, 0, 0,-1, 0},
2949         {"CS4232 based card",
2950                 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2951                 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0000),
2952                 0, 0, 0, 1, 0},
2953         {"CS4232 based card",
2954                 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2955                 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0100),
2956                 0, 0, 0, 1, 0},
2957         {"OPL3-SA2 WSS mode",
2958                 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2959                 ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021),
2960                 1, 0, 0, 1, 1},
2961         {"Advanced Gravis InterWave Audio",
2962                 ISAPNP_VENDOR('G','R','V'), ISAPNP_DEVICE(0x0001),
2963                 ISAPNP_VENDOR('G','R','V'), ISAPNP_FUNCTION(0x0000),
2964                 0, 0, 0, 1, 0},
2965         {0}
2966 };
2967
2968 static struct isapnp_device_id id_table[] __devinitdata = {
2969         {       ISAPNP_VENDOR('C','M','I'), ISAPNP_DEVICE(0x0001),
2970                 ISAPNP_VENDOR('@','@','@'), ISAPNP_FUNCTION(0x0001), 0 },
2971         {       ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2972                 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0000), 0 },
2973         {       ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2974                 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0100), 0 },
2975         /* The main driver for this card is opl3sa2
2976         {       ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2977                 ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021), 0 },
2978         */
2979         {       ISAPNP_VENDOR('G','R','V'), ISAPNP_DEVICE(0x0001),
2980                 ISAPNP_VENDOR('G','R','V'), ISAPNP_FUNCTION(0x0000), 0 },
2981         {0}
2982 };
2983
2984 MODULE_DEVICE_TABLE(isapnp, id_table);
2985
2986 static struct pnp_dev *activate_dev(char *devname, char *resname, struct pnp_dev *dev)
2987 {
2988         int err;
2989
2990         err = pnp_device_attach(dev);
2991         if (err < 0)
2992                 return(NULL);
2993
2994         if((err = pnp_activate_dev(dev)) < 0) {
2995                 printk(KERN_ERR "ad1848: %s %s config failed (out of resources?)[%d]\n", devname, resname, err);
2996
2997                 pnp_device_detach(dev);
2998
2999                 return(NULL);
3000         }
3001         audio_activated = 1;
3002         return(dev);
3003 }
3004
3005 static struct pnp_dev *ad1848_init_generic(struct pnp_card *bus, struct address_info *hw_config, int slot)
3006 {
3007
3008         /* Configure Audio device */
3009         if((ad1848_dev = pnp_find_dev(bus, ad1848_isapnp_list[slot].vendor, ad1848_isapnp_list[slot].function, NULL)))
3010         {
3011                 if((ad1848_dev = activate_dev(ad1848_isapnp_list[slot].name, "ad1848", ad1848_dev)))
3012                 {
3013                         hw_config->io_base      = pnp_port_start(ad1848_dev, ad1848_isapnp_list[slot].mss_io);
3014                         hw_config->irq          = pnp_irq(ad1848_dev, ad1848_isapnp_list[slot].irq);
3015                         hw_config->dma          = pnp_dma(ad1848_dev, ad1848_isapnp_list[slot].dma);
3016                         if(ad1848_isapnp_list[slot].dma2 != -1)
3017                                 hw_config->dma2 = pnp_dma(ad1848_dev, ad1848_isapnp_list[slot].dma2);
3018                         else
3019                                 hw_config->dma2 = -1;
3020                         hw_config->card_subtype = ad1848_isapnp_list[slot].type;
3021                 } else
3022                         return(NULL);
3023         } else
3024                 return(NULL);
3025
3026         return(ad1848_dev);
3027 }
3028
3029 static int __init ad1848_isapnp_init(struct address_info *hw_config, struct pnp_card *bus, int slot)
3030 {
3031         char *busname = bus->name[0] ? bus->name : ad1848_isapnp_list[slot].name;
3032
3033         /* Initialize this baby. */
3034
3035         if(ad1848_init_generic(bus, hw_config, slot)) {
3036                 /* We got it. */
3037
3038                 printk(KERN_NOTICE "ad1848: PnP reports '%s' at i/o %#x, irq %d, dma %d, %d\n",
3039                        busname,
3040                        hw_config->io_base, hw_config->irq, hw_config->dma,
3041                        hw_config->dma2);
3042                 return 1;
3043         }
3044         return 0;
3045 }
3046
3047 static int __init ad1848_isapnp_probe(struct address_info *hw_config)
3048 {
3049         static int first = 1;
3050         int i;
3051
3052         /* Count entries in sb_isapnp_list */
3053         for (i = 0; ad1848_isapnp_list[i].card_vendor != 0; i++);
3054         i--;
3055
3056         /* Check and adjust isapnpjump */
3057         if( isapnpjump < 0 || isapnpjump > i) {
3058                 isapnpjump = reverse ? i : 0;
3059                 printk(KERN_ERR "ad1848: Valid range for isapnpjump is 0-%d. Adjusted to %d.\n", i, isapnpjump);
3060         }
3061
3062         if(!first || !reverse)
3063                 i = isapnpjump;
3064         first = 0;
3065         while(ad1848_isapnp_list[i].card_vendor != 0) {
3066                 static struct pnp_card *bus = NULL;
3067
3068                 while ((bus = pnp_find_card(
3069                                 ad1848_isapnp_list[i].card_vendor,
3070                                 ad1848_isapnp_list[i].card_device,
3071                                 bus))) {
3072
3073                         if(ad1848_isapnp_init(hw_config, bus, i)) {
3074                                 isapnpjump = i; /* start next search from here */
3075                                 return 0;
3076                         }
3077                 }
3078                 i += reverse ? -1 : 1;
3079         }
3080
3081         return -ENODEV;
3082 }
3083 #endif
3084
3085
3086 static int __init init_ad1848(void)
3087 {
3088         printk(KERN_INFO "ad1848/cs4248 codec driver Copyright (C) by Hannu Savolainen 1993-1996\n");
3089
3090 #ifdef CONFIG_PNP
3091         if(isapnp && (ad1848_isapnp_probe(&cfg) < 0) ) {
3092                 printk(KERN_NOTICE "ad1848: No ISAPnP cards found, trying standard ones...\n");
3093                 isapnp = 0;
3094         }
3095 #endif
3096
3097         if(io != -1) {
3098                 if( isapnp == 0 )
3099                 {
3100                         if(irq == -1 || dma == -1) {
3101                                 printk(KERN_WARNING "ad1848: must give I/O , IRQ and DMA.\n");
3102                                 return -EINVAL;
3103                         }
3104
3105                         cfg.irq = irq;
3106                         cfg.io_base = io;
3107                         cfg.dma = dma;
3108                         cfg.dma2 = dma2;
3109                         cfg.card_subtype = type;
3110                 }
3111
3112                 if(!probe_ms_sound(&cfg))
3113                         return -ENODEV;
3114                 attach_ms_sound(&cfg, THIS_MODULE);
3115                 loaded = 1;
3116         }
3117         return 0;
3118 }
3119
3120 static void __exit cleanup_ad1848(void)
3121 {
3122         if(loaded)
3123                 unload_ms_sound(&cfg);
3124
3125 #ifdef CONFIG_PNP
3126         if(ad1848_dev){
3127                 if(audio_activated)
3128                         pnp_device_detach(ad1848_dev);
3129         }
3130 #endif
3131 }
3132
3133 module_init(init_ad1848);
3134 module_exit(cleanup_ad1848);
3135
3136 #ifndef MODULE
3137 static int __init setup_ad1848(char *str)
3138 {
3139         /* io, irq, dma, dma2, type */
3140         int ints[6];
3141
3142         str = get_options(str, ARRAY_SIZE(ints), ints);
3143
3144         io      = ints[1];
3145         irq     = ints[2];
3146         dma     = ints[3];
3147         dma2    = ints[4];
3148         type    = ints[5];
3149
3150         return 1;
3151 }
3152
3153 __setup("ad1848=", setup_ad1848);
3154 #endif
3155 MODULE_LICENSE("GPL");