sound/oss/ad1889.c

   1 /*
   2  *  Copyright 2001-2004 Randolph Chung <tausq@debian.org>
   3  *
   4  *  Analog Devices 1889 PCI audio driver (AD1819 AC97-compatible codec)
   5  *
   6  *   This program is free software; you can redistribute it and/or modify
   7  *   it under the terms of the GNU General Public License as published by
   8  *   the Free Software Foundation; either version 2 of the License, or
   9  *   (at your option) any later version.
  10  *
  11  *   This program is distributed in the hope that it will be useful,
  12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *   GNU General Public License for more details.
  15  *
  16  *   You should have received a copy of the GNU General Public License
  17  *   along with this program; if not, write to the Free Software
  18  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  *   Notes:
  21  *   1. Only flat DMA is supported; s-g is not supported right now
  22  *
  23  *
  24 <jsm> tausq: Anyway, to set up sample rates for D to A, you just use the sample rate on the codec. For A to D, you need to set the codec always to 48K (using the split sample rate feature on the codec) and then set the resampler on the AD1889 to the sample rate you want.
  25 <jsm> Also, when changing the sample rate on the codec you need to power it down and re power it up for the change to take effect!
  26  *
  27  * $Id: ad1889.c,v 1.3 2002/10/19 21:31:44 grundler Exp $
  28  */
  29 #include <linux/config.h>
  30 #include <linux/module.h>
  31 #include <linux/init.h>
  32 #include <linux/ioport.h>
  33 #include <linux/pci.h>
  34 #include <linux/poll.h>
  35 #include <linux/proc_fs.h>
  36 #include <linux/slab.h>
  37 #include <linux/soundcard.h>
  38 #include <linux/ac97_codec.h>
  39 #include <linux/sound.h>
  40 #include <linux/interrupt.h>
  41
  42 #include <asm/delay.h>
  43 #include <asm/io.h>
  44 #include <asm/dma.h>
  45 #include <asm/uaccess.h>
  46
  47 #include "ad1889.h"
  48
  49 #define DBG(fmt, arg...) printk(fmt, ##arg)
  50 #define DEVNAME "ad1889"
  51
  52 #define NR_HW_CH        4
  53 #define DAC_RUNNING     1
  54 #define ADC_RUNNING     2
  55
  56 #define UNDERRUN(dev)   (0)
  57
  58 #define AD1889_READW(dev,reg) readw(dev->regbase + reg)
  59 #define AD1889_WRITEW(dev,reg,val) writew((val), dev->regbase + reg)
  60 #define AD1889_READL(dev,reg) readl(dev->regbase + reg)
  61 #define AD1889_WRITEL(dev,reg,val) writel((val), dev->regbase + reg)
  62
  63 //now 100ms
  64 /* #define WAIT_10MS()  schedule_timeout(HZ/10) */
  65 #define WAIT_10MS()     do { int __i; for (__i = 0; __i < 100; __i++) udelay(1000); } while(0)
  66
  67 /* currently only support a single device */
  68 static ad1889_dev_t *ad1889_dev = NULL;
  69
  70 /************************* helper routines ***************************** */
  71 static inline void ad1889_set_wav_rate(ad1889_dev_t *dev, int rate)
  72 {
  73         struct ac97_codec *ac97_codec = dev->ac97_codec;
  74
  75         DBG("Setting WAV rate to %d\n", rate);
  76         dev->state[AD_WAV_STATE].dmabuf.rate = rate;
  77         AD1889_WRITEW(dev, AD_DSWAS, rate);
  78
  79         /* Cycle the DAC to enable the new rate */
  80         ac97_codec->codec_write(dev->ac97_codec, AC97_POWER_CONTROL, 0x0200);
  81         WAIT_10MS();
  82         ac97_codec->codec_write(dev->ac97_codec, AC97_POWER_CONTROL, 0);
  83 }
  84
  85 static inline void ad1889_set_adc_rate(ad1889_dev_t *dev, int rate)
  86 {
  87         struct ac97_codec *ac97_codec = dev->ac97_codec;
  88
  89         DBG("Setting ADC rate to %d\n", rate);
  90         dev->state[AD_ADC_STATE].dmabuf.rate = rate;
  91         AD1889_WRITEW(dev, AD_DSRES, rate);
  92
  93         /* Cycle the ADC to enable the new rate */
  94         ac97_codec->codec_write(dev->ac97_codec, AC97_POWER_CONTROL, 0x0100);
  95         WAIT_10MS();
  96         ac97_codec->codec_write(dev->ac97_codec, AC97_POWER_CONTROL, 0);
  97 }
  98
  99 static inline void ad1889_set_wav_fmt(ad1889_dev_t *dev, int fmt)
 100 {
 101         u16 tmp;
 102
 103         DBG("Setting WAV format to 0x%x\n", fmt);
 104
 105         tmp = AD1889_READW(ad1889_dev, AD_DSWSMC);
 106         if (fmt & AFMT_S16_LE) {
 107                 //tmp |= 0x0100; /* set WA16 */
 108                 tmp |= 0x0300; /* set WA16 stereo */
 109         } else if (fmt & AFMT_U8) {
 110                 tmp &= ~0x0100; /* clear WA16 */
 111         }
 112         AD1889_WRITEW(ad1889_dev, AD_DSWSMC, tmp);
 113 }
 114
 115 static inline void ad1889_set_adc_fmt(ad1889_dev_t *dev, int fmt)
 116 {
 117         u16 tmp;
 118
 119         DBG("Setting ADC format to 0x%x\n", fmt);
 120
 121         tmp = AD1889_READW(ad1889_dev, AD_DSRAMC);
 122         if (fmt & AFMT_S16_LE) {
 123                 tmp |= 0x0100; /* set WA16 */
 124         } else if (fmt & AFMT_U8) {
 125                 tmp &= ~0x0100; /* clear WA16 */
 126         }
 127         AD1889_WRITEW(ad1889_dev, AD_DSRAMC, tmp);
 128 }
 129
 130 static void ad1889_start_wav(ad1889_state_t *state)
 131 {
 132         unsigned long flags;
 133         struct dmabuf *dmabuf = &state->dmabuf;
 134         int cnt;
 135         u16 tmp;
 136
 137         spin_lock_irqsave(&state->card->lock, flags);
 138
 139         if (dmabuf->dma_len)    /* DMA already in flight */
 140                 goto skip_dma;
 141
 142         /* setup dma */
 143         cnt = dmabuf->wr_ptr - dmabuf->rd_ptr;
 144         if (cnt == 0)           /* done - don't need to do anything */
 145                 goto skip_dma;
 146
 147         /* If the wr_ptr has wrapped, only map to the end */
 148         if (cnt < 0)
 149                 cnt = DMA_SIZE - dmabuf->rd_ptr;
 150
 151         dmabuf->dma_handle = pci_map_single(ad1889_dev->pci,
 152                                         dmabuf->rawbuf + dmabuf->rd_ptr,
 153                                         cnt, PCI_DMA_TODEVICE);
 154         dmabuf->dma_len = cnt;
 155         dmabuf->ready = 1;
 156
 157         DBG("Starting playback at 0x%p for %ld bytes\n", dmabuf->rawbuf +
 158             dmabuf->rd_ptr, dmabuf->dma_len);
 159
 160         /* load up the current register set */
 161         AD1889_WRITEL(ad1889_dev, AD_DMAWAVCC, cnt);
 162         AD1889_WRITEL(ad1889_dev, AD_DMAWAVICC, cnt);
 163         AD1889_WRITEL(ad1889_dev, AD_DMAWAVCA, dmabuf->dma_handle);
 164
 165         /* TODO: for now we load the base registers with the same thing */
 166         AD1889_WRITEL(ad1889_dev, AD_DMAWAVBC, cnt);
 167         AD1889_WRITEL(ad1889_dev, AD_DMAWAVIBC, cnt);
 168         AD1889_WRITEL(ad1889_dev, AD_DMAWAVBA, dmabuf->dma_handle);
 169
 170         /* and we're off to the races... */
 171         AD1889_WRITEL(ad1889_dev, AD_DMACHSS, 0x8);
 172         tmp = AD1889_READW(ad1889_dev, AD_DSWSMC);
 173         tmp |= 0x0400; /* set WAEN */
 174         AD1889_WRITEW(ad1889_dev, AD_DSWSMC, tmp);
 175         (void) AD1889_READW(ad1889_dev, AD_DSWSMC); /* flush posted PCI write */
 176
 177         dmabuf->enable |= DAC_RUNNING;
 178
 179 skip_dma:
 180         spin_unlock_irqrestore(&state->card->lock, flags);
 181 }
 182
 183
 184 static void ad1889_stop_wav(ad1889_state_t *state)
 185 {
 186         unsigned long flags;
 187         struct dmabuf *dmabuf = &state->dmabuf;
 188
 189         spin_lock_irqsave(&state->card->lock, flags);
 190
 191         if (dmabuf->enable & DAC_RUNNING) {
 192                 u16 tmp;
 193                 unsigned long cnt = dmabuf->dma_len;
 194
 195                 tmp = AD1889_READW(ad1889_dev, AD_DSWSMC);
 196                 tmp &= ~0x0400; /* clear WAEN */
 197                 AD1889_WRITEW(ad1889_dev, AD_DSWSMC, tmp);
 198                 (void) AD1889_READW(ad1889_dev, AD_DSWSMC); /* flush posted PCI write */
 199                 pci_unmap_single(ad1889_dev->pci, dmabuf->dma_handle,
 200                                 cnt, PCI_DMA_TODEVICE);
 201
 202                 dmabuf->enable &= ~DAC_RUNNING;
 203
 204                 /* update dma pointers */
 205                 dmabuf->rd_ptr += cnt;
 206                 dmabuf->rd_ptr &= (DMA_SIZE - 1);
 207
 208                 dmabuf->dma_handle = 0;
 209                 dmabuf->dma_len = 0;
 210                 dmabuf->ready = 0;
 211
 212                 wake_up(&dmabuf->wait);
 213         }
 214
 215         spin_unlock_irqrestore(&state->card->lock, flags);
 216 }
 217
 218
 219 #if 0
 220 static void ad1889_startstop_adc(ad1889_state_t *state, int start)
 221 {
 222         u16 tmp;
 223         unsigned long flags;
 224
 225         spin_lock_irqsave(&state->card->lock, flags);
 226
 227         tmp = AD1889_READW(ad1889_dev, AD_DSRAMC);
 228         if (start) {
 229                 state->dmabuf.enable |= ADC_RUNNING;
 230                 tmp |= 0x0004; /* set ADEN */
 231         } else {
 232                 state->dmabuf.enable &= ~ADC_RUNNING;
 233                 tmp &= ~0x0004; /* clear ADEN */
 234         }
 235         AD1889_WRITEW(ad1889_dev, AD_DSRAMC, tmp);
 236
 237         spin_unlock_irqrestore(&state->card->lock, flags);
 238 }
 239 #endif
 240
 241 static ad1889_dev_t *ad1889_alloc_dev(struct pci_dev *pci)
 242 {
 243         ad1889_dev_t *dev;
 244         struct dmabuf *dmabuf;
 245         int i;
 246
 247         if ((dev = kmalloc(sizeof(ad1889_dev_t), GFP_KERNEL)) == NULL)
 248                 return NULL;
 249         memset(dev, 0, sizeof(ad1889_dev_t));
 250         spin_lock_init(&dev->lock);
 251         dev->pci = pci;
 252
 253         for (i = 0; i < AD_MAX_STATES; i++) {
 254                 dev->state[i].card = dev;
 255                 init_MUTEX(&dev->state[i].sem);
 256                 init_waitqueue_head(&dev->state[i].dmabuf.wait);
 257         }
 258
 259         /* allocate dma buffer */
 260
 261         for (i = 0; i < AD_MAX_STATES; i++) {
 262                 dmabuf = &dev->state[i].dmabuf;
 263                 dmabuf->rawbuf = kmalloc(DMA_SIZE, GFP_KERNEL|GFP_DMA);
 264                 if (!dmabuf->rawbuf)
 265                         goto err_free_dmabuf;
 266                 dmabuf->rawbuf_size = DMA_SIZE;
 267                 dmabuf->dma_handle = 0;
 268                 dmabuf->rd_ptr = dmabuf->wr_ptr = dmabuf->dma_len = 0UL;
 269                 dmabuf->ready = 0;
 270                 dmabuf->rate = 48000;
 271         }
 272         return dev;
 273
 274 err_free_dmabuf:
 275         while (--i >= 0)
 276                 kfree(dev->state[i].dmabuf.rawbuf);
 277         kfree(dev);
 278         return NULL;
 279 }
 280
 281 static void ad1889_free_dev(ad1889_dev_t *dev)
 282 {
 283         int j;
 284         struct dmabuf *dmabuf;
 285
 286         if (dev == NULL)
 287                 return;
 288
 289         if (dev->ac97_codec)
 290                 ac97_release_codec(dev->ac97_codec);
 291
 292         for (j = 0; j < AD_MAX_STATES; j++) {
 293                 dmabuf = &dev->state[j].dmabuf;
 294                 if (dmabuf->rawbuf != NULL)
 295                         kfree(dmabuf->rawbuf);
 296         }
 297
 298         kfree(dev);
 299 }
 300
 301 static inline void ad1889_trigger_playback(ad1889_dev_t *dev)
 302 {
 303 #if 0
 304         u32 val;
 305         struct dmabuf *dmabuf = &dev->state[AD_WAV_STATE].dmabuf;
 306 #endif
 307
 308         ad1889_start_wav(&dev->state[AD_WAV_STATE]);
 309 }
 310
 311 int ad1889_read_proc (char *page, char **start, off_t off,
 312                       int count, int *eof, void *data)
 313 {
 314         char *out = page;
 315         int len, i;
 316         ad1889_dev_t *dev = data;
 317         ad1889_reg_t regs[] = {
 318                 { "WSMC", AD_DSWSMC, 16 },
 319                 { "RAMC", AD_DSRAMC, 16 },
 320                 { "WADA", AD_DSWADA, 16 },
 321                 { "SYDA", AD_DSSYDA, 16 },
 322                 { "WAS", AD_DSWAS, 16 },
 323                 { "RES", AD_DSRES, 16 },
 324                 { "CCS", AD_DSCCS, 16 },
 325                 { "ADCBA", AD_DMAADCBA, 32 },
 326                 { "ADCCA", AD_DMAADCCA, 32 },
 327                 { "ADCBC", AD_DMAADCBC, 32 },
 328                 { "ADCCC", AD_DMAADCCC, 32 },
 329                 { "ADCIBC", AD_DMAADCIBC, 32 },
 330                 { "ADCICC", AD_DMAADCICC, 32 },
 331                 { "ADCCTRL", AD_DMAADCCTRL, 16 },
 332                 { "WAVBA", AD_DMAWAVBA, 32 },
 333                 { "WAVCA", AD_DMAWAVCA, 32 },
 334                 { "WAVBC", AD_DMAWAVBC, 32 },
 335                 { "WAVCC", AD_DMAWAVCC, 32 },
 336                 { "WAVIBC", AD_DMAWAVIBC, 32 },
 337                 { "WAVICC", AD_DMAWAVICC, 32 },
 338                 { "WAVCTRL", AD_DMAWAVCTRL, 16 },
 339                 { "DISR", AD_DMADISR, 32 },
 340                 { "CHSS", AD_DMACHSS, 32 },
 341                 { "IPC", AD_GPIOIPC, 16 },
 342                 { "OP", AD_GPIOOP, 16 },
 343                 { "IP", AD_GPIOIP, 16 },
 344                 { "ACIC", AD_ACIC, 16 },
 345                 { "AC97_RESET", 0x100 + AC97_RESET, 16 },
 346                 { "AC97_MASTER_VOL_STEREO", 0x100 + AC97_MASTER_VOL_STEREO, 16 },
 347                 { "AC97_HEADPHONE_VOL", 0x100 + AC97_HEADPHONE_VOL, 16 },
 348                 { "AC97_MASTER_VOL_MONO", 0x100 + AC97_MASTER_VOL_MONO, 16 },
 349                 { "AC97_MASTER_TONE", 0x100 + AC97_MASTER_TONE, 16 },
 350                 { "AC97_PCBEEP_VOL", 0x100 + AC97_PCBEEP_VOL, 16 },
 351                 { "AC97_PHONE_VOL", 0x100 + AC97_PHONE_VOL, 16 },
 352                 { "AC97_MIC_VOL", 0x100 + AC97_MIC_VOL, 16 },
 353                 { "AC97_LINEIN_VOL", 0x100 + AC97_LINEIN_VOL, 16 },
 354                 { "AC97_CD_VOL", 0x100 + AC97_CD_VOL, 16 },
 355                 { "AC97_VIDEO_VOL", 0x100 + AC97_VIDEO_VOL, 16 },
 356                 { "AC97_AUX_VOL", 0x100 + AC97_AUX_VOL, 16 },
 357                 { "AC97_PCMOUT_VOL", 0x100 + AC97_PCMOUT_VOL, 16 },
 358                 { "AC97_RECORD_SELECT", 0x100 + AC97_RECORD_SELECT, 16 },
 359                 { "AC97_RECORD_GAIN", 0x100 + AC97_RECORD_GAIN, 16 },
 360                 { "AC97_RECORD_GAIN_MIC", 0x100 + AC97_RECORD_GAIN_MIC, 16 },
 361                 { "AC97_GENERAL_PURPOSE", 0x100 + AC97_GENERAL_PURPOSE, 16 },
 362                 { "AC97_3D_CONTROL", 0x100 + AC97_3D_CONTROL, 16 },
 363                 { "AC97_MODEM_RATE", 0x100 + AC97_MODEM_RATE, 16 },
 364                 { "AC97_POWER_CONTROL", 0x100 + AC97_POWER_CONTROL, 16 },
 365                 { NULL }
 366         };
 367
 368         if (dev == NULL)
 369                 return -ENODEV;
 370
 371         for (i = 0; regs[i].name != 0; i++)
 372                 out += sprintf(out, "%s: 0x%0*x\n", regs[i].name,
 373                         regs[i].width >> 2,
 374                         (regs[i].width == 16
 375                                 ? AD1889_READW(dev, regs[i].offset)
 376                                 : AD1889_READL(dev, regs[i].offset)));
 377
 378         for (i = 0; i < AD_MAX_STATES; i++) {
 379                 out += sprintf(out, "DMA status for %s:\n",
 380                         (i == AD_WAV_STATE ? "WAV" : "ADC"));
 381                 out += sprintf(out, "\t\t0x%p (IOVA: 0x%llu)\n",
 382                         dev->state[i].dmabuf.rawbuf,
 383                         (unsigned long long)dev->state[i].dmabuf.dma_handle);
 384
 385                 out += sprintf(out, "\tread ptr: offset %u\n",
 386                         (unsigned int)dev->state[i].dmabuf.rd_ptr);
 387                 out += sprintf(out, "\twrite ptr: offset %u\n",
 388                         (unsigned int)dev->state[i].dmabuf.wr_ptr);
 389                 out += sprintf(out, "\tdma len: offset %u\n",
 390                         (unsigned int)dev->state[i].dmabuf.dma_len);
 391         }
 392
 393         len = out - page - off;
 394         if (len < count) {
 395                 *eof = 1;
 396                 if (len <= 0) return 0;
 397         } else {
 398                 len = count;
 399         }
 400         *start = page + off;
 401         return len;
 402 }
 403
 404 /***************************** DMA interfaces ************************** */
 405 #if 0
 406 static inline unsigned long ad1889_get_dma_addr(ad1889_state_t *state)
 407 {
 408         struct dmabuf *dmabuf = &state->dmabuf;
 409         u32 offset;
 410
 411         if (!(dmabuf->enable & (DAC_RUNNING | ADC_RUNNING))) {
 412                 printk(KERN_ERR DEVNAME ": get_dma_addr called without dma enabled\n");
 413                 return 0;
 414         }
 415
 416         if (dmabuf->enable & DAC_RUNNING)
 417                 offset = le32_to_cpu(AD1889_READL(state->card, AD_DMAWAVBA));
 418         else
 419                 offset = le32_to_cpu(AD1889_READL(state->card, AD_DMAADCBA));
 420
 421         return (unsigned long)bus_to_virt((unsigned long)offset) - (unsigned long)dmabuf->rawbuf;
 422 }
 423
 424 static void ad1889_update_ptr(ad1889_dev_t *dev, int wake)
 425 {
 426         ad1889_state_t *state;
 427         struct dmabuf *dmabuf;
 428         unsigned long hwptr;
 429         int diff;
 430
 431         /* check ADC first */
 432         state = &dev->adc_state;
 433         dmabuf = &state->dmabuf;
 434         if (dmabuf->enable & ADC_RUNNING) {
 435                 hwptr = ad1889_get_dma_addr(state);
 436                 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
 437
 438                 dmabuf->hwptr = hwptr;
 439                 dmabuf->total_bytes += diff;
 440                 dmabuf->count += diff;
 441                 if (dmabuf->count > dmabuf->dmasize)
 442                         dmabuf->count = dmabuf->dmasize;
 443
 444                 if (dmabuf->mapped) {
 445                         if (wake & dmabuf->count >= dmabuf->fragsize)
 446                                 wake_up(&dmabuf->wait);
 447                 } else {
 448                         if (wake & dmabuf->count > 0)
 449                                 wake_up(&dmabuf->wait);
 450                 }
 451         }
 452
 453         /* check DAC */
 454         state = &dev->wav_state;
 455         dmabuf = &state->dmabuf;
 456         if (dmabuf->enable & DAC_RUNNING) {
 457 XXX
 458
 459 }
 460 #endif
 461
 462 /************************* /dev/dsp interfaces ************************* */
 463
 464 static ssize_t ad1889_read(struct file *file, char __user *buffer, size_t count,
 465         loff_t *ppos)
 466 {
 467         return 0;
 468 }
 469
 470 static ssize_t ad1889_write(struct file *file, const char __user *buffer, size_t count,
 471         loff_t *ppos)
 472 {
 473         ad1889_dev_t *dev = (ad1889_dev_t *)file->private_data;
 474         ad1889_state_t *state = &dev->state[AD_WAV_STATE];
 475         volatile struct dmabuf *dmabuf = &state->dmabuf;
 476         ssize_t ret = 0;
 477         DECLARE_WAITQUEUE(wait, current);
 478
 479         down(&state->sem);
 480 #if 0
 481         if (dmabuf->mapped) {
 482                 ret = -ENXIO;
 483                 goto err1;
 484         }
 485 #endif
 486         if (!access_ok(VERIFY_READ, buffer, count)) {
 487                 ret = -EFAULT;
 488                 goto err1;
 489         }
 490
 491         add_wait_queue(&state->dmabuf.wait, &wait);
 492
 493         /* start filling dma buffer.... */
 494         while (count > 0) {
 495                 long rem;
 496                 long cnt = count;
 497                 unsigned long flags;
 498
 499                 for (;;) {
 500                         long used_bytes;
 501                         long timeout;   /* max time for DMA in jiffies */
 502
 503                         /* buffer is full if wr catches up to rd */
 504                         spin_lock_irqsave(&state->card->lock, flags);
 505                         used_bytes = dmabuf->wr_ptr - dmabuf->rd_ptr;
 506                         timeout = (dmabuf->dma_len * HZ) / dmabuf->rate;
 507                         spin_unlock_irqrestore(&state->card->lock, flags);
 508
 509                         /* adjust for buffer wrap around */
 510                         used_bytes = (used_bytes + DMA_SIZE) & (DMA_SIZE - 1);
 511
 512                         /* If at least one page unused */
 513                         if (used_bytes < (DMA_SIZE - 0x1000))
 514                                 break;
 515
 516                         /* dma buffer full */
 517
 518                         if (file->f_flags & O_NONBLOCK) {
 519                                 ret = -EAGAIN;
 520                                 goto err2;
 521                         }
 522
 523                         set_current_state(TASK_INTERRUPTIBLE);
 524                         schedule_timeout(timeout + 1);
 525                         if (signal_pending(current)) {
 526                                 ret = -ERESTARTSYS;
 527                                 goto err2;
 528                         }
 529                 }
 530
 531                 /* watch out for wrapping around static buffer */
 532                 spin_lock_irqsave(&state->card->lock, flags);
 533                 rem = DMA_SIZE - dmabuf->wr_ptr;
 534                 if (cnt > rem)
 535                         cnt = rem;
 536
 537                 rem = dmabuf->wr_ptr;
 538
 539                 /* update dma pointers */
 540                 dmabuf->wr_ptr += cnt;
 541                 dmabuf->wr_ptr &= DMA_SIZE - 1; /* wrap ptr if necessary */
 542                 spin_unlock_irqrestore(&state->card->lock, flags);
 543
 544                 /* transfer unwrapped chunk */
 545                 if (copy_from_user(dmabuf->rawbuf + rem, buffer, cnt)) {
 546                         ret = -EFAULT;
 547                         goto err2;
 548                 }
 549
 550                 DBG("Writing 0x%lx bytes to +0x%lx\n", cnt, rem);
 551
 552                 /* update counters */
 553                 count -= cnt;
 554                 buffer += cnt;
 555                 ret += cnt;
 556
 557                 /* we have something to play - go play it! */
 558                 ad1889_trigger_playback(dev);
 559         }
 560
 561 err2:
 562         remove_wait_queue(&state->dmabuf.wait, &wait);
 563 err1:
 564         up(&state->sem);
 565         return ret;
 566 }
 567
 568 static unsigned int ad1889_poll(struct file *file, struct poll_table_struct *wait)
 569 {
 570         unsigned int mask = 0;
 571 #if 0
 572         ad1889_dev_t *dev = (ad1889_dev_t *)file->private_data;
 573         ad1889_state_t *state = NULL;
 574         struct dmabuf *dmabuf;
 575         unsigned long flags;
 576
 577         if (!(file->f_mode & (FMODE_READ | FMODE_WRITE)))
 578                 return -EINVAL;
 579
 580         if (file->f_mode & FMODE_WRITE) {
 581                 state = &dev->state[AD_WAV_STATE];
 582                 if (!state) return 0;
 583                 dmabuf = &state->dmabuf;
 584                 poll_wait(file, &dmabuf->wait, wait);
 585         }
 586
 587         if (file->f_mode & FMODE_READ) {
 588                 state = &dev->state[AD_ADC_STATE];
 589                 if (!state) return 0;
 590                 dmabuf = &state->dmabuf;
 591                 poll_wait(file, &dmabuf->wait, wait);
 592         }
 593
 594         spin_lock_irqsave(&dev->lock, flags);
 595         ad1889_update_ptr(dev, 0);
 596
 597         if (file->f_mode & FMODE_WRITE) {
 598                 state = &dev->state[WAV_STATE];
 599                 dmabuf = &state->dmabuf;
 600                 if (dmabuf->mapped) {
 601                         if (dmabuf->count >= (int)dmabuf->fragsize)
 602                                 mask |= POLLOUT | POLLWRNORM;
 603                 } else {
 604                         if ((int)dmabuf->dmasize >= dmabuf->count +
 605                                 (int)dmabuf->fragsize)
 606                                 mask |= POLLOUT | POLLWRNORM;
 607                 }
 608         }
 609
 610         if (file ->f_mode & FMODE_READ) {
 611                 state = &dev->state[AD_ADC_STATE];
 612                 dmabuf = &state->dmabuf;
 613                 if (dmabuf->count >= (int)dmabuf->fragsize)
 614                         mask |= POLLIN | POLLRDNORM;
 615         }
 616         spin_unlock_irqrestore(&dev->lock, flags);
 617
 618 #endif
 619         return mask;
 620 }
 621
 622 static int ad1889_mmap(struct file *file, struct vm_area_struct *vma)
 623 {
 624         return 0;
 625 }
 626
 627 static int ad1889_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 628         unsigned long arg)
 629 {
 630         int val = 0;
 631         ad1889_dev_t *dev = (ad1889_dev_t *)file->private_data;
 632         struct dmabuf *dmabuf;
 633         audio_buf_info abinfo;
 634         int __user *p = (int __user *)arg;
 635
 636         DBG("ad1889_ioctl cmd 0x%x arg %lu\n", cmd, arg);
 637
 638         switch (cmd)
 639         {
 640         case OSS_GETVERSION:
 641                 return put_user(SOUND_VERSION, p);
 642
 643         case SNDCTL_DSP_RESET:
 644                 break;
 645
 646         case SNDCTL_DSP_SYNC:
 647                 break;
 648
 649         case SNDCTL_DSP_SPEED:
 650                 /* set sampling rate */
 651                 if (get_user(val, p))
 652                         return -EFAULT;
 653                 if (val > 5400 && val < 48000)
 654                 {
 655                         if (file->f_mode & FMODE_WRITE)
 656                                 AD1889_WRITEW(ad1889_dev, AD_DSWAS, val);
 657                         if (file->f_mode & FMODE_READ)
 658                                 AD1889_WRITEW(ad1889_dev, AD_DSRES, val);
 659                 }
 660                 return 0;
 661
 662         case SNDCTL_DSP_STEREO: /* undocumented? */
 663                 if (get_user(val, p))
 664                         return -EFAULT;
 665                 if (file->f_mode & FMODE_READ) {
 666                         val = AD1889_READW(ad1889_dev, AD_DSWSMC);
 667                         if (val) {
 668                                 val |= 0x0200;  /* set WAST */
 669                         } else {
 670                                 val &= ~0x0200; /* clear WAST */
 671                         }
 672                         AD1889_WRITEW(ad1889_dev, AD_DSWSMC, val);
 673                 }
 674                 if (file->f_mode & FMODE_WRITE) {
 675                         val = AD1889_READW(ad1889_dev, AD_DSRAMC);
 676                         if (val) {
 677                                 val |= 0x0002;  /* set ADST */
 678                         } else {
 679                                 val &= ~0x0002; /* clear ADST */
 680                         }
 681                         AD1889_WRITEW(ad1889_dev, AD_DSRAMC, val);
 682                 }
 683
 684                 return 0;
 685
 686         case SNDCTL_DSP_GETBLKSIZE:
 687                 return put_user(DMA_SIZE, p);
 688
 689         case SNDCTL_DSP_GETFMTS:
 690                 return put_user(AFMT_S16_LE|AFMT_U8, p);
 691
 692         case SNDCTL_DSP_SETFMT:
 693                 if (get_user(val, p))
 694                         return -EFAULT;
 695
 696                 if (val == 0) {
 697                         if (file->f_mode & FMODE_READ)
 698                                 ad1889_set_adc_fmt(dev, val);
 699
 700                         if (file->f_mode & FMODE_WRITE)
 701                                 ad1889_set_wav_fmt(dev, val);
 702                 } else {
 703                         val = AFMT_S16_LE | AFMT_U8;
 704                 }
 705
 706                 return put_user(val, p);
 707
 708         case SNDCTL_DSP_CHANNELS:
 709                 break;
 710
 711         case SNDCTL_DSP_POST:
 712                 /* send all data to device */
 713                 break;
 714
 715         case SNDCTL_DSP_SUBDIVIDE:
 716                 break;
 717
 718         case SNDCTL_DSP_SETFRAGMENT:
 719                 /* not supported; uses fixed fragment sizes */
 720                 return put_user(DMA_SIZE, p);
 721
 722         case SNDCTL_DSP_GETOSPACE:
 723         case SNDCTL_DSP_GETISPACE:
 724                 /* space left in dma buffers */
 725                 if (cmd == SNDCTL_DSP_GETOSPACE)
 726                         dmabuf = &dev->state[AD_WAV_STATE].dmabuf;
 727                 else
 728                         dmabuf = &dev->state[AD_ADC_STATE].dmabuf;
 729                 abinfo.fragments = 1;
 730                 abinfo.fragstotal = 1;
 731                 abinfo.fragsize = DMA_SIZE;
 732                 abinfo.bytes = DMA_SIZE;
 733                 return copy_to_user(p, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
 734         case SNDCTL_DSP_NONBLOCK:
 735                 file->f_flags |= O_NONBLOCK;
 736                 return 0;
 737
 738         case SNDCTL_DSP_GETCAPS:
 739                 return put_user(0, p);
 740
 741         case SNDCTL_DSP_GETTRIGGER:
 742         case SNDCTL_DSP_SETTRIGGER:
 743                 break;
 744
 745         case SNDCTL_DSP_GETIPTR:
 746         case SNDCTL_DSP_GETOPTR:
 747                 break;
 748
 749         case SNDCTL_DSP_SETDUPLEX:
 750                 break;
 751
 752         case SNDCTL_DSP_GETODELAY:
 753                 break;
 754
 755         case SOUND_PCM_READ_RATE:
 756                 return put_user(AD1889_READW(ad1889_dev, AD_DSWAS), p);
 757
 758         case SOUND_PCM_READ_CHANNELS:
 759         case SOUND_PCM_READ_BITS:
 760                 break;
 761
 762         case SNDCTL_DSP_MAPINBUF:
 763         case SNDCTL_DSP_MAPOUTBUF:
 764         case SNDCTL_DSP_SETSYNCRO:
 765         case SOUND_PCM_WRITE_FILTER:
 766         case SOUND_PCM_READ_FILTER:
 767                 break;
 768
 769         default:
 770                 break;
 771         }
 772
 773         return -ENOTTY;
 774 }
 775
 776 static int ad1889_open(struct inode *inode, struct file *file)
 777 {
 778         /* check minor; only support /dev/dsp atm */
 779         if (iminor(inode) != 3)
 780                 return -ENXIO;
 781
 782         file->private_data = ad1889_dev;
 783
 784         ad1889_set_wav_rate(ad1889_dev, 48000);
 785         ad1889_set_wav_fmt(ad1889_dev, AFMT_S16_LE);
 786         AD1889_WRITEW(ad1889_dev, AD_DSWADA, 0x0404); /* attenuation */
 787         return nonseekable_open(inode, file);
 788 }
 789
 790 static int ad1889_release(struct inode *inode, struct file *file)
 791 {
 792         /* if we have state free it here */
 793         return 0;
 794 }
 795
 796 static struct file_operations ad1889_fops = {
 797         .owner          = THIS_MODULE,
 798         .llseek         = no_llseek,
 799         .read           = ad1889_read,
 800         .write          = ad1889_write,
 801         .poll           = ad1889_poll,
 802         .ioctl          = ad1889_ioctl,
 803         .mmap           = ad1889_mmap,
 804         .open           = ad1889_open,
 805         .release        = ad1889_release,
 806 };
 807
 808 /************************* /dev/mixer interfaces ************************ */
 809 static int ad1889_mixer_open(struct inode *inode, struct file *file)
 810 {
 811         if (ad1889_dev->ac97_codec->dev_mixer != iminor(inode))
 812                 return -ENODEV;
 813
 814         file->private_data = ad1889_dev->ac97_codec;
 815         return 0;
 816 }
 817
 818 static int ad1889_mixer_release(struct inode *inode, struct file *file)
 819 {
 820         return 0;
 821 }
 822
 823 static int ad1889_mixer_ioctl(struct inode *inode, struct file *file,
 824         unsigned int cmd, unsigned long arg)
 825 {
 826         struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
 827         return codec->mixer_ioctl(codec, cmd, arg);
 828 }
 829
 830 static struct file_operations ad1889_mixer_fops = {
 831         .owner          = THIS_MODULE,
 832         .llseek         = no_llseek,
 833         .ioctl          = ad1889_mixer_ioctl,
 834         .open           = ad1889_mixer_open,
 835         .release        = ad1889_mixer_release,
 836 };
 837
 838 /************************* AC97 interfaces ****************************** */
 839 static void ad1889_codec_write(struct ac97_codec *ac97, u8 reg, u16 val)
 840 {
 841         ad1889_dev_t *dev = ac97->private_data;
 842
 843         //DBG("Writing 0x%x to 0x%lx\n", val, dev->regbase + 0x100 + reg);
 844         AD1889_WRITEW(dev, 0x100 + reg, val);
 845 }
 846
 847 static u16 ad1889_codec_read(struct ac97_codec *ac97, u8 reg)
 848 {
 849         ad1889_dev_t *dev = ac97->private_data;
 850         //DBG("Reading from 0x%lx\n", dev->regbase + 0x100 + reg);
 851         return AD1889_READW(dev, 0x100 + reg);
 852 }
 853
 854 static int ad1889_ac97_init(ad1889_dev_t *dev, int id)
 855 {
 856         struct ac97_codec *ac97;
 857         u16 eid;
 858
 859         if ((ac97 = ac97_alloc_codec()) == NULL)
 860                 return -ENOMEM;
 861
 862         ac97->private_data = dev;
 863         ac97->id = id;
 864
 865         ac97->codec_read = ad1889_codec_read;
 866         ac97->codec_write = ad1889_codec_write;
 867
 868         if (ac97_probe_codec(ac97) == 0) {
 869                 printk(DEVNAME ": ac97_probe_codec failed\n");
 870                 goto out_free;
 871         }
 872
 873         eid = ad1889_codec_read(ac97, AC97_EXTENDED_ID);
 874         if (eid == 0xffff) {
 875                 printk(KERN_WARNING DEVNAME ": no codec attached?\n");
 876                 goto out_free;
 877         }
 878
 879         dev->ac97_features = eid;
 880
 881         if ((ac97->dev_mixer = register_sound_mixer(&ad1889_mixer_fops, -1)) < 0) {
 882                 printk(KERN_ERR DEVNAME ": cannot register mixer\n");
 883                 goto out_free;
 884         }
 885
 886         dev->ac97_codec = ac97;
 887         return 0;
 888
 889 out_free:
 890         ac97_release_codec(ac97);
 891         return -ENODEV;
 892 }
 893
 894 static int ad1889_aclink_reset(struct pci_dev * pcidev)
 895 {
 896         u16 stat;
 897         int retry = 200;
 898         ad1889_dev_t *dev = pci_get_drvdata(pcidev);
 899
 900         AD1889_WRITEW(dev, AD_DSCCS, 0x8000); /* turn on clock */
 901         AD1889_READW(dev, AD_DSCCS);
 902
 903         WAIT_10MS();
 904
 905         stat = AD1889_READW(dev, AD_ACIC);
 906         stat |= 0x0002;                         /* Reset Disable */
 907         AD1889_WRITEW(dev, AD_ACIC, stat);
 908         (void) AD1889_READW(dev, AD_ACIC);      /* flush posted write */
 909
 910         udelay(10);
 911
 912         stat = AD1889_READW(dev, AD_ACIC);
 913         stat |= 0x0001;                         /* Interface Enable */
 914         AD1889_WRITEW(dev, AD_ACIC, stat);
 915
 916         do {
 917                 if (AD1889_READW(dev, AD_ACIC) & 0x8000)        /* Ready */
 918                         break;
 919                 WAIT_10MS();
 920                 retry--;
 921         } while (retry > 0);
 922
 923         if (!retry) {
 924                 printk(KERN_ERR "ad1889_aclink_reset: codec is not ready [0x%x]\n",
 925                             AD1889_READW(dev, AD_ACIC));
 926                 return -EBUSY;
 927         }
 928
 929         /* TODO reset AC97 codec */
 930         /* TODO set wave/adc pci ctrl status */
 931
 932         stat = AD1889_READW(dev, AD_ACIC);
 933         stat |= 0x0004;                         /* Audio Stream Output Enable */
 934         AD1889_WRITEW(dev, AD_ACIC, stat);
 935         return 0;
 936 }
 937
 938 /************************* PCI interfaces ****************************** */
 939 /* PCI device table */
 940 static struct pci_device_id ad1889_id_tbl[] = {
 941         { PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS, PCI_ANY_ID,
 942           PCI_ANY_ID, 0, 0, (unsigned long)DEVNAME },
 943         { },
 944 };
 945 MODULE_DEVICE_TABLE(pci, ad1889_id_tbl);
 946
 947 static irqreturn_t ad1889_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 948 {
 949         u32 stat;
 950         ad1889_dev_t *dev = (ad1889_dev_t *)dev_id;
 951
 952         stat = AD1889_READL(dev, AD_DMADISR);
 953
 954         /* clear ISR */
 955         AD1889_WRITEL(dev, AD_DMADISR, stat);
 956
 957         if (stat & 0x8) {               /* WAVI */
 958                 DBG("WAV interrupt\n");
 959                 dev->stats.wav_intrs++;
 960                 if (dev->state[AD_WAV_STATE].dmabuf.ready) {
 961                         ad1889_stop_wav(&dev->state[AD_WAV_STATE]);     /* clean up */
 962                         ad1889_start_wav(&dev->state[AD_WAV_STATE]);    /* start new */
 963                 }
 964         }
 965
 966         if ((stat & 0x2) && dev->state[AD_ADC_STATE].dmabuf.ready) { /* ADCI */
 967                 DBG("ADC interrupt\n");
 968                 dev->stats.adc_intrs++;
 969         }
 970         if(stat)
 971                 return IRQ_HANDLED;
 972         return IRQ_NONE;
 973 }
 974
 975 static void ad1889_initcfg(ad1889_dev_t *dev)
 976 {
 977         u16 tmp16;
 978         u32 tmp32;
 979
 980         /* make sure the interrupt bits are setup the way we want */
 981         tmp32 = AD1889_READL(dev, AD_DMAWAVCTRL);
 982         tmp32 &= ~0xff; /* flat dma, no sg, mask out the intr bits */
 983         tmp32 |= 0x6;  /* intr on count, loop */
 984         AD1889_WRITEL(dev, AD_DMAWAVCTRL, tmp32);
 985
 986         /* unmute... */
 987         tmp16 = AD1889_READW(dev, AD_DSWADA);
 988         tmp16 &= ~0x8080;
 989         AD1889_WRITEW(dev, AD_DSWADA, tmp16);
 990 }
 991
 992 static int __devinit ad1889_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
 993 {
 994         int err;
 995         ad1889_dev_t *dev;
 996         unsigned long bar;
 997         struct proc_dir_entry *proc_root = NULL;
 998
 999         if ((err = pci_enable_device(pcidev)) != 0) {
1000                 printk(KERN_ERR DEVNAME ": pci_enable_device failed\n");
1001                 return err;
1002         }
1003
1004         pci_set_master(pcidev);
1005         if ((dev = ad1889_alloc_dev(pcidev)) == NULL) {
1006                 printk(KERN_ERR DEVNAME ": cannot allocate memory for device\n");
1007                 return -ENOMEM;
1008         }
1009         pci_set_drvdata(pcidev, dev);
1010         bar = pci_resource_start(pcidev, 0);
1011
1012         if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_MEM)) {
1013                 printk(KERN_ERR DEVNAME ": memory region not assigned\n");
1014                 goto err_free_mem;
1015         }
1016
1017         if (request_irq(pcidev->irq, ad1889_interrupt, SA_SHIRQ, DEVNAME, dev) != 0) {
1018                 printk(KERN_ERR DEVNAME ": unable to request interrupt\n");
1019                 goto err_free_mem;
1020         }
1021
1022         request_mem_region(bar, AD_DSIOMEMSIZE, DEVNAME);
1023         dev->regbase = (unsigned long)ioremap_nocache(bar, AD_DSIOMEMSIZE);
1024
1025         printk(KERN_INFO DEVNAME ": %s at 0x%lx IRQ %d\n",
1026                 (char *)ent->driver_data, dev->regbase, pcidev->irq);
1027
1028         if (ad1889_aclink_reset(pcidev) != 0)
1029                 goto err_free_mem;
1030
1031         /* register /dev/dsp */
1032         if ((dev->dev_audio = register_sound_dsp(&ad1889_fops, -1)) < 0) {
1033                 printk(KERN_ERR DEVNAME ": cannot register /dev/dsp\n");
1034                 goto err_free_irq;
1035         }
1036
1037         if ((err = ad1889_ac97_init(dev, 0)) != 0)
1038                 goto err_free_dsp;
1039
1040         if (((proc_root = proc_mkdir("driver/ad1889", NULL)) == NULL) ||
1041             create_proc_read_entry("ac97", S_IFREG|S_IRUGO, proc_root, ac97_read_proc, dev->ac97_codec) == NULL ||
1042             create_proc_read_entry("info", S_IFREG|S_IRUGO, proc_root, ad1889_read_proc, dev) == NULL)
1043                 goto err_free_dsp;
1044
1045         ad1889_initcfg(dev);
1046
1047         //DBG(DEVNAME ": Driver initialization done!\n");
1048
1049         ad1889_dev = dev;
1050
1051         return 0;
1052
1053 err_free_dsp:
1054         unregister_sound_dsp(dev->dev_audio);
1055
1056 err_free_irq:
1057         free_irq(pcidev->irq, dev);
1058
1059 err_free_mem:
1060         ad1889_free_dev(dev);
1061         pci_set_drvdata(pcidev, NULL);
1062
1063         return -ENODEV;
1064 }
1065
1066 static void __devexit ad1889_remove(struct pci_dev *pcidev)
1067 {
1068         ad1889_dev_t *dev = pci_get_drvdata(pcidev);
1069
1070         if (dev == NULL) return;
1071
1072         unregister_sound_mixer(dev->ac97_codec->dev_mixer);
1073         unregister_sound_dsp(dev->dev_audio);
1074         free_irq(pcidev->irq, dev);
1075         release_mem_region(dev->regbase, AD_DSIOMEMSIZE);
1076
1077         /* any hw programming needed? */
1078         ad1889_free_dev(dev);
1079 }
1080
1081 MODULE_AUTHOR("Randolph Chung");
1082 MODULE_DESCRIPTION("Analog Devices AD1889 PCI Audio");
1083 MODULE_LICENSE("GPL");
1084
1085 static struct pci_driver ad1889_driver = {
1086         .name           = DEVNAME,
1087         .id_table       = ad1889_id_tbl,
1088         .probe          = ad1889_probe,
1089         .remove         = __devexit_p(ad1889_remove),
1090 };
1091
1092 static int __init ad1889_init_module(void)
1093 {
1094         return pci_module_init(&ad1889_driver);
1095 }
1096
1097 static void ad1889_exit_module(void)
1098 {
1099         pci_unregister_driver(&ad1889_driver);
1100         return;
1101 }
1102
1103 module_init(ad1889_init_module);
1104 module_exit(ad1889_exit_module);