sound/oss/au1000.c

   1 /*
   2  *      au1000.c  --  Sound driver for Alchemy Au1000 MIPS Internet Edge
   3  *                    Processor.
   4  *
   5  * Copyright 2001 MontaVista Software Inc.
   6  * Author: MontaVista Software, Inc.
   7  *              stevel@mvista.com or source@mvista.com
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  *
  29  *
  30  * Module command line parameters:
  31  *
  32  *  Supported devices:
  33  *  /dev/dsp    standard OSS /dev/dsp device
  34  *  /dev/mixer  standard OSS /dev/mixer device
  35  *
  36  * Notes:
  37  *
  38  *  1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
  39  *     taken, slightly modified or not at all, from the ES1371 driver,
  40  *     so refer to the credits in es1371.c for those. The rest of the
  41  *     code (probe, open, read, write, the ISR, etc.) is new.
  42  *
  43  *  Revision history
  44  *    06.27.2001  Initial version
  45  *    03.20.2002  Added mutex locks around read/write methods, to prevent
  46  *                simultaneous access on SMP or preemptible kernels. Also
  47  *                removed the counter/pointer fragment aligning at the end
  48  *                of read/write methods [stevel].
  49  *    03.21.2002  Add support for coherent DMA on the audio read/write DMA
  50  *                channels [stevel].
  51  *
  52  */
  53 #include <linux/module.h>
  54 #include <linux/string.h>
  55 #include <linux/ioport.h>
  56 #include <linux/sched.h>
  57 #include <linux/delay.h>
  58 #include <linux/sound.h>
  59 #include <linux/slab.h>
  60 #include <linux/soundcard.h>
  61 #include <linux/init.h>
  62 #include <linux/poll.h>
  63 #include <linux/pci.h>
  64 #include <linux/bitops.h>
  65 #include <linux/proc_fs.h>
  66 #include <linux/spinlock.h>
  67 #include <linux/smp_lock.h>
  68 #include <linux/ac97_codec.h>
  69 #include <linux/wrapper.h>
  70 #include <asm/io.h>
  71 #include <asm/uaccess.h>
  72 #include <asm/hardirq.h>
  73 #include <asm/au1000.h>
  74 #include <asm/au1000_dma.h>
  75
  76 /* --------------------------------------------------------------------- */
  77
  78 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
  79 #define AU1000_DEBUG
  80 #undef AU1000_VERBOSE_DEBUG
  81
  82 #define USE_COHERENT_DMA
  83
  84 #define AU1000_MODULE_NAME "Au1000 audio"
  85 #define PFX AU1000_MODULE_NAME
  86
  87 #ifdef AU1000_DEBUG
  88 #define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg)
  89 #else
  90 #define dbg(format, arg...) do {} while (0)
  91 #endif
  92 #define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg)
  93 #define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg)
  94 #define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg)
  95
  96
  97 /* misc stuff */
  98 #define POLL_COUNT   0x5000
  99 #define AC97_EXT_DACS (AC97_EXTID_SDAC | AC97_EXTID_CDAC | AC97_EXTID_LDAC)
 100
 101 /* Boot options */
 102 static int      vra = 0;        // 0 = no VRA, 1 = use VRA if codec supports it
 103 MODULE_PARM(vra, "i");
 104 MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
 105
 106
 107 /* --------------------------------------------------------------------- */
 108
 109 struct au1000_state {
 110         /* soundcore stuff */
 111         int             dev_audio;
 112
 113 #ifdef AU1000_DEBUG
 114         /* debug /proc entry */
 115         struct proc_dir_entry *ps;
 116         struct proc_dir_entry *ac97_ps;
 117 #endif                          /* AU1000_DEBUG */
 118
 119         struct ac97_codec *codec;
 120         unsigned        codec_base_caps;// AC'97 reg 00h, "Reset Register"
 121         unsigned        codec_ext_caps; // AC'97 reg 28h, "Extended Audio ID"
 122         int             no_vra; // do not use VRA
 123
 124         spinlock_t      lock;
 125         struct semaphore open_sem;
 126         struct semaphore sem;
 127         mode_t          open_mode;
 128         wait_queue_head_t open_wait;
 129
 130         struct dmabuf {
 131                 unsigned int    dmanr;  // DMA Channel number
 132                 unsigned        sample_rate;    // Hz
 133                 unsigned src_factor;     // SRC interp/decimation (no vra)
 134                 unsigned        sample_size;    // 8 or 16
 135                 int             num_channels;   // 1 = mono, 2 = stereo, 4, 6
 136                 int dma_bytes_per_sample;// DMA bytes per audio sample frame
 137                 int user_bytes_per_sample;// User bytes per audio sample frame
 138                 int cnt_factor;          // user-to-DMA bytes per audio
 139                 //  sample frame
 140                 void           *rawbuf;
 141                 dma_addr_t      dmaaddr;
 142                 unsigned        buforder;
 143                 unsigned numfrag;        // # of DMA fragments in DMA buffer
 144                 unsigned        fragshift;
 145                 void           *nextIn; // ptr to next-in to DMA buffer
 146                 void           *nextOut;// ptr to next-out from DMA buffer
 147                 int             count;  // current byte count in DMA buffer
 148                 unsigned        total_bytes;    // total bytes written or read
 149                 unsigned        error;  // over/underrun
 150                 wait_queue_head_t wait;
 151                 /* redundant, but makes calculations easier */
 152                 unsigned fragsize;       // user perception of fragment size
 153                 unsigned dma_fragsize;   // DMA (real) fragment size
 154                 unsigned dmasize;        // Total DMA buffer size
 155                 //   (mult. of DMA fragsize)
 156                 /* OSS stuff */
 157                 unsigned        mapped:1;
 158                 unsigned        ready:1;
 159                 unsigned        stopped:1;
 160                 unsigned        ossfragshift;
 161                 int             ossmaxfrags;
 162                 unsigned        subdivision;
 163         } dma_dac      , dma_adc;
 164 } au1000_state;
 165
 166 /* --------------------------------------------------------------------- */
 167
 168
 169 static inline unsigned ld2(unsigned int x)
 170 {
 171         unsigned        r = 0;
 172
 173         if (x >= 0x10000) {
 174                 x >>= 16;
 175                 r += 16;
 176         }
 177         if (x >= 0x100) {
 178                 x >>= 8;
 179                 r += 8;
 180         }
 181         if (x >= 0x10) {
 182                 x >>= 4;
 183                 r += 4;
 184         }
 185         if (x >= 4) {
 186                 x >>= 2;
 187                 r += 2;
 188         }
 189         if (x >= 2)
 190                 r++;
 191         return r;
 192 }
 193
 194
 195 #ifdef USE_COHERENT_DMA
 196 static inline void * dma_alloc(size_t size, dma_addr_t * dma_handle)
 197 {
 198         void* ret = (void *)__get_free_pages(GFP_ATOMIC | GFP_DMA,
 199                                              get_order(size));
 200         if (ret != NULL) {
 201                 memset(ret, 0, size);
 202                 *dma_handle = virt_to_phys(ret);
 203         }
 204         return ret;
 205 }
 206
 207 static inline void dma_free(size_t size, void* va, dma_addr_t dma_handle)
 208 {
 209         free_pages((unsigned long)va, get_order(size));
 210 }
 211 #else
 212 static inline void * dma_alloc(size_t size, dma_addr_t * dma_handle)
 213 {
 214         return pci_alloc_consistent(NULL, size, dma_handle);
 215 }
 216
 217 static inline void dma_free(size_t size, void* va, dma_addr_t dma_handle)
 218 {
 219         pci_free_consistent(NULL, size, va, dma_handle);
 220 }
 221 #endif
 222
 223 /* --------------------------------------------------------------------- */
 224
 225 static void au1000_delay(int msec)
 226 {
 227         unsigned long   tmo;
 228         signed long     tmo2;
 229
 230         if (in_interrupt())
 231                 return;
 232
 233         tmo = jiffies + (msec * HZ) / 1000;
 234         for (;;) {
 235                 tmo2 = tmo - jiffies;
 236                 if (tmo2 <= 0)
 237                         break;
 238                 schedule_timeout(tmo2);
 239         }
 240 }
 241
 242
 243 /* --------------------------------------------------------------------- */
 244
 245 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
 246 {
 247         struct au1000_state *s = (struct au1000_state *)codec->private_data;
 248         unsigned long   flags;
 249         u32             cmd;
 250         u16             data;
 251         int             i;
 252
 253         spin_lock_irqsave(&s->lock, flags);
 254
 255         for (i = 0; i < POLL_COUNT; i++)
 256                 if (!(au_readl(AC97C_STATUS) & AC97C_CP))
 257                         break;
 258         if (i == POLL_COUNT)
 259                 err("rdcodec: codec cmd pending expired!");
 260
 261         cmd = (u32) addr & AC97C_INDEX_MASK;
 262         cmd |= AC97C_READ;      // read command
 263         au_writel(cmd, AC97C_CMD);
 264
 265         /* now wait for the data */
 266         for (i = 0; i < POLL_COUNT; i++)
 267                 if (!(au_readl(AC97C_STATUS) & AC97C_CP))
 268                         break;
 269         if (i == POLL_COUNT) {
 270                 err("rdcodec: read poll expired!");
 271                 return 0;
 272         }
 273
 274         data = au_readl(AC97C_CMD) & 0xffff;
 275
 276         spin_unlock_irqrestore(&s->lock, flags);
 277
 278         return data;
 279 }
 280
 281
 282 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 283 {
 284         struct au1000_state *s = (struct au1000_state *)codec->private_data;
 285         unsigned long   flags;
 286         u32             cmd;
 287         int             i;
 288
 289         spin_lock_irqsave(&s->lock, flags);
 290
 291         for (i = 0; i < POLL_COUNT; i++)
 292                 if (!(au_readl(AC97C_STATUS) & AC97C_CP))
 293                         break;
 294         if (i == POLL_COUNT)
 295                 err("wrcodec: codec cmd pending expired!");
 296
 297         cmd = (u32) addr & AC97C_INDEX_MASK;
 298         cmd &= ~AC97C_READ;     // write command
 299         cmd |= ((u32) data << AC97C_WD_BIT);    // OR in the data word
 300         au_writel(cmd, AC97C_CMD);
 301
 302         spin_unlock_irqrestore(&s->lock, flags);
 303 }
 304
 305 static void waitcodec(struct ac97_codec *codec)
 306 {
 307         u16             temp;
 308         int             i;
 309
 310         /* codec_wait is used to wait for a ready state after
 311            an AC97C_RESET. */
 312         au1000_delay(10);
 313
 314         // first poll the CODEC_READY tag bit
 315         for (i = 0; i < POLL_COUNT; i++)
 316                 if (au_readl(AC97C_STATUS) & AC97C_READY)
 317                         break;
 318         if (i == POLL_COUNT) {
 319                 err("waitcodec: CODEC_READY poll expired!");
 320                 return;
 321         }
 322         // get AC'97 powerdown control/status register
 323         temp = rdcodec(codec, AC97_POWER_CONTROL);
 324
 325         // If anything is powered down, power'em up
 326         if (temp & 0x7f00) {
 327                 // Power on
 328                 wrcodec(codec, AC97_POWER_CONTROL, 0);
 329                 au1000_delay(100);
 330                 // Reread
 331                 temp = rdcodec(codec, AC97_POWER_CONTROL);
 332         }
 333
 334         // Check if Codec REF,ANL,DAC,ADC ready
 335         if ((temp & 0x7f0f) != 0x000f)
 336                 err("codec reg 26 status (0x%x) not ready!!", temp);
 337 }
 338
 339
 340 /* --------------------------------------------------------------------- */
 341
 342 /* stop the ADC before calling */
 343 static void set_adc_rate(struct au1000_state *s, unsigned rate)
 344 {
 345         struct dmabuf  *adc = &s->dma_adc;
 346         struct dmabuf  *dac = &s->dma_dac;
 347         unsigned        adc_rate, dac_rate;
 348         u16             ac97_extstat;
 349
 350         if (s->no_vra) {
 351                 // calc SRC factor
 352                 adc->src_factor = ((96000 / rate) + 1) >> 1;
 353                 adc->sample_rate = 48000 / adc->src_factor;
 354                 return;
 355         }
 356
 357         adc->src_factor = 1;
 358
 359         ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
 360
 361         rate = rate > 48000 ? 48000 : rate;
 362
 363         // enable VRA
 364         wrcodec(s->codec, AC97_EXTENDED_STATUS,
 365                 ac97_extstat | AC97_EXTSTAT_VRA);
 366         // now write the sample rate
 367         wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, (u16) rate);
 368         // read it back for actual supported rate
 369         adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
 370
 371 #ifdef AU1000_VERBOSE_DEBUG
 372         dbg("%s: set to %d Hz", __FUNCTION__, adc_rate);
 373 #endif
 374
 375         // some codec's don't allow unequal DAC and ADC rates, in which case
 376         // writing one rate reg actually changes both.
 377         dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
 378         if (dac->num_channels > 2)
 379                 wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, dac_rate);
 380         if (dac->num_channels > 4)
 381                 wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, dac_rate);
 382
 383         adc->sample_rate = adc_rate;
 384         dac->sample_rate = dac_rate;
 385 }
 386
 387 /* stop the DAC before calling */
 388 static void set_dac_rate(struct au1000_state *s, unsigned rate)
 389 {
 390         struct dmabuf  *dac = &s->dma_dac;
 391         struct dmabuf  *adc = &s->dma_adc;
 392         unsigned        adc_rate, dac_rate;
 393         u16             ac97_extstat;
 394
 395         if (s->no_vra) {
 396                 // calc SRC factor
 397                 dac->src_factor = ((96000 / rate) + 1) >> 1;
 398                 dac->sample_rate = 48000 / dac->src_factor;
 399                 return;
 400         }
 401
 402         dac->src_factor = 1;
 403
 404         ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
 405
 406         rate = rate > 48000 ? 48000 : rate;
 407
 408         // enable VRA
 409         wrcodec(s->codec, AC97_EXTENDED_STATUS,
 410                 ac97_extstat | AC97_EXTSTAT_VRA);
 411         // now write the sample rate
 412         wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, (u16) rate);
 413         // I don't support different sample rates for multichannel,
 414         // so make these channels the same.
 415         if (dac->num_channels > 2)
 416                 wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, (u16) rate);
 417         if (dac->num_channels > 4)
 418                 wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, (u16) rate);
 419         // read it back for actual supported rate
 420         dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
 421
 422 #ifdef AU1000_VERBOSE_DEBUG
 423         dbg("%s: set to %d Hz", __FUNCTION__, dac_rate);
 424 #endif
 425
 426         // some codec's don't allow unequal DAC and ADC rates, in which case
 427         // writing one rate reg actually changes both.
 428         adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
 429
 430         dac->sample_rate = dac_rate;
 431         adc->sample_rate = adc_rate;
 432 }
 433
 434 static void stop_dac(struct au1000_state *s)
 435 {
 436         struct dmabuf  *db = &s->dma_dac;
 437         unsigned long   flags;
 438
 439         if (db->stopped)
 440                 return;
 441
 442         spin_lock_irqsave(&s->lock, flags);
 443
 444         disable_dma(db->dmanr);
 445
 446         db->stopped = 1;
 447
 448         spin_unlock_irqrestore(&s->lock, flags);
 449 }
 450
 451 static void  stop_adc(struct au1000_state *s)
 452 {
 453         struct dmabuf  *db = &s->dma_adc;
 454         unsigned long   flags;
 455
 456         if (db->stopped)
 457                 return;
 458
 459         spin_lock_irqsave(&s->lock, flags);
 460
 461         disable_dma(db->dmanr);
 462
 463         db->stopped = 1;
 464
 465         spin_unlock_irqrestore(&s->lock, flags);
 466 }
 467
 468
 469 static void set_xmit_slots(int num_channels)
 470 {
 471         u32 ac97_config = au_readl(AC97C_CONFIG) & ~AC97C_XMIT_SLOTS_MASK;
 472
 473         switch (num_channels) {
 474         case 1:         // mono
 475         case 2:         // stereo, slots 3,4
 476                 ac97_config |= (0x3 << AC97C_XMIT_SLOTS_BIT);
 477                 break;
 478         case 4:         // stereo with surround, slots 3,4,7,8
 479                 ac97_config |= (0x33 << AC97C_XMIT_SLOTS_BIT);
 480                 break;
 481         case 6:         // stereo with surround and center/LFE, slots 3,4,6,7,8,9
 482                 ac97_config |= (0x7b << AC97C_XMIT_SLOTS_BIT);
 483                 break;
 484         }
 485
 486         au_writel(ac97_config, AC97C_CONFIG);
 487 }
 488
 489 static void     set_recv_slots(int num_channels)
 490 {
 491         u32 ac97_config = au_readl(AC97C_CONFIG) & ~AC97C_RECV_SLOTS_MASK;
 492
 493         /*
 494          * Always enable slots 3 and 4 (stereo). Slot 6 is
 495          * optional Mic ADC, which I don't support yet.
 496          */
 497         ac97_config |= (0x3 << AC97C_RECV_SLOTS_BIT);
 498
 499         au_writel(ac97_config, AC97C_CONFIG);
 500 }
 501
 502 static void start_dac(struct au1000_state *s)
 503 {
 504         struct dmabuf  *db = &s->dma_dac;
 505         unsigned long   flags;
 506         unsigned long   buf1, buf2;
 507
 508         if (!db->stopped)
 509                 return;
 510
 511         spin_lock_irqsave(&s->lock, flags);
 512
 513         au_readl(AC97C_STATUS); // read status to clear sticky bits
 514
 515         // reset Buffer 1 and 2 pointers to nextOut and nextOut+dma_fragsize
 516         buf1 = virt_to_phys(db->nextOut);
 517         buf2 = buf1 + db->dma_fragsize;
 518         if (buf2 >= db->dmaaddr + db->dmasize)
 519                 buf2 -= db->dmasize;
 520
 521         set_xmit_slots(db->num_channels);
 522
 523         init_dma(db->dmanr);
 524         if (get_dma_active_buffer(db->dmanr) == 0) {
 525                 clear_dma_done0(db->dmanr);     // clear DMA done bit
 526                 set_dma_addr0(db->dmanr, buf1);
 527                 set_dma_addr1(db->dmanr, buf2);
 528         } else {
 529                 clear_dma_done1(db->dmanr);     // clear DMA done bit
 530                 set_dma_addr1(db->dmanr, buf1);
 531                 set_dma_addr0(db->dmanr, buf2);
 532         }
 533         set_dma_count(db->dmanr, db->dma_fragsize>>1);
 534         enable_dma_buffers(db->dmanr);
 535
 536         start_dma(db->dmanr);
 537
 538 #ifdef AU1000_VERBOSE_DEBUG
 539         dump_au1000_dma_channel(db->dmanr);
 540 #endif
 541
 542         db->stopped = 0;
 543
 544         spin_unlock_irqrestore(&s->lock, flags);
 545 }
 546
 547 static void start_adc(struct au1000_state *s)
 548 {
 549         struct dmabuf  *db = &s->dma_adc;
 550         unsigned long   flags;
 551         unsigned long   buf1, buf2;
 552
 553         if (!db->stopped)
 554                 return;
 555
 556         spin_lock_irqsave(&s->lock, flags);
 557
 558         au_readl(AC97C_STATUS); // read status to clear sticky bits
 559
 560         // reset Buffer 1 and 2 pointers to nextIn and nextIn+dma_fragsize
 561         buf1 = virt_to_phys(db->nextIn);
 562         buf2 = buf1 + db->dma_fragsize;
 563         if (buf2 >= db->dmaaddr + db->dmasize)
 564                 buf2 -= db->dmasize;
 565
 566         set_recv_slots(db->num_channels);
 567
 568         init_dma(db->dmanr);
 569         if (get_dma_active_buffer(db->dmanr) == 0) {
 570                 clear_dma_done0(db->dmanr);     // clear DMA done bit
 571                 set_dma_addr0(db->dmanr, buf1);
 572                 set_dma_addr1(db->dmanr, buf2);
 573         } else {
 574                 clear_dma_done1(db->dmanr);     // clear DMA done bit
 575                 set_dma_addr1(db->dmanr, buf1);
 576                 set_dma_addr0(db->dmanr, buf2);
 577         }
 578         set_dma_count(db->dmanr, db->dma_fragsize>>1);
 579         enable_dma_buffers(db->dmanr);
 580
 581         start_dma(db->dmanr);
 582
 583 #ifdef AU1000_VERBOSE_DEBUG
 584         dump_au1000_dma_channel(db->dmanr);
 585 #endif
 586
 587         db->stopped = 0;
 588
 589         spin_unlock_irqrestore(&s->lock, flags);
 590 }
 591
 592 /* --------------------------------------------------------------------- */
 593
 594 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
 595 #define DMABUF_MINORDER 1
 596
 597 extern inline void dealloc_dmabuf(struct au1000_state *s, struct dmabuf *db)
 598 {
 599         struct page    *page, *pend;
 600
 601         if (db->rawbuf) {
 602                 /* undo marking the pages as reserved */
 603                 pend = virt_to_page(db->rawbuf +
 604                                     (PAGE_SIZE << db->buforder) - 1);
 605                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 606                         mem_map_unreserve(page);
 607                 dma_free(PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 608         }
 609         db->rawbuf = db->nextIn = db->nextOut = NULL;
 610         db->mapped = db->ready = 0;
 611 }
 612
 613 static int prog_dmabuf(struct au1000_state *s, struct dmabuf *db)
 614 {
 615         int             order;
 616         unsigned user_bytes_per_sec;
 617         unsigned        bufs;
 618         struct page    *page, *pend;
 619         unsigned        rate = db->sample_rate;
 620
 621         if (!db->rawbuf) {
 622                 db->ready = db->mapped = 0;
 623                 for (order = DMABUF_DEFAULTORDER;
 624                      order >= DMABUF_MINORDER; order--)
 625                         if ((db->rawbuf = dma_alloc(PAGE_SIZE << order,
 626                                                   &db->dmaaddr)))
 627                                 break;
 628                 if (!db->rawbuf)
 629                         return -ENOMEM;
 630                 db->buforder = order;
 631                 /* now mark the pages as reserved;
 632                    otherwise remap_page_range doesn't do what we want */
 633                 pend = virt_to_page(db->rawbuf +
 634                                     (PAGE_SIZE << db->buforder) - 1);
 635                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 636                         mem_map_reserve(page);
 637         }
 638
 639         db->cnt_factor = 1;
 640         if (db->sample_size == 8)
 641                 db->cnt_factor *= 2;
 642         if (db->num_channels == 1)
 643                 db->cnt_factor *= 2;
 644         db->cnt_factor *= db->src_factor;
 645
 646         db->count = 0;
 647         db->nextIn = db->nextOut = db->rawbuf;
 648
 649         db->user_bytes_per_sample = (db->sample_size>>3) * db->num_channels;
 650         db->dma_bytes_per_sample = 2 * ((db->num_channels == 1) ?
 651                                         2 : db->num_channels);
 652
 653         user_bytes_per_sec = rate * db->user_bytes_per_sample;
 654         bufs = PAGE_SIZE << db->buforder;
 655         if (db->ossfragshift) {
 656                 if ((1000 << db->ossfragshift) < user_bytes_per_sec)
 657                         db->fragshift = ld2(user_bytes_per_sec/1000);
 658                 else
 659                         db->fragshift = db->ossfragshift;
 660         } else {
 661                 db->fragshift = ld2(user_bytes_per_sec / 100 /
 662                                     (db->subdivision ? db->subdivision : 1));
 663                 if (db->fragshift < 3)
 664                         db->fragshift = 3;
 665         }
 666
 667         db->fragsize = 1 << db->fragshift;
 668         db->dma_fragsize = db->fragsize * db->cnt_factor;
 669         db->numfrag = bufs / db->dma_fragsize;
 670
 671         while (db->numfrag < 4 && db->fragshift > 3) {
 672                 db->fragshift--;
 673                 db->fragsize = 1 << db->fragshift;
 674                 db->dma_fragsize = db->fragsize * db->cnt_factor;
 675                 db->numfrag = bufs / db->dma_fragsize;
 676         }
 677
 678         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 679                 db->numfrag = db->ossmaxfrags;
 680
 681         db->dmasize = db->dma_fragsize * db->numfrag;
 682         memset(db->rawbuf, 0, bufs);
 683
 684 #ifdef AU1000_VERBOSE_DEBUG
 685         dbg("rate=%d, samplesize=%d, channels=%d",
 686             rate, db->sample_size, db->num_channels);
 687         dbg("fragsize=%d, cnt_factor=%d, dma_fragsize=%d",
 688             db->fragsize, db->cnt_factor, db->dma_fragsize);
 689         dbg("numfrag=%d, dmasize=%d", db->numfrag, db->dmasize);
 690 #endif
 691
 692         db->ready = 1;
 693         return 0;
 694 }
 695
 696 extern inline int prog_dmabuf_adc(struct au1000_state *s)
 697 {
 698         stop_adc(s);
 699         return prog_dmabuf(s, &s->dma_adc);
 700
 701 }
 702
 703 extern inline int prog_dmabuf_dac(struct au1000_state *s)
 704 {
 705         stop_dac(s);
 706         return prog_dmabuf(s, &s->dma_dac);
 707 }
 708
 709
 710 /* hold spinlock for the following */
 711 static void dac_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 712 {
 713         struct au1000_state *s = (struct au1000_state *) dev_id;
 714         struct dmabuf  *dac = &s->dma_dac;
 715         unsigned long   newptr;
 716         u32 ac97c_stat, buff_done;
 717
 718         ac97c_stat = au_readl(AC97C_STATUS);
 719 #ifdef AU1000_VERBOSE_DEBUG
 720         if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
 721                 dbg("AC97C status = 0x%08x", ac97c_stat);
 722 #endif
 723
 724         if ((buff_done = get_dma_buffer_done(dac->dmanr)) == 0) {
 725                 /* fastpath out, to ease interrupt sharing */
 726                 return;
 727         }
 728
 729         spin_lock(&s->lock);
 730
 731         if (buff_done != (DMA_D0 | DMA_D1)) {
 732                 dac->nextOut += dac->dma_fragsize;
 733                 if (dac->nextOut >= dac->rawbuf + dac->dmasize)
 734                         dac->nextOut -= dac->dmasize;
 735
 736                 /* update playback pointers */
 737                 newptr = virt_to_phys(dac->nextOut) + dac->dma_fragsize;
 738                 if (newptr >= dac->dmaaddr + dac->dmasize)
 739                         newptr -= dac->dmasize;
 740
 741                 dac->count -= dac->dma_fragsize;
 742                 dac->total_bytes += dac->dma_fragsize;
 743
 744                 if (dac->count <= 0) {
 745 #ifdef AU1000_VERBOSE_DEBUG
 746                         dbg("dac underrun");
 747 #endif
 748                         spin_unlock(&s->lock);
 749                         stop_dac(s);
 750                         spin_lock(&s->lock);
 751                         dac->count = 0;
 752                         dac->nextIn = dac->nextOut;
 753                 } else if (buff_done == DMA_D0) {
 754                         clear_dma_done0(dac->dmanr);    // clear DMA done bit
 755                         set_dma_count0(dac->dmanr, dac->dma_fragsize>>1);
 756                         set_dma_addr0(dac->dmanr, newptr);
 757                         enable_dma_buffer0(dac->dmanr); // reenable
 758                 } else {
 759                         clear_dma_done1(dac->dmanr);    // clear DMA done bit
 760                         set_dma_count1(dac->dmanr, dac->dma_fragsize>>1);
 761                         set_dma_addr1(dac->dmanr, newptr);
 762                         enable_dma_buffer1(dac->dmanr); // reenable
 763                 }
 764         } else {
 765                 // both done bits set, we missed an interrupt
 766                 spin_unlock(&s->lock);
 767                 stop_dac(s);
 768                 spin_lock(&s->lock);
 769
 770                 dac->nextOut += 2*dac->dma_fragsize;
 771                 if (dac->nextOut >= dac->rawbuf + dac->dmasize)
 772                         dac->nextOut -= dac->dmasize;
 773
 774                 dac->count -= 2*dac->dma_fragsize;
 775                 dac->total_bytes += 2*dac->dma_fragsize;
 776
 777                 if (dac->count > 0) {
 778                         spin_unlock(&s->lock);
 779                         start_dac(s);
 780                         spin_lock(&s->lock);
 781                 }
 782         }
 783
 784         /* wake up anybody listening */
 785         if (waitqueue_active(&dac->wait))
 786                 wake_up(&dac->wait);
 787
 788         spin_unlock(&s->lock);
 789 }
 790
 791
 792 static void adc_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 793 {
 794         struct au1000_state *s = (struct au1000_state *) dev_id;
 795         struct dmabuf  *adc = &s->dma_adc;
 796         unsigned long   newptr;
 797         u32 ac97c_stat, buff_done;
 798
 799         ac97c_stat = au_readl(AC97C_STATUS);
 800 #ifdef AU1000_VERBOSE_DEBUG
 801         if (ac97c_stat & (AC97C_RU | AC97C_RO))
 802                 dbg("AC97C status = 0x%08x", ac97c_stat);
 803 #endif
 804
 805         if ((buff_done = get_dma_buffer_done(adc->dmanr)) == 0) {
 806                 /* fastpath out, to ease interrupt sharing */
 807                 return;
 808         }
 809
 810         spin_lock(&s->lock);
 811
 812         if (buff_done != (DMA_D0 | DMA_D1)) {
 813                 if (adc->count + adc->dma_fragsize > adc->dmasize) {
 814                         // Overrun. Stop ADC and log the error
 815                         spin_unlock(&s->lock);
 816                         stop_adc(s);
 817                         adc->error++;
 818                         err("adc overrun");
 819                         return;
 820                 }
 821
 822                 adc->nextIn += adc->dma_fragsize;
 823                 if (adc->nextIn >= adc->rawbuf + adc->dmasize)
 824                         adc->nextIn -= adc->dmasize;
 825
 826                 /* update capture pointers */
 827                 newptr = virt_to_phys(adc->nextIn) + adc->dma_fragsize;
 828                 if (newptr >= adc->dmaaddr + adc->dmasize)
 829                         newptr -= adc->dmasize;
 830
 831                 adc->count += adc->dma_fragsize;
 832                 adc->total_bytes += adc->dma_fragsize;
 833
 834                 if (buff_done == DMA_D0) {
 835                         clear_dma_done0(adc->dmanr);    // clear DMA done bit
 836                         set_dma_count0(adc->dmanr, adc->dma_fragsize>>1);
 837                         set_dma_addr0(adc->dmanr, newptr);
 838                         enable_dma_buffer0(adc->dmanr); // reenable
 839                 } else {
 840                         clear_dma_done1(adc->dmanr);    // clear DMA done bit
 841                         set_dma_count1(adc->dmanr, adc->dma_fragsize>>1);
 842                         set_dma_addr1(adc->dmanr, newptr);
 843                         enable_dma_buffer1(adc->dmanr); // reenable
 844                 }
 845         } else {
 846                 // both done bits set, we missed an interrupt
 847                 spin_unlock(&s->lock);
 848                 stop_adc(s);
 849                 spin_lock(&s->lock);
 850
 851                 if (adc->count + 2*adc->dma_fragsize > adc->dmasize) {
 852                         // Overrun. Log the error
 853                         adc->error++;
 854                         err("adc overrun");
 855                         spin_unlock(&s->lock);
 856                         return;
 857                 }
 858
 859                 adc->nextIn += 2*adc->dma_fragsize;
 860                 if (adc->nextIn >= adc->rawbuf + adc->dmasize)
 861                         adc->nextIn -= adc->dmasize;
 862
 863                 adc->count += 2*adc->dma_fragsize;
 864                 adc->total_bytes += 2*adc->dma_fragsize;
 865
 866                 spin_unlock(&s->lock);
 867                 start_adc(s);
 868                 spin_lock(&s->lock);
 869         }
 870
 871         /* wake up anybody listening */
 872         if (waitqueue_active(&adc->wait))
 873                 wake_up(&adc->wait);
 874
 875         spin_unlock(&s->lock);
 876 }
 877
 878 /* --------------------------------------------------------------------- */
 879
 880 static loff_t au1000_llseek(struct file *file, loff_t offset, int origin)
 881 {
 882         return -ESPIPE;
 883 }
 884
 885
 886 static int au1000_open_mixdev(struct inode *inode, struct file *file)
 887 {
 888         file->private_data = &au1000_state;
 889         return nonseekable_open(inode, file);
 890 }
 891
 892 static int au1000_release_mixdev(struct inode *inode, struct file *file)
 893 {
 894         return 0;
 895 }
 896
 897 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
 898                         unsigned long arg)
 899 {
 900         return codec->mixer_ioctl(codec, cmd, arg);
 901 }
 902
 903 static int au1000_ioctl_mixdev(struct inode *inode, struct file *file,
 904                                unsigned int cmd, unsigned long arg)
 905 {
 906         struct au1000_state *s = (struct au1000_state *)file->private_data;
 907         struct ac97_codec *codec = s->codec;
 908
 909         return mixdev_ioctl(codec, cmd, arg);
 910 }
 911
 912 static /*const */ struct file_operations au1000_mixer_fops = {
 913         .owner          = THIS_MODULE,
 914         .llseek         = au1000_llseek,
 915         .ioctl          = au1000_ioctl_mixdev,
 916         .open           = au1000_open_mixdev,
 917         .release        = au1000_release_mixdev,
 918 };
 919
 920 /* --------------------------------------------------------------------- */
 921
 922 static int drain_dac(struct au1000_state *s, int nonblock)
 923 {
 924         unsigned long   flags;
 925         int             count, tmo;
 926
 927         if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
 928                 return 0;
 929
 930         for (;;) {
 931                 spin_lock_irqsave(&s->lock, flags);
 932                 count = s->dma_dac.count;
 933                 spin_unlock_irqrestore(&s->lock, flags);
 934                 if (count <= 0)
 935                         break;
 936                 if (signal_pending(current))
 937                         break;
 938                 if (nonblock)
 939                         return -EBUSY;
 940                 tmo = 1000 * count / (s->no_vra ?
 941                                       48000 : s->dma_dac.sample_rate);
 942                 tmo /= s->dma_dac.dma_bytes_per_sample;
 943                 au1000_delay(tmo);
 944         }
 945         if (signal_pending(current))
 946                 return -ERESTARTSYS;
 947         return 0;
 948 }
 949
 950 /* --------------------------------------------------------------------- */
 951
 952 static inline u8 S16_TO_U8(s16 ch)
 953 {
 954         return (u8) (ch >> 8) + 0x80;
 955 }
 956 static inline s16 U8_TO_S16(u8 ch)
 957 {
 958         return (s16) (ch - 0x80) << 8;
 959 }
 960
 961 /*
 962  * Translates user samples to dma buffer suitable for AC'97 DAC data:
 963  *     If mono, copy left channel to right channel in dma buffer.
 964  *     If 8 bit samples, cvt to 16-bit before writing to dma buffer.
 965  *     If interpolating (no VRA), duplicate every audio frame src_factor times.
 966  */
 967 static int translate_from_user(struct dmabuf *db,
 968                                char* dmabuf,
 969                                char* userbuf,
 970                                int dmacount)
 971 {
 972         int             sample, i;
 973         int             interp_bytes_per_sample;
 974         int             num_samples;
 975         int             mono = (db->num_channels == 1);
 976         char            usersample[12];
 977         s16             ch, dmasample[6];
 978
 979         if (db->sample_size == 16 && !mono && db->src_factor == 1) {
 980                 // no translation necessary, just copy
 981                 if (copy_from_user(dmabuf, userbuf, dmacount))
 982                         return -EFAULT;
 983                 return dmacount;
 984         }
 985
 986         interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
 987         num_samples = dmacount / interp_bytes_per_sample;
 988
 989         for (sample = 0; sample < num_samples; sample++) {
 990                 if (copy_from_user(usersample, userbuf,
 991                                    db->user_bytes_per_sample)) {
 992                         dbg("%s: fault", __FUNCTION__);
 993                         return -EFAULT;
 994                 }
 995
 996                 for (i = 0; i < db->num_channels; i++) {
 997                         if (db->sample_size == 8)
 998                                 ch = U8_TO_S16(usersample[i]);
 999                         else
1000                                 ch = *((s16 *) (&usersample[i * 2]));
1001                         dmasample[i] = ch;
1002                         if (mono)
1003                                 dmasample[i + 1] = ch;  // right channel
1004                 }
1005
1006                 // duplicate every audio frame src_factor times
1007                 for (i = 0; i < db->src_factor; i++)
1008                         memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
1009
1010                 userbuf += db->user_bytes_per_sample;
1011                 dmabuf += interp_bytes_per_sample;
1012         }
1013
1014         return num_samples * interp_bytes_per_sample;
1015 }
1016
1017 /*
1018  * Translates AC'97 ADC samples to user buffer:
1019  *     If mono, send only left channel to user buffer.
1020  *     If 8 bit samples, cvt from 16 to 8 bit before writing to user buffer.
1021  *     If decimating (no VRA), skip over src_factor audio frames.
1022  */
1023 static int translate_to_user(struct dmabuf *db,
1024                              char* userbuf,
1025                              char* dmabuf,
1026                              int dmacount)
1027 {
1028         int             sample, i;
1029         int             interp_bytes_per_sample;
1030         int             num_samples;
1031         int             mono = (db->num_channels == 1);
1032         char            usersample[12];
1033
1034         if (db->sample_size == 16 && !mono && db->src_factor == 1) {
1035                 // no translation necessary, just copy
1036                 if (copy_to_user(userbuf, dmabuf, dmacount))
1037                         return -EFAULT;
1038                 return dmacount;
1039         }
1040
1041         interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
1042         num_samples = dmacount / interp_bytes_per_sample;
1043
1044         for (sample = 0; sample < num_samples; sample++) {
1045                 for (i = 0; i < db->num_channels; i++) {
1046                         if (db->sample_size == 8)
1047                                 usersample[i] =
1048                                         S16_TO_U8(*((s16 *) (&dmabuf[i * 2])));
1049                         else
1050                                 *((s16 *) (&usersample[i * 2])) =
1051                                         *((s16 *) (&dmabuf[i * 2]));
1052                 }
1053
1054                 if (copy_to_user(userbuf, usersample,
1055                                  db->user_bytes_per_sample)) {
1056                         dbg("%s: fault", __FUNCTION__);
1057                         return -EFAULT;
1058                 }
1059
1060                 userbuf += db->user_bytes_per_sample;
1061                 dmabuf += interp_bytes_per_sample;
1062         }
1063
1064         return num_samples * interp_bytes_per_sample;
1065 }
1066
1067 /*
1068  * Copy audio data to/from user buffer from/to dma buffer, taking care
1069  * that we wrap when reading/writing the dma buffer. Returns actual byte
1070  * count written to or read from the dma buffer.
1071  */
1072 static int copy_dmabuf_user(struct dmabuf *db, char* userbuf,
1073                             int count, int to_user)
1074 {
1075         char           *bufptr = to_user ? db->nextOut : db->nextIn;
1076         char           *bufend = db->rawbuf + db->dmasize;
1077         int             cnt, ret;
1078
1079         if (bufptr + count > bufend) {
1080                 int             partial = (int) (bufend - bufptr);
1081                 if (to_user) {
1082                         if ((cnt = translate_to_user(db, userbuf,
1083                                                      bufptr, partial)) < 0)
1084                                 return cnt;
1085                         ret = cnt;
1086                         if ((cnt = translate_to_user(db, userbuf + partial,
1087                                                      db->rawbuf,
1088                                                      count - partial)) < 0)
1089                                 return cnt;
1090                         ret += cnt;
1091                 } else {
1092                         if ((cnt = translate_from_user(db, bufptr, userbuf,
1093                                                        partial)) < 0)
1094                                 return cnt;
1095                         ret = cnt;
1096                         if ((cnt = translate_from_user(db, db->rawbuf,
1097                                                        userbuf + partial,
1098                                                        count - partial)) < 0)
1099                                 return cnt;
1100                         ret += cnt;
1101                 }
1102         } else {
1103                 if (to_user)
1104                         ret = translate_to_user(db, userbuf, bufptr, count);
1105                 else
1106                         ret = translate_from_user(db, bufptr, userbuf, count);
1107         }
1108
1109         return ret;
1110 }
1111
1112
1113 static ssize_t au1000_read(struct file *file, char *buffer,
1114                            size_t count, loff_t *ppos)
1115 {
1116         struct au1000_state *s = (struct au1000_state *)file->private_data;
1117         struct dmabuf  *db = &s->dma_adc;
1118         DECLARE_WAITQUEUE(wait, current);
1119         ssize_t         ret;
1120         unsigned long   flags;
1121         int             cnt, usercnt, avail;
1122
1123         if (db->mapped)
1124                 return -ENXIO;
1125         if (!access_ok(VERIFY_WRITE, buffer, count))
1126                 return -EFAULT;
1127         ret = 0;
1128
1129         count *= db->cnt_factor;
1130
1131         down(&s->sem);
1132         add_wait_queue(&db->wait, &wait);
1133
1134         while (count > 0) {
1135                 // wait for samples in ADC dma buffer
1136                 do {
1137                         if (db->stopped)
1138                                 start_adc(s);
1139                         spin_lock_irqsave(&s->lock, flags);
1140                         avail = db->count;
1141                         if (avail <= 0)
1142                                 __set_current_state(TASK_INTERRUPTIBLE);
1143                         spin_unlock_irqrestore(&s->lock, flags);
1144                         if (avail <= 0) {
1145                                 if (file->f_flags & O_NONBLOCK) {
1146                                         if (!ret)
1147                                                 ret = -EAGAIN;
1148                                         goto out;
1149                                 }
1150                                 up(&s->sem);
1151                                 schedule();
1152                                 if (signal_pending(current)) {
1153                                         if (!ret)
1154                                                 ret = -ERESTARTSYS;
1155                                         goto out2;
1156                                 }
1157                                 down(&s->sem);
1158                         }
1159                 } while (avail <= 0);
1160
1161                 // copy from nextOut to user
1162                 if ((cnt = copy_dmabuf_user(db, buffer,
1163                                             count > avail ?
1164                                             avail : count, 1)) < 0) {
1165                         if (!ret)
1166                                 ret = -EFAULT;
1167                         goto out;
1168                 }
1169
1170                 spin_lock_irqsave(&s->lock, flags);
1171                 db->count -= cnt;
1172                 db->nextOut += cnt;
1173                 if (db->nextOut >= db->rawbuf + db->dmasize)
1174                         db->nextOut -= db->dmasize;
1175                 spin_unlock_irqrestore(&s->lock, flags);
1176
1177                 count -= cnt;
1178                 usercnt = cnt / db->cnt_factor;
1179                 buffer += usercnt;
1180                 ret += usercnt;
1181         }                       // while (count > 0)
1182
1183 out:
1184         up(&s->sem);
1185 out2:
1186         remove_wait_queue(&db->wait, &wait);
1187         set_current_state(TASK_RUNNING);
1188         return ret;
1189 }
1190
1191 static ssize_t au1000_write(struct file *file, const char *buffer,
1192                             size_t count, loff_t * ppos)
1193 {
1194         struct au1000_state *s = (struct au1000_state *)file->private_data;
1195         struct dmabuf  *db = &s->dma_dac;
1196         DECLARE_WAITQUEUE(wait, current);
1197         ssize_t         ret = 0;
1198         unsigned long   flags;
1199         int             cnt, usercnt, avail;
1200
1201 #ifdef AU1000_VERBOSE_DEBUG
1202         dbg("write: count=%d", count);
1203 #endif
1204
1205         if (db->mapped)
1206                 return -ENXIO;
1207         if (!access_ok(VERIFY_READ, buffer, count))
1208                 return -EFAULT;
1209
1210         count *= db->cnt_factor;
1211
1212         down(&s->sem);
1213         add_wait_queue(&db->wait, &wait);
1214
1215         while (count > 0) {
1216                 // wait for space in playback buffer
1217                 do {
1218                         spin_lock_irqsave(&s->lock, flags);
1219                         avail = (int) db->dmasize - db->count;
1220                         if (avail <= 0)
1221                                 __set_current_state(TASK_INTERRUPTIBLE);
1222                         spin_unlock_irqrestore(&s->lock, flags);
1223                         if (avail <= 0) {
1224                                 if (file->f_flags & O_NONBLOCK) {
1225                                         if (!ret)
1226                                                 ret = -EAGAIN;
1227                                         goto out;
1228                                 }
1229                                 up(&s->sem);
1230                                 schedule();
1231                                 if (signal_pending(current)) {
1232                                         if (!ret)
1233                                                 ret = -ERESTARTSYS;
1234                                         goto out2;
1235                                 }
1236                                 down(&s->sem);
1237                         }
1238                 } while (avail <= 0);
1239
1240                 // copy from user to nextIn
1241                 if ((cnt = copy_dmabuf_user(db, (char *) buffer,
1242                                             count > avail ?
1243                                             avail : count, 0)) < 0) {
1244                         if (!ret)
1245                                 ret = -EFAULT;
1246                         goto out;
1247                 }
1248
1249                 spin_lock_irqsave(&s->lock, flags);
1250                 db->count += cnt;
1251                 db->nextIn += cnt;
1252                 if (db->nextIn >= db->rawbuf + db->dmasize)
1253                         db->nextIn -= db->dmasize;
1254                 spin_unlock_irqrestore(&s->lock, flags);
1255                 if (db->stopped)
1256                         start_dac(s);
1257
1258                 count -= cnt;
1259                 usercnt = cnt / db->cnt_factor;
1260                 buffer += usercnt;
1261                 ret += usercnt;
1262         }                       // while (count > 0)
1263
1264 out:
1265         up(&s->sem);
1266 out2:
1267         remove_wait_queue(&db->wait, &wait);
1268         set_current_state(TASK_RUNNING);
1269         return ret;
1270 }
1271
1272
1273 /* No kernel lock - we have our own spinlock */
1274 static unsigned int au1000_poll(struct file *file,
1275                                 struct poll_table_struct *wait)
1276 {
1277         struct au1000_state *s = (struct au1000_state *)file->private_data;
1278         unsigned long   flags;
1279         unsigned int    mask = 0;
1280
1281         if (file->f_mode & FMODE_WRITE) {
1282                 if (!s->dma_dac.ready)
1283                         return 0;
1284                 poll_wait(file, &s->dma_dac.wait, wait);
1285         }
1286         if (file->f_mode & FMODE_READ) {
1287                 if (!s->dma_adc.ready)
1288                         return 0;
1289                 poll_wait(file, &s->dma_adc.wait, wait);
1290         }
1291
1292         spin_lock_irqsave(&s->lock, flags);
1293
1294         if (file->f_mode & FMODE_READ) {
1295                 if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize)
1296                         mask |= POLLIN | POLLRDNORM;
1297         }
1298         if (file->f_mode & FMODE_WRITE) {
1299                 if (s->dma_dac.mapped) {
1300                         if (s->dma_dac.count >=
1301                             (signed)s->dma_dac.dma_fragsize)
1302                                 mask |= POLLOUT | POLLWRNORM;
1303                 } else {
1304                         if ((signed) s->dma_dac.dmasize >=
1305                             s->dma_dac.count + (signed)s->dma_dac.dma_fragsize)
1306                                 mask |= POLLOUT | POLLWRNORM;
1307                 }
1308         }
1309         spin_unlock_irqrestore(&s->lock, flags);
1310         return mask;
1311 }
1312
1313 static int au1000_mmap(struct file *file, struct vm_area_struct *vma)
1314 {
1315         struct au1000_state *s = (struct au1000_state *)file->private_data;
1316         struct dmabuf  *db;
1317         unsigned long   size;
1318         int ret = 0;
1319
1320         dbg(__FUNCTION__);
1321
1322         lock_kernel();
1323         down(&s->sem);
1324         if (vma->vm_flags & VM_WRITE)
1325                 db = &s->dma_dac;
1326         else if (vma->vm_flags & VM_READ)
1327                 db = &s->dma_adc;
1328         else {
1329                 ret = -EINVAL;
1330                 goto out;
1331         }
1332         if (vma->vm_pgoff != 0) {
1333                 ret = -EINVAL;
1334                 goto out;
1335         }
1336         size = vma->vm_end - vma->vm_start;
1337         if (size > (PAGE_SIZE << db->buforder)) {
1338                 ret = -EINVAL;
1339                 goto out;
1340         }
1341         if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf),
1342                              size, vma->vm_page_prot)) {
1343                 ret = -EAGAIN;
1344                 goto out;
1345         }
1346         vma->vm_flags &= ~VM_IO;
1347         db->mapped = 1;
1348 out:
1349         up(&s->sem);
1350         unlock_kernel();
1351         return ret;
1352 }
1353
1354
1355 #ifdef AU1000_VERBOSE_DEBUG
1356 static struct ioctl_str_t {
1357         unsigned int    cmd;
1358         const char     *str;
1359 } ioctl_str[] = {
1360         {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1361         {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1362         {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1363         {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1364         {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1365         {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1366         {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1367         {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1368         {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1369         {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1370         {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1371         {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1372         {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1373         {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1374         {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1375         {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1376         {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1377         {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1378         {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1379         {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1380         {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1381         {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1382         {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1383         {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1384         {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1385         {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1386         {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1387         {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1388         {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1389         {OSS_GETVERSION, "OSS_GETVERSION"},
1390         {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1391         {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1392         {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1393         {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1394 };
1395 #endif
1396
1397 // Need to hold a spin-lock before calling this!
1398 static int dma_count_done(struct dmabuf *db)
1399 {
1400         if (db->stopped)
1401                 return 0;
1402
1403         return db->dma_fragsize - get_dma_residue(db->dmanr);
1404 }
1405
1406
1407 static int au1000_ioctl(struct inode *inode, struct file *file,
1408                         unsigned int cmd, unsigned long arg)
1409 {
1410         struct au1000_state *s = (struct au1000_state *)file->private_data;
1411         unsigned long   flags;
1412         audio_buf_info  abinfo;
1413         count_info      cinfo;
1414         int             count;
1415         int             val, mapped, ret, diff;
1416
1417         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1418                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1419
1420 #ifdef AU1000_VERBOSE_DEBUG
1421         for (count=0; count<sizeof(ioctl_str)/sizeof(ioctl_str[0]); count++) {
1422                 if (ioctl_str[count].cmd == cmd)
1423                         break;
1424         }
1425         if (count < sizeof(ioctl_str) / sizeof(ioctl_str[0]))
1426                 dbg("ioctl %s, arg=0x%lx", ioctl_str[count].str, arg);
1427         else
1428                 dbg("ioctl 0x%x unknown, arg=0x%lx", cmd, arg);
1429 #endif
1430
1431         switch (cmd) {
1432         case OSS_GETVERSION:
1433                 return put_user(SOUND_VERSION, (int *) arg);
1434
1435         case SNDCTL_DSP_SYNC:
1436                 if (file->f_mode & FMODE_WRITE)
1437                         return drain_dac(s, file->f_flags & O_NONBLOCK);
1438                 return 0;
1439
1440         case SNDCTL_DSP_SETDUPLEX:
1441                 return 0;
1442
1443         case SNDCTL_DSP_GETCAPS:
1444                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME |
1445                                 DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1446
1447         case SNDCTL_DSP_RESET:
1448                 if (file->f_mode & FMODE_WRITE) {
1449                         stop_dac(s);
1450                         synchronize_irq();
1451                         s->dma_dac.count = s->dma_dac.total_bytes = 0;
1452                         s->dma_dac.nextIn = s->dma_dac.nextOut =
1453                                 s->dma_dac.rawbuf;
1454                 }
1455                 if (file->f_mode & FMODE_READ) {
1456                         stop_adc(s);
1457                         synchronize_irq();
1458                         s->dma_adc.count = s->dma_adc.total_bytes = 0;
1459                         s->dma_adc.nextIn = s->dma_adc.nextOut =
1460                                 s->dma_adc.rawbuf;
1461                 }
1462                 return 0;
1463
1464         case SNDCTL_DSP_SPEED:
1465                 if (get_user(val, (int *) arg))
1466                         return -EFAULT;
1467                 if (val >= 0) {
1468                         if (file->f_mode & FMODE_READ) {
1469                                 stop_adc(s);
1470                                 set_adc_rate(s, val);
1471                         }
1472                         if (file->f_mode & FMODE_WRITE) {
1473                                 stop_dac(s);
1474                                 set_dac_rate(s, val);
1475                         }
1476                         if (s->open_mode & FMODE_READ)
1477                                 if ((ret = prog_dmabuf_adc(s)))
1478                                         return ret;
1479                         if (s->open_mode & FMODE_WRITE)
1480                                 if ((ret = prog_dmabuf_dac(s)))
1481                                         return ret;
1482                 }
1483                 return put_user((file->f_mode & FMODE_READ) ?
1484                                 s->dma_adc.sample_rate :
1485                                 s->dma_dac.sample_rate,
1486                                 (int *)arg);
1487
1488         case SNDCTL_DSP_STEREO:
1489                 if (get_user(val, (int *) arg))
1490                         return -EFAULT;
1491                 if (file->f_mode & FMODE_READ) {
1492                         stop_adc(s);
1493                         s->dma_adc.num_channels = val ? 2 : 1;
1494                         if ((ret = prog_dmabuf_adc(s)))
1495                                 return ret;
1496                 }
1497                 if (file->f_mode & FMODE_WRITE) {
1498                         stop_dac(s);
1499                         s->dma_dac.num_channels = val ? 2 : 1;
1500                         if (s->codec_ext_caps & AC97_EXT_DACS) {
1501                                 // disable surround and center/lfe in AC'97
1502                                 u16 ext_stat = rdcodec(s->codec,
1503                                                        AC97_EXTENDED_STATUS);
1504                                 wrcodec(s->codec, AC97_EXTENDED_STATUS,
1505                                         ext_stat | (AC97_EXTSTAT_PRI |
1506                                                     AC97_EXTSTAT_PRJ |
1507                                                     AC97_EXTSTAT_PRK));
1508                         }
1509                         if ((ret = prog_dmabuf_dac(s)))
1510                                 return ret;
1511                 }
1512                 return 0;
1513
1514         case SNDCTL_DSP_CHANNELS:
1515                 if (get_user(val, (int *) arg))
1516                         return -EFAULT;
1517                 if (val != 0) {
1518                         if (file->f_mode & FMODE_READ) {
1519                                 if (val < 0 || val > 2)
1520                                         return -EINVAL;
1521                                 stop_adc(s);
1522                                 s->dma_adc.num_channels = val;
1523                                 if ((ret = prog_dmabuf_adc(s)))
1524                                         return ret;
1525                         }
1526                         if (file->f_mode & FMODE_WRITE) {
1527                                 switch (val) {
1528                                 case 1:
1529                                 case 2:
1530                                         break;
1531                                 case 3:
1532                                 case 5:
1533                                         return -EINVAL;
1534                                 case 4:
1535                                         if (!(s->codec_ext_caps &
1536                                               AC97_EXTID_SDAC))
1537                                                 return -EINVAL;
1538                                         break;
1539                                 case 6:
1540                                         if ((s->codec_ext_caps &
1541                                              AC97_EXT_DACS) != AC97_EXT_DACS)
1542                                                 return -EINVAL;
1543                                         break;
1544                                 default:
1545                                         return -EINVAL;
1546                                 }
1547
1548                                 stop_dac(s);
1549                                 if (val <= 2 &&
1550                                     (s->codec_ext_caps & AC97_EXT_DACS)) {
1551                                         // disable surround and center/lfe
1552                                         // channels in AC'97
1553                                         u16             ext_stat =
1554                                                 rdcodec(s->codec,
1555                                                         AC97_EXTENDED_STATUS);
1556                                         wrcodec(s->codec,
1557                                                 AC97_EXTENDED_STATUS,
1558                                                 ext_stat | (AC97_EXTSTAT_PRI |
1559                                                             AC97_EXTSTAT_PRJ |
1560                                                             AC97_EXTSTAT_PRK));
1561                                 } else if (val >= 4) {
1562                                         // enable surround, center/lfe
1563                                         // channels in AC'97
1564                                         u16             ext_stat =
1565                                                 rdcodec(s->codec,
1566                                                         AC97_EXTENDED_STATUS);
1567                                         ext_stat &= ~AC97_EXTSTAT_PRJ;
1568                                         if (val == 6)
1569                                                 ext_stat &=
1570                                                         ~(AC97_EXTSTAT_PRI |
1571                                                           AC97_EXTSTAT_PRK);
1572                                         wrcodec(s->codec,
1573                                                 AC97_EXTENDED_STATUS,
1574                                                 ext_stat);
1575                                 }
1576
1577                                 s->dma_dac.num_channels = val;
1578                                 if ((ret = prog_dmabuf_dac(s)))
1579                                         return ret;
1580                         }
1581                 }
1582                 return put_user(val, (int *) arg);
1583
1584         case SNDCTL_DSP_GETFMTS:        /* Returns a mask */
1585                 return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg);
1586
1587         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt */
1588                 if (get_user(val, (int *) arg))
1589                         return -EFAULT;
1590                 if (val != AFMT_QUERY) {
1591                         if (file->f_mode & FMODE_READ) {
1592                                 stop_adc(s);
1593                                 if (val == AFMT_S16_LE)
1594                                         s->dma_adc.sample_size = 16;
1595                                 else {
1596                                         val = AFMT_U8;
1597                                         s->dma_adc.sample_size = 8;
1598                                 }
1599                                 if ((ret = prog_dmabuf_adc(s)))
1600                                         return ret;
1601                         }
1602                         if (file->f_mode & FMODE_WRITE) {
1603                                 stop_dac(s);
1604                                 if (val == AFMT_S16_LE)
1605                                         s->dma_dac.sample_size = 16;
1606                                 else {
1607                                         val = AFMT_U8;
1608                                         s->dma_dac.sample_size = 8;
1609                                 }
1610                                 if ((ret = prog_dmabuf_dac(s)))
1611                                         return ret;
1612                         }
1613                 } else {
1614                         if (file->f_mode & FMODE_READ)
1615                                 val = (s->dma_adc.sample_size == 16) ?
1616                                         AFMT_S16_LE : AFMT_U8;
1617                         else
1618                                 val = (s->dma_dac.sample_size == 16) ?
1619                                         AFMT_S16_LE : AFMT_U8;
1620                 }
1621                 return put_user(val, (int *) arg);
1622
1623         case SNDCTL_DSP_POST:
1624                 return 0;
1625
1626         case SNDCTL_DSP_GETTRIGGER:
1627                 val = 0;
1628                 spin_lock_irqsave(&s->lock, flags);
1629                 if (file->f_mode & FMODE_READ && !s->dma_adc.stopped)
1630                         val |= PCM_ENABLE_INPUT;
1631                 if (file->f_mode & FMODE_WRITE && !s->dma_dac.stopped)
1632                         val |= PCM_ENABLE_OUTPUT;
1633                 spin_unlock_irqrestore(&s->lock, flags);
1634                 return put_user(val, (int *) arg);
1635
1636         case SNDCTL_DSP_SETTRIGGER:
1637                 if (get_user(val, (int *) arg))
1638                         return -EFAULT;
1639                 if (file->f_mode & FMODE_READ) {
1640                         if (val & PCM_ENABLE_INPUT)
1641                                 start_adc(s);
1642                         else
1643                                 stop_adc(s);
1644                 }
1645                 if (file->f_mode & FMODE_WRITE) {
1646                         if (val & PCM_ENABLE_OUTPUT)
1647                                 start_dac(s);
1648                         else
1649                                 stop_dac(s);
1650                 }
1651                 return 0;
1652
1653         case SNDCTL_DSP_GETOSPACE:
1654                 if (!(file->f_mode & FMODE_WRITE))
1655                         return -EINVAL;
1656                 abinfo.fragsize = s->dma_dac.fragsize;
1657                 spin_lock_irqsave(&s->lock, flags);
1658                 count = s->dma_dac.count;
1659                 count -= dma_count_done(&s->dma_dac);
1660                 spin_unlock_irqrestore(&s->lock, flags);
1661                 if (count < 0)
1662                         count = 0;
1663                 abinfo.bytes = (s->dma_dac.dmasize - count) /
1664                         s->dma_dac.cnt_factor;
1665                 abinfo.fragstotal = s->dma_dac.numfrag;
1666                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1667 #ifdef AU1000_VERBOSE_DEBUG
1668                 dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments);
1669 #endif
1670                 return copy_to_user((void *) arg, &abinfo,
1671                                     sizeof(abinfo)) ? -EFAULT : 0;
1672
1673         case SNDCTL_DSP_GETISPACE:
1674                 if (!(file->f_mode & FMODE_READ))
1675                         return -EINVAL;
1676                 abinfo.fragsize = s->dma_adc.fragsize;
1677                 spin_lock_irqsave(&s->lock, flags);
1678                 count = s->dma_adc.count;
1679                 count += dma_count_done(&s->dma_adc);
1680                 spin_unlock_irqrestore(&s->lock, flags);
1681                 if (count < 0)
1682                         count = 0;
1683                 abinfo.bytes = count / s->dma_adc.cnt_factor;
1684                 abinfo.fragstotal = s->dma_adc.numfrag;
1685                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1686                 return copy_to_user((void *) arg, &abinfo,
1687                                     sizeof(abinfo)) ? -EFAULT : 0;
1688
1689         case SNDCTL_DSP_NONBLOCK:
1690                 file->f_flags |= O_NONBLOCK;
1691                 return 0;
1692
1693         case SNDCTL_DSP_GETODELAY:
1694                 if (!(file->f_mode & FMODE_WRITE))
1695                         return -EINVAL;
1696                 spin_lock_irqsave(&s->lock, flags);
1697                 count = s->dma_dac.count;
1698                 count -= dma_count_done(&s->dma_dac);
1699                 spin_unlock_irqrestore(&s->lock, flags);
1700                 if (count < 0)
1701                         count = 0;
1702                 count /= s->dma_dac.cnt_factor;
1703                 return put_user(count, (int *) arg);
1704
1705         case SNDCTL_DSP_GETIPTR:
1706                 if (!(file->f_mode & FMODE_READ))
1707                         return -EINVAL;
1708                 spin_lock_irqsave(&s->lock, flags);
1709                 cinfo.bytes = s->dma_adc.total_bytes;
1710                 count = s->dma_adc.count;
1711                 if (!s->dma_adc.stopped) {
1712                         diff = dma_count_done(&s->dma_adc);
1713                         count += diff;
1714                         cinfo.bytes += diff;
1715                         cinfo.ptr =  virt_to_phys(s->dma_adc.nextIn) + diff -
1716                                 s->dma_adc.dmaaddr;
1717                 } else
1718                         cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) -
1719                                 s->dma_adc.dmaaddr;
1720                 if (s->dma_adc.mapped)
1721                         s->dma_adc.count &= (s->dma_adc.dma_fragsize-1);
1722                 spin_unlock_irqrestore(&s->lock, flags);
1723                 if (count < 0)
1724                         count = 0;
1725                 cinfo.blocks = count >> s->dma_adc.fragshift;
1726                 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1727
1728         case SNDCTL_DSP_GETOPTR:
1729                 if (!(file->f_mode & FMODE_READ))
1730                         return -EINVAL;
1731                 spin_lock_irqsave(&s->lock, flags);
1732                 cinfo.bytes = s->dma_dac.total_bytes;
1733                 count = s->dma_dac.count;
1734                 if (!s->dma_dac.stopped) {
1735                         diff = dma_count_done(&s->dma_dac);
1736                         count -= diff;
1737                         cinfo.bytes += diff;
1738                         cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) + diff -
1739                                 s->dma_dac.dmaaddr;
1740                 } else
1741                         cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) -
1742                                 s->dma_dac.dmaaddr;
1743                 if (s->dma_dac.mapped)
1744                         s->dma_dac.count &= (s->dma_dac.dma_fragsize-1);
1745                 spin_unlock_irqrestore(&s->lock, flags);
1746                 if (count < 0)
1747                         count = 0;
1748                 cinfo.blocks = count >> s->dma_dac.fragshift;
1749                 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1750
1751         case SNDCTL_DSP_GETBLKSIZE:
1752                 if (file->f_mode & FMODE_WRITE)
1753                         return put_user(s->dma_dac.fragsize, (int *) arg);
1754                 else
1755                         return put_user(s->dma_adc.fragsize, (int *) arg);
1756
1757         case SNDCTL_DSP_SETFRAGMENT:
1758                 if (get_user(val, (int *) arg))
1759                         return -EFAULT;
1760                 if (file->f_mode & FMODE_READ) {
1761                         stop_adc(s);
1762                         s->dma_adc.ossfragshift = val & 0xffff;
1763                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1764                         if (s->dma_adc.ossfragshift < 4)
1765                                 s->dma_adc.ossfragshift = 4;
1766                         if (s->dma_adc.ossfragshift > 15)
1767                                 s->dma_adc.ossfragshift = 15;
1768                         if (s->dma_adc.ossmaxfrags < 4)
1769                                 s->dma_adc.ossmaxfrags = 4;
1770                         if ((ret = prog_dmabuf_adc(s)))
1771                                 return ret;
1772                 }
1773                 if (file->f_mode & FMODE_WRITE) {
1774                         stop_dac(s);
1775                         s->dma_dac.ossfragshift = val & 0xffff;
1776                         s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1777                         if (s->dma_dac.ossfragshift < 4)
1778                                 s->dma_dac.ossfragshift = 4;
1779                         if (s->dma_dac.ossfragshift > 15)
1780                                 s->dma_dac.ossfragshift = 15;
1781                         if (s->dma_dac.ossmaxfrags < 4)
1782                                 s->dma_dac.ossmaxfrags = 4;
1783                         if ((ret = prog_dmabuf_dac(s)))
1784                                 return ret;
1785                 }
1786                 return 0;
1787
1788         case SNDCTL_DSP_SUBDIVIDE:
1789                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1790                     (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1791                         return -EINVAL;
1792                 if (get_user(val, (int *) arg))
1793                         return -EFAULT;
1794                 if (val != 1 && val != 2 && val != 4)
1795                         return -EINVAL;
1796                 if (file->f_mode & FMODE_READ) {
1797                         stop_adc(s);
1798                         s->dma_adc.subdivision = val;
1799                         if ((ret = prog_dmabuf_adc(s)))
1800                                 return ret;
1801                 }
1802                 if (file->f_mode & FMODE_WRITE) {
1803                         stop_dac(s);
1804                         s->dma_dac.subdivision = val;
1805                         if ((ret = prog_dmabuf_dac(s)))
1806                                 return ret;
1807                 }
1808                 return 0;
1809
1810         case SOUND_PCM_READ_RATE:
1811                 return put_user((file->f_mode & FMODE_READ) ?
1812                                 s->dma_adc.sample_rate :
1813                                 s->dma_dac.sample_rate,
1814                                 (int *)arg);
1815
1816         case SOUND_PCM_READ_CHANNELS:
1817                 if (file->f_mode & FMODE_READ)
1818                         return put_user(s->dma_adc.num_channels, (int *)arg);
1819                 else
1820                         return put_user(s->dma_dac.num_channels, (int *)arg);
1821
1822         case SOUND_PCM_READ_BITS:
1823                 if (file->f_mode & FMODE_READ)
1824                         return put_user(s->dma_adc.sample_size, (int *)arg);
1825                 else
1826                         return put_user(s->dma_dac.sample_size, (int *)arg);
1827
1828         case SOUND_PCM_WRITE_FILTER:
1829         case SNDCTL_DSP_SETSYNCRO:
1830         case SOUND_PCM_READ_FILTER:
1831                 return -EINVAL;
1832         }
1833
1834         return mixdev_ioctl(s->codec, cmd, arg);
1835 }
1836
1837
1838 static int  au1000_open(struct inode *inode, struct file *file)
1839 {
1840         int             minor = iminor(inode);
1841         DECLARE_WAITQUEUE(wait, current);
1842         struct au1000_state *s = &au1000_state;
1843         int             ret;
1844
1845 #ifdef AU1000_VERBOSE_DEBUG
1846         if (file->f_flags & O_NONBLOCK)
1847                 dbg("%s: non-blocking", __FUNCTION__);
1848         else
1849                 dbg("%s: blocking", __FUNCTION__);
1850 #endif
1851
1852         file->private_data = s;
1853         /* wait for device to become free */
1854         down(&s->open_sem);
1855         while (s->open_mode & file->f_mode) {
1856                 if (file->f_flags & O_NONBLOCK) {
1857                         up(&s->open_sem);
1858                         return -EBUSY;
1859                 }
1860                 add_wait_queue(&s->open_wait, &wait);
1861                 __set_current_state(TASK_INTERRUPTIBLE);
1862                 up(&s->open_sem);
1863                 schedule();
1864                 remove_wait_queue(&s->open_wait, &wait);
1865                 set_current_state(TASK_RUNNING);
1866                 if (signal_pending(current))
1867                         return -ERESTARTSYS;
1868                 down(&s->open_sem);
1869         }
1870
1871         stop_dac(s);
1872         stop_adc(s);
1873
1874         if (file->f_mode & FMODE_READ) {
1875                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
1876                         s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
1877                 s->dma_adc.num_channels = 1;
1878                 s->dma_adc.sample_size = 8;
1879                 set_adc_rate(s, 8000);
1880                 if ((minor & 0xf) == SND_DEV_DSP16)
1881                         s->dma_adc.sample_size = 16;
1882         }
1883
1884         if (file->f_mode & FMODE_WRITE) {
1885                 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
1886                         s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
1887                 s->dma_dac.num_channels = 1;
1888                 s->dma_dac.sample_size = 8;
1889                 set_dac_rate(s, 8000);
1890                 if ((minor & 0xf) == SND_DEV_DSP16)
1891                         s->dma_dac.sample_size = 16;
1892         }
1893
1894         if (file->f_mode & FMODE_READ) {
1895                 if ((ret = prog_dmabuf_adc(s)))
1896                         return ret;
1897         }
1898         if (file->f_mode & FMODE_WRITE) {
1899                 if ((ret = prog_dmabuf_dac(s)))
1900                         return ret;
1901         }
1902
1903         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1904         up(&s->open_sem);
1905         init_MUTEX(&s->sem);
1906         return nonseekable_open(inode, file);
1907 }
1908
1909 static int au1000_release(struct inode *inode, struct file *file)
1910 {
1911         struct au1000_state *s = (struct au1000_state *)file->private_data;
1912
1913         lock_kernel();
1914
1915         if (file->f_mode & FMODE_WRITE) {
1916                 unlock_kernel();
1917                 drain_dac(s, file->f_flags & O_NONBLOCK);
1918                 lock_kernel();
1919         }
1920
1921         down(&s->open_sem);
1922         if (file->f_mode & FMODE_WRITE) {
1923                 stop_dac(s);
1924                 dealloc_dmabuf(s, &s->dma_dac);
1925         }
1926         if (file->f_mode & FMODE_READ) {
1927                 stop_adc(s);
1928                 dealloc_dmabuf(s, &s->dma_adc);
1929         }
1930         s->open_mode &= ((~file->f_mode) & (FMODE_READ|FMODE_WRITE));
1931         up(&s->open_sem);
1932         wake_up(&s->open_wait);
1933         unlock_kernel();
1934         return 0;
1935 }
1936
1937 static /*const */ struct file_operations au1000_audio_fops = {
1938         .owner          = THIS_MODULE,
1939         .llseek         = au1000_llseek,
1940         .read           = au1000_read,
1941         .write          = au1000_write,
1942         .poll           = au1000_poll,
1943         .ioctl          = au1000_ioctl,
1944         .mmap           = au1000_mmap,
1945         .open           = au1000_open,
1946         .release        = au1000_release,
1947 };
1948
1949
1950 /* --------------------------------------------------------------------- */
1951
1952
1953 /* --------------------------------------------------------------------- */
1954
1955 /*
1956  * for debugging purposes, we'll create a proc device that dumps the
1957  * CODEC chipstate
1958  */
1959
1960 #ifdef AU1000_DEBUG
1961 static int proc_au1000_dump(char *buf, char **start, off_t fpos,
1962                             int length, int *eof, void *data)
1963 {
1964         struct au1000_state *s = &au1000_state;
1965         int             cnt, len = 0;
1966
1967         /* print out header */
1968         len += sprintf(buf + len, "\n\t\tAU1000 Audio Debug\n\n");
1969
1970         // print out digital controller state
1971         len += sprintf(buf + len, "AU1000 Audio Controller registers\n");
1972         len += sprintf(buf + len, "---------------------------------\n");
1973         len += sprintf (buf + len, "AC97C_CONFIG = %08x\n",
1974                         au_readl(AC97C_CONFIG));
1975         len += sprintf (buf + len, "AC97C_STATUS = %08x\n",
1976                         au_readl(AC97C_STATUS));
1977         len += sprintf (buf + len, "AC97C_CNTRL  = %08x\n",
1978                         au_readl(AC97C_CNTRL));
1979
1980         /* print out CODEC state */
1981         len += sprintf(buf + len, "\nAC97 CODEC registers\n");
1982         len += sprintf(buf + len, "----------------------\n");
1983         for (cnt = 0; cnt <= 0x7e; cnt += 2)
1984                 len += sprintf(buf + len, "reg %02x = %04x\n",
1985                                cnt, rdcodec(s->codec, cnt));
1986
1987         if (fpos >= len) {
1988                 *start = buf;
1989                 *eof = 1;
1990                 return 0;
1991         }
1992         *start = buf + fpos;
1993         if ((len -= fpos) > length)
1994                 return length;
1995         *eof = 1;
1996         return len;
1997
1998 }
1999 #endif /* AU1000_DEBUG */
2000
2001 /* --------------------------------------------------------------------- */
2002
2003 MODULE_AUTHOR("Monta Vista Software, stevel@mvista.com");
2004 MODULE_DESCRIPTION("Au1000 Audio Driver");
2005
2006 /* --------------------------------------------------------------------- */
2007
2008 static int __devinit au1000_probe(void)
2009 {
2010         struct au1000_state *s = &au1000_state;
2011         int             val;
2012         char            proc_str[80];
2013
2014         memset(s, 0, sizeof(struct au1000_state));
2015
2016         init_waitqueue_head(&s->dma_adc.wait);
2017         init_waitqueue_head(&s->dma_dac.wait);
2018         init_waitqueue_head(&s->open_wait);
2019         init_MUTEX(&s->open_sem);
2020         spin_lock_init(&s->lock);
2021
2022         s->codec = ac97_alloc_codec();
2023         if(s->codec == NULL)
2024         {
2025                 error("Out of memory");
2026                 return -1;
2027         }
2028         s->codec->private_data = s;
2029         s->codec->id = 0;
2030         s->codec->codec_read = rdcodec;
2031         s->codec->codec_write = wrcodec;
2032         s->codec->codec_wait = waitcodec;
2033
2034         if (!request_region(virt_to_phys((void *) AC97C_CONFIG),
2035                             0x14, AU1000_MODULE_NAME)) {
2036                 err("AC'97 ports in use");
2037                 goto err_codec;
2038         }
2039         // Allocate the DMA Channels
2040         if ((s->dma_dac.dmanr = request_au1000_dma(DMA_ID_AC97C_TX,
2041                                                    "audio DAC",
2042                                                    dac_dma_interrupt,
2043                                                    SA_INTERRUPT, s)) < 0) {
2044                 err("Can't get DAC DMA");
2045                 goto err_dma1;
2046         }
2047         if ((s->dma_adc.dmanr = request_au1000_dma(DMA_ID_AC97C_RX,
2048                                                    "audio ADC",
2049                                                    adc_dma_interrupt,
2050                                                    SA_INTERRUPT, s)) < 0) {
2051                 err("Can't get ADC DMA");
2052                 goto err_dma2;
2053         }
2054
2055         info("DAC: DMA%d/IRQ%d, ADC: DMA%d/IRQ%d",
2056              s->dma_dac.dmanr, get_dma_done_irq(s->dma_dac.dmanr),
2057              s->dma_adc.dmanr, get_dma_done_irq(s->dma_adc.dmanr));
2058
2059 #ifdef USE_COHERENT_DMA
2060         // enable DMA coherency in read/write DMA channels
2061         set_dma_mode(s->dma_dac.dmanr,
2062                      get_dma_mode(s->dma_dac.dmanr) & ~DMA_NC);
2063         set_dma_mode(s->dma_adc.dmanr,
2064                      get_dma_mode(s->dma_adc.dmanr) & ~DMA_NC);
2065 #else
2066         // disable DMA coherency in read/write DMA channels
2067         set_dma_mode(s->dma_dac.dmanr,
2068                      get_dma_mode(s->dma_dac.dmanr) | DMA_NC);
2069         set_dma_mode(s->dma_adc.dmanr,
2070                      get_dma_mode(s->dma_adc.dmanr) | DMA_NC);
2071 #endif
2072
2073         /* register devices */
2074
2075         if ((s->dev_audio = register_sound_dsp(&au1000_audio_fops, -1)) < 0)
2076                 goto err_dev1;
2077         if ((s->codec->dev_mixer =
2078              register_sound_mixer(&au1000_mixer_fops, -1)) < 0)
2079                 goto err_dev2;
2080
2081 #ifdef AU1000_DEBUG
2082         /* intialize the debug proc device */
2083         s->ps = create_proc_read_entry(AU1000_MODULE_NAME, 0, NULL,
2084                                        proc_au1000_dump, NULL);
2085 #endif /* AU1000_DEBUG */
2086
2087         // configure pins for AC'97
2088         au_writel(au_readl(SYS_PINFUNC) & ~0x02, SYS_PINFUNC);
2089
2090         // Assert reset for 10msec to the AC'97 controller, and enable clock
2091         au_writel(AC97C_RS | AC97C_CE, AC97C_CNTRL);
2092         au1000_delay(10);
2093         au_writel(AC97C_CE, AC97C_CNTRL);
2094         au1000_delay(10);       // wait for clock to stabilize
2095
2096         /* cold reset the AC'97 */
2097         au_writel(AC97C_RESET, AC97C_CONFIG);
2098         au1000_delay(10);
2099         au_writel(0, AC97C_CONFIG);
2100         /* need to delay around 500msec(bleech) to give
2101            some CODECs enough time to wakeup */
2102         au1000_delay(500);
2103
2104         /* warm reset the AC'97 to start the bitclk */
2105         au_writel(AC97C_SG | AC97C_SYNC, AC97C_CONFIG);
2106         udelay(100);
2107         au_writel(0, AC97C_CONFIG);
2108
2109         /* codec init */
2110         if (!ac97_probe_codec(s->codec))
2111                 goto err_dev3;
2112
2113         s->codec_base_caps = rdcodec(s->codec, AC97_RESET);
2114         s->codec_ext_caps = rdcodec(s->codec, AC97_EXTENDED_ID);
2115         info("AC'97 Base/Extended ID = %04x/%04x",
2116              s->codec_base_caps, s->codec_ext_caps);
2117
2118         /*
2119          * On the Pb1000, audio playback is on the AUX_OUT
2120          * channel (which defaults to LNLVL_OUT in AC'97
2121          * rev 2.2) so make sure this channel is listed
2122          * as supported (soundcard.h calls this channel
2123          * ALTPCM). ac97_codec.c does not handle detection
2124          * of this channel correctly.
2125          */
2126         s->codec->supported_mixers |= SOUND_MASK_ALTPCM;
2127         /*
2128          * Now set AUX_OUT's default volume.
2129          */
2130         val = 0x4343;
2131         mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_ALTPCM,
2132                      (unsigned long) &val);
2133
2134         if (!(s->codec_ext_caps & AC97_EXTID_VRA)) {
2135                 // codec does not support VRA
2136                 s->no_vra = 1;
2137         } else if (!vra) {
2138                 // Boot option says disable VRA
2139                 u16 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
2140                 wrcodec(s->codec, AC97_EXTENDED_STATUS,
2141                         ac97_extstat & ~AC97_EXTSTAT_VRA);
2142                 s->no_vra = 1;
2143         }
2144         if (s->no_vra)
2145                 info("no VRA, interpolating and decimating");
2146
2147         /* set mic to be the recording source */
2148         val = SOUND_MASK_MIC;
2149         mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC,
2150                      (unsigned long) &val);
2151
2152 #ifdef AU1000_DEBUG
2153         sprintf(proc_str, "driver/%s/%d/ac97", AU1000_MODULE_NAME,
2154                 s->codec->id);
2155         s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL,
2156                                              ac97_read_proc, s->codec);
2157 #endif
2158
2159         return 0;
2160
2161  err_dev3:
2162         unregister_sound_mixer(s->codec->dev_mixer);
2163  err_dev2:
2164         unregister_sound_dsp(s->dev_audio);
2165  err_dev1:
2166         free_au1000_dma(s->dma_adc.dmanr);
2167  err_dma2:
2168         free_au1000_dma(s->dma_dac.dmanr);
2169  err_dma1:
2170         release_region(virt_to_phys((void *) AC97C_CONFIG), 0x14);
2171  err_codec:
2172         ac97_release_codec(s->codec);
2173         return -1;
2174 }
2175
2176 static void au1000_remove(void)
2177 {
2178         struct au1000_state *s = &au1000_state;
2179
2180         if (!s)
2181                 return;
2182 #ifdef AU1000_DEBUG
2183         if (s->ps)
2184                 remove_proc_entry(AU1000_MODULE_NAME, NULL);
2185 #endif /* AU1000_DEBUG */
2186         synchronize_irq();
2187         free_au1000_dma(s->dma_adc.dmanr);
2188         free_au1000_dma(s->dma_dac.dmanr);
2189         release_region(virt_to_phys((void *) AC97C_CONFIG), 0x14);
2190         unregister_sound_dsp(s->dev_audio);
2191         unregister_sound_mixer(s->codec->dev_mixer);
2192         ac97_release_codec(s->codec);
2193 }
2194
2195 static int __init init_au1000(void)
2196 {
2197         info("stevel@mvista.com, built " __TIME__ " on " __DATE__);
2198         return au1000_probe();
2199 }
2200
2201 static void __exit cleanup_au1000(void)
2202 {
2203         info("unloading");
2204         au1000_remove();
2205 }
2206
2207 module_init(init_au1000);
2208 module_exit(cleanup_au1000);
2209
2210 /* --------------------------------------------------------------------- */
2211
2212 #ifndef MODULE
2213
2214 static int __init au1000_setup(char *options)
2215 {
2216         char           *this_opt;
2217
2218         if (!options || !*options)
2219                 return 0;
2220
2221         while (this_opt = strsep(&options, ",")) {
2222                 if (!*this_opt)
2223                         continue;
2224                 if (!strncmp(this_opt, "vra", 3)) {
2225                         vra = 1;
2226                 }
2227         }
2228
2229         return 1;
2230 }
2231
2232 __setup("au1000_audio=", au1000_setup);
2233
2234 #endif /* MODULE */