sound/oss/emu10k1/hwaccess.c

   1 /*
   2  **********************************************************************
   3  *     hwaccess.c -- Hardware access layer
   4  *     Copyright 1999, 2000 Creative Labs, Inc.
   5  *
   6  **********************************************************************
   7  *
   8  *     Date                 Author          Summary of changes
   9  *     ----                 ------          ------------------
  10  *     October 20, 1999     Bertrand Lee    base code release
  11  *     December 9, 1999     Jon Taylor      rewrote the I/O subsystem
  12  *
  13  **********************************************************************
  14  *
  15  *     This program is free software; you can redistribute it and/or
  16  *     modify it under the terms of the GNU General Public License as
  17  *     published by the Free Software Foundation; either version 2 of
  18  *     the License, or (at your option) any later version.
  19  *
  20  *     This program is distributed in the hope that it will be useful,
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  *     You should have received a copy of the GNU General Public
  26  *     License along with this program; if not, write to the Free
  27  *     Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
  28  *     USA.
  29  *
  30  **********************************************************************
  31  */
  32
  33 #include <asm/io.h>
  34
  35 #include "hwaccess.h"
  36 #include "8010.h"
  37 #include "icardmid.h"
  38
  39 /*************************************************************************
  40 * Function : srToPitch                                                   *
  41 * Input    : sampleRate - sampling rate                                  *
  42 * Return   : pitch value                                                 *
  43 * About    : convert sampling rate to pitch                              *
  44 * Note     : for 8010, sampling rate is at 48kHz, this function should   *
  45 *            be changed.                                                 *
  46 *************************************************************************/
  47 u32 srToPitch(u32 sampleRate)
  48 {
  49         int i;
  50
  51         /* FIXME: These tables should be defined in a headerfile */
  52         static u32 logMagTable[128] = {
  53                 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
  54                 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
  55                 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
  56                 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
  57                 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
  58                 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
  59                 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
  60                 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
  61                 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
  62                 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
  63                 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
  64                 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
  65                 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
  66                 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
  67                 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
  68                 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
  69         };
  70
  71         static char logSlopeTable[128] = {
  72                 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
  73                 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
  74                 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
  75                 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
  76                 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
  77                 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
  78                 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
  79                 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
  80                 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
  81                 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
  82                 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
  83                 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
  84                 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
  85                 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
  86                 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
  87                 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
  88         };
  89
  90         if (sampleRate == 0)
  91                 return 0;       /* Bail out if no leading "1" */
  92
  93         sampleRate *= 11185;    /* Scale 48000 to 0x20002380 */
  94
  95         for (i = 31; i > 0; i--) {
  96                 if (sampleRate & 0x80000000) {  /* Detect leading "1" */
  97                         return (u32) (((s32) (i - 15) << 20) +
  98                                       logMagTable[0x7f & (sampleRate >> 24)] +
  99                                       (0x7f & (sampleRate >> 17)) * logSlopeTable[0x7f & (sampleRate >> 24)]);
 100                 }
 101                 sampleRate = sampleRate << 1;
 102         }
 103
 104         DPF(2, "srToPitch: BUG!\n");
 105         return 0;               /* Should never reach this point */
 106 }
 107
 108 /*******************************************
 109 * write/read PCI function 0 registers      *
 110 ********************************************/
 111 void emu10k1_writefn0(struct emu10k1_card *card, u32 reg, u32 data)
 112 {
 113         unsigned long flags;
 114
 115         if (reg & 0xff000000) {
 116                 u32 mask;
 117                 u8 size, offset;
 118
 119                 size = (reg >> 24) & 0x3f;
 120                 offset = (reg >> 16) & 0x1f;
 121                 mask = ((1 << size) - 1) << offset;
 122                 data = (data << offset) & mask;
 123                 reg &= 0x7f;
 124
 125                 spin_lock_irqsave(&card->lock, flags);
 126                 data |= inl(card->iobase + reg) & ~mask;
 127                 outl(data, card->iobase + reg);
 128                 spin_unlock_irqrestore(&card->lock, flags);
 129         } else {
 130                 spin_lock_irqsave(&card->lock, flags);
 131                 outl(data, card->iobase + reg);
 132                 spin_unlock_irqrestore(&card->lock, flags);
 133         }
 134
 135         return;
 136 }
 137
 138 #ifdef DBGEMU
 139 void emu10k1_writefn0_2(struct emu10k1_card *card, u32 reg, u32 data, int size)
 140 {
 141         unsigned long flags;
 142
 143         spin_lock_irqsave(&card->lock, flags);
 144
 145         if (size == 32)
 146                 outl(data, card->iobase + (reg & 0x1F));
 147         else if (size == 16)
 148                 outw(data, card->iobase + (reg & 0x1F));
 149         else
 150                 outb(data, card->iobase + (reg & 0x1F));
 151
 152         spin_unlock_irqrestore(&card->lock, flags);
 153
 154         return;
 155 }
 156 #endif  /*  DBGEMU  */
 157
 158 u32 emu10k1_readfn0(struct emu10k1_card * card, u32 reg)
 159 {
 160         u32 val;
 161         unsigned long flags;
 162
 163         if (reg & 0xff000000) {
 164                 u32 mask;
 165                 u8 size, offset;
 166
 167                 size = (reg >> 24) & 0x3f;
 168                 offset = (reg >> 16) & 0x1f;
 169                 mask = ((1 << size) - 1) << offset;
 170                 reg &= 0x7f;
 171
 172                 spin_lock_irqsave(&card->lock, flags);
 173                 val = inl(card->iobase + reg);
 174                 spin_unlock_irqrestore(&card->lock, flags);
 175
 176                 return (val & mask) >> offset;
 177         } else {
 178                 spin_lock_irqsave(&card->lock, flags);
 179                 val = inl(card->iobase + reg);
 180                 spin_unlock_irqrestore(&card->lock, flags);
 181                 return val;
 182         }
 183 }
 184
 185 void emu10k1_timer_set(struct emu10k1_card * card, u16 data)
 186 {
 187         unsigned long flags;
 188
 189         spin_lock_irqsave(&card->lock, flags);
 190         outw(data & TIMER_RATE_MASK, card->iobase + TIMER);
 191         spin_unlock_irqrestore(&card->lock, flags);
 192 }
 193
 194 /************************************************************************
 195 * write/read Emu10k1 pointer-offset register set, accessed through      *
 196 *  the PTR and DATA registers                                           *
 197 *************************************************************************/
 198 #define A_PTR_ADDRESS_MASK 0x0fff0000
 199 void sblive_writeptr(struct emu10k1_card *card, u32 reg, u32 channel, u32 data)
 200 {
 201         u32 regptr;
 202         unsigned long flags;
 203
 204         regptr = ((reg << 16) & A_PTR_ADDRESS_MASK) | (channel & PTR_CHANNELNUM_MASK);
 205
 206         if (reg & 0xff000000) {
 207                 u32 mask;
 208                 u8 size, offset;
 209
 210                 size = (reg >> 24) & 0x3f;
 211                 offset = (reg >> 16) & 0x1f;
 212                 mask = ((1 << size) - 1) << offset;
 213                 data = (data << offset) & mask;
 214
 215                 spin_lock_irqsave(&card->lock, flags);
 216                 outl(regptr, card->iobase + PTR);
 217                 data |= inl(card->iobase + DATA) & ~mask;
 218                 outl(data, card->iobase + DATA);
 219                 spin_unlock_irqrestore(&card->lock, flags);
 220         } else {
 221                 spin_lock_irqsave(&card->lock, flags);
 222                 outl(regptr, card->iobase + PTR);
 223                 outl(data, card->iobase + DATA);
 224                 spin_unlock_irqrestore(&card->lock, flags);
 225         }
 226 }
 227
 228 /* ... :  data, reg, ... , TAGLIST_END */
 229 void sblive_writeptr_tag(struct emu10k1_card *card, u32 channel, ...)
 230 {
 231         va_list args;
 232
 233         unsigned long flags;
 234         u32 reg;
 235
 236         va_start(args, channel);
 237
 238         spin_lock_irqsave(&card->lock, flags);
 239         while ((reg = va_arg(args, u32)) != TAGLIST_END) {
 240                 u32 data = va_arg(args, u32);
 241                 u32 regptr = (((reg << 16) & A_PTR_ADDRESS_MASK)
 242                               | (channel & PTR_CHANNELNUM_MASK));
 243                 outl(regptr, card->iobase + PTR);
 244                 if (reg & 0xff000000) {
 245                         int size = (reg >> 24) & 0x3f;
 246                         int offset = (reg >> 16) & 0x1f;
 247                         u32 mask = ((1 << size) - 1) << offset;
 248                         data = (data << offset) & mask;
 249
 250                         data |= inl(card->iobase + DATA) & ~mask;
 251                 }
 252                 outl(data, card->iobase + DATA);
 253         }
 254         spin_unlock_irqrestore(&card->lock, flags);
 255
 256         va_end(args);
 257
 258         return;
 259 }
 260
 261 u32 sblive_readptr(struct emu10k1_card * card, u32 reg, u32 channel)
 262 {
 263         u32 regptr, val;
 264         unsigned long flags;
 265
 266         regptr = ((reg << 16) & A_PTR_ADDRESS_MASK) | (channel & PTR_CHANNELNUM_MASK);
 267
 268         if (reg & 0xff000000) {
 269                 u32 mask;
 270                 u8 size, offset;
 271
 272                 size = (reg >> 24) & 0x3f;
 273                 offset = (reg >> 16) & 0x1f;
 274                 mask = ((1 << size) - 1) << offset;
 275
 276                 spin_lock_irqsave(&card->lock, flags);
 277                 outl(regptr, card->iobase + PTR);
 278                 val = inl(card->iobase + DATA);
 279                 spin_unlock_irqrestore(&card->lock, flags);
 280
 281                 return (val & mask) >> offset;
 282         } else {
 283                 spin_lock_irqsave(&card->lock, flags);
 284                 outl(regptr, card->iobase + PTR);
 285                 val = inl(card->iobase + DATA);
 286                 spin_unlock_irqrestore(&card->lock, flags);
 287
 288                 return val;
 289         }
 290 }
 291
 292 void emu10k1_irq_enable(struct emu10k1_card *card, u32 irq_mask)
 293 {
 294         u32 val;
 295         unsigned long flags;
 296
 297         DPF(2,"emu10k1_irq_enable()\n");
 298
 299         spin_lock_irqsave(&card->lock, flags);
 300         val = inl(card->iobase + INTE) | irq_mask;
 301         outl(val, card->iobase + INTE);
 302         spin_unlock_irqrestore(&card->lock, flags);
 303         return;
 304 }
 305
 306 void emu10k1_irq_disable(struct emu10k1_card *card, u32 irq_mask)
 307 {
 308         u32 val;
 309         unsigned long flags;
 310
 311         DPF(2,"emu10k1_irq_disable()\n");
 312
 313         spin_lock_irqsave(&card->lock, flags);
 314         val = inl(card->iobase + INTE) & ~irq_mask;
 315         outl(val, card->iobase + INTE);
 316         spin_unlock_irqrestore(&card->lock, flags);
 317         return;
 318 }
 319
 320 void emu10k1_clear_stop_on_loop(struct emu10k1_card *card, u32 voicenum)
 321 {
 322         /* Voice interrupt */
 323         if (voicenum >= 32)
 324                 sblive_writeptr(card, SOLEH | ((0x0100 | (voicenum - 32)) << 16), 0, 0);
 325         else
 326                 sblive_writeptr(card, SOLEL | ((0x0100 | voicenum) << 16), 0, 0);
 327
 328         return;
 329 }
 330
 331 static void sblive_wcwait(struct emu10k1_card *card, u32 wait)
 332 {
 333         volatile unsigned uCount;
 334         u32 newtime = 0, curtime;
 335
 336         curtime = emu10k1_readfn0(card, WC_SAMPLECOUNTER);
 337         while (wait--) {
 338                 uCount = 0;
 339                 while (uCount++ < TIMEOUT) {
 340                         newtime = emu10k1_readfn0(card, WC_SAMPLECOUNTER);
 341                         if (newtime != curtime)
 342                                 break;
 343                 }
 344
 345                 if (uCount >= TIMEOUT)
 346                         break;
 347
 348                 curtime = newtime;
 349         }
 350 }
 351
 352 u16 emu10k1_ac97_read(struct ac97_codec *codec, u8 reg)
 353 {
 354         struct emu10k1_card *card = codec->private_data;
 355         u16 data;
 356         unsigned long flags;
 357
 358         spin_lock_irqsave(&card->lock, flags);
 359
 360         outb(reg, card->iobase + AC97ADDRESS);
 361         data = inw(card->iobase + AC97DATA);
 362
 363         spin_unlock_irqrestore(&card->lock, flags);
 364
 365         return data;
 366 }
 367
 368 void emu10k1_ac97_write(struct ac97_codec *codec, u8 reg, u16 value)
 369 {
 370         struct emu10k1_card *card = codec->private_data;
 371         unsigned long flags;
 372
 373         spin_lock_irqsave(&card->lock, flags);
 374
 375         outb(reg, card->iobase + AC97ADDRESS);
 376         outw(value, card->iobase + AC97DATA);
 377         outb( AC97_EXTENDED_ID, card->iobase + AC97ADDRESS);
 378         spin_unlock_irqrestore(&card->lock, flags);
 379 }
 380
 381 /*********************************************************
 382 *            MPU access functions                        *
 383 **********************************************************/
 384
 385 int emu10k1_mpu_write_data(struct emu10k1_card *card, u8 data)
 386 {
 387         unsigned long flags;
 388         int ret;
 389
 390         if (card->is_audigy) {
 391                 if ((sblive_readptr(card, A_MUSTAT,0) & MUSTAT_ORDYN) == 0) {
 392                         sblive_writeptr(card, A_MUDATA, 0, data);
 393                         ret = 0;
 394                 } else
 395                         ret = -1;
 396         } else {
 397                 spin_lock_irqsave(&card->lock, flags);
 398
 399                 if ((inb(card->iobase + MUSTAT) & MUSTAT_ORDYN) == 0) {
 400                         outb(data, card->iobase + MUDATA);
 401                         ret = 0;
 402                 } else
 403                         ret = -1;
 404
 405                 spin_unlock_irqrestore(&card->lock, flags);
 406         }
 407
 408         return ret;
 409 }
 410
 411 int emu10k1_mpu_read_data(struct emu10k1_card *card, u8 * data)
 412 {
 413         unsigned long flags;
 414         int ret;
 415
 416         if (card->is_audigy) {
 417                 if ((sblive_readptr(card, A_MUSTAT,0) & MUSTAT_IRDYN) == 0) {
 418                         *data = sblive_readptr(card, A_MUDATA,0);
 419                         ret = 0;
 420                 } else
 421                         ret = -1;
 422         } else {
 423                 spin_lock_irqsave(&card->lock, flags);
 424
 425                 if ((inb(card->iobase + MUSTAT) & MUSTAT_IRDYN) == 0) {
 426                         *data = inb(card->iobase + MUDATA);
 427                         ret = 0;
 428                 } else
 429                         ret = -1;
 430
 431                 spin_unlock_irqrestore(&card->lock, flags);
 432         }
 433
 434         return ret;
 435 }
 436
 437 int emu10k1_mpu_reset(struct emu10k1_card *card)
 438 {
 439         u8 status;
 440         unsigned long flags;
 441
 442         DPF(2, "emu10k1_mpu_reset()\n");
 443         if (card->is_audigy) {
 444                 if (card->mpuacqcount == 0) {
 445                         sblive_writeptr(card, A_MUCMD, 0, MUCMD_RESET);
 446                         sblive_wcwait(card, 8);
 447                         sblive_writeptr(card, A_MUCMD, 0, MUCMD_RESET);
 448                         sblive_wcwait(card, 8);
 449                         sblive_writeptr(card, A_MUCMD, 0, MUCMD_ENTERUARTMODE);
 450                         sblive_wcwait(card, 8);
 451                         status = sblive_readptr(card, A_MUDATA, 0);
 452                         if (status == 0xfe)
 453                                 return 0;
 454                         else
 455                                 return -1;
 456                 }
 457
 458                 return 0;
 459         } else {
 460                 if (card->mpuacqcount == 0) {
 461                         spin_lock_irqsave(&card->lock, flags);
 462                         outb(MUCMD_RESET, card->iobase + MUCMD);
 463                         spin_unlock_irqrestore(&card->lock, flags);
 464
 465                         sblive_wcwait(card, 8);
 466
 467                         spin_lock_irqsave(&card->lock, flags);
 468                         outb(MUCMD_RESET, card->iobase + MUCMD);
 469                         spin_unlock_irqrestore(&card->lock, flags);
 470
 471                         sblive_wcwait(card, 8);
 472
 473                         spin_lock_irqsave(&card->lock, flags);
 474                         outb(MUCMD_ENTERUARTMODE, card->iobase + MUCMD);
 475                         spin_unlock_irqrestore(&card->lock, flags);
 476
 477                         sblive_wcwait(card, 8);
 478
 479                         spin_lock_irqsave(&card->lock, flags);
 480                         status = inb(card->iobase + MUDATA);
 481                         spin_unlock_irqrestore(&card->lock, flags);
 482
 483                         if (status == 0xfe)
 484                                 return 0;
 485                         else
 486                                 return -1;
 487                 }
 488
 489                 return 0;
 490         }
 491 }
 492
 493 int emu10k1_mpu_acquire(struct emu10k1_card *card)
 494 {
 495         /* FIXME: This should be a macro */
 496         ++card->mpuacqcount;
 497
 498         return 0;
 499 }
 500
 501 int emu10k1_mpu_release(struct emu10k1_card *card)
 502 {
 503         /* FIXME: this should be a macro */
 504         --card->mpuacqcount;
 505
 506         return 0;
 507 }