sound/oss/es1371.c

   1 /*****************************************************************************/
   2
   3 /*
   4  *      es1371.c  --  Creative Ensoniq ES1371.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Special thanks to Ensoniq
  23  *
  24  *  Supported devices:
  25  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  26  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  27  *  /dev/dsp1   additional DAC, like /dev/dsp, but outputs to mixer "SYNTH" setting
  28  *  /dev/midi   simple MIDI UART interface, no ioctl
  29  *
  30  *  NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
  31  *  to be done in software. That is what /dev/dac is for. By now (Q2 1998)
  32  *  there are several MIDI to PCM (WAV) packages, one of them is timidity.
  33  *
  34  *  Revision history
  35  *    04.06.1998   0.1   Initial release
  36  *                       Mixer stuff should be overhauled; especially optional AC97 mixer bits
  37  *                       should be detected. This results in strange behaviour of some mixer
  38  *                       settings, like master volume and mic.
  39  *    08.06.1998   0.2   First release using Alan Cox' soundcore instead of miscdevice
  40  *    03.08.1998   0.3   Do not include modversions.h
  41  *                       Now mixer behaviour can basically be selected between
  42  *                       "OSS documented" and "OSS actual" behaviour
  43  *    31.08.1998   0.4   Fix realplayer problems - dac.count issues
  44  *    27.10.1998   0.5   Fix joystick support
  45  *                       -- Oliver Neukum (c188@org.chemie.uni-muenchen.de)
  46  *    10.12.1998   0.6   Fix drain_dac trying to wait on not yet initialized DMA
  47  *    23.12.1998   0.7   Fix a few f_file & FMODE_ bugs
  48  *                       Don't wake up app until there are fragsize bytes to read/write
  49  *    06.01.1999   0.8   remove the silly SA_INTERRUPT flag.
  50  *                       hopefully killed the egcs section type conflict
  51  *    12.03.1999   0.9   cinfo.blocks should be reset after GETxPTR ioctl.
  52  *                       reported by Johan Maes <joma@telindus.be>
  53  *    22.03.1999   0.10  return EAGAIN instead of EBUSY when O_NONBLOCK
  54  *                       read/write cannot be executed
  55  *    07.04.1999   0.11  implemented the following ioctl's: SOUND_PCM_READ_RATE,
  56  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  57  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  58  *                       Another Alpha fix (wait_src_ready in init routine)
  59  *                       reported by "Ivan N. Kokshaysky" <ink@jurassic.park.msu.ru>
  60  *                       Note: joystick address handling might still be wrong on archs
  61  *                       other than i386
  62  *    15.06.1999   0.12  Fix bad allocation bug.
  63  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  64  *    28.06.1999   0.13  Add pci_set_master
  65  *    03.08.1999   0.14  adapt to Linus' new __setup/__initcall
  66  *                       added kernel command line option "es1371=joystickaddr"
  67  *                       removed CONFIG_SOUND_ES1371_JOYPORT_BOOT kludge
  68  *    10.08.1999   0.15  (Re)added S/PDIF module option for cards revision >= 4.
  69  *                       Initial version by Dave Platt <dplatt@snulbug.mtview.ca.us>.
  70  *                       module_init/__setup fixes
  71  *    08.16.1999   0.16  Joe Cotellese <joec@ensoniq.com>
  72  *                       Added detection for ES1371 revision ID so that we can
  73  *                       detect the ES1373 and later parts.
  74  *                       added AC97 #defines for readability
  75  *                       added a /proc file system for dumping hardware state
  76  *                       updated SRC and CODEC w/r functions to accommodate bugs
  77  *                       in some versions of the ES137x chips.
  78  *    31.08.1999   0.17  add spin_lock_init
  79  *                       replaced current->state = x with set_current_state(x)
  80  *    03.09.1999   0.18  change read semantics for MIDI to match
  81  *                       OSS more closely; remove possible wakeup race
  82  *    21.10.1999   0.19  Round sampling rates, requested by
  83  *                       Kasamatsu Kenichi <t29w0267@ip.media.kyoto-u.ac.jp>
  84  *    27.10.1999   0.20  Added SigmaTel 3D enhancement string
  85  *                       Codec ID printing changes
  86  *    28.10.1999   0.21  More waitqueue races fixed
  87  *                       Joe Cotellese <joec@ensoniq.com>
  88  *                       Changed PCI detection routine so we can more easily
  89  *                       detect ES137x chip and derivatives.
  90  *    05.01.2000   0.22  Should now work with rev7 boards; patch by
  91  *                       Eric Lemar, elemar@cs.washington.edu
  92  *    08.01.2000   0.23  Prevent some ioctl's from returning bad count values on underrun/overrun;
  93  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
  94  *    07.02.2000   0.24  Use pci_alloc_consistent and pci_register_driver
  95  *    07.02.2000   0.25  Use ac97_codec
  96  *    01.03.2000   0.26  SPDIF patch by Mikael Bouillot <mikael.bouillot@bigfoot.com>
  97  *                       Use pci_module_init
  98  *    21.11.2000   0.27  Initialize dma buffers in poll, otherwise poll may return a bogus mask
  99  *    12.12.2000   0.28  More dma buffer initializations, patch from
 100  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
 101  *    05.01.2001   0.29  Hopefully updates will not be required anymore when Creative bumps
 102  *                       the CT5880 revision.
 103  *                       suggested by Stephan Müller <smueller@chronox.de>
 104  *    31.01.2001   0.30  Register/Unregister gameport
 105  *                       Fix SETTRIGGER non OSS API conformity
 106  *    14.07.2001   0.31  Add list of laptops needing amplifier control
 107  *    03.01.2003   0.32  open_mode fixes from Georg Acher <acher@in.tum.de>
 108  */
 109
 110 /*****************************************************************************/
 111
 112 #include <linux/interrupt.h>
 113 #include <linux/module.h>
 114 #include <linux/string.h>
 115 #include <linux/ioport.h>
 116 #include <linux/sched.h>
 117 #include <linux/delay.h>
 118 #include <linux/sound.h>
 119 #include <linux/slab.h>
 120 #include <linux/soundcard.h>
 121 #include <linux/pci.h>
 122 #include <linux/init.h>
 123 #include <linux/poll.h>
 124 #include <linux/bitops.h>
 125 #include <linux/proc_fs.h>
 126 #include <linux/spinlock.h>
 127 #include <linux/smp_lock.h>
 128 #include <linux/ac97_codec.h>
 129 #include <linux/gameport.h>
 130 #include <linux/wait.h>
 131
 132 #include <asm/io.h>
 133 #include <asm/page.h>
 134 #include <asm/uaccess.h>
 135
 136 /* --------------------------------------------------------------------- */
 137
 138 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 139 #define ES1371_DEBUG
 140 #define DBG(x) {}
 141 /*#define DBG(x) {x}*/
 142
 143 /* --------------------------------------------------------------------- */
 144
 145 #ifndef PCI_VENDOR_ID_ENSONIQ
 146 #define PCI_VENDOR_ID_ENSONIQ        0x1274
 147 #endif
 148
 149 #ifndef PCI_VENDOR_ID_ECTIVA
 150 #define PCI_VENDOR_ID_ECTIVA         0x1102
 151 #endif
 152
 153 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371
 154 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371
 155 #endif
 156
 157 #ifndef PCI_DEVICE_ID_ENSONIQ_CT5880
 158 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
 159 #endif
 160
 161 #ifndef PCI_DEVICE_ID_ECTIVA_EV1938
 162 #define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938
 163 #endif
 164
 165 /* ES1371 chip ID */
 166 /* This is a little confusing because all ES1371 compatible chips have the
 167    same DEVICE_ID, the only thing differentiating them is the REV_ID field.
 168    This is only significant if you want to enable features on the later parts.
 169    Yes, I know it's stupid and why didn't we use the sub IDs?
 170 */
 171 #define ES1371REV_ES1373_A  0x04
 172 #define ES1371REV_ES1373_B  0x06
 173 #define ES1371REV_CT5880_A  0x07
 174 #define CT5880REV_CT5880_C  0x02
 175 #define CT5880REV_CT5880_D  0x03
 176 #define ES1371REV_ES1371_B  0x09
 177 #define EV1938REV_EV1938_A  0x00
 178 #define ES1371REV_ES1373_8  0x08
 179
 180 #define ES1371_MAGIC  ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1371)
 181
 182 #define ES1371_EXTENT             0x40
 183 #define JOY_EXTENT                8
 184
 185 #define ES1371_REG_CONTROL        0x00
 186 #define ES1371_REG_STATUS         0x04 /* on the 5880 it is control/status */
 187 #define ES1371_REG_UART_DATA      0x08
 188 #define ES1371_REG_UART_STATUS    0x09
 189 #define ES1371_REG_UART_CONTROL   0x09
 190 #define ES1371_REG_UART_TEST      0x0a
 191 #define ES1371_REG_MEMPAGE        0x0c
 192 #define ES1371_REG_SRCONV         0x10
 193 #define ES1371_REG_CODEC          0x14
 194 #define ES1371_REG_LEGACY         0x18
 195 #define ES1371_REG_SERIAL_CONTROL 0x20
 196 #define ES1371_REG_DAC1_SCOUNT    0x24
 197 #define ES1371_REG_DAC2_SCOUNT    0x28
 198 #define ES1371_REG_ADC_SCOUNT     0x2c
 199
 200 #define ES1371_REG_DAC1_FRAMEADR  0xc30
 201 #define ES1371_REG_DAC1_FRAMECNT  0xc34
 202 #define ES1371_REG_DAC2_FRAMEADR  0xc38
 203 #define ES1371_REG_DAC2_FRAMECNT  0xc3c
 204 #define ES1371_REG_ADC_FRAMEADR   0xd30
 205 #define ES1371_REG_ADC_FRAMECNT   0xd34
 206
 207 #define ES1371_FMT_U8_MONO     0
 208 #define ES1371_FMT_U8_STEREO   1
 209 #define ES1371_FMT_S16_MONO    2
 210 #define ES1371_FMT_S16_STEREO  3
 211 #define ES1371_FMT_STEREO      1
 212 #define ES1371_FMT_S16         2
 213 #define ES1371_FMT_MASK        3
 214
 215 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 216 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
 217
 218 #define CTRL_RECEN_B    0x08000000  /* 1 = don't mix analog in to digital out */
 219 #define CTRL_SPDIFEN_B  0x04000000
 220 #define CTRL_JOY_SHIFT  24
 221 #define CTRL_JOY_MASK   3
 222 #define CTRL_JOY_200    0x00000000  /* joystick base address */
 223 #define CTRL_JOY_208    0x01000000
 224 #define CTRL_JOY_210    0x02000000
 225 #define CTRL_JOY_218    0x03000000
 226 #define CTRL_GPIO_IN0   0x00100000  /* general purpose inputs/outputs */
 227 #define CTRL_GPIO_IN1   0x00200000
 228 #define CTRL_GPIO_IN2   0x00400000
 229 #define CTRL_GPIO_IN3   0x00800000
 230 #define CTRL_GPIO_OUT0  0x00010000
 231 #define CTRL_GPIO_OUT1  0x00020000
 232 #define CTRL_GPIO_OUT2  0x00040000
 233 #define CTRL_GPIO_OUT3  0x00080000
 234 #define CTRL_MSFMTSEL   0x00008000  /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
 235 #define CTRL_SYNCRES    0x00004000  /* AC97 warm reset */
 236 #define CTRL_ADCSTOP    0x00002000  /* stop ADC transfers */
 237 #define CTRL_PWR_INTRM  0x00001000  /* 1 = power level ints enabled */
 238 #define CTRL_M_CB       0x00000800  /* recording source: 0 = ADC, 1 = MPEG */
 239 #define CTRL_CCB_INTRM  0x00000400  /* 1 = CCB "voice" ints enabled */
 240 #define CTRL_PDLEV0     0x00000000  /* power down level */
 241 #define CTRL_PDLEV1     0x00000100
 242 #define CTRL_PDLEV2     0x00000200
 243 #define CTRL_PDLEV3     0x00000300
 244 #define CTRL_BREQ       0x00000080  /* 1 = test mode (internal mem test) */
 245 #define CTRL_DAC1_EN    0x00000040  /* enable DAC1 */
 246 #define CTRL_DAC2_EN    0x00000020  /* enable DAC2 */
 247 #define CTRL_ADC_EN     0x00000010  /* enable ADC */
 248 #define CTRL_UART_EN    0x00000008  /* enable MIDI uart */
 249 #define CTRL_JYSTK_EN   0x00000004  /* enable Joystick port */
 250 #define CTRL_XTALCLKDIS 0x00000002  /* 1 = disable crystal clock input */
 251 #define CTRL_PCICLKDIS  0x00000001  /* 1 = disable PCI clock distribution */
 252
 253
 254 #define STAT_INTR       0x80000000  /* wired or of all interrupt bits */
 255 #define CSTAT_5880_AC97_RST 0x20000000 /* CT5880 Reset bit */
 256 #define STAT_EN_SPDIF   0x00040000  /* enable S/PDIF circuitry */
 257 #define STAT_TS_SPDIF   0x00020000  /* test S/PDIF circuitry */
 258 #define STAT_TESTMODE   0x00010000  /* test ASIC */
 259 #define STAT_SYNC_ERR   0x00000100  /* 1 = codec sync error */
 260 #define STAT_VC         0x000000c0  /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
 261 #define STAT_SH_VC      6
 262 #define STAT_MPWR       0x00000020  /* power level interrupt */
 263 #define STAT_MCCB       0x00000010  /* CCB int pending */
 264 #define STAT_UART       0x00000008  /* UART int pending */
 265 #define STAT_DAC1       0x00000004  /* DAC1 int pending */
 266 #define STAT_DAC2       0x00000002  /* DAC2 int pending */
 267 #define STAT_ADC        0x00000001  /* ADC int pending */
 268
 269 #define USTAT_RXINT     0x80        /* UART rx int pending */
 270 #define USTAT_TXINT     0x04        /* UART tx int pending */
 271 #define USTAT_TXRDY     0x02        /* UART tx ready */
 272 #define USTAT_RXRDY     0x01        /* UART rx ready */
 273
 274 #define UCTRL_RXINTEN   0x80        /* 1 = enable RX ints */
 275 #define UCTRL_TXINTEN   0x60        /* TX int enable field mask */
 276 #define UCTRL_ENA_TXINT 0x20        /* enable TX int */
 277 #define UCTRL_CNTRL     0x03        /* control field */
 278 #define UCTRL_CNTRL_SWR 0x03        /* software reset command */
 279
 280 /* sample rate converter */
 281 #define SRC_OKSTATE        1
 282
 283 #define SRC_RAMADDR_MASK   0xfe000000
 284 #define SRC_RAMADDR_SHIFT  25
 285 #define SRC_DAC1FREEZE     (1UL << 21)
 286 #define SRC_DAC2FREEZE      (1UL << 20)
 287 #define SRC_ADCFREEZE      (1UL << 19)
 288
 289
 290 #define SRC_WE             0x01000000  /* read/write control for SRC RAM */
 291 #define SRC_BUSY           0x00800000  /* SRC busy */
 292 #define SRC_DIS            0x00400000  /* 1 = disable SRC */
 293 #define SRC_DDAC1          0x00200000  /* 1 = disable accum update for DAC1 */
 294 #define SRC_DDAC2          0x00100000  /* 1 = disable accum update for DAC2 */
 295 #define SRC_DADC           0x00080000  /* 1 = disable accum update for ADC2 */
 296 #define SRC_CTLMASK        0x00780000
 297 #define SRC_RAMDATA_MASK   0x0000ffff
 298 #define SRC_RAMDATA_SHIFT  0
 299
 300 #define SRCREG_ADC      0x78
 301 #define SRCREG_DAC1     0x70
 302 #define SRCREG_DAC2     0x74
 303 #define SRCREG_VOL_ADC  0x6c
 304 #define SRCREG_VOL_DAC1 0x7c
 305 #define SRCREG_VOL_DAC2 0x7e
 306
 307 #define SRCREG_TRUNC_N     0x00
 308 #define SRCREG_INT_REGS    0x01
 309 #define SRCREG_ACCUM_FRAC  0x02
 310 #define SRCREG_VFREQ_FRAC  0x03
 311
 312 #define CODEC_PIRD        0x00800000  /* 0 = write AC97 register */
 313 #define CODEC_PIADD_MASK  0x007f0000
 314 #define CODEC_PIADD_SHIFT 16
 315 #define CODEC_PIDAT_MASK  0x0000ffff
 316 #define CODEC_PIDAT_SHIFT 0
 317
 318 #define CODEC_RDY         0x80000000  /* AC97 read data valid */
 319 #define CODEC_WIP         0x40000000  /* AC97 write in progress */
 320 #define CODEC_PORD        0x00800000  /* 0 = write AC97 register */
 321 #define CODEC_POADD_MASK  0x007f0000
 322 #define CODEC_POADD_SHIFT 16
 323 #define CODEC_PODAT_MASK  0x0000ffff
 324 #define CODEC_PODAT_SHIFT 0
 325
 326
 327 #define LEGACY_JFAST      0x80000000  /* fast joystick timing */
 328 #define LEGACY_FIRQ       0x01000000  /* force IRQ */
 329
 330 #define SCTRL_DACTEST     0x00400000  /* 1 = DAC test, test vector generation purposes */
 331 #define SCTRL_P2ENDINC    0x00380000  /*  */
 332 #define SCTRL_SH_P2ENDINC 19
 333 #define SCTRL_P2STINC     0x00070000  /*  */
 334 #define SCTRL_SH_P2STINC  16
 335 #define SCTRL_R1LOOPSEL   0x00008000  /* 0 = loop mode */
 336 #define SCTRL_P2LOOPSEL   0x00004000  /* 0 = loop mode */
 337 #define SCTRL_P1LOOPSEL   0x00002000  /* 0 = loop mode */
 338 #define SCTRL_P2PAUSE     0x00001000  /* 1 = pause mode */
 339 #define SCTRL_P1PAUSE     0x00000800  /* 1 = pause mode */
 340 #define SCTRL_R1INTEN     0x00000400  /* enable interrupt */
 341 #define SCTRL_P2INTEN     0x00000200  /* enable interrupt */
 342 #define SCTRL_P1INTEN     0x00000100  /* enable interrupt */
 343 #define SCTRL_P1SCTRLD    0x00000080  /* reload sample count register for DAC1 */
 344 #define SCTRL_P2DACSEN    0x00000040  /* 1 = DAC2 play back last sample when disabled */
 345 #define SCTRL_R1SEB       0x00000020  /* 1 = 16bit */
 346 #define SCTRL_R1SMB       0x00000010  /* 1 = stereo */
 347 #define SCTRL_R1FMT       0x00000030  /* format mask */
 348 #define SCTRL_SH_R1FMT    4
 349 #define SCTRL_P2SEB       0x00000008  /* 1 = 16bit */
 350 #define SCTRL_P2SMB       0x00000004  /* 1 = stereo */
 351 #define SCTRL_P2FMT       0x0000000c  /* format mask */
 352 #define SCTRL_SH_P2FMT    2
 353 #define SCTRL_P1SEB       0x00000002  /* 1 = 16bit */
 354 #define SCTRL_P1SMB       0x00000001  /* 1 = stereo */
 355 #define SCTRL_P1FMT       0x00000003  /* format mask */
 356 #define SCTRL_SH_P1FMT    0
 357
 358
 359 /* misc stuff */
 360 #define POLL_COUNT   0x1000
 361 #define FMODE_DAC         4           /* slight misuse of mode_t */
 362
 363 /* MIDI buffer sizes */
 364
 365 #define MIDIINBUF  256
 366 #define MIDIOUTBUF 256
 367
 368 #define FMODE_MIDI_SHIFT 3
 369 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 370 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 371
 372 #define ES1371_MODULE_NAME "es1371"
 373 #define PFX ES1371_MODULE_NAME ": "
 374
 375 /* --------------------------------------------------------------------- */
 376
 377 struct es1371_state {
 378         /* magic */
 379         unsigned int magic;
 380
 381         /* list of es1371 devices */
 382         struct list_head devs;
 383
 384         /* the corresponding pci_dev structure */
 385         struct pci_dev *dev;
 386
 387         /* soundcore stuff */
 388         int dev_audio;
 389         int dev_dac;
 390         int dev_midi;
 391
 392         /* hardware resources */
 393         unsigned long io; /* long for SPARC */
 394         unsigned int irq;
 395
 396         /* PCI ID's */
 397         u16 vendor;
 398         u16 device;
 399         u8 rev; /* the chip revision */
 400
 401         /* options */
 402         int spdif_volume; /* S/PDIF output is enabled if != -1 */
 403
 404 #ifdef ES1371_DEBUG
 405         /* debug /proc entry */
 406         struct proc_dir_entry *ps;
 407 #endif /* ES1371_DEBUG */
 408
 409         struct ac97_codec *codec;
 410
 411         /* wave stuff */
 412         unsigned ctrl;
 413         unsigned sctrl;
 414         unsigned dac1rate, dac2rate, adcrate;
 415
 416         spinlock_t lock;
 417         struct semaphore open_sem;
 418         mode_t open_mode;
 419         wait_queue_head_t open_wait;
 420
 421         struct dmabuf {
 422                 void *rawbuf;
 423                 dma_addr_t dmaaddr;
 424                 unsigned buforder;
 425                 unsigned numfrag;
 426                 unsigned fragshift;
 427                 unsigned hwptr, swptr;
 428                 unsigned total_bytes;
 429                 int count;
 430                 unsigned error; /* over/underrun */
 431                 wait_queue_head_t wait;
 432                 /* redundant, but makes calculations easier */
 433                 unsigned fragsize;
 434                 unsigned dmasize;
 435                 unsigned fragsamples;
 436                 /* OSS stuff */
 437                 unsigned mapped:1;
 438                 unsigned ready:1;
 439                 unsigned endcleared:1;
 440                 unsigned enabled:1;
 441                 unsigned ossfragshift;
 442                 int ossmaxfrags;
 443                 unsigned subdivision;
 444         } dma_dac1, dma_dac2, dma_adc;
 445
 446         /* midi stuff */
 447         struct {
 448                 unsigned ird, iwr, icnt;
 449                 unsigned ord, owr, ocnt;
 450                 wait_queue_head_t iwait;
 451                 wait_queue_head_t owait;
 452                 unsigned char ibuf[MIDIINBUF];
 453                 unsigned char obuf[MIDIOUTBUF];
 454         } midi;
 455
 456         struct gameport gameport;
 457         struct semaphore sem;
 458 };
 459
 460 /* --------------------------------------------------------------------- */
 461
 462 static LIST_HEAD(devs);
 463
 464 /* --------------------------------------------------------------------- */
 465
 466 static inline unsigned ld2(unsigned int x)
 467 {
 468         unsigned r = 0;
 469
 470         if (x >= 0x10000) {
 471                 x >>= 16;
 472                 r += 16;
 473         }
 474         if (x >= 0x100) {
 475                 x >>= 8;
 476                 r += 8;
 477         }
 478         if (x >= 0x10) {
 479                 x >>= 4;
 480                 r += 4;
 481         }
 482         if (x >= 4) {
 483                 x >>= 2;
 484                 r += 2;
 485         }
 486         if (x >= 2)
 487                 r++;
 488         return r;
 489 }
 490
 491 /* --------------------------------------------------------------------- */
 492
 493 static unsigned wait_src_ready(struct es1371_state *s)
 494 {
 495         unsigned int t, r;
 496
 497         for (t = 0; t < POLL_COUNT; t++) {
 498                 if (!((r = inl(s->io + ES1371_REG_SRCONV)) & SRC_BUSY))
 499                         return r;
 500                 udelay(1);
 501         }
 502         printk(KERN_DEBUG PFX "sample rate converter timeout r = 0x%08x\n", r);
 503         return r;
 504 }
 505
 506 static unsigned src_read(struct es1371_state *s, unsigned reg)
 507 {
 508         unsigned int temp,i,orig;
 509
 510         /* wait for ready */
 511         temp = wait_src_ready (s);
 512
 513         /* we can only access the SRC at certain times, make sure
 514            we're allowed to before we read */
 515
 516         orig = temp;
 517         /* expose the SRC state bits */
 518         outl ( (temp & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT) | 0x10000UL,
 519                s->io + ES1371_REG_SRCONV);
 520
 521         /* now, wait for busy and the correct time to read */
 522         temp = wait_src_ready (s);
 523
 524         if ( (temp & 0x00870000UL ) != ( SRC_OKSTATE << 16 )){
 525                 /* wait for the right state */
 526                 for (i=0; i<POLL_COUNT; i++){
 527                         temp = inl (s->io + ES1371_REG_SRCONV);
 528                         if ( (temp & 0x00870000UL ) == ( SRC_OKSTATE << 16 ))
 529                                 break;
 530                 }
 531         }
 532
 533         /* hide the state bits */
 534         outl ((orig & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT), s->io + ES1371_REG_SRCONV);
 535         return temp;
 536
 537
 538 }
 539
 540 static void src_write(struct es1371_state *s, unsigned reg, unsigned data)
 541 {
 542
 543         unsigned int r;
 544
 545         r = wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC);
 546         r |= (reg << SRC_RAMADDR_SHIFT) & SRC_RAMADDR_MASK;
 547         r |= (data << SRC_RAMDATA_SHIFT) & SRC_RAMDATA_MASK;
 548         outl(r | SRC_WE, s->io + ES1371_REG_SRCONV);
 549
 550 }
 551
 552 /* --------------------------------------------------------------------- */
 553
 554 /* most of the following here is black magic */
 555 static void set_adc_rate(struct es1371_state *s, unsigned rate)
 556 {
 557         unsigned long flags;
 558         unsigned int n, truncm, freq;
 559
 560         if (rate > 48000)
 561                 rate = 48000;
 562         if (rate < 4000)
 563                 rate = 4000;
 564         n = rate / 3000;
 565         if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
 566                 n--;
 567         truncm = (21 * n - 1) | 1;
 568         freq = ((48000UL << 15) / rate) * n;
 569         s->adcrate = (48000UL << 15) / (freq / n);
 570         spin_lock_irqsave(&s->lock, flags);
 571         if (rate >= 24000) {
 572                 if (truncm > 239)
 573                         truncm = 239;
 574                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 575                           (((239 - truncm) >> 1) << 9) | (n << 4));
 576         } else {
 577                 if (truncm > 119)
 578                         truncm = 119;
 579                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 580                           0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
 581         }
 582         src_write(s, SRCREG_ADC+SRCREG_INT_REGS,
 583                   (src_read(s, SRCREG_ADC+SRCREG_INT_REGS) & 0x00ff) |
 584                   ((freq >> 5) & 0xfc00));
 585         src_write(s, SRCREG_ADC+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 586         src_write(s, SRCREG_VOL_ADC, n << 8);
 587         src_write(s, SRCREG_VOL_ADC+1, n << 8);
 588         spin_unlock_irqrestore(&s->lock, flags);
 589 }
 590
 591
 592 static void set_dac1_rate(struct es1371_state *s, unsigned rate)
 593 {
 594         unsigned long flags;
 595         unsigned int freq, r;
 596
 597         if (rate > 48000)
 598                 rate = 48000;
 599         if (rate < 4000)
 600                 rate = 4000;
 601         freq = ((rate << 15) + 1500) / 3000;
 602         s->dac1rate = (freq * 3000 + 16384) >> 15;
 603         spin_lock_irqsave(&s->lock, flags);
 604         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC)) | SRC_DDAC1;
 605         outl(r, s->io + ES1371_REG_SRCONV);
 606         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS,
 607                   (src_read(s, SRCREG_DAC1+SRCREG_INT_REGS) & 0x00ff) |
 608                   ((freq >> 5) & 0xfc00));
 609         src_write(s, SRCREG_DAC1+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 610         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC));
 611         outl(r, s->io + ES1371_REG_SRCONV);
 612         spin_unlock_irqrestore(&s->lock, flags);
 613 }
 614
 615 static void set_dac2_rate(struct es1371_state *s, unsigned rate)
 616 {
 617         unsigned long flags;
 618         unsigned int freq, r;
 619
 620         if (rate > 48000)
 621                 rate = 48000;
 622         if (rate < 4000)
 623                 rate = 4000;
 624         freq = ((rate << 15) + 1500) / 3000;
 625         s->dac2rate = (freq * 3000 + 16384) >> 15;
 626         spin_lock_irqsave(&s->lock, flags);
 627         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC)) | SRC_DDAC2;
 628         outl(r, s->io + ES1371_REG_SRCONV);
 629         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS,
 630                   (src_read(s, SRCREG_DAC2+SRCREG_INT_REGS) & 0x00ff) |
 631                   ((freq >> 5) & 0xfc00));
 632         src_write(s, SRCREG_DAC2+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 633         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC));
 634         outl(r, s->io + ES1371_REG_SRCONV);
 635         spin_unlock_irqrestore(&s->lock, flags);
 636 }
 637
 638 /* --------------------------------------------------------------------- */
 639
 640 static void __init src_init(struct es1371_state *s)
 641 {
 642         unsigned int i;
 643
 644         /* before we enable or disable the SRC we need
 645            to wait for it to become ready */
 646         wait_src_ready(s);
 647
 648         outl(SRC_DIS, s->io + ES1371_REG_SRCONV);
 649
 650         for (i = 0; i < 0x80; i++)
 651                 src_write(s, i, 0);
 652
 653         src_write(s, SRCREG_DAC1+SRCREG_TRUNC_N, 16 << 4);
 654         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS, 16 << 10);
 655         src_write(s, SRCREG_DAC2+SRCREG_TRUNC_N, 16 << 4);
 656         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS, 16 << 10);
 657         src_write(s, SRCREG_VOL_ADC, 1 << 12);
 658         src_write(s, SRCREG_VOL_ADC+1, 1 << 12);
 659         src_write(s, SRCREG_VOL_DAC1, 1 << 12);
 660         src_write(s, SRCREG_VOL_DAC1+1, 1 << 12);
 661         src_write(s, SRCREG_VOL_DAC2, 1 << 12);
 662         src_write(s, SRCREG_VOL_DAC2+1, 1 << 12);
 663         set_adc_rate(s, 22050);
 664         set_dac1_rate(s, 22050);
 665         set_dac2_rate(s, 22050);
 666
 667         /* WARNING:
 668          * enabling the sample rate converter without properly programming
 669          * its parameters causes the chip to lock up (the SRC busy bit will
 670          * be stuck high, and I've found no way to rectify this other than
 671          * power cycle)
 672          */
 673         wait_src_ready(s);
 674         outl(0, s->io+ES1371_REG_SRCONV);
 675 }
 676
 677 /* --------------------------------------------------------------------- */
 678
 679 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 680 {
 681         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 682         unsigned long flags;
 683         unsigned t, x;
 684
 685         spin_lock_irqsave(&s->lock, flags);
 686         for (t = 0; t < POLL_COUNT; t++)
 687                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 688                         break;
 689
 690         /* save the current state for later */
 691         x = wait_src_ready(s);
 692
 693         /* enable SRC state data in SRC mux */
 694         outl((x & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC)) | 0x00010000,
 695              s->io+ES1371_REG_SRCONV);
 696
 697         /* wait for not busy (state 0) first to avoid
 698            transition states */
 699         for (t=0; t<POLL_COUNT; t++){
 700                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 701                     break;
 702                 udelay(1);
 703         }
 704
 705         /* wait for a SAFE time to write addr/data and then do it, dammit */
 706         for (t=0; t<POLL_COUNT; t++){
 707                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 708                     break;
 709                 udelay(1);
 710         }
 711
 712         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
 713              ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), s->io+ES1371_REG_CODEC);
 714
 715         /* restore SRC reg */
 716         wait_src_ready(s);
 717         outl(x, s->io+ES1371_REG_SRCONV);
 718         spin_unlock_irqrestore(&s->lock, flags);
 719 }
 720
 721 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
 722 {
 723         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 724         unsigned long flags;
 725         unsigned t, x;
 726
 727         spin_lock_irqsave(&s->lock, flags);
 728
 729         /* wait for WIP to go away */
 730         for (t = 0; t < 0x1000; t++)
 731                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 732                         break;
 733
 734         /* save the current state for later */
 735         x = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC));
 736
 737         /* enable SRC state data in SRC mux */
 738         outl( x | 0x00010000,
 739               s->io+ES1371_REG_SRCONV);
 740
 741         /* wait for not busy (state 0) first to avoid
 742            transition states */
 743         for (t=0; t<POLL_COUNT; t++){
 744                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 745                     break;
 746                 udelay(1);
 747         }
 748
 749         /* wait for a SAFE time to write addr/data and then do it, dammit */
 750         for (t=0; t<POLL_COUNT; t++){
 751                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 752                     break;
 753                 udelay(1);
 754         }
 755
 756         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD, s->io+ES1371_REG_CODEC);
 757         /* restore SRC reg */
 758         wait_src_ready(s);
 759         outl(x, s->io+ES1371_REG_SRCONV);
 760
 761         /* wait for WIP again */
 762         for (t = 0; t < 0x1000; t++)
 763                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 764                         break;
 765
 766         /* now wait for the stinkin' data (RDY) */
 767         for (t = 0; t < POLL_COUNT; t++)
 768                 if ((x = inl(s->io+ES1371_REG_CODEC)) & CODEC_RDY)
 769                         break;
 770
 771         spin_unlock_irqrestore(&s->lock, flags);
 772         return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
 773 }
 774
 775 /* --------------------------------------------------------------------- */
 776
 777 static inline void stop_adc(struct es1371_state *s)
 778 {
 779         unsigned long flags;
 780
 781         spin_lock_irqsave(&s->lock, flags);
 782         s->ctrl &= ~CTRL_ADC_EN;
 783         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 784         spin_unlock_irqrestore(&s->lock, flags);
 785 }
 786
 787 static inline void stop_dac1(struct es1371_state *s)
 788 {
 789         unsigned long flags;
 790
 791         spin_lock_irqsave(&s->lock, flags);
 792         s->ctrl &= ~CTRL_DAC1_EN;
 793         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 794         spin_unlock_irqrestore(&s->lock, flags);
 795 }
 796
 797 static inline void stop_dac2(struct es1371_state *s)
 798 {
 799         unsigned long flags;
 800
 801         spin_lock_irqsave(&s->lock, flags);
 802         s->ctrl &= ~CTRL_DAC2_EN;
 803         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 804         spin_unlock_irqrestore(&s->lock, flags);
 805 }
 806
 807 static void start_dac1(struct es1371_state *s)
 808 {
 809         unsigned long flags;
 810         unsigned fragremain, fshift;
 811
 812         spin_lock_irqsave(&s->lock, flags);
 813         if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
 814             && s->dma_dac1.ready) {
 815                 s->ctrl |= CTRL_DAC1_EN;
 816                 s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
 817                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 818                 fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
 819                 fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
 820                 if (fragremain < 2*fshift)
 821                         fragremain = s->dma_dac1.fragsize;
 822                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 823                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 824                 outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 825         }
 826         spin_unlock_irqrestore(&s->lock, flags);
 827 }
 828
 829 static void start_dac2(struct es1371_state *s)
 830 {
 831         unsigned long flags;
 832         unsigned fragremain, fshift;
 833
 834         spin_lock_irqsave(&s->lock, flags);
 835         if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
 836             && s->dma_dac2.ready) {
 837                 s->ctrl |= CTRL_DAC2_EN;
 838                 s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
 839                                          SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
 840                         (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
 841                         (0 << SCTRL_SH_P2STINC);
 842                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 843                 fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
 844                 fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
 845                 if (fragremain < 2*fshift)
 846                         fragremain = s->dma_dac2.fragsize;
 847                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 848                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 849                 outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 850         }
 851         spin_unlock_irqrestore(&s->lock, flags);
 852 }
 853
 854 static void start_adc(struct es1371_state *s)
 855 {
 856         unsigned long flags;
 857         unsigned fragremain, fshift;
 858
 859         spin_lock_irqsave(&s->lock, flags);
 860         if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 861             && s->dma_adc.ready) {
 862                 s->ctrl |= CTRL_ADC_EN;
 863                 s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
 864                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 865                 fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
 866                 fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
 867                 if (fragremain < 2*fshift)
 868                         fragremain = s->dma_adc.fragsize;
 869                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 870                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 871                 outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 872         }
 873         spin_unlock_irqrestore(&s->lock, flags);
 874 }
 875
 876 /* --------------------------------------------------------------------- */
 877
 878 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
 879 #define DMABUF_MINORDER 1
 880
 881
 882 static inline void dealloc_dmabuf(struct es1371_state *s, struct dmabuf *db)
 883 {
 884         struct page *page, *pend;
 885
 886         if (db->rawbuf) {
 887                 /* undo marking the pages as reserved */
 888                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 889                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 890                         ClearPageReserved(page);
 891                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 892         }
 893         db->rawbuf = NULL;
 894         db->mapped = db->ready = 0;
 895 }
 896
 897 static int prog_dmabuf(struct es1371_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
 898 {
 899         int order;
 900         unsigned bytepersec;
 901         unsigned bufs;
 902         struct page *page, *pend;
 903
 904         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 905         if (!db->rawbuf) {
 906                 db->ready = db->mapped = 0;
 907                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 908                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 909                                 break;
 910                 if (!db->rawbuf)
 911                         return -ENOMEM;
 912                 db->buforder = order;
 913                 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 914                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 915                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 916                         SetPageReserved(page);
 917         }
 918         fmt &= ES1371_FMT_MASK;
 919         bytepersec = rate << sample_shift[fmt];
 920         bufs = PAGE_SIZE << db->buforder;
 921         if (db->ossfragshift) {
 922                 if ((1000 << db->ossfragshift) < bytepersec)
 923                         db->fragshift = ld2(bytepersec/1000);
 924                 else
 925                         db->fragshift = db->ossfragshift;
 926         } else {
 927                 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
 928                 if (db->fragshift < 3)
 929                         db->fragshift = 3;
 930         }
 931         db->numfrag = bufs >> db->fragshift;
 932         while (db->numfrag < 4 && db->fragshift > 3) {
 933                 db->fragshift--;
 934                 db->numfrag = bufs >> db->fragshift;
 935         }
 936         db->fragsize = 1 << db->fragshift;
 937         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 938                 db->numfrag = db->ossmaxfrags;
 939         db->fragsamples = db->fragsize >> sample_shift[fmt];
 940         db->dmasize = db->numfrag << db->fragshift;
 941         memset(db->rawbuf, (fmt & ES1371_FMT_S16) ? 0 : 0x80, db->dmasize);
 942         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 943         outl(db->dmaaddr, s->io+(reg & 0xff));
 944         outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
 945         db->enabled = 1;
 946         db->ready = 1;
 947         return 0;
 948 }
 949
 950 static inline int prog_dmabuf_adc(struct es1371_state *s)
 951 {
 952         stop_adc(s);
 953         return prog_dmabuf(s, &s->dma_adc, s->adcrate, (s->sctrl >> SCTRL_SH_R1FMT) & ES1371_FMT_MASK,
 954                            ES1371_REG_ADC_FRAMEADR);
 955 }
 956
 957 static inline int prog_dmabuf_dac2(struct es1371_state *s)
 958 {
 959         stop_dac2(s);
 960         return prog_dmabuf(s, &s->dma_dac2, s->dac2rate, (s->sctrl >> SCTRL_SH_P2FMT) & ES1371_FMT_MASK,
 961                            ES1371_REG_DAC2_FRAMEADR);
 962 }
 963
 964 static inline int prog_dmabuf_dac1(struct es1371_state *s)
 965 {
 966         stop_dac1(s);
 967         return prog_dmabuf(s, &s->dma_dac1, s->dac1rate, (s->sctrl >> SCTRL_SH_P1FMT) & ES1371_FMT_MASK,
 968                            ES1371_REG_DAC1_FRAMEADR);
 969 }
 970
 971 static inline unsigned get_hwptr(struct es1371_state *s, struct dmabuf *db, unsigned reg)
 972 {
 973         unsigned hwptr, diff;
 974
 975         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 976         hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
 977         diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
 978         db->hwptr = hwptr;
 979         return diff;
 980 }
 981
 982 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
 983 {
 984         if (bptr + len > bsize) {
 985                 unsigned x = bsize - bptr;
 986                 memset(((char *)buf) + bptr, c, x);
 987                 bptr = 0;
 988                 len -= x;
 989         }
 990         memset(((char *)buf) + bptr, c, len);
 991 }
 992
 993 /* call with spinlock held! */
 994 static void es1371_update_ptr(struct es1371_state *s)
 995 {
 996         int diff;
 997
 998         /* update ADC pointer */
 999         if (s->ctrl & CTRL_ADC_EN) {
1000                 diff = get_hwptr(s, &s->dma_adc, ES1371_REG_ADC_FRAMECNT);
1001                 s->dma_adc.total_bytes += diff;
1002                 s->dma_adc.count += diff;
1003                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1004                         wake_up(&s->dma_adc.wait);
1005                 if (!s->dma_adc.mapped) {
1006                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1007                                 s->ctrl &= ~CTRL_ADC_EN;
1008                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1009                                 s->dma_adc.error++;
1010                         }
1011                 }
1012         }
1013         /* update DAC1 pointer */
1014         if (s->ctrl & CTRL_DAC1_EN) {
1015                 diff = get_hwptr(s, &s->dma_dac1, ES1371_REG_DAC1_FRAMECNT);
1016                 s->dma_dac1.total_bytes += diff;
1017                 if (s->dma_dac1.mapped) {
1018                         s->dma_dac1.count += diff;
1019                         if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
1020                                 wake_up(&s->dma_dac1.wait);
1021                 } else {
1022                         s->dma_dac1.count -= diff;
1023                         if (s->dma_dac1.count <= 0) {
1024                                 s->ctrl &= ~CTRL_DAC1_EN;
1025                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1026                                 s->dma_dac1.error++;
1027                         } else if (s->dma_dac1.count <= (signed)s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
1028                                 clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
1029                                               s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
1030                                 s->dma_dac1.endcleared = 1;
1031                         }
1032                         if (s->dma_dac1.count + (signed)s->dma_dac1.fragsize <= (signed)s->dma_dac1.dmasize)
1033                                 wake_up(&s->dma_dac1.wait);
1034                 }
1035         }
1036         /* update DAC2 pointer */
1037         if (s->ctrl & CTRL_DAC2_EN) {
1038                 diff = get_hwptr(s, &s->dma_dac2, ES1371_REG_DAC2_FRAMECNT);
1039                 s->dma_dac2.total_bytes += diff;
1040                 if (s->dma_dac2.mapped) {
1041                         s->dma_dac2.count += diff;
1042                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1043                                 wake_up(&s->dma_dac2.wait);
1044                 } else {
1045                         s->dma_dac2.count -= diff;
1046                         if (s->dma_dac2.count <= 0) {
1047                                 s->ctrl &= ~CTRL_DAC2_EN;
1048                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1049                                 s->dma_dac2.error++;
1050                         } else if (s->dma_dac2.count <= (signed)s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
1051                                 clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
1052                                               s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
1053                                 s->dma_dac2.endcleared = 1;
1054                         }
1055                         if (s->dma_dac2.count + (signed)s->dma_dac2.fragsize <= (signed)s->dma_dac2.dmasize)
1056                                 wake_up(&s->dma_dac2.wait);
1057                 }
1058         }
1059 }
1060
1061 /* hold spinlock for the following! */
1062 static void es1371_handle_midi(struct es1371_state *s)
1063 {
1064         unsigned char ch;
1065         int wake;
1066
1067         if (!(s->ctrl & CTRL_UART_EN))
1068                 return;
1069         wake = 0;
1070         while (inb(s->io+ES1371_REG_UART_STATUS) & USTAT_RXRDY) {
1071                 ch = inb(s->io+ES1371_REG_UART_DATA);
1072                 if (s->midi.icnt < MIDIINBUF) {
1073                         s->midi.ibuf[s->midi.iwr] = ch;
1074                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1075                         s->midi.icnt++;
1076                 }
1077                 wake = 1;
1078         }
1079         if (wake)
1080                 wake_up(&s->midi.iwait);
1081         wake = 0;
1082         while ((inb(s->io+ES1371_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
1083                 outb(s->midi.obuf[s->midi.ord], s->io+ES1371_REG_UART_DATA);
1084                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1085                 s->midi.ocnt--;
1086                 if (s->midi.ocnt < MIDIOUTBUF-16)
1087                         wake = 1;
1088         }
1089         if (wake)
1090                 wake_up(&s->midi.owait);
1091         outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1371_REG_UART_CONTROL);
1092 }
1093
1094 static irqreturn_t es1371_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1095 {
1096         struct es1371_state *s = (struct es1371_state *)dev_id;
1097         unsigned int intsrc, sctl;
1098
1099         /* fastpath out, to ease interrupt sharing */
1100         intsrc = inl(s->io+ES1371_REG_STATUS);
1101         if (!(intsrc & 0x80000000))
1102                 return IRQ_NONE;
1103         spin_lock(&s->lock);
1104         /* clear audio interrupts first */
1105         sctl = s->sctrl;
1106         if (intsrc & STAT_ADC)
1107                 sctl &= ~SCTRL_R1INTEN;
1108         if (intsrc & STAT_DAC1)
1109                 sctl &= ~SCTRL_P1INTEN;
1110         if (intsrc & STAT_DAC2)
1111                 sctl &= ~SCTRL_P2INTEN;
1112         outl(sctl, s->io+ES1371_REG_SERIAL_CONTROL);
1113         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1114         es1371_update_ptr(s);
1115         es1371_handle_midi(s);
1116         spin_unlock(&s->lock);
1117         return IRQ_HANDLED;
1118 }
1119
1120 /* --------------------------------------------------------------------- */
1121
1122 static const char invalid_magic[] = KERN_CRIT PFX "invalid magic value\n";
1123
1124 #define VALIDATE_STATE(s)                         \
1125 ({                                                \
1126         if (!(s) || (s)->magic != ES1371_MAGIC) { \
1127                 printk(invalid_magic);            \
1128                 return -ENXIO;                    \
1129         }                                         \
1130 })
1131
1132 /* --------------------------------------------------------------------- */
1133
1134 /* Conversion table for S/PDIF PCM volume emulation through the SRC */
1135 /* dB-linear table of DAC vol values; -0dB to -46.5dB with mute */
1136 static const unsigned short DACVolTable[101] =
1137 {
1138         0x1000, 0x0f2a, 0x0e60, 0x0da0, 0x0cea, 0x0c3e, 0x0b9a, 0x0aff,
1139         0x0a6d, 0x09e1, 0x095e, 0x08e1, 0x086a, 0x07fa, 0x078f, 0x072a,
1140         0x06cb, 0x0670, 0x061a, 0x05c9, 0x057b, 0x0532, 0x04ed, 0x04ab,
1141         0x046d, 0x0432, 0x03fa, 0x03c5, 0x0392, 0x0363, 0x0335, 0x030b,
1142         0x02e2, 0x02bc, 0x0297, 0x0275, 0x0254, 0x0235, 0x0217, 0x01fb,
1143         0x01e1, 0x01c8, 0x01b0, 0x0199, 0x0184, 0x0170, 0x015d, 0x014b,
1144         0x0139, 0x0129, 0x0119, 0x010b, 0x00fd, 0x00f0, 0x00e3, 0x00d7,
1145         0x00cc, 0x00c1, 0x00b7, 0x00ae, 0x00a5, 0x009c, 0x0094, 0x008c,
1146         0x0085, 0x007e, 0x0077, 0x0071, 0x006b, 0x0066, 0x0060, 0x005b,
1147         0x0057, 0x0052, 0x004e, 0x004a, 0x0046, 0x0042, 0x003f, 0x003c,
1148         0x0038, 0x0036, 0x0033, 0x0030, 0x002e, 0x002b, 0x0029, 0x0027,
1149         0x0025, 0x0023, 0x0021, 0x001f, 0x001e, 0x001c, 0x001b, 0x0019,
1150         0x0018, 0x0017, 0x0016, 0x0014, 0x0000
1151 };
1152
1153 /*
1154  * when we are in S/PDIF mode, we want to disable any analog output so
1155  * we filter the mixer ioctls
1156  */
1157 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg)
1158 {
1159         struct es1371_state *s = (struct es1371_state *)codec->private_data;
1160         int val;
1161         unsigned long flags;
1162         unsigned int left, right;
1163
1164         VALIDATE_STATE(s);
1165         /* filter mixer ioctls to catch PCM and MASTER volume when in S/PDIF mode */
1166         if (s->spdif_volume == -1)
1167                 return codec->mixer_ioctl(codec, cmd, arg);
1168         switch (cmd) {
1169         case SOUND_MIXER_WRITE_VOLUME:
1170                 return 0;
1171
1172         case SOUND_MIXER_WRITE_PCM:   /* use SRC for PCM volume */
1173                 if (get_user(val, (int __user *)arg))
1174                         return -EFAULT;
1175                 right = ((val >> 8)  & 0xff);
1176                 left = (val  & 0xff);
1177                 if (right > 100)
1178                         right = 100;
1179                 if (left > 100)
1180                         left = 100;
1181                 s->spdif_volume = (right << 8) | left;
1182                 spin_lock_irqsave(&s->lock, flags);
1183                 src_write(s, SRCREG_VOL_DAC2, DACVolTable[100 - left]);
1184                 src_write(s, SRCREG_VOL_DAC2+1, DACVolTable[100 - right]);
1185                 spin_unlock_irqrestore(&s->lock, flags);
1186                 return 0;
1187
1188         case SOUND_MIXER_READ_PCM:
1189                 return put_user(s->spdif_volume, (int __user *)arg);
1190         }
1191         return codec->mixer_ioctl(codec, cmd, arg);
1192 }
1193
1194 /* --------------------------------------------------------------------- */
1195
1196 /*
1197  * AC97 Mixer Register to Connections mapping of the Concert 97 board
1198  *
1199  * AC97_MASTER_VOL_STEREO   Line Out
1200  * AC97_MASTER_VOL_MONO     TAD Output
1201  * AC97_PCBEEP_VOL          none
1202  * AC97_PHONE_VOL           TAD Input (mono)
1203  * AC97_MIC_VOL             MIC Input (mono)
1204  * AC97_LINEIN_VOL          Line Input (stereo)
1205  * AC97_CD_VOL              CD Input (stereo)
1206  * AC97_VIDEO_VOL           none
1207  * AC97_AUX_VOL             Aux Input (stereo)
1208  * AC97_PCMOUT_VOL          Wave Output (stereo)
1209  */
1210
1211 static int es1371_open_mixdev(struct inode *inode, struct file *file)
1212 {
1213         int minor = iminor(inode);
1214         struct list_head *list;
1215         struct es1371_state *s;
1216
1217         for (list = devs.next; ; list = list->next) {
1218                 if (list == &devs)
1219                         return -ENODEV;
1220                 s = list_entry(list, struct es1371_state, devs);
1221                 if (s->codec->dev_mixer == minor)
1222                         break;
1223         }
1224         VALIDATE_STATE(s);
1225         file->private_data = s;
1226         return 0;
1227 }
1228
1229 static int es1371_release_mixdev(struct inode *inode, struct file *file)
1230 {
1231         struct es1371_state *s = (struct es1371_state *)file->private_data;
1232
1233         VALIDATE_STATE(s);
1234         return 0;
1235 }
1236
1237 static int es1371_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1238 {
1239         struct es1371_state *s = (struct es1371_state *)file->private_data;
1240         struct ac97_codec *codec = s->codec;
1241
1242         return mixdev_ioctl(codec, cmd, arg);
1243 }
1244
1245 static /*const*/ struct file_operations es1371_mixer_fops = {
1246         .owner          = THIS_MODULE,
1247         .llseek         = no_llseek,
1248         .ioctl          = es1371_ioctl_mixdev,
1249         .open           = es1371_open_mixdev,
1250         .release        = es1371_release_mixdev,
1251 };
1252
1253 /* --------------------------------------------------------------------- */
1254
1255 static int drain_dac1(struct es1371_state *s, int nonblock)
1256 {
1257         DECLARE_WAITQUEUE(wait, current);
1258         unsigned long flags;
1259         int count, tmo;
1260
1261         if (s->dma_dac1.mapped || !s->dma_dac1.ready)
1262                 return 0;
1263         add_wait_queue(&s->dma_dac1.wait, &wait);
1264         for (;;) {
1265                 __set_current_state(TASK_INTERRUPTIBLE);
1266                 spin_lock_irqsave(&s->lock, flags);
1267                 count = s->dma_dac1.count;
1268                 spin_unlock_irqrestore(&s->lock, flags);
1269                 if (count <= 0)
1270                         break;
1271                 if (signal_pending(current))
1272                         break;
1273                 if (nonblock) {
1274                         remove_wait_queue(&s->dma_dac1.wait, &wait);
1275                         set_current_state(TASK_RUNNING);
1276                         return -EBUSY;
1277                 }
1278                 tmo = 3 * HZ * (count + s->dma_dac1.fragsize) / 2 / s->dac1rate;
1279                 tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
1280                 if (!schedule_timeout(tmo + 1))
1281                         DBG(printk(KERN_DEBUG PFX "dac1 dma timed out??\n");)
1282         }
1283         remove_wait_queue(&s->dma_dac1.wait, &wait);
1284         set_current_state(TASK_RUNNING);
1285         if (signal_pending(current))
1286                 return -ERESTARTSYS;
1287         return 0;
1288 }
1289
1290 static int drain_dac2(struct es1371_state *s, int nonblock)
1291 {
1292         DECLARE_WAITQUEUE(wait, current);
1293         unsigned long flags;
1294         int count, tmo;
1295
1296         if (s->dma_dac2.mapped || !s->dma_dac2.ready)
1297                 return 0;
1298         add_wait_queue(&s->dma_dac2.wait, &wait);
1299         for (;;) {
1300                 __set_current_state(TASK_UNINTERRUPTIBLE);
1301                 spin_lock_irqsave(&s->lock, flags);
1302                 count = s->dma_dac2.count;
1303                 spin_unlock_irqrestore(&s->lock, flags);
1304                 if (count <= 0)
1305                         break;
1306                 if (signal_pending(current))
1307                         break;
1308                 if (nonblock) {
1309                         remove_wait_queue(&s->dma_dac2.wait, &wait);
1310                         set_current_state(TASK_RUNNING);
1311                         return -EBUSY;
1312                 }
1313                 tmo = 3 * HZ * (count + s->dma_dac2.fragsize) / 2 / s->dac2rate;
1314                 tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
1315                 if (!schedule_timeout(tmo + 1))
1316                         DBG(printk(KERN_DEBUG PFX "dac2 dma timed out??\n");)
1317         }
1318         remove_wait_queue(&s->dma_dac2.wait, &wait);
1319         set_current_state(TASK_RUNNING);
1320         if (signal_pending(current))
1321                 return -ERESTARTSYS;
1322         return 0;
1323 }
1324
1325 /* --------------------------------------------------------------------- */
1326
1327 static ssize_t es1371_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1328 {
1329         struct es1371_state *s = (struct es1371_state *)file->private_data;
1330         DECLARE_WAITQUEUE(wait, current);
1331         ssize_t ret = 0;
1332         unsigned long flags;
1333         unsigned swptr;
1334         int cnt;
1335
1336         VALIDATE_STATE(s);
1337         if (ppos != &file->f_pos)
1338                 return -ESPIPE;
1339         if (s->dma_adc.mapped)
1340                 return -ENXIO;
1341         if (!access_ok(VERIFY_WRITE, buffer, count))
1342                 return -EFAULT;
1343         down(&s->sem);
1344         if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1345                 goto out2;
1346
1347         add_wait_queue(&s->dma_adc.wait, &wait);
1348         while (count > 0) {
1349                 spin_lock_irqsave(&s->lock, flags);
1350                 swptr = s->dma_adc.swptr;
1351                 cnt = s->dma_adc.dmasize-swptr;
1352                 if (s->dma_adc.count < cnt)
1353                         cnt = s->dma_adc.count;
1354                 if (cnt <= 0)
1355                         __set_current_state(TASK_INTERRUPTIBLE);
1356                 spin_unlock_irqrestore(&s->lock, flags);
1357                 if (cnt > count)
1358                         cnt = count;
1359                 if (cnt <= 0) {
1360                         if (s->dma_adc.enabled)
1361                                 start_adc(s);
1362                         if (file->f_flags & O_NONBLOCK) {
1363                                 if (!ret)
1364                                         ret = -EAGAIN;
1365                                 goto out;
1366                         }
1367                         up(&s->sem);
1368                         schedule();
1369                         if (signal_pending(current)) {
1370                                 if (!ret)
1371                                         ret = -ERESTARTSYS;
1372                                 goto out2;
1373                         }
1374                         down(&s->sem);
1375                         if (s->dma_adc.mapped)
1376                         {
1377                                 ret = -ENXIO;
1378                                 goto out;
1379                         }
1380                         continue;
1381                 }
1382                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1383                         if (!ret)
1384                                 ret = -EFAULT;
1385                         goto out;
1386                 }
1387                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1388                 spin_lock_irqsave(&s->lock, flags);
1389                 s->dma_adc.swptr = swptr;
1390                 s->dma_adc.count -= cnt;
1391                 spin_unlock_irqrestore(&s->lock, flags);
1392                 count -= cnt;
1393                 buffer += cnt;
1394                 ret += cnt;
1395                 if (s->dma_adc.enabled)
1396                         start_adc(s);
1397         }
1398 out:
1399         up(&s->sem);
1400 out2:
1401         remove_wait_queue(&s->dma_adc.wait, &wait);
1402         set_current_state(TASK_RUNNING);
1403         return ret;
1404 }
1405
1406 static ssize_t es1371_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1407 {
1408         struct es1371_state *s = (struct es1371_state *)file->private_data;
1409         DECLARE_WAITQUEUE(wait, current);
1410         ssize_t ret;
1411         unsigned long flags;
1412         unsigned swptr;
1413         int cnt;
1414
1415         VALIDATE_STATE(s);
1416         if (ppos != &file->f_pos)
1417                 return -ESPIPE;
1418         if (s->dma_dac2.mapped)
1419                 return -ENXIO;
1420         if (!access_ok(VERIFY_READ, buffer, count))
1421                 return -EFAULT;
1422         down(&s->sem);
1423         if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1424                 goto out3;
1425         ret = 0;
1426         add_wait_queue(&s->dma_dac2.wait, &wait);
1427         while (count > 0) {
1428                 spin_lock_irqsave(&s->lock, flags);
1429                 if (s->dma_dac2.count < 0) {
1430                         s->dma_dac2.count = 0;
1431                         s->dma_dac2.swptr = s->dma_dac2.hwptr;
1432                 }
1433                 swptr = s->dma_dac2.swptr;
1434                 cnt = s->dma_dac2.dmasize-swptr;
1435                 if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
1436                         cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
1437                 if (cnt <= 0)
1438                         __set_current_state(TASK_INTERRUPTIBLE);
1439                 spin_unlock_irqrestore(&s->lock, flags);
1440                 if (cnt > count)
1441                         cnt = count;
1442                 if (cnt <= 0) {
1443                         if (s->dma_dac2.enabled)
1444                                 start_dac2(s);
1445                         if (file->f_flags & O_NONBLOCK) {
1446                                 if (!ret)
1447                                         ret = -EAGAIN;
1448                                 goto out;
1449                         }
1450                         up(&s->sem);
1451                         schedule();
1452                         if (signal_pending(current)) {
1453                                 if (!ret)
1454                                         ret = -ERESTARTSYS;
1455                                 goto out2;
1456                         }
1457                         down(&s->sem);
1458                         if (s->dma_dac2.mapped)
1459                         {
1460                                 ret = -ENXIO;
1461                                 goto out;
1462                         }
1463                         continue;
1464                 }
1465                 if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt)) {
1466                         if (!ret)
1467                                 ret = -EFAULT;
1468                         goto out;
1469                 }
1470                 swptr = (swptr + cnt) % s->dma_dac2.dmasize;
1471                 spin_lock_irqsave(&s->lock, flags);
1472                 s->dma_dac2.swptr = swptr;
1473                 s->dma_dac2.count += cnt;
1474                 s->dma_dac2.endcleared = 0;
1475                 spin_unlock_irqrestore(&s->lock, flags);
1476                 count -= cnt;
1477                 buffer += cnt;
1478                 ret += cnt;
1479                 if (s->dma_dac2.enabled)
1480                         start_dac2(s);
1481         }
1482 out:
1483         up(&s->sem);
1484 out2:
1485         remove_wait_queue(&s->dma_dac2.wait, &wait);
1486 out3:
1487         set_current_state(TASK_RUNNING);
1488         return ret;
1489 }
1490
1491 /* No kernel lock - we have our own spinlock */
1492 static unsigned int es1371_poll(struct file *file, struct poll_table_struct *wait)
1493 {
1494         struct es1371_state *s = (struct es1371_state *)file->private_data;
1495         unsigned long flags;
1496         unsigned int mask = 0;
1497
1498         VALIDATE_STATE(s);
1499         if (file->f_mode & FMODE_WRITE) {
1500                 if (!s->dma_dac2.ready && prog_dmabuf_dac2(s))
1501                         return 0;
1502                 poll_wait(file, &s->dma_dac2.wait, wait);
1503         }
1504         if (file->f_mode & FMODE_READ) {
1505                 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1506                         return 0;
1507                 poll_wait(file, &s->dma_adc.wait, wait);
1508         }
1509         spin_lock_irqsave(&s->lock, flags);
1510         es1371_update_ptr(s);
1511         if (file->f_mode & FMODE_READ) {
1512                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1513                                 mask |= POLLIN | POLLRDNORM;
1514         }
1515         if (file->f_mode & FMODE_WRITE) {
1516                 if (s->dma_dac2.mapped) {
1517                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1518                                 mask |= POLLOUT | POLLWRNORM;
1519                 } else {
1520                         if ((signed)s->dma_dac2.dmasize >= s->dma_dac2.count + (signed)s->dma_dac2.fragsize)
1521                                 mask |= POLLOUT | POLLWRNORM;
1522                 }
1523         }
1524         spin_unlock_irqrestore(&s->lock, flags);
1525         return mask;
1526 }
1527
1528 static int es1371_mmap(struct file *file, struct vm_area_struct *vma)
1529 {
1530         struct es1371_state *s = (struct es1371_state *)file->private_data;
1531         struct dmabuf *db;
1532         int ret = 0;
1533         unsigned long size;
1534
1535         VALIDATE_STATE(s);
1536         lock_kernel();
1537         down(&s->sem);
1538
1539         if (vma->vm_flags & VM_WRITE) {
1540                 if ((ret = prog_dmabuf_dac2(s)) != 0) {
1541                         goto out;
1542                 }
1543                 db = &s->dma_dac2;
1544         } else if (vma->vm_flags & VM_READ) {
1545                 if ((ret = prog_dmabuf_adc(s)) != 0) {
1546                         goto out;
1547                 }
1548                 db = &s->dma_adc;
1549         } else {
1550                 ret = -EINVAL;
1551                 goto out;
1552         }
1553         if (vma->vm_pgoff != 0) {
1554                 ret = -EINVAL;
1555                 goto out;
1556         }
1557         size = vma->vm_end - vma->vm_start;
1558         if (size > (PAGE_SIZE << db->buforder)) {
1559                 ret = -EINVAL;
1560                 goto out;
1561         }
1562         if (remap_page_range(vma, vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot)) {
1563                 ret = -EAGAIN;
1564                 goto out;
1565         }
1566         db->mapped = 1;
1567 out:
1568         up(&s->sem);
1569         unlock_kernel();
1570         return ret;
1571 }
1572
1573 static int es1371_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1574 {
1575         struct es1371_state *s = (struct es1371_state *)file->private_data;
1576         unsigned long flags;
1577         audio_buf_info abinfo;
1578         count_info cinfo;
1579         int count;
1580         int val, mapped, ret;
1581         void __user *argp = (void __user *)arg;
1582         int __user *p = argp;
1583
1584         VALIDATE_STATE(s);
1585         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
1586                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1587         switch (cmd) {
1588         case OSS_GETVERSION:
1589                 return put_user(SOUND_VERSION, p);
1590
1591         case SNDCTL_DSP_SYNC:
1592                 if (file->f_mode & FMODE_WRITE)
1593                         return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1594                 return 0;
1595
1596         case SNDCTL_DSP_SETDUPLEX:
1597                 return 0;
1598
1599         case SNDCTL_DSP_GETCAPS:
1600                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1601
1602         case SNDCTL_DSP_RESET:
1603                 if (file->f_mode & FMODE_WRITE) {
1604                         stop_dac2(s);
1605                         synchronize_irq(s->irq);
1606                         s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
1607                 }
1608                 if (file->f_mode & FMODE_READ) {
1609                         stop_adc(s);
1610                         synchronize_irq(s->irq);
1611                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1612                 }
1613                 return 0;
1614
1615         case SNDCTL_DSP_SPEED:
1616                 if (get_user(val, p))
1617                         return -EFAULT;
1618                 if (val >= 0) {
1619                         if (file->f_mode & FMODE_READ) {
1620                                 stop_adc(s);
1621                                 s->dma_adc.ready = 0;
1622                                 set_adc_rate(s, val);
1623                         }
1624                         if (file->f_mode & FMODE_WRITE) {
1625                                 stop_dac2(s);
1626                                 s->dma_dac2.ready = 0;
1627                                 set_dac2_rate(s, val);
1628                         }
1629                 }
1630                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, p);
1631
1632         case SNDCTL_DSP_STEREO:
1633                 if (get_user(val, p))
1634                         return -EFAULT;
1635                 if (file->f_mode & FMODE_READ) {
1636                         stop_adc(s);
1637                         s->dma_adc.ready = 0;
1638                         spin_lock_irqsave(&s->lock, flags);
1639                         if (val)
1640                                 s->sctrl |= SCTRL_R1SMB;
1641                         else
1642                                 s->sctrl &= ~SCTRL_R1SMB;
1643                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1644                         spin_unlock_irqrestore(&s->lock, flags);
1645                 }
1646                 if (file->f_mode & FMODE_WRITE) {
1647                         stop_dac2(s);
1648                         s->dma_dac2.ready = 0;
1649                         spin_lock_irqsave(&s->lock, flags);
1650                         if (val)
1651                                 s->sctrl |= SCTRL_P2SMB;
1652                         else
1653                                 s->sctrl &= ~SCTRL_P2SMB;
1654                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1655                         spin_unlock_irqrestore(&s->lock, flags);
1656                 }
1657                 return 0;
1658
1659         case SNDCTL_DSP_CHANNELS:
1660                 if (get_user(val, p))
1661                         return -EFAULT;
1662                 if (val != 0) {
1663                         if (file->f_mode & FMODE_READ) {
1664                                 stop_adc(s);
1665                                 s->dma_adc.ready = 0;
1666                                 spin_lock_irqsave(&s->lock, flags);
1667                                 if (val >= 2)
1668                                         s->sctrl |= SCTRL_R1SMB;
1669                                 else
1670                                         s->sctrl &= ~SCTRL_R1SMB;
1671                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1672                                 spin_unlock_irqrestore(&s->lock, flags);
1673                         }
1674                         if (file->f_mode & FMODE_WRITE) {
1675                                 stop_dac2(s);
1676                                 s->dma_dac2.ready = 0;
1677                                 spin_lock_irqsave(&s->lock, flags);
1678                                 if (val >= 2)
1679                                         s->sctrl |= SCTRL_P2SMB;
1680                                 else
1681                                         s->sctrl &= ~SCTRL_P2SMB;
1682                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1683                                 spin_unlock_irqrestore(&s->lock, flags);
1684                         }
1685                 }
1686                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, p);
1687
1688         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1689                 return put_user(AFMT_S16_LE|AFMT_U8, p);
1690
1691         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1692                 if (get_user(val, p))
1693                         return -EFAULT;
1694                 if (val != AFMT_QUERY) {
1695                         if (file->f_mode & FMODE_READ) {
1696                                 stop_adc(s);
1697                                 s->dma_adc.ready = 0;
1698                                 spin_lock_irqsave(&s->lock, flags);
1699                                 if (val == AFMT_S16_LE)
1700                                         s->sctrl |= SCTRL_R1SEB;
1701                                 else
1702                                         s->sctrl &= ~SCTRL_R1SEB;
1703                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1704                                 spin_unlock_irqrestore(&s->lock, flags);
1705                         }
1706                         if (file->f_mode & FMODE_WRITE) {
1707                                 stop_dac2(s);
1708                                 s->dma_dac2.ready = 0;
1709                                 spin_lock_irqsave(&s->lock, flags);
1710                                 if (val == AFMT_S16_LE)
1711                                         s->sctrl |= SCTRL_P2SEB;
1712                                 else
1713                                         s->sctrl &= ~SCTRL_P2SEB;
1714                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1715                                 spin_unlock_irqrestore(&s->lock, flags);
1716                         }
1717                 }
1718                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
1719                                 AFMT_S16_LE : AFMT_U8, p);
1720
1721         case SNDCTL_DSP_POST:
1722                 return 0;
1723
1724         case SNDCTL_DSP_GETTRIGGER:
1725                 val = 0;
1726                 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1727                         val |= PCM_ENABLE_INPUT;
1728                 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1729                         val |= PCM_ENABLE_OUTPUT;
1730                 return put_user(val, p);
1731
1732         case SNDCTL_DSP_SETTRIGGER:
1733                 if (get_user(val, p))
1734                         return -EFAULT;
1735                 if (file->f_mode & FMODE_READ) {
1736                         if (val & PCM_ENABLE_INPUT) {
1737                                 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1738                                         return ret;
1739                                 s->dma_adc.enabled = 1;
1740                                 start_adc(s);
1741                         } else {
1742                                 s->dma_adc.enabled = 0;
1743                                 stop_adc(s);
1744                         }
1745                 }
1746                 if (file->f_mode & FMODE_WRITE) {
1747                         if (val & PCM_ENABLE_OUTPUT) {
1748                                 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1749                                         return ret;
1750                                 s->dma_dac2.enabled = 1;
1751                                 start_dac2(s);
1752                         } else {
1753                                 s->dma_dac2.enabled = 0;
1754                                 stop_dac2(s);
1755                         }
1756                 }
1757                 return 0;
1758
1759         case SNDCTL_DSP_GETOSPACE:
1760                 if (!(file->f_mode & FMODE_WRITE))
1761                         return -EINVAL;
1762                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1763                         return val;
1764                 spin_lock_irqsave(&s->lock, flags);
1765                 es1371_update_ptr(s);
1766                 abinfo.fragsize = s->dma_dac2.fragsize;
1767                 count = s->dma_dac2.count;
1768                 if (count < 0)
1769                         count = 0;
1770                 abinfo.bytes = s->dma_dac2.dmasize - count;
1771                 abinfo.fragstotal = s->dma_dac2.numfrag;
1772                 abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
1773                 spin_unlock_irqrestore(&s->lock, flags);
1774                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1775
1776         case SNDCTL_DSP_GETISPACE:
1777                 if (!(file->f_mode & FMODE_READ))
1778                         return -EINVAL;
1779                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1780                         return val;
1781                 spin_lock_irqsave(&s->lock, flags);
1782                 es1371_update_ptr(s);
1783                 abinfo.fragsize = s->dma_adc.fragsize;
1784                 count = s->dma_adc.count;
1785                 if (count < 0)
1786                         count = 0;
1787                 abinfo.bytes = count;
1788                 abinfo.fragstotal = s->dma_adc.numfrag;
1789                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1790                 spin_unlock_irqrestore(&s->lock, flags);
1791                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1792
1793         case SNDCTL_DSP_NONBLOCK:
1794                 file->f_flags |= O_NONBLOCK;
1795                 return 0;
1796
1797         case SNDCTL_DSP_GETODELAY:
1798                 if (!(file->f_mode & FMODE_WRITE))
1799                         return -EINVAL;
1800                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1801                         return val;
1802                 spin_lock_irqsave(&s->lock, flags);
1803                 es1371_update_ptr(s);
1804                 count = s->dma_dac2.count;
1805                 spin_unlock_irqrestore(&s->lock, flags);
1806                 if (count < 0)
1807                         count = 0;
1808                 return put_user(count, p);
1809
1810         case SNDCTL_DSP_GETIPTR:
1811                 if (!(file->f_mode & FMODE_READ))
1812                         return -EINVAL;
1813                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1814                         return val;
1815                 spin_lock_irqsave(&s->lock, flags);
1816                 es1371_update_ptr(s);
1817                 cinfo.bytes = s->dma_adc.total_bytes;
1818                 count = s->dma_adc.count;
1819                 if (count < 0)
1820                         count = 0;
1821                 cinfo.blocks = count >> s->dma_adc.fragshift;
1822                 cinfo.ptr = s->dma_adc.hwptr;
1823                 if (s->dma_adc.mapped)
1824                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1825                 spin_unlock_irqrestore(&s->lock, flags);
1826                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1827                         return -EFAULT;
1828                 return 0;
1829
1830         case SNDCTL_DSP_GETOPTR:
1831                 if (!(file->f_mode & FMODE_WRITE))
1832                         return -EINVAL;
1833                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1834                         return val;
1835                 spin_lock_irqsave(&s->lock, flags);
1836                 es1371_update_ptr(s);
1837                 cinfo.bytes = s->dma_dac2.total_bytes;
1838                 count = s->dma_dac2.count;
1839                 if (count < 0)
1840                         count = 0;
1841                 cinfo.blocks = count >> s->dma_dac2.fragshift;
1842                 cinfo.ptr = s->dma_dac2.hwptr;
1843                 if (s->dma_dac2.mapped)
1844                         s->dma_dac2.count &= s->dma_dac2.fragsize-1;
1845                 spin_unlock_irqrestore(&s->lock, flags);
1846                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1847                         return -EFAULT;
1848                 return 0;
1849
1850         case SNDCTL_DSP_GETBLKSIZE:
1851                 if (file->f_mode & FMODE_WRITE) {
1852                         if ((val = prog_dmabuf_dac2(s)))
1853                                 return val;
1854                         return put_user(s->dma_dac2.fragsize, p);
1855                 }
1856                 if ((val = prog_dmabuf_adc(s)))
1857                         return val;
1858                 return put_user(s->dma_adc.fragsize, p);
1859
1860         case SNDCTL_DSP_SETFRAGMENT:
1861                 if (get_user(val, p))
1862                         return -EFAULT;
1863                 if (file->f_mode & FMODE_READ) {
1864                         s->dma_adc.ossfragshift = val & 0xffff;
1865                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1866                         if (s->dma_adc.ossfragshift < 4)
1867                                 s->dma_adc.ossfragshift = 4;
1868                         if (s->dma_adc.ossfragshift > 15)
1869                                 s->dma_adc.ossfragshift = 15;
1870                         if (s->dma_adc.ossmaxfrags < 4)
1871                                 s->dma_adc.ossmaxfrags = 4;
1872                 }
1873                 if (file->f_mode & FMODE_WRITE) {
1874                         s->dma_dac2.ossfragshift = val & 0xffff;
1875                         s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
1876                         if (s->dma_dac2.ossfragshift < 4)
1877                                 s->dma_dac2.ossfragshift = 4;
1878                         if (s->dma_dac2.ossfragshift > 15)
1879                                 s->dma_dac2.ossfragshift = 15;
1880                         if (s->dma_dac2.ossmaxfrags < 4)
1881                                 s->dma_dac2.ossmaxfrags = 4;
1882                 }
1883                 return 0;
1884
1885         case SNDCTL_DSP_SUBDIVIDE:
1886                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1887                     (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1888                         return -EINVAL;
1889                 if (get_user(val, p))
1890                         return -EFAULT;
1891                 if (val != 1 && val != 2 && val != 4)
1892                         return -EINVAL;
1893                 if (file->f_mode & FMODE_READ)
1894                         s->dma_adc.subdivision = val;
1895                 if (file->f_mode & FMODE_WRITE)
1896                         s->dma_dac2.subdivision = val;
1897                 return 0;
1898
1899         case SOUND_PCM_READ_RATE:
1900                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, p);
1901
1902         case SOUND_PCM_READ_CHANNELS:
1903                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, p);
1904
1905         case SOUND_PCM_READ_BITS:
1906                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ? 16 : 8, p);
1907
1908         case SOUND_PCM_WRITE_FILTER:
1909         case SNDCTL_DSP_SETSYNCRO:
1910         case SOUND_PCM_READ_FILTER:
1911                 return -EINVAL;
1912
1913         }
1914         return mixdev_ioctl(s->codec, cmd, arg);
1915 }
1916
1917 static int es1371_open(struct inode *inode, struct file *file)
1918 {
1919         int minor = iminor(inode);
1920         DECLARE_WAITQUEUE(wait, current);
1921         unsigned long flags;
1922         struct list_head *list;
1923         struct es1371_state *s;
1924
1925         for (list = devs.next; ; list = list->next) {
1926                 if (list == &devs)
1927                         return -ENODEV;
1928                 s = list_entry(list, struct es1371_state, devs);
1929                 if (!((s->dev_audio ^ minor) & ~0xf))
1930                         break;
1931         }
1932         VALIDATE_STATE(s);
1933         file->private_data = s;
1934         /* wait for device to become free */
1935         down(&s->open_sem);
1936         while (s->open_mode & file->f_mode) {
1937                 if (file->f_flags & O_NONBLOCK) {
1938                         up(&s->open_sem);
1939                         return -EBUSY;
1940                 }
1941                 add_wait_queue(&s->open_wait, &wait);
1942                 __set_current_state(TASK_INTERRUPTIBLE);
1943                 up(&s->open_sem);
1944                 schedule();
1945                 remove_wait_queue(&s->open_wait, &wait);
1946                 set_current_state(TASK_RUNNING);
1947                 if (signal_pending(current))
1948                         return -ERESTARTSYS;
1949                 down(&s->open_sem);
1950         }
1951         if (file->f_mode & FMODE_READ) {
1952                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1953                 s->dma_adc.enabled = 1;
1954                 set_adc_rate(s, 8000);
1955         }
1956         if (file->f_mode & FMODE_WRITE) {
1957                 s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
1958                 s->dma_dac2.enabled = 1;
1959                 set_dac2_rate(s, 8000);
1960         }
1961         spin_lock_irqsave(&s->lock, flags);
1962         if (file->f_mode & FMODE_READ) {
1963                 s->sctrl &= ~SCTRL_R1FMT;
1964                 if ((minor & 0xf) == SND_DEV_DSP16)
1965                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_R1FMT;
1966                 else
1967                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_R1FMT;
1968         }
1969         if (file->f_mode & FMODE_WRITE) {
1970                 s->sctrl &= ~SCTRL_P2FMT;
1971                 if ((minor & 0xf) == SND_DEV_DSP16)
1972                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P2FMT;
1973                 else
1974                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P2FMT;
1975         }
1976         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1977         spin_unlock_irqrestore(&s->lock, flags);
1978         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1979         up(&s->open_sem);
1980         init_MUTEX(&s->sem);
1981         return 0;
1982 }
1983
1984 static int es1371_release(struct inode *inode, struct file *file)
1985 {
1986         struct es1371_state *s = (struct es1371_state *)file->private_data;
1987
1988         VALIDATE_STATE(s);
1989         lock_kernel();
1990         if (file->f_mode & FMODE_WRITE)
1991                 drain_dac2(s, file->f_flags & O_NONBLOCK);
1992         down(&s->open_sem);
1993         if (file->f_mode & FMODE_WRITE) {
1994                 stop_dac2(s);
1995                 dealloc_dmabuf(s, &s->dma_dac2);
1996         }
1997         if (file->f_mode & FMODE_READ) {
1998                 stop_adc(s);
1999                 dealloc_dmabuf(s, &s->dma_adc);
2000         }
2001         s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
2002         up(&s->open_sem);
2003         wake_up(&s->open_wait);
2004         unlock_kernel();
2005         return 0;
2006 }
2007
2008 static /*const*/ struct file_operations es1371_audio_fops = {
2009         .owner          = THIS_MODULE,
2010         .llseek         = no_llseek,
2011         .read           = es1371_read,
2012         .write          = es1371_write,
2013         .poll           = es1371_poll,
2014         .ioctl          = es1371_ioctl,
2015         .mmap           = es1371_mmap,
2016         .open           = es1371_open,
2017         .release        = es1371_release,
2018 };
2019
2020 /* --------------------------------------------------------------------- */
2021
2022 static ssize_t es1371_write_dac(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2023 {
2024         struct es1371_state *s = (struct es1371_state *)file->private_data;
2025         DECLARE_WAITQUEUE(wait, current);
2026         ssize_t ret = 0;
2027         unsigned long flags;
2028         unsigned swptr;
2029         int cnt;
2030
2031         VALIDATE_STATE(s);
2032         if (ppos != &file->f_pos)
2033                 return -ESPIPE;
2034         if (s->dma_dac1.mapped)
2035                 return -ENXIO;
2036         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2037                 return ret;
2038         if (!access_ok(VERIFY_READ, buffer, count))
2039                 return -EFAULT;
2040         add_wait_queue(&s->dma_dac1.wait, &wait);
2041         while (count > 0) {
2042                 spin_lock_irqsave(&s->lock, flags);
2043                 if (s->dma_dac1.count < 0) {
2044                         s->dma_dac1.count = 0;
2045                         s->dma_dac1.swptr = s->dma_dac1.hwptr;
2046                 }
2047                 swptr = s->dma_dac1.swptr;
2048                 cnt = s->dma_dac1.dmasize-swptr;
2049                 if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
2050                         cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
2051                 if (cnt <= 0)
2052                         __set_current_state(TASK_INTERRUPTIBLE);
2053                 spin_unlock_irqrestore(&s->lock, flags);
2054                 if (cnt > count)
2055                         cnt = count;
2056                 if (cnt <= 0) {
2057                         if (s->dma_dac1.enabled)
2058                                 start_dac1(s);
2059                         if (file->f_flags & O_NONBLOCK) {
2060                                 if (!ret)
2061                                         ret = -EAGAIN;
2062                                 break;
2063                         }
2064                         schedule();
2065                         if (signal_pending(current)) {
2066                                 if (!ret)
2067                                         ret = -ERESTARTSYS;
2068                                 break;
2069                         }
2070                         continue;
2071                 }
2072                 if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt)) {
2073                         if (!ret)
2074                                 ret = -EFAULT;
2075                         break;
2076                 }
2077                 swptr = (swptr + cnt) % s->dma_dac1.dmasize;
2078                 spin_lock_irqsave(&s->lock, flags);
2079                 s->dma_dac1.swptr = swptr;
2080                 s->dma_dac1.count += cnt;
2081                 s->dma_dac1.endcleared = 0;
2082                 spin_unlock_irqrestore(&s->lock, flags);
2083                 count -= cnt;
2084                 buffer += cnt;
2085                 ret += cnt;
2086                 if (s->dma_dac1.enabled)
2087                         start_dac1(s);
2088         }
2089         remove_wait_queue(&s->dma_dac1.wait, &wait);
2090         set_current_state(TASK_RUNNING);
2091         return ret;
2092 }
2093
2094 /* No kernel lock - we have our own spinlock */
2095 static unsigned int es1371_poll_dac(struct file *file, struct poll_table_struct *wait)
2096 {
2097         struct es1371_state *s = (struct es1371_state *)file->private_data;
2098         unsigned long flags;
2099         unsigned int mask = 0;
2100
2101         VALIDATE_STATE(s);
2102         if (!s->dma_dac1.ready && prog_dmabuf_dac1(s))
2103                 return 0;
2104         poll_wait(file, &s->dma_dac1.wait, wait);
2105         spin_lock_irqsave(&s->lock, flags);
2106         es1371_update_ptr(s);
2107         if (s->dma_dac1.mapped) {
2108                 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
2109                         mask |= POLLOUT | POLLWRNORM;
2110         } else {
2111                 if ((signed)s->dma_dac1.dmasize >= s->dma_dac1.count + (signed)s->dma_dac1.fragsize)
2112                         mask |= POLLOUT | POLLWRNORM;
2113         }
2114         spin_unlock_irqrestore(&s->lock, flags);
2115         return mask;
2116 }
2117
2118 static int es1371_mmap_dac(struct file *file, struct vm_area_struct *vma)
2119 {
2120         struct es1371_state *s = (struct es1371_state *)file->private_data;
2121         int ret;
2122         unsigned long size;
2123
2124         VALIDATE_STATE(s);
2125         if (!(vma->vm_flags & VM_WRITE))
2126                 return -EINVAL;
2127         lock_kernel();
2128         if ((ret = prog_dmabuf_dac1(s)) != 0)
2129                 goto out;
2130         ret = -EINVAL;
2131         if (vma->vm_pgoff != 0)
2132                 goto out;
2133         size = vma->vm_end - vma->vm_start;
2134         if (size > (PAGE_SIZE << s->dma_dac1.buforder))
2135                 goto out;
2136         ret = -EAGAIN;
2137         if (remap_page_range(vma, vma->vm_start, virt_to_phys(s->dma_dac1.rawbuf), size, vma->vm_page_prot))
2138                 goto out;
2139         s->dma_dac1.mapped = 1;
2140         ret = 0;
2141 out:
2142         unlock_kernel();
2143         return ret;
2144 }
2145
2146 static int es1371_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2147 {
2148         struct es1371_state *s = (struct es1371_state *)file->private_data;
2149         unsigned long flags;
2150         audio_buf_info abinfo;
2151         count_info cinfo;
2152         int count;
2153         int val, ret;
2154         int __user *p = (int __user *)arg;
2155
2156         VALIDATE_STATE(s);
2157         switch (cmd) {
2158         case OSS_GETVERSION:
2159                 return put_user(SOUND_VERSION, p);
2160
2161         case SNDCTL_DSP_SYNC:
2162                 return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
2163
2164         case SNDCTL_DSP_SETDUPLEX:
2165                 return -EINVAL;
2166
2167         case SNDCTL_DSP_GETCAPS:
2168                 return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
2169
2170         case SNDCTL_DSP_RESET:
2171                 stop_dac1(s);
2172                 synchronize_irq(s->irq);
2173                 s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
2174                 return 0;
2175
2176         case SNDCTL_DSP_SPEED:
2177                 if (get_user(val, p))
2178                         return -EFAULT;
2179                 if (val >= 0) {
2180                         stop_dac1(s);
2181                         s->dma_dac1.ready = 0;
2182                         set_dac1_rate(s, val);
2183                 }
2184                 return put_user(s->dac1rate, p);
2185
2186         case SNDCTL_DSP_STEREO:
2187                 if (get_user(val, p))
2188                         return -EFAULT;
2189                 stop_dac1(s);
2190                 s->dma_dac1.ready = 0;
2191                 spin_lock_irqsave(&s->lock, flags);
2192                 if (val)
2193                         s->sctrl |= SCTRL_P1SMB;
2194                 else
2195                         s->sctrl &= ~SCTRL_P1SMB;
2196                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2197                 spin_unlock_irqrestore(&s->lock, flags);
2198                 return 0;
2199
2200         case SNDCTL_DSP_CHANNELS:
2201                 if (get_user(val, p))
2202                         return -EFAULT;
2203                 if (val != 0) {
2204                         stop_dac1(s);
2205                         s->dma_dac1.ready = 0;
2206                         spin_lock_irqsave(&s->lock, flags);
2207                         if (val >= 2)
2208                                 s->sctrl |= SCTRL_P1SMB;
2209                         else
2210                                 s->sctrl &= ~SCTRL_P1SMB;
2211                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2212                         spin_unlock_irqrestore(&s->lock, flags);
2213                 }
2214                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
2215
2216         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2217                 return put_user(AFMT_S16_LE|AFMT_U8, p);
2218
2219         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2220                 if (get_user(val, p))
2221                         return -EFAULT;
2222                 if (val != AFMT_QUERY) {
2223                         stop_dac1(s);
2224                         s->dma_dac1.ready = 0;
2225                         spin_lock_irqsave(&s->lock, flags);
2226                         if (val == AFMT_S16_LE)
2227                                 s->sctrl |= SCTRL_P1SEB;
2228                         else
2229                                 s->sctrl &= ~SCTRL_P1SEB;
2230                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2231                         spin_unlock_irqrestore(&s->lock, flags);
2232                 }
2233                 return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, p);
2234
2235         case SNDCTL_DSP_POST:
2236                 return 0;
2237
2238         case SNDCTL_DSP_GETTRIGGER:
2239                 return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, p);
2240
2241         case SNDCTL_DSP_SETTRIGGER:
2242                 if (get_user(val, p))
2243                         return -EFAULT;
2244                 if (val & PCM_ENABLE_OUTPUT) {
2245                         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2246                                 return ret;
2247                         s->dma_dac1.enabled = 1;
2248                         start_dac1(s);
2249                 } else {
2250                         s->dma_dac1.enabled = 0;
2251                         stop_dac1(s);
2252                 }
2253                 return 0;
2254
2255         case SNDCTL_DSP_GETOSPACE:
2256                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2257                         return val;
2258                 spin_lock_irqsave(&s->lock, flags);
2259                 es1371_update_ptr(s);
2260                 abinfo.fragsize = s->dma_dac1.fragsize;
2261                 count = s->dma_dac1.count;
2262                 if (count < 0)
2263                         count = 0;
2264                 abinfo.bytes = s->dma_dac1.dmasize - count;
2265                 abinfo.fragstotal = s->dma_dac1.numfrag;
2266                 abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
2267                 spin_unlock_irqrestore(&s->lock, flags);
2268                 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2269
2270         case SNDCTL_DSP_NONBLOCK:
2271                 file->f_flags |= O_NONBLOCK;
2272                 return 0;
2273
2274         case SNDCTL_DSP_GETODELAY:
2275                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2276                         return val;
2277                 spin_lock_irqsave(&s->lock, flags);
2278                 es1371_update_ptr(s);
2279                 count = s->dma_dac1.count;
2280                 spin_unlock_irqrestore(&s->lock, flags);
2281                 if (count < 0)
2282                         count = 0;
2283                 return put_user(count, p);
2284
2285         case SNDCTL_DSP_GETOPTR:
2286                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2287                         return val;
2288                 spin_lock_irqsave(&s->lock, flags);
2289                 es1371_update_ptr(s);
2290                 cinfo.bytes = s->dma_dac1.total_bytes;
2291                 count = s->dma_dac1.count;
2292                 if (count < 0)
2293                         count = 0;
2294                 cinfo.blocks = count >> s->dma_dac1.fragshift;
2295                 cinfo.ptr = s->dma_dac1.hwptr;
2296                 if (s->dma_dac1.mapped)
2297                         s->dma_dac1.count &= s->dma_dac1.fragsize-1;
2298                 spin_unlock_irqrestore(&s->lock, flags);
2299                 if (copy_to_user((void __user *)arg, &cinfo, sizeof(cinfo)))
2300                         return -EFAULT;
2301                 return 0;
2302
2303         case SNDCTL_DSP_GETBLKSIZE:
2304                 if ((val = prog_dmabuf_dac1(s)))
2305                         return val;
2306                 return put_user(s->dma_dac1.fragsize, p);
2307
2308         case SNDCTL_DSP_SETFRAGMENT:
2309                 if (get_user(val, p))
2310                         return -EFAULT;
2311                 s->dma_dac1.ossfragshift = val & 0xffff;
2312                 s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
2313                 if (s->dma_dac1.ossfragshift < 4)
2314                         s->dma_dac1.ossfragshift = 4;
2315                 if (s->dma_dac1.ossfragshift > 15)
2316                         s->dma_dac1.ossfragshift = 15;
2317                 if (s->dma_dac1.ossmaxfrags < 4)
2318                         s->dma_dac1.ossmaxfrags = 4;
2319                 return 0;
2320
2321         case SNDCTL_DSP_SUBDIVIDE:
2322                 if (s->dma_dac1.subdivision)
2323                         return -EINVAL;
2324                 if (get_user(val, p))
2325                         return -EFAULT;
2326                 if (val != 1 && val != 2 && val != 4)
2327                         return -EINVAL;
2328                 s->dma_dac1.subdivision = val;
2329                 return 0;
2330
2331         case SOUND_PCM_READ_RATE:
2332                 return put_user(s->dac1rate, p);
2333
2334         case SOUND_PCM_READ_CHANNELS:
2335                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
2336
2337         case SOUND_PCM_READ_BITS:
2338                 return put_user((s->sctrl & SCTRL_P1SEB) ? 16 : 8, p);
2339
2340         case SOUND_PCM_WRITE_FILTER:
2341         case SNDCTL_DSP_SETSYNCRO:
2342         case SOUND_PCM_READ_FILTER:
2343                 return -EINVAL;
2344
2345         }
2346         return mixdev_ioctl(s->codec, cmd, arg);
2347 }
2348
2349 static int es1371_open_dac(struct inode *inode, struct file *file)
2350 {
2351         int minor = iminor(inode);
2352         DECLARE_WAITQUEUE(wait, current);
2353         unsigned long flags;
2354         struct list_head *list;
2355         struct es1371_state *s;
2356
2357         for (list = devs.next; ; list = list->next) {
2358                 if (list == &devs)
2359                         return -ENODEV;
2360                 s = list_entry(list, struct es1371_state, devs);
2361                 if (!((s->dev_dac ^ minor) & ~0xf))
2362                         break;
2363         }
2364         VALIDATE_STATE(s);
2365         /* we allow opening with O_RDWR, most programs do it although they will only write */
2366 #if 0
2367         if (file->f_mode & FMODE_READ)
2368                 return -EPERM;
2369 #endif
2370         if (!(file->f_mode & FMODE_WRITE))
2371                 return -EINVAL;
2372         file->private_data = s;
2373         /* wait for device to become free */
2374         down(&s->open_sem);
2375         while (s->open_mode & FMODE_DAC) {
2376                 if (file->f_flags & O_NONBLOCK) {
2377                         up(&s->open_sem);
2378                         return -EBUSY;
2379                 }
2380                 add_wait_queue(&s->open_wait, &wait);
2381                 __set_current_state(TASK_INTERRUPTIBLE);
2382                 up(&s->open_sem);
2383                 schedule();
2384                 remove_wait_queue(&s->open_wait, &wait);
2385                 set_current_state(TASK_RUNNING);
2386                 if (signal_pending(current))
2387                         return -ERESTARTSYS;
2388                 down(&s->open_sem);
2389         }
2390         s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
2391         s->dma_dac1.enabled = 1;
2392         set_dac1_rate(s, 8000);
2393         spin_lock_irqsave(&s->lock, flags);
2394         s->sctrl &= ~SCTRL_P1FMT;
2395         if ((minor & 0xf) == SND_DEV_DSP16)
2396                 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P1FMT;
2397         else
2398                 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P1FMT;
2399         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2400         spin_unlock_irqrestore(&s->lock, flags);
2401         s->open_mode |= FMODE_DAC;
2402         up(&s->open_sem);
2403         return 0;
2404 }
2405
2406 static int es1371_release_dac(struct inode *inode, struct file *file)
2407 {
2408         struct es1371_state *s = (struct es1371_state *)file->private_data;
2409
2410         VALIDATE_STATE(s);
2411         lock_kernel();
2412         drain_dac1(s, file->f_flags & O_NONBLOCK);
2413         down(&s->open_sem);
2414         stop_dac1(s);
2415         dealloc_dmabuf(s, &s->dma_dac1);
2416         s->open_mode &= ~FMODE_DAC;
2417         up(&s->open_sem);
2418         wake_up(&s->open_wait);
2419         unlock_kernel();
2420         return 0;
2421 }
2422
2423 static /*const*/ struct file_operations es1371_dac_fops = {
2424         .owner          = THIS_MODULE,
2425         .llseek         = no_llseek,
2426         .write          = es1371_write_dac,
2427         .poll           = es1371_poll_dac,
2428         .ioctl          = es1371_ioctl_dac,
2429         .mmap           = es1371_mmap_dac,
2430         .open           = es1371_open_dac,
2431         .release        = es1371_release_dac,
2432 };
2433
2434 /* --------------------------------------------------------------------- */
2435
2436 static ssize_t es1371_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2437 {
2438         struct es1371_state *s = (struct es1371_state *)file->private_data;
2439         DECLARE_WAITQUEUE(wait, current);
2440         ssize_t ret;
2441         unsigned long flags;
2442         unsigned ptr;
2443         int cnt;
2444
2445         VALIDATE_STATE(s);
2446         if (ppos != &file->f_pos)
2447                 return -ESPIPE;
2448         if (!access_ok(VERIFY_WRITE, buffer, count))
2449                 return -EFAULT;
2450         if (count == 0)
2451                 return 0;
2452         ret = 0;
2453         add_wait_queue(&s->midi.iwait, &wait);
2454         while (count > 0) {
2455                 spin_lock_irqsave(&s->lock, flags);
2456                 ptr = s->midi.ird;
2457                 cnt = MIDIINBUF - ptr;
2458                 if (s->midi.icnt < cnt)
2459                         cnt = s->midi.icnt;
2460                 if (cnt <= 0)
2461                         __set_current_state(TASK_INTERRUPTIBLE);
2462                 spin_unlock_irqrestore(&s->lock, flags);
2463                 if (cnt > count)
2464                         cnt = count;
2465                 if (cnt <= 0) {
2466                         if (file->f_flags & O_NONBLOCK) {
2467                                 if (!ret)
2468                                         ret = -EAGAIN;
2469                                 break;
2470                         }
2471                         schedule();
2472                         if (signal_pending(current)) {
2473                                 if (!ret)
2474                                         ret = -ERESTARTSYS;
2475                                 break;
2476                         }
2477                         continue;
2478                 }
2479                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2480                         if (!ret)
2481                                 ret = -EFAULT;
2482                         break;
2483                 }
2484                 ptr = (ptr + cnt) % MIDIINBUF;
2485                 spin_lock_irqsave(&s->lock, flags);
2486                 s->midi.ird = ptr;
2487                 s->midi.icnt -= cnt;
2488                 spin_unlock_irqrestore(&s->lock, flags);
2489                 count -= cnt;
2490                 buffer += cnt;
2491                 ret += cnt;
2492                 break;
2493         }
2494         __set_current_state(TASK_RUNNING);
2495         remove_wait_queue(&s->midi.iwait, &wait);
2496         return ret;
2497 }
2498
2499 static ssize_t es1371_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2500 {
2501         struct es1371_state *s = (struct es1371_state *)file->private_data;
2502         DECLARE_WAITQUEUE(wait, current);
2503         ssize_t ret;
2504         unsigned long flags;
2505         unsigned ptr;
2506         int cnt;
2507
2508         VALIDATE_STATE(s);
2509         if (ppos != &file->f_pos)
2510                 return -ESPIPE;
2511         if (!access_ok(VERIFY_READ, buffer, count))
2512                 return -EFAULT;
2513         if (count == 0)
2514                 return 0;
2515         ret = 0;
2516         add_wait_queue(&s->midi.owait, &wait);
2517         while (count > 0) {
2518                 spin_lock_irqsave(&s->lock, flags);
2519                 ptr = s->midi.owr;
2520                 cnt = MIDIOUTBUF - ptr;
2521                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2522                         cnt = MIDIOUTBUF - s->midi.ocnt;
2523                 if (cnt <= 0) {
2524                         __set_current_state(TASK_INTERRUPTIBLE);
2525                         es1371_handle_midi(s);
2526                 }
2527                 spin_unlock_irqrestore(&s->lock, flags);
2528                 if (cnt > count)
2529                         cnt = count;
2530                 if (cnt <= 0) {
2531                         if (file->f_flags & O_NONBLOCK) {
2532                                 if (!ret)
2533                                         ret = -EAGAIN;
2534                                 break;
2535                         }
2536                         schedule();
2537                         if (signal_pending(current)) {
2538                                 if (!ret)
2539                                         ret = -ERESTARTSYS;
2540                                 break;
2541                         }
2542                         continue;
2543                 }
2544                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2545                         if (!ret)
2546                                 ret = -EFAULT;
2547                         break;
2548                 }
2549                 ptr = (ptr + cnt) % MIDIOUTBUF;
2550                 spin_lock_irqsave(&s->lock, flags);
2551                 s->midi.owr = ptr;
2552                 s->midi.ocnt += cnt;
2553                 spin_unlock_irqrestore(&s->lock, flags);
2554                 count -= cnt;
2555                 buffer += cnt;
2556                 ret += cnt;
2557                 spin_lock_irqsave(&s->lock, flags);
2558                 es1371_handle_midi(s);
2559                 spin_unlock_irqrestore(&s->lock, flags);
2560         }
2561         __set_current_state(TASK_RUNNING);
2562         remove_wait_queue(&s->midi.owait, &wait);
2563         return ret;
2564 }
2565
2566 /* No kernel lock - we have our own spinlock */
2567 static unsigned int es1371_midi_poll(struct file *file, struct poll_table_struct *wait)
2568 {
2569         struct es1371_state *s = (struct es1371_state *)file->private_data;
2570         unsigned long flags;
2571         unsigned int mask = 0;
2572
2573         VALIDATE_STATE(s);
2574         if (file->f_mode & FMODE_WRITE)
2575                 poll_wait(file, &s->midi.owait, wait);
2576         if (file->f_mode & FMODE_READ)
2577                 poll_wait(file, &s->midi.iwait, wait);
2578         spin_lock_irqsave(&s->lock, flags);
2579         if (file->f_mode & FMODE_READ) {
2580                 if (s->midi.icnt > 0)
2581                         mask |= POLLIN | POLLRDNORM;
2582         }
2583         if (file->f_mode & FMODE_WRITE) {
2584                 if (s->midi.ocnt < MIDIOUTBUF)
2585                         mask |= POLLOUT | POLLWRNORM;
2586         }
2587         spin_unlock_irqrestore(&s->lock, flags);
2588         return mask;
2589 }
2590
2591 static int es1371_midi_open(struct inode *inode, struct file *file)
2592 {
2593         int minor = iminor(inode);
2594         DECLARE_WAITQUEUE(wait, current);
2595         unsigned long flags;
2596         struct list_head *list;
2597         struct es1371_state *s;
2598
2599         for (list = devs.next; ; list = list->next) {
2600                 if (list == &devs)
2601                         return -ENODEV;
2602                 s = list_entry(list, struct es1371_state, devs);
2603                 if (s->dev_midi == minor)
2604                         break;
2605         }
2606         VALIDATE_STATE(s);
2607         file->private_data = s;
2608         /* wait for device to become free */
2609         down(&s->open_sem);
2610         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2611                 if (file->f_flags & O_NONBLOCK) {
2612                         up(&s->open_sem);
2613                         return -EBUSY;
2614                 }
2615                 add_wait_queue(&s->open_wait, &wait);
2616                 __set_current_state(TASK_INTERRUPTIBLE);
2617                 up(&s->open_sem);
2618                 schedule();
2619                 remove_wait_queue(&s->open_wait, &wait);
2620                 set_current_state(TASK_RUNNING);
2621                 if (signal_pending(current))
2622                         return -ERESTARTSYS;
2623                 down(&s->open_sem);
2624         }
2625         spin_lock_irqsave(&s->lock, flags);
2626         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2627                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2628                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2629                 outb(UCTRL_CNTRL_SWR, s->io+ES1371_REG_UART_CONTROL);
2630                 outb(0, s->io+ES1371_REG_UART_CONTROL);
2631                 outb(0, s->io+ES1371_REG_UART_TEST);
2632         }
2633         if (file->f_mode & FMODE_READ) {
2634                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2635         }
2636         if (file->f_mode & FMODE_WRITE) {
2637                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2638         }
2639         s->ctrl |= CTRL_UART_EN;
2640         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2641         es1371_handle_midi(s);
2642         spin_unlock_irqrestore(&s->lock, flags);
2643         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2644         up(&s->open_sem);
2645         return 0;
2646 }
2647
2648 static int es1371_midi_release(struct inode *inode, struct file *file)
2649 {
2650         struct es1371_state *s = (struct es1371_state *)file->private_data;
2651         DECLARE_WAITQUEUE(wait, current);
2652         unsigned long flags;
2653         unsigned count, tmo;
2654
2655         VALIDATE_STATE(s);
2656         lock_kernel();
2657         if (file->f_mode & FMODE_WRITE) {
2658                 add_wait_queue(&s->midi.owait, &wait);
2659                 for (;;) {
2660                         __set_current_state(TASK_INTERRUPTIBLE);
2661                         spin_lock_irqsave(&s->lock, flags);
2662                         count = s->midi.ocnt;
2663                         spin_unlock_irqrestore(&s->lock, flags);
2664                         if (count <= 0)
2665                                 break;
2666                         if (signal_pending(current))
2667                                 break;
2668                         if (file->f_flags & O_NONBLOCK)
2669                                 break;
2670                         tmo = (count * HZ) / 3100;
2671                         if (!schedule_timeout(tmo ? : 1) && tmo)
2672                                 printk(KERN_DEBUG PFX "midi timed out??\n");
2673                 }
2674                 remove_wait_queue(&s->midi.owait, &wait);
2675                 set_current_state(TASK_RUNNING);
2676         }
2677         down(&s->open_sem);
2678         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2679         spin_lock_irqsave(&s->lock, flags);
2680         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2681                 s->ctrl &= ~CTRL_UART_EN;
2682                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2683         }
2684         spin_unlock_irqrestore(&s->lock, flags);
2685         up(&s->open_sem);
2686         wake_up(&s->open_wait);
2687         unlock_kernel();
2688         return 0;
2689 }
2690
2691 static /*const*/ struct file_operations es1371_midi_fops = {
2692         .owner          = THIS_MODULE,
2693         .llseek         = no_llseek,
2694         .read           = es1371_midi_read,
2695         .write          = es1371_midi_write,
2696         .poll           = es1371_midi_poll,
2697         .open           = es1371_midi_open,
2698         .release        = es1371_midi_release,
2699 };
2700
2701 /* --------------------------------------------------------------------- */
2702
2703 /*
2704  * for debugging purposes, we'll create a proc device that dumps the
2705  * CODEC chipstate
2706  */
2707
2708 #ifdef ES1371_DEBUG
2709 static int proc_es1371_dump (char *buf, char **start, off_t fpos, int length, int *eof, void *data)
2710 {
2711         struct es1371_state *s;
2712         int cnt, len = 0;
2713
2714         if (list_empty(&devs))
2715                 return 0;
2716         s = list_entry(devs.next, struct es1371_state, devs);
2717         /* print out header */
2718         len += sprintf(buf + len, "\t\tCreative ES137x Debug Dump-o-matic\n");
2719
2720         /* print out CODEC state */
2721         len += sprintf (buf + len, "AC97 CODEC state\n");
2722         for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
2723                 len+= sprintf (buf + len, "reg:0x%02x  val:0x%04x\n", cnt, rdcodec(s->codec, cnt));
2724
2725         if (fpos >=len){
2726                 *start = buf;
2727                 *eof =1;
2728                 return 0;
2729         }
2730         *start = buf + fpos;
2731         if ((len -= fpos) > length)
2732                 return length;
2733         *eof =1;
2734         return len;
2735
2736 }
2737 #endif /* ES1371_DEBUG */
2738
2739 /* --------------------------------------------------------------------- */
2740
2741 /* maximum number of devices; only used for command line params */
2742 #define NR_DEVICE 5
2743
2744 static int spdif[NR_DEVICE];
2745 static int nomix[NR_DEVICE];
2746 static int amplifier[NR_DEVICE];
2747
2748 static unsigned int devindex;
2749
2750 MODULE_PARM(spdif, "1-" __MODULE_STRING(NR_DEVICE) "i");
2751 MODULE_PARM_DESC(spdif, "if 1 the output is in S/PDIF digital mode");
2752 MODULE_PARM(nomix, "1-" __MODULE_STRING(NR_DEVICE) "i");
2753 MODULE_PARM_DESC(nomix, "if 1 no analog audio is mixed to the digital output");
2754 MODULE_PARM(amplifier, "1-" __MODULE_STRING(NR_DEVICE) "i");
2755 MODULE_PARM_DESC(amplifier, "Set to 1 if the machine needs the amp control enabling (many laptops)");
2756
2757 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2758 MODULE_DESCRIPTION("ES1371 AudioPCI97 Driver");
2759 MODULE_LICENSE("GPL");
2760
2761
2762 /* --------------------------------------------------------------------- */
2763
2764 static struct initvol {
2765         int mixch;
2766         int vol;
2767 } initvol[] __initdata = {
2768         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2769         { SOUND_MIXER_WRITE_CD, 0x4040 },
2770         { MIXER_WRITE(SOUND_MIXER_VIDEO), 0x4040 },
2771         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2772         { SOUND_MIXER_WRITE_PCM, 0x4040 },
2773         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2774         { MIXER_WRITE(SOUND_MIXER_PHONEOUT), 0x4040 },
2775         { SOUND_MIXER_WRITE_OGAIN, 0x4040 },
2776         { MIXER_WRITE(SOUND_MIXER_PHONEIN), 0x4040 },
2777         { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2778         { SOUND_MIXER_WRITE_MIC, 0x4040 },
2779         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2780         { SOUND_MIXER_WRITE_IGAIN, 0x4040 }
2781 };
2782
2783 static struct
2784 {
2785         short svid, sdid;
2786 } amplifier_needed[] =
2787 {
2788         { 0x107B, 0x2150 },             /* Gateway Solo 2150 */
2789         { 0x13BD, 0x100C },             /* Mebius PC-MJ100V */
2790         { 0x1102, 0x5938 },             /* Targa Xtender 300 */
2791         { 0x1102, 0x8938 },             /* IPC notebook */
2792         { PCI_ANY_ID, PCI_ANY_ID }
2793 };
2794
2795
2796 static int __devinit es1371_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2797 {
2798         struct es1371_state *s;
2799         mm_segment_t fs;
2800         int i, val, res = -1;
2801         int idx;
2802         unsigned long tmo;
2803         signed long tmo2;
2804         unsigned int cssr;
2805
2806         if ((res=pci_enable_device(pcidev)))
2807                 return res;
2808
2809         if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO))
2810                 return -ENODEV;
2811         if (pcidev->irq == 0)
2812                 return -ENODEV;
2813         i = pci_set_dma_mask(pcidev, 0xffffffff);
2814         if (i) {
2815                 printk(KERN_WARNING "es1371: architecture does not support 32bit PCI busmaster DMA\n");
2816                 return i;
2817         }
2818         if (!(s = kmalloc(sizeof(struct es1371_state), GFP_KERNEL))) {
2819                 printk(KERN_WARNING PFX "out of memory\n");
2820                 return -ENOMEM;
2821         }
2822         memset(s, 0, sizeof(struct es1371_state));
2823
2824         s->codec = ac97_alloc_codec();
2825         if(s->codec == NULL)
2826                 goto err_codec;
2827
2828         init_waitqueue_head(&s->dma_adc.wait);
2829         init_waitqueue_head(&s->dma_dac1.wait);
2830         init_waitqueue_head(&s->dma_dac2.wait);
2831         init_waitqueue_head(&s->open_wait);
2832         init_waitqueue_head(&s->midi.iwait);
2833         init_waitqueue_head(&s->midi.owait);
2834         init_MUTEX(&s->open_sem);
2835         spin_lock_init(&s->lock);
2836         s->magic = ES1371_MAGIC;
2837         s->dev = pcidev;
2838         s->io = pci_resource_start(pcidev, 0);
2839         s->irq = pcidev->irq;
2840         s->vendor = pcidev->vendor;
2841         s->device = pcidev->device;
2842         pci_read_config_byte(pcidev, PCI_REVISION_ID, &s->rev);
2843         s->codec->private_data = s;
2844         s->codec->id = 0;
2845         s->codec->codec_read = rdcodec;
2846         s->codec->codec_write = wrcodec;
2847         printk(KERN_INFO PFX "found chip, vendor id 0x%04x device id 0x%04x revision 0x%02x\n",
2848                s->vendor, s->device, s->rev);
2849         if (!request_region(s->io, ES1371_EXTENT, "es1371")) {
2850                 printk(KERN_ERR PFX "io ports %#lx-%#lx in use\n", s->io, s->io+ES1371_EXTENT-1);
2851                 res = -EBUSY;
2852                 goto err_region;
2853         }
2854         if ((res=request_irq(s->irq, es1371_interrupt, SA_SHIRQ, "es1371",s))) {
2855                 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
2856                 goto err_irq;
2857         }
2858         printk(KERN_INFO PFX "found es1371 rev %d at io %#lx irq %u joystick %#x\n",
2859                s->rev, s->io, s->irq, s->gameport.io);
2860         /* register devices */
2861         if ((res=(s->dev_audio = register_sound_dsp(&es1371_audio_fops,-1)))<0)
2862                 goto err_dev1;
2863         if ((res=(s->codec->dev_mixer = register_sound_mixer(&es1371_mixer_fops, -1))) < 0)
2864                 goto err_dev2;
2865         if ((res=(s->dev_dac = register_sound_dsp(&es1371_dac_fops, -1))) < 0)
2866                 goto err_dev3;
2867         if ((res=(s->dev_midi = register_sound_midi(&es1371_midi_fops, -1)))<0 )
2868                 goto err_dev4;
2869 #ifdef ES1371_DEBUG
2870         /* initialize the debug proc device */
2871         s->ps = create_proc_read_entry("es1371",0,NULL,proc_es1371_dump,NULL);
2872 #endif /* ES1371_DEBUG */
2873
2874         /* initialize codec registers */
2875         s->ctrl = 0;
2876
2877         /* Check amplifier requirements */
2878
2879         if (amplifier[devindex])
2880                 s->ctrl |= CTRL_GPIO_OUT0;
2881         else for(idx = 0; amplifier_needed[idx].svid != PCI_ANY_ID; idx++)
2882         {
2883                 if(pcidev->subsystem_vendor == amplifier_needed[idx].svid &&
2884                    pcidev->subsystem_device == amplifier_needed[idx].sdid)
2885                 {
2886                         s->ctrl |= CTRL_GPIO_OUT0;   /* turn internal amplifier on */
2887                         printk(KERN_INFO PFX "Enabling internal amplifier.\n");
2888                 }
2889         }
2890         s->gameport.io = 0;
2891         for (i = 0x218; i >= 0x200; i -= 0x08) {
2892                 if (request_region(i, JOY_EXTENT, "es1371")) {
2893                         s->ctrl |= CTRL_JYSTK_EN | (((i >> 3) & CTRL_JOY_MASK) << CTRL_JOY_SHIFT);
2894                         s->gameport.io = i;
2895                         break;
2896                 }
2897         }
2898         if (!s->gameport.io)
2899                 printk(KERN_ERR PFX "no free joystick address found\n");
2900
2901         s->sctrl = 0;
2902         cssr = 0;
2903         s->spdif_volume = -1;
2904         /* check to see if s/pdif mode is being requested */
2905         if (spdif[devindex]) {
2906                 if (s->rev >= 4) {
2907                         printk(KERN_INFO PFX "enabling S/PDIF output\n");
2908                         s->spdif_volume = 0;
2909                         cssr |= STAT_EN_SPDIF;
2910                         s->ctrl |= CTRL_SPDIFEN_B;
2911                         if (nomix[devindex]) /* don't mix analog inputs to s/pdif output */
2912                                 s->ctrl |= CTRL_RECEN_B;
2913                 } else {
2914                         printk(KERN_ERR PFX "revision %d does not support S/PDIF\n", s->rev);
2915                 }
2916         }
2917         /* initialize the chips */
2918         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2919         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2920         outl(LEGACY_JFAST, s->io+ES1371_REG_LEGACY);
2921         pci_set_master(pcidev);  /* enable bus mastering */
2922         /* if we are a 5880 turn on the AC97 */
2923         if (s->vendor == PCI_VENDOR_ID_ENSONIQ &&
2924             ((s->device == PCI_DEVICE_ID_ENSONIQ_CT5880 && s->rev >= CT5880REV_CT5880_C) ||
2925              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_CT5880_A) ||
2926              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_ES1373_8))) {
2927                 cssr |= CSTAT_5880_AC97_RST;
2928                 outl(cssr, s->io+ES1371_REG_STATUS);
2929                 /* need to delay around 20ms(bleech) to give
2930                    some CODECs enough time to wakeup */
2931                 tmo = jiffies + (HZ / 50) + 1;
2932                 for (;;) {
2933                         tmo2 = tmo - jiffies;
2934                         if (tmo2 <= 0)
2935                                 break;
2936                         schedule_timeout(tmo2);
2937                 }
2938         }
2939         /* AC97 warm reset to start the bitclk */
2940         outl(s->ctrl | CTRL_SYNCRES, s->io+ES1371_REG_CONTROL);
2941         udelay(2);
2942         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2943         /* init the sample rate converter */
2944         src_init(s);
2945         /* codec init */
2946         if (!ac97_probe_codec(s->codec)) {
2947                 res = -ENODEV;
2948                 goto err_gp;
2949         }
2950         /* set default values */
2951
2952         fs = get_fs();
2953         set_fs(KERNEL_DS);
2954         val = SOUND_MASK_LINE;
2955         mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2956         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2957                 val = initvol[i].vol;
2958                 mixdev_ioctl(s->codec, initvol[i].mixch, (unsigned long)&val);
2959         }
2960         /* mute master and PCM when in S/PDIF mode */
2961         if (s->spdif_volume != -1) {
2962                 val = 0x0000;
2963                 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_VOLUME, (unsigned long)&val);
2964                 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_PCM, (unsigned long)&val);
2965         }
2966         set_fs(fs);
2967         /* turn on S/PDIF output driver if requested */
2968         outl(cssr, s->io+ES1371_REG_STATUS);
2969         /* register gameport */
2970         if (s->gameport.io)
2971                 gameport_register_port(&s->gameport);
2972         /* store it in the driver field */
2973         pci_set_drvdata(pcidev, s);
2974         /* put it into driver list */
2975         list_add_tail(&s->devs, &devs);
2976         /* increment devindex */
2977         if (devindex < NR_DEVICE-1)
2978                 devindex++;
2979         return 0;
2980
2981  err_gp:
2982         if (s->gameport.io)
2983                 release_region(s->gameport.io, JOY_EXTENT);
2984 #ifdef ES1371_DEBUG
2985         if (s->ps)
2986                 remove_proc_entry("es1371", NULL);
2987 #endif
2988         unregister_sound_midi(s->dev_midi);
2989  err_dev4:
2990         unregister_sound_dsp(s->dev_dac);
2991  err_dev3:
2992         unregister_sound_mixer(s->codec->dev_mixer);
2993  err_dev2:
2994         unregister_sound_dsp(s->dev_audio);
2995  err_dev1:
2996         printk(KERN_ERR PFX "cannot register misc device\n");
2997         free_irq(s->irq, s);
2998  err_irq:
2999         release_region(s->io, ES1371_EXTENT);
3000  err_region:
3001  err_codec:
3002         ac97_release_codec(s->codec);
3003         kfree(s);
3004         return res;
3005 }
3006
3007 static void __devexit es1371_remove(struct pci_dev *dev)
3008 {
3009         struct es1371_state *s = pci_get_drvdata(dev);
3010
3011         if (!s)
3012                 return;
3013         list_del(&s->devs);
3014 #ifdef ES1371_DEBUG
3015         if (s->ps)
3016                 remove_proc_entry("es1371", NULL);
3017 #endif /* ES1371_DEBUG */
3018         outl(0, s->io+ES1371_REG_CONTROL); /* switch everything off */
3019         outl(0, s->io+ES1371_REG_SERIAL_CONTROL); /* clear serial interrupts */
3020         synchronize_irq(s->irq);
3021         free_irq(s->irq, s);
3022         if (s->gameport.io) {
3023                 gameport_unregister_port(&s->gameport);
3024                 release_region(s->gameport.io, JOY_EXTENT);
3025         }
3026         release_region(s->io, ES1371_EXTENT);
3027         unregister_sound_dsp(s->dev_audio);
3028         unregister_sound_mixer(s->codec->dev_mixer);
3029         unregister_sound_dsp(s->dev_dac);
3030         unregister_sound_midi(s->dev_midi);
3031         ac97_release_codec(s->codec);
3032         kfree(s);
3033         pci_set_drvdata(dev, NULL);
3034 }
3035
3036 static struct pci_device_id id_table[] = {
3037         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3038         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3039         { PCI_VENDOR_ID_ECTIVA, PCI_DEVICE_ID_ECTIVA_EV1938, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3040         { 0, }
3041 };
3042
3043 MODULE_DEVICE_TABLE(pci, id_table);
3044
3045 static struct pci_driver es1371_driver = {
3046         .name           = "es1371",
3047         .id_table       = id_table,
3048         .probe          = es1371_probe,
3049         .remove         = __devexit_p(es1371_remove),
3050 };
3051
3052 static int __init init_es1371(void)
3053 {
3054         printk(KERN_INFO PFX "version v0.32 time " __TIME__ " " __DATE__ "\n");
3055         return pci_module_init(&es1371_driver);
3056 }
3057
3058 static void __exit cleanup_es1371(void)
3059 {
3060         printk(KERN_INFO PFX "unloading\n");
3061         pci_unregister_driver(&es1371_driver);
3062 }
3063
3064 module_init(init_es1371);
3065 module_exit(cleanup_es1371);
3066
3067 /* --------------------------------------------------------------------- */
3068
3069 #ifndef MODULE
3070
3071 /* format is: es1371=[spdif,[nomix,[amplifier]]] */
3072
3073 static int __init es1371_setup(char *str)
3074 {
3075         static unsigned __initdata nr_dev = 0;
3076
3077         if (nr_dev >= NR_DEVICE)
3078                 return 0;
3079
3080         (void)
3081         ((get_option(&str, &spdif[nr_dev]) == 2)
3082          && (get_option(&str, &nomix[nr_dev]) == 2)
3083          && (get_option(&str, &amplifier[nr_dev])));
3084
3085         nr_dev++;
3086         return 1;
3087 }
3088
3089 __setup("es1371=", es1371_setup);
3090
3091 #endif /* MODULE */