sound/oss/es1371.c

   1 /*****************************************************************************/
   2
   3 /*
   4  *      es1371.c  --  Creative Ensoniq ES1371.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Special thanks to Ensoniq
  23  *
  24  *  Supported devices:
  25  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  26  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  27  *  /dev/dsp1   additional DAC, like /dev/dsp, but outputs to mixer "SYNTH" setting
  28  *  /dev/midi   simple MIDI UART interface, no ioctl
  29  *
  30  *  NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
  31  *  to be done in software. That is what /dev/dac is for. By now (Q2 1998)
  32  *  there are several MIDI to PCM (WAV) packages, one of them is timidity.
  33  *
  34  *  Revision history
  35  *    04.06.1998   0.1   Initial release
  36  *                       Mixer stuff should be overhauled; especially optional AC97 mixer bits
  37  *                       should be detected. This results in strange behaviour of some mixer
  38  *                       settings, like master volume and mic.
  39  *    08.06.1998   0.2   First release using Alan Cox' soundcore instead of miscdevice
  40  *    03.08.1998   0.3   Do not include modversions.h
  41  *                       Now mixer behaviour can basically be selected between
  42  *                       "OSS documented" and "OSS actual" behaviour
  43  *    31.08.1998   0.4   Fix realplayer problems - dac.count issues
  44  *    27.10.1998   0.5   Fix joystick support
  45  *                       -- Oliver Neukum (c188@org.chemie.uni-muenchen.de)
  46  *    10.12.1998   0.6   Fix drain_dac trying to wait on not yet initialized DMA
  47  *    23.12.1998   0.7   Fix a few f_file & FMODE_ bugs
  48  *                       Don't wake up app until there are fragsize bytes to read/write
  49  *    06.01.1999   0.8   remove the silly SA_INTERRUPT flag.
  50  *                       hopefully killed the egcs section type conflict
  51  *    12.03.1999   0.9   cinfo.blocks should be reset after GETxPTR ioctl.
  52  *                       reported by Johan Maes <joma@telindus.be>
  53  *    22.03.1999   0.10  return EAGAIN instead of EBUSY when O_NONBLOCK
  54  *                       read/write cannot be executed
  55  *    07.04.1999   0.11  implemented the following ioctl's: SOUND_PCM_READ_RATE,
  56  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  57  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  58  *                       Another Alpha fix (wait_src_ready in init routine)
  59  *                       reported by "Ivan N. Kokshaysky" <ink@jurassic.park.msu.ru>
  60  *                       Note: joystick address handling might still be wrong on archs
  61  *                       other than i386
  62  *    15.06.1999   0.12  Fix bad allocation bug.
  63  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  64  *    28.06.1999   0.13  Add pci_set_master
  65  *    03.08.1999   0.14  adapt to Linus' new __setup/__initcall
  66  *                       added kernel command line option "es1371=joystickaddr"
  67  *                       removed CONFIG_SOUND_ES1371_JOYPORT_BOOT kludge
  68  *    10.08.1999   0.15  (Re)added S/PDIF module option for cards revision >= 4.
  69  *                       Initial version by Dave Platt <dplatt@snulbug.mtview.ca.us>.
  70  *                       module_init/__setup fixes
  71  *    08.16.1999   0.16  Joe Cotellese <joec@ensoniq.com>
  72  *                       Added detection for ES1371 revision ID so that we can
  73  *                       detect the ES1373 and later parts.
  74  *                       added AC97 #defines for readability
  75  *                       added a /proc file system for dumping hardware state
  76  *                       updated SRC and CODEC w/r functions to accommodate bugs
  77  *                       in some versions of the ES137x chips.
  78  *    31.08.1999   0.17  add spin_lock_init
  79  *                       replaced current->state = x with set_current_state(x)
  80  *    03.09.1999   0.18  change read semantics for MIDI to match
  81  *                       OSS more closely; remove possible wakeup race
  82  *    21.10.1999   0.19  Round sampling rates, requested by
  83  *                       Kasamatsu Kenichi <t29w0267@ip.media.kyoto-u.ac.jp>
  84  *    27.10.1999   0.20  Added SigmaTel 3D enhancement string
  85  *                       Codec ID printing changes
  86  *    28.10.1999   0.21  More waitqueue races fixed
  87  *                       Joe Cotellese <joec@ensoniq.com>
  88  *                       Changed PCI detection routine so we can more easily
  89  *                       detect ES137x chip and derivatives.
  90  *    05.01.2000   0.22  Should now work with rev7 boards; patch by
  91  *                       Eric Lemar, elemar@cs.washington.edu
  92  *    08.01.2000   0.23  Prevent some ioctl's from returning bad count values on underrun/overrun;
  93  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
  94  *    07.02.2000   0.24  Use pci_alloc_consistent and pci_register_driver
  95  *    07.02.2000   0.25  Use ac97_codec
  96  *    01.03.2000   0.26  SPDIF patch by Mikael Bouillot <mikael.bouillot@bigfoot.com>
  97  *                       Use pci_module_init
  98  *    21.11.2000   0.27  Initialize dma buffers in poll, otherwise poll may return a bogus mask
  99  *    12.12.2000   0.28  More dma buffer initializations, patch from
 100  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
 101  *    05.01.2001   0.29  Hopefully updates will not be required anymore when Creative bumps
 102  *                       the CT5880 revision.
 103  *                       suggested by Stephan Müller <smueller@chronox.de>
 104  *    31.01.2001   0.30  Register/Unregister gameport
 105  *                       Fix SETTRIGGER non OSS API conformity
 106  *    14.07.2001   0.31  Add list of laptops needing amplifier control
 107  *    03.01.2003   0.32  open_mode fixes from Georg Acher <acher@in.tum.de>
 108  */
 109
 110 /*****************************************************************************/
 111
 112 #include <linux/interrupt.h>
 113 #include <linux/module.h>
 114 #include <linux/string.h>
 115 #include <linux/ioport.h>
 116 #include <linux/sched.h>
 117 #include <linux/delay.h>
 118 #include <linux/sound.h>
 119 #include <linux/slab.h>
 120 #include <linux/soundcard.h>
 121 #include <linux/pci.h>
 122 #include <linux/init.h>
 123 #include <linux/poll.h>
 124 #include <linux/bitops.h>
 125 #include <linux/proc_fs.h>
 126 #include <linux/spinlock.h>
 127 #include <linux/smp_lock.h>
 128 #include <linux/ac97_codec.h>
 129 #include <linux/gameport.h>
 130 #include <linux/wait.h>
 131
 132 #include <asm/io.h>
 133 #include <asm/page.h>
 134 #include <asm/uaccess.h>
 135
 136 /* --------------------------------------------------------------------- */
 137
 138 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 139 #define ES1371_DEBUG
 140 #define DBG(x) {}
 141 /*#define DBG(x) {x}*/
 142
 143 /* --------------------------------------------------------------------- */
 144
 145 #ifndef PCI_VENDOR_ID_ENSONIQ
 146 #define PCI_VENDOR_ID_ENSONIQ        0x1274
 147 #endif
 148
 149 #ifndef PCI_VENDOR_ID_ECTIVA
 150 #define PCI_VENDOR_ID_ECTIVA         0x1102
 151 #endif
 152
 153 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371
 154 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371
 155 #endif
 156
 157 #ifndef PCI_DEVICE_ID_ENSONIQ_CT5880
 158 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
 159 #endif
 160
 161 #ifndef PCI_DEVICE_ID_ECTIVA_EV1938
 162 #define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938
 163 #endif
 164
 165 /* ES1371 chip ID */
 166 /* This is a little confusing because all ES1371 compatible chips have the
 167    same DEVICE_ID, the only thing differentiating them is the REV_ID field.
 168    This is only significant if you want to enable features on the later parts.
 169    Yes, I know it's stupid and why didn't we use the sub IDs?
 170 */
 171 #define ES1371REV_ES1373_A  0x04
 172 #define ES1371REV_ES1373_B  0x06
 173 #define ES1371REV_CT5880_A  0x07
 174 #define CT5880REV_CT5880_C  0x02
 175 #define CT5880REV_CT5880_D  0x03
 176 #define ES1371REV_ES1371_B  0x09
 177 #define EV1938REV_EV1938_A  0x00
 178 #define ES1371REV_ES1373_8  0x08
 179
 180 #define ES1371_MAGIC  ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1371)
 181
 182 #define ES1371_EXTENT             0x40
 183 #define JOY_EXTENT                8
 184
 185 #define ES1371_REG_CONTROL        0x00
 186 #define ES1371_REG_STATUS         0x04 /* on the 5880 it is control/status */
 187 #define ES1371_REG_UART_DATA      0x08
 188 #define ES1371_REG_UART_STATUS    0x09
 189 #define ES1371_REG_UART_CONTROL   0x09
 190 #define ES1371_REG_UART_TEST      0x0a
 191 #define ES1371_REG_MEMPAGE        0x0c
 192 #define ES1371_REG_SRCONV         0x10
 193 #define ES1371_REG_CODEC          0x14
 194 #define ES1371_REG_LEGACY         0x18
 195 #define ES1371_REG_SERIAL_CONTROL 0x20
 196 #define ES1371_REG_DAC1_SCOUNT    0x24
 197 #define ES1371_REG_DAC2_SCOUNT    0x28
 198 #define ES1371_REG_ADC_SCOUNT     0x2c
 199
 200 #define ES1371_REG_DAC1_FRAMEADR  0xc30
 201 #define ES1371_REG_DAC1_FRAMECNT  0xc34
 202 #define ES1371_REG_DAC2_FRAMEADR  0xc38
 203 #define ES1371_REG_DAC2_FRAMECNT  0xc3c
 204 #define ES1371_REG_ADC_FRAMEADR   0xd30
 205 #define ES1371_REG_ADC_FRAMECNT   0xd34
 206
 207 #define ES1371_FMT_U8_MONO     0
 208 #define ES1371_FMT_U8_STEREO   1
 209 #define ES1371_FMT_S16_MONO    2
 210 #define ES1371_FMT_S16_STEREO  3
 211 #define ES1371_FMT_STEREO      1
 212 #define ES1371_FMT_S16         2
 213 #define ES1371_FMT_MASK        3
 214
 215 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 216 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
 217
 218 #define CTRL_RECEN_B    0x08000000  /* 1 = don't mix analog in to digital out */
 219 #define CTRL_SPDIFEN_B  0x04000000
 220 #define CTRL_JOY_SHIFT  24
 221 #define CTRL_JOY_MASK   3
 222 #define CTRL_JOY_200    0x00000000  /* joystick base address */
 223 #define CTRL_JOY_208    0x01000000
 224 #define CTRL_JOY_210    0x02000000
 225 #define CTRL_JOY_218    0x03000000
 226 #define CTRL_GPIO_IN0   0x00100000  /* general purpose inputs/outputs */
 227 #define CTRL_GPIO_IN1   0x00200000
 228 #define CTRL_GPIO_IN2   0x00400000
 229 #define CTRL_GPIO_IN3   0x00800000
 230 #define CTRL_GPIO_OUT0  0x00010000
 231 #define CTRL_GPIO_OUT1  0x00020000
 232 #define CTRL_GPIO_OUT2  0x00040000
 233 #define CTRL_GPIO_OUT3  0x00080000
 234 #define CTRL_MSFMTSEL   0x00008000  /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
 235 #define CTRL_SYNCRES    0x00004000  /* AC97 warm reset */
 236 #define CTRL_ADCSTOP    0x00002000  /* stop ADC transfers */
 237 #define CTRL_PWR_INTRM  0x00001000  /* 1 = power level ints enabled */
 238 #define CTRL_M_CB       0x00000800  /* recording source: 0 = ADC, 1 = MPEG */
 239 #define CTRL_CCB_INTRM  0x00000400  /* 1 = CCB "voice" ints enabled */
 240 #define CTRL_PDLEV0     0x00000000  /* power down level */
 241 #define CTRL_PDLEV1     0x00000100
 242 #define CTRL_PDLEV2     0x00000200
 243 #define CTRL_PDLEV3     0x00000300
 244 #define CTRL_BREQ       0x00000080  /* 1 = test mode (internal mem test) */
 245 #define CTRL_DAC1_EN    0x00000040  /* enable DAC1 */
 246 #define CTRL_DAC2_EN    0x00000020  /* enable DAC2 */
 247 #define CTRL_ADC_EN     0x00000010  /* enable ADC */
 248 #define CTRL_UART_EN    0x00000008  /* enable MIDI uart */
 249 #define CTRL_JYSTK_EN   0x00000004  /* enable Joystick port */
 250 #define CTRL_XTALCLKDIS 0x00000002  /* 1 = disable crystal clock input */
 251 #define CTRL_PCICLKDIS  0x00000001  /* 1 = disable PCI clock distribution */
 252
 253
 254 #define STAT_INTR       0x80000000  /* wired or of all interrupt bits */
 255 #define CSTAT_5880_AC97_RST 0x20000000 /* CT5880 Reset bit */
 256 #define STAT_EN_SPDIF   0x00040000  /* enable S/PDIF circuitry */
 257 #define STAT_TS_SPDIF   0x00020000  /* test S/PDIF circuitry */
 258 #define STAT_TESTMODE   0x00010000  /* test ASIC */
 259 #define STAT_SYNC_ERR   0x00000100  /* 1 = codec sync error */
 260 #define STAT_VC         0x000000c0  /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
 261 #define STAT_SH_VC      6
 262 #define STAT_MPWR       0x00000020  /* power level interrupt */
 263 #define STAT_MCCB       0x00000010  /* CCB int pending */
 264 #define STAT_UART       0x00000008  /* UART int pending */
 265 #define STAT_DAC1       0x00000004  /* DAC1 int pending */
 266 #define STAT_DAC2       0x00000002  /* DAC2 int pending */
 267 #define STAT_ADC        0x00000001  /* ADC int pending */
 268
 269 #define USTAT_RXINT     0x80        /* UART rx int pending */
 270 #define USTAT_TXINT     0x04        /* UART tx int pending */
 271 #define USTAT_TXRDY     0x02        /* UART tx ready */
 272 #define USTAT_RXRDY     0x01        /* UART rx ready */
 273
 274 #define UCTRL_RXINTEN   0x80        /* 1 = enable RX ints */
 275 #define UCTRL_TXINTEN   0x60        /* TX int enable field mask */
 276 #define UCTRL_ENA_TXINT 0x20        /* enable TX int */
 277 #define UCTRL_CNTRL     0x03        /* control field */
 278 #define UCTRL_CNTRL_SWR 0x03        /* software reset command */
 279
 280 /* sample rate converter */
 281 #define SRC_OKSTATE        1
 282
 283 #define SRC_RAMADDR_MASK   0xfe000000
 284 #define SRC_RAMADDR_SHIFT  25
 285 #define SRC_DAC1FREEZE     (1UL << 21)
 286 #define SRC_DAC2FREEZE      (1UL << 20)
 287 #define SRC_ADCFREEZE      (1UL << 19)
 288
 289
 290 #define SRC_WE             0x01000000  /* read/write control for SRC RAM */
 291 #define SRC_BUSY           0x00800000  /* SRC busy */
 292 #define SRC_DIS            0x00400000  /* 1 = disable SRC */
 293 #define SRC_DDAC1          0x00200000  /* 1 = disable accum update for DAC1 */
 294 #define SRC_DDAC2          0x00100000  /* 1 = disable accum update for DAC2 */
 295 #define SRC_DADC           0x00080000  /* 1 = disable accum update for ADC2 */
 296 #define SRC_CTLMASK        0x00780000
 297 #define SRC_RAMDATA_MASK   0x0000ffff
 298 #define SRC_RAMDATA_SHIFT  0
 299
 300 #define SRCREG_ADC      0x78
 301 #define SRCREG_DAC1     0x70
 302 #define SRCREG_DAC2     0x74
 303 #define SRCREG_VOL_ADC  0x6c
 304 #define SRCREG_VOL_DAC1 0x7c
 305 #define SRCREG_VOL_DAC2 0x7e
 306
 307 #define SRCREG_TRUNC_N     0x00
 308 #define SRCREG_INT_REGS    0x01
 309 #define SRCREG_ACCUM_FRAC  0x02
 310 #define SRCREG_VFREQ_FRAC  0x03
 311
 312 #define CODEC_PIRD        0x00800000  /* 0 = write AC97 register */
 313 #define CODEC_PIADD_MASK  0x007f0000
 314 #define CODEC_PIADD_SHIFT 16
 315 #define CODEC_PIDAT_MASK  0x0000ffff
 316 #define CODEC_PIDAT_SHIFT 0
 317
 318 #define CODEC_RDY         0x80000000  /* AC97 read data valid */
 319 #define CODEC_WIP         0x40000000  /* AC97 write in progress */
 320 #define CODEC_PORD        0x00800000  /* 0 = write AC97 register */
 321 #define CODEC_POADD_MASK  0x007f0000
 322 #define CODEC_POADD_SHIFT 16
 323 #define CODEC_PODAT_MASK  0x0000ffff
 324 #define CODEC_PODAT_SHIFT 0
 325
 326
 327 #define LEGACY_JFAST      0x80000000  /* fast joystick timing */
 328 #define LEGACY_FIRQ       0x01000000  /* force IRQ */
 329
 330 #define SCTRL_DACTEST     0x00400000  /* 1 = DAC test, test vector generation purposes */
 331 #define SCTRL_P2ENDINC    0x00380000  /*  */
 332 #define SCTRL_SH_P2ENDINC 19
 333 #define SCTRL_P2STINC     0x00070000  /*  */
 334 #define SCTRL_SH_P2STINC  16
 335 #define SCTRL_R1LOOPSEL   0x00008000  /* 0 = loop mode */
 336 #define SCTRL_P2LOOPSEL   0x00004000  /* 0 = loop mode */
 337 #define SCTRL_P1LOOPSEL   0x00002000  /* 0 = loop mode */
 338 #define SCTRL_P2PAUSE     0x00001000  /* 1 = pause mode */
 339 #define SCTRL_P1PAUSE     0x00000800  /* 1 = pause mode */
 340 #define SCTRL_R1INTEN     0x00000400  /* enable interrupt */
 341 #define SCTRL_P2INTEN     0x00000200  /* enable interrupt */
 342 #define SCTRL_P1INTEN     0x00000100  /* enable interrupt */
 343 #define SCTRL_P1SCTRLD    0x00000080  /* reload sample count register for DAC1 */
 344 #define SCTRL_P2DACSEN    0x00000040  /* 1 = DAC2 play back last sample when disabled */
 345 #define SCTRL_R1SEB       0x00000020  /* 1 = 16bit */
 346 #define SCTRL_R1SMB       0x00000010  /* 1 = stereo */
 347 #define SCTRL_R1FMT       0x00000030  /* format mask */
 348 #define SCTRL_SH_R1FMT    4
 349 #define SCTRL_P2SEB       0x00000008  /* 1 = 16bit */
 350 #define SCTRL_P2SMB       0x00000004  /* 1 = stereo */
 351 #define SCTRL_P2FMT       0x0000000c  /* format mask */
 352 #define SCTRL_SH_P2FMT    2
 353 #define SCTRL_P1SEB       0x00000002  /* 1 = 16bit */
 354 #define SCTRL_P1SMB       0x00000001  /* 1 = stereo */
 355 #define SCTRL_P1FMT       0x00000003  /* format mask */
 356 #define SCTRL_SH_P1FMT    0
 357
 358
 359 /* misc stuff */
 360 #define POLL_COUNT   0x1000
 361 #define FMODE_DAC         4           /* slight misuse of mode_t */
 362
 363 /* MIDI buffer sizes */
 364
 365 #define MIDIINBUF  256
 366 #define MIDIOUTBUF 256
 367
 368 #define FMODE_MIDI_SHIFT 3
 369 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 370 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 371
 372 #define ES1371_MODULE_NAME "es1371"
 373 #define PFX ES1371_MODULE_NAME ": "
 374
 375 /* --------------------------------------------------------------------- */
 376
 377 struct es1371_state {
 378         /* magic */
 379         unsigned int magic;
 380
 381         /* list of es1371 devices */
 382         struct list_head devs;
 383
 384         /* the corresponding pci_dev structure */
 385         struct pci_dev *dev;
 386
 387         /* soundcore stuff */
 388         int dev_audio;
 389         int dev_dac;
 390         int dev_midi;
 391
 392         /* hardware resources */
 393         unsigned long io; /* long for SPARC */
 394         unsigned int irq;
 395
 396         /* PCI ID's */
 397         u16 vendor;
 398         u16 device;
 399         u8 rev; /* the chip revision */
 400
 401         /* options */
 402         int spdif_volume; /* S/PDIF output is enabled if != -1 */
 403
 404 #ifdef ES1371_DEBUG
 405         /* debug /proc entry */
 406         struct proc_dir_entry *ps;
 407 #endif /* ES1371_DEBUG */
 408
 409         struct ac97_codec *codec;
 410
 411         /* wave stuff */
 412         unsigned ctrl;
 413         unsigned sctrl;
 414         unsigned dac1rate, dac2rate, adcrate;
 415
 416         spinlock_t lock;
 417         struct semaphore open_sem;
 418         mode_t open_mode;
 419         wait_queue_head_t open_wait;
 420
 421         struct dmabuf {
 422                 void *rawbuf;
 423                 dma_addr_t dmaaddr;
 424                 unsigned buforder;
 425                 unsigned numfrag;
 426                 unsigned fragshift;
 427                 unsigned hwptr, swptr;
 428                 unsigned total_bytes;
 429                 int count;
 430                 unsigned error; /* over/underrun */
 431                 wait_queue_head_t wait;
 432                 /* redundant, but makes calculations easier */
 433                 unsigned fragsize;
 434                 unsigned dmasize;
 435                 unsigned fragsamples;
 436                 /* OSS stuff */
 437                 unsigned mapped:1;
 438                 unsigned ready:1;
 439                 unsigned endcleared:1;
 440                 unsigned enabled:1;
 441                 unsigned ossfragshift;
 442                 int ossmaxfrags;
 443                 unsigned subdivision;
 444         } dma_dac1, dma_dac2, dma_adc;
 445
 446         /* midi stuff */
 447         struct {
 448                 unsigned ird, iwr, icnt;
 449                 unsigned ord, owr, ocnt;
 450                 wait_queue_head_t iwait;
 451                 wait_queue_head_t owait;
 452                 unsigned char ibuf[MIDIINBUF];
 453                 unsigned char obuf[MIDIOUTBUF];
 454         } midi;
 455
 456         struct gameport *gameport;
 457         struct semaphore sem;
 458 };
 459
 460 /* --------------------------------------------------------------------- */
 461
 462 static LIST_HEAD(devs);
 463
 464 /* --------------------------------------------------------------------- */
 465
 466 static inline unsigned ld2(unsigned int x)
 467 {
 468         unsigned r = 0;
 469
 470         if (x >= 0x10000) {
 471                 x >>= 16;
 472                 r += 16;
 473         }
 474         if (x >= 0x100) {
 475                 x >>= 8;
 476                 r += 8;
 477         }
 478         if (x >= 0x10) {
 479                 x >>= 4;
 480                 r += 4;
 481         }
 482         if (x >= 4) {
 483                 x >>= 2;
 484                 r += 2;
 485         }
 486         if (x >= 2)
 487                 r++;
 488         return r;
 489 }
 490
 491 /* --------------------------------------------------------------------- */
 492
 493 static unsigned wait_src_ready(struct es1371_state *s)
 494 {
 495         unsigned int t, r;
 496
 497         for (t = 0; t < POLL_COUNT; t++) {
 498                 if (!((r = inl(s->io + ES1371_REG_SRCONV)) & SRC_BUSY))
 499                         return r;
 500                 udelay(1);
 501         }
 502         printk(KERN_DEBUG PFX "sample rate converter timeout r = 0x%08x\n", r);
 503         return r;
 504 }
 505
 506 static unsigned src_read(struct es1371_state *s, unsigned reg)
 507 {
 508         unsigned int temp,i,orig;
 509
 510         /* wait for ready */
 511         temp = wait_src_ready (s);
 512
 513         /* we can only access the SRC at certain times, make sure
 514            we're allowed to before we read */
 515
 516         orig = temp;
 517         /* expose the SRC state bits */
 518         outl ( (temp & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT) | 0x10000UL,
 519                s->io + ES1371_REG_SRCONV);
 520
 521         /* now, wait for busy and the correct time to read */
 522         temp = wait_src_ready (s);
 523
 524         if ( (temp & 0x00870000UL ) != ( SRC_OKSTATE << 16 )){
 525                 /* wait for the right state */
 526                 for (i=0; i<POLL_COUNT; i++){
 527                         temp = inl (s->io + ES1371_REG_SRCONV);
 528                         if ( (temp & 0x00870000UL ) == ( SRC_OKSTATE << 16 ))
 529                                 break;
 530                 }
 531         }
 532
 533         /* hide the state bits */
 534         outl ((orig & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT), s->io + ES1371_REG_SRCONV);
 535         return temp;
 536
 537
 538 }
 539
 540 static void src_write(struct es1371_state *s, unsigned reg, unsigned data)
 541 {
 542
 543         unsigned int r;
 544
 545         r = wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC);
 546         r |= (reg << SRC_RAMADDR_SHIFT) & SRC_RAMADDR_MASK;
 547         r |= (data << SRC_RAMDATA_SHIFT) & SRC_RAMDATA_MASK;
 548         outl(r | SRC_WE, s->io + ES1371_REG_SRCONV);
 549
 550 }
 551
 552 /* --------------------------------------------------------------------- */
 553
 554 /* most of the following here is black magic */
 555 static void set_adc_rate(struct es1371_state *s, unsigned rate)
 556 {
 557         unsigned long flags;
 558         unsigned int n, truncm, freq;
 559
 560         if (rate > 48000)
 561                 rate = 48000;
 562         if (rate < 4000)
 563                 rate = 4000;
 564         n = rate / 3000;
 565         if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
 566                 n--;
 567         truncm = (21 * n - 1) | 1;
 568         freq = ((48000UL << 15) / rate) * n;
 569         s->adcrate = (48000UL << 15) / (freq / n);
 570         spin_lock_irqsave(&s->lock, flags);
 571         if (rate >= 24000) {
 572                 if (truncm > 239)
 573                         truncm = 239;
 574                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 575                           (((239 - truncm) >> 1) << 9) | (n << 4));
 576         } else {
 577                 if (truncm > 119)
 578                         truncm = 119;
 579                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 580                           0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
 581         }
 582         src_write(s, SRCREG_ADC+SRCREG_INT_REGS,
 583                   (src_read(s, SRCREG_ADC+SRCREG_INT_REGS) & 0x00ff) |
 584                   ((freq >> 5) & 0xfc00));
 585         src_write(s, SRCREG_ADC+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 586         src_write(s, SRCREG_VOL_ADC, n << 8);
 587         src_write(s, SRCREG_VOL_ADC+1, n << 8);
 588         spin_unlock_irqrestore(&s->lock, flags);
 589 }
 590
 591
 592 static void set_dac1_rate(struct es1371_state *s, unsigned rate)
 593 {
 594         unsigned long flags;
 595         unsigned int freq, r;
 596
 597         if (rate > 48000)
 598                 rate = 48000;
 599         if (rate < 4000)
 600                 rate = 4000;
 601         freq = ((rate << 15) + 1500) / 3000;
 602         s->dac1rate = (freq * 3000 + 16384) >> 15;
 603         spin_lock_irqsave(&s->lock, flags);
 604         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC)) | SRC_DDAC1;
 605         outl(r, s->io + ES1371_REG_SRCONV);
 606         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS,
 607                   (src_read(s, SRCREG_DAC1+SRCREG_INT_REGS) & 0x00ff) |
 608                   ((freq >> 5) & 0xfc00));
 609         src_write(s, SRCREG_DAC1+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 610         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC));
 611         outl(r, s->io + ES1371_REG_SRCONV);
 612         spin_unlock_irqrestore(&s->lock, flags);
 613 }
 614
 615 static void set_dac2_rate(struct es1371_state *s, unsigned rate)
 616 {
 617         unsigned long flags;
 618         unsigned int freq, r;
 619
 620         if (rate > 48000)
 621                 rate = 48000;
 622         if (rate < 4000)
 623                 rate = 4000;
 624         freq = ((rate << 15) + 1500) / 3000;
 625         s->dac2rate = (freq * 3000 + 16384) >> 15;
 626         spin_lock_irqsave(&s->lock, flags);
 627         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC)) | SRC_DDAC2;
 628         outl(r, s->io + ES1371_REG_SRCONV);
 629         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS,
 630                   (src_read(s, SRCREG_DAC2+SRCREG_INT_REGS) & 0x00ff) |
 631                   ((freq >> 5) & 0xfc00));
 632         src_write(s, SRCREG_DAC2+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 633         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC));
 634         outl(r, s->io + ES1371_REG_SRCONV);
 635         spin_unlock_irqrestore(&s->lock, flags);
 636 }
 637
 638 /* --------------------------------------------------------------------- */
 639
 640 static void __devinit src_init(struct es1371_state *s)
 641 {
 642         unsigned int i;
 643
 644         /* before we enable or disable the SRC we need
 645            to wait for it to become ready */
 646         wait_src_ready(s);
 647
 648         outl(SRC_DIS, s->io + ES1371_REG_SRCONV);
 649
 650         for (i = 0; i < 0x80; i++)
 651                 src_write(s, i, 0);
 652
 653         src_write(s, SRCREG_DAC1+SRCREG_TRUNC_N, 16 << 4);
 654         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS, 16 << 10);
 655         src_write(s, SRCREG_DAC2+SRCREG_TRUNC_N, 16 << 4);
 656         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS, 16 << 10);
 657         src_write(s, SRCREG_VOL_ADC, 1 << 12);
 658         src_write(s, SRCREG_VOL_ADC+1, 1 << 12);
 659         src_write(s, SRCREG_VOL_DAC1, 1 << 12);
 660         src_write(s, SRCREG_VOL_DAC1+1, 1 << 12);
 661         src_write(s, SRCREG_VOL_DAC2, 1 << 12);
 662         src_write(s, SRCREG_VOL_DAC2+1, 1 << 12);
 663         set_adc_rate(s, 22050);
 664         set_dac1_rate(s, 22050);
 665         set_dac2_rate(s, 22050);
 666
 667         /* WARNING:
 668          * enabling the sample rate converter without properly programming
 669          * its parameters causes the chip to lock up (the SRC busy bit will
 670          * be stuck high, and I've found no way to rectify this other than
 671          * power cycle)
 672          */
 673         wait_src_ready(s);
 674         outl(0, s->io+ES1371_REG_SRCONV);
 675 }
 676
 677 /* --------------------------------------------------------------------- */
 678
 679 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 680 {
 681         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 682         unsigned long flags;
 683         unsigned t, x;
 684
 685         spin_lock_irqsave(&s->lock, flags);
 686         for (t = 0; t < POLL_COUNT; t++)
 687                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 688                         break;
 689
 690         /* save the current state for later */
 691         x = wait_src_ready(s);
 692
 693         /* enable SRC state data in SRC mux */
 694         outl((x & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC)) | 0x00010000,
 695              s->io+ES1371_REG_SRCONV);
 696
 697         /* wait for not busy (state 0) first to avoid
 698            transition states */
 699         for (t=0; t<POLL_COUNT; t++){
 700                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 701                     break;
 702                 udelay(1);
 703         }
 704
 705         /* wait for a SAFE time to write addr/data and then do it, dammit */
 706         for (t=0; t<POLL_COUNT; t++){
 707                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 708                     break;
 709                 udelay(1);
 710         }
 711
 712         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
 713              ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), s->io+ES1371_REG_CODEC);
 714
 715         /* restore SRC reg */
 716         wait_src_ready(s);
 717         outl(x, s->io+ES1371_REG_SRCONV);
 718         spin_unlock_irqrestore(&s->lock, flags);
 719 }
 720
 721 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
 722 {
 723         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 724         unsigned long flags;
 725         unsigned t, x;
 726
 727         spin_lock_irqsave(&s->lock, flags);
 728
 729         /* wait for WIP to go away */
 730         for (t = 0; t < 0x1000; t++)
 731                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 732                         break;
 733
 734         /* save the current state for later */
 735         x = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC));
 736
 737         /* enable SRC state data in SRC mux */
 738         outl( x | 0x00010000,
 739               s->io+ES1371_REG_SRCONV);
 740
 741         /* wait for not busy (state 0) first to avoid
 742            transition states */
 743         for (t=0; t<POLL_COUNT; t++){
 744                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 745                     break;
 746                 udelay(1);
 747         }
 748
 749         /* wait for a SAFE time to write addr/data and then do it, dammit */
 750         for (t=0; t<POLL_COUNT; t++){
 751                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 752                     break;
 753                 udelay(1);
 754         }
 755
 756         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD, s->io+ES1371_REG_CODEC);
 757         /* restore SRC reg */
 758         wait_src_ready(s);
 759         outl(x, s->io+ES1371_REG_SRCONV);
 760
 761         /* wait for WIP again */
 762         for (t = 0; t < 0x1000; t++)
 763                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 764                         break;
 765
 766         /* now wait for the stinkin' data (RDY) */
 767         for (t = 0; t < POLL_COUNT; t++)
 768                 if ((x = inl(s->io+ES1371_REG_CODEC)) & CODEC_RDY)
 769                         break;
 770
 771         spin_unlock_irqrestore(&s->lock, flags);
 772         return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
 773 }
 774
 775 /* --------------------------------------------------------------------- */
 776
 777 static inline void stop_adc(struct es1371_state *s)
 778 {
 779         unsigned long flags;
 780
 781         spin_lock_irqsave(&s->lock, flags);
 782         s->ctrl &= ~CTRL_ADC_EN;
 783         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 784         spin_unlock_irqrestore(&s->lock, flags);
 785 }
 786
 787 static inline void stop_dac1(struct es1371_state *s)
 788 {
 789         unsigned long flags;
 790
 791         spin_lock_irqsave(&s->lock, flags);
 792         s->ctrl &= ~CTRL_DAC1_EN;
 793         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 794         spin_unlock_irqrestore(&s->lock, flags);
 795 }
 796
 797 static inline void stop_dac2(struct es1371_state *s)
 798 {
 799         unsigned long flags;
 800
 801         spin_lock_irqsave(&s->lock, flags);
 802         s->ctrl &= ~CTRL_DAC2_EN;
 803         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 804         spin_unlock_irqrestore(&s->lock, flags);
 805 }
 806
 807 static void start_dac1(struct es1371_state *s)
 808 {
 809         unsigned long flags;
 810         unsigned fragremain, fshift;
 811
 812         spin_lock_irqsave(&s->lock, flags);
 813         if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
 814             && s->dma_dac1.ready) {
 815                 s->ctrl |= CTRL_DAC1_EN;
 816                 s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
 817                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 818                 fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
 819                 fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
 820                 if (fragremain < 2*fshift)
 821                         fragremain = s->dma_dac1.fragsize;
 822                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 823                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 824                 outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 825         }
 826         spin_unlock_irqrestore(&s->lock, flags);
 827 }
 828
 829 static void start_dac2(struct es1371_state *s)
 830 {
 831         unsigned long flags;
 832         unsigned fragremain, fshift;
 833
 834         spin_lock_irqsave(&s->lock, flags);
 835         if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
 836             && s->dma_dac2.ready) {
 837                 s->ctrl |= CTRL_DAC2_EN;
 838                 s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
 839                                          SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
 840                         (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
 841                         (0 << SCTRL_SH_P2STINC);
 842                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 843                 fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
 844                 fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
 845                 if (fragremain < 2*fshift)
 846                         fragremain = s->dma_dac2.fragsize;
 847                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 848                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 849                 outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 850         }
 851         spin_unlock_irqrestore(&s->lock, flags);
 852 }
 853
 854 static void start_adc(struct es1371_state *s)
 855 {
 856         unsigned long flags;
 857         unsigned fragremain, fshift;
 858
 859         spin_lock_irqsave(&s->lock, flags);
 860         if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 861             && s->dma_adc.ready) {
 862                 s->ctrl |= CTRL_ADC_EN;
 863                 s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
 864                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 865                 fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
 866                 fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
 867                 if (fragremain < 2*fshift)
 868                         fragremain = s->dma_adc.fragsize;
 869                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 870                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 871                 outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 872         }
 873         spin_unlock_irqrestore(&s->lock, flags);
 874 }
 875
 876 /* --------------------------------------------------------------------- */
 877
 878 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
 879 #define DMABUF_MINORDER 1
 880
 881
 882 static inline void dealloc_dmabuf(struct es1371_state *s, struct dmabuf *db)
 883 {
 884         struct page *page, *pend;
 885
 886         if (db->rawbuf) {
 887                 /* undo marking the pages as reserved */
 888                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 889                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 890                         ClearPageReserved(page);
 891                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 892         }
 893         db->rawbuf = NULL;
 894         db->mapped = db->ready = 0;
 895 }
 896
 897 static int prog_dmabuf(struct es1371_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
 898 {
 899         int order;
 900         unsigned bytepersec;
 901         unsigned bufs;
 902         struct page *page, *pend;
 903
 904         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 905         if (!db->rawbuf) {
 906                 db->ready = db->mapped = 0;
 907                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 908                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 909                                 break;
 910                 if (!db->rawbuf)
 911                         return -ENOMEM;
 912                 db->buforder = order;
 913                 /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
 914                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 915                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 916                         SetPageReserved(page);
 917         }
 918         fmt &= ES1371_FMT_MASK;
 919         bytepersec = rate << sample_shift[fmt];
 920         bufs = PAGE_SIZE << db->buforder;
 921         if (db->ossfragshift) {
 922                 if ((1000 << db->ossfragshift) < bytepersec)
 923                         db->fragshift = ld2(bytepersec/1000);
 924                 else
 925                         db->fragshift = db->ossfragshift;
 926         } else {
 927                 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
 928                 if (db->fragshift < 3)
 929                         db->fragshift = 3;
 930         }
 931         db->numfrag = bufs >> db->fragshift;
 932         while (db->numfrag < 4 && db->fragshift > 3) {
 933                 db->fragshift--;
 934                 db->numfrag = bufs >> db->fragshift;
 935         }
 936         db->fragsize = 1 << db->fragshift;
 937         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 938                 db->numfrag = db->ossmaxfrags;
 939         db->fragsamples = db->fragsize >> sample_shift[fmt];
 940         db->dmasize = db->numfrag << db->fragshift;
 941         memset(db->rawbuf, (fmt & ES1371_FMT_S16) ? 0 : 0x80, db->dmasize);
 942         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 943         outl(db->dmaaddr, s->io+(reg & 0xff));
 944         outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
 945         db->enabled = 1;
 946         db->ready = 1;
 947         return 0;
 948 }
 949
 950 static inline int prog_dmabuf_adc(struct es1371_state *s)
 951 {
 952         stop_adc(s);
 953         return prog_dmabuf(s, &s->dma_adc, s->adcrate, (s->sctrl >> SCTRL_SH_R1FMT) & ES1371_FMT_MASK,
 954                            ES1371_REG_ADC_FRAMEADR);
 955 }
 956
 957 static inline int prog_dmabuf_dac2(struct es1371_state *s)
 958 {
 959         stop_dac2(s);
 960         return prog_dmabuf(s, &s->dma_dac2, s->dac2rate, (s->sctrl >> SCTRL_SH_P2FMT) & ES1371_FMT_MASK,
 961                            ES1371_REG_DAC2_FRAMEADR);
 962 }
 963
 964 static inline int prog_dmabuf_dac1(struct es1371_state *s)
 965 {
 966         stop_dac1(s);
 967         return prog_dmabuf(s, &s->dma_dac1, s->dac1rate, (s->sctrl >> SCTRL_SH_P1FMT) & ES1371_FMT_MASK,
 968                            ES1371_REG_DAC1_FRAMEADR);
 969 }
 970
 971 static inline unsigned get_hwptr(struct es1371_state *s, struct dmabuf *db, unsigned reg)
 972 {
 973         unsigned hwptr, diff;
 974
 975         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 976         hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
 977         diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
 978         db->hwptr = hwptr;
 979         return diff;
 980 }
 981
 982 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
 983 {
 984         if (bptr + len > bsize) {
 985                 unsigned x = bsize - bptr;
 986                 memset(((char *)buf) + bptr, c, x);
 987                 bptr = 0;
 988                 len -= x;
 989         }
 990         memset(((char *)buf) + bptr, c, len);
 991 }
 992
 993 /* call with spinlock held! */
 994 static void es1371_update_ptr(struct es1371_state *s)
 995 {
 996         int diff;
 997
 998         /* update ADC pointer */
 999         if (s->ctrl & CTRL_ADC_EN) {
1000                 diff = get_hwptr(s, &s->dma_adc, ES1371_REG_ADC_FRAMECNT);
1001                 s->dma_adc.total_bytes += diff;
1002                 s->dma_adc.count += diff;
1003                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1004                         wake_up(&s->dma_adc.wait);
1005                 if (!s->dma_adc.mapped) {
1006                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1007                                 s->ctrl &= ~CTRL_ADC_EN;
1008                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1009                                 s->dma_adc.error++;
1010                         }
1011                 }
1012         }
1013         /* update DAC1 pointer */
1014         if (s->ctrl & CTRL_DAC1_EN) {
1015                 diff = get_hwptr(s, &s->dma_dac1, ES1371_REG_DAC1_FRAMECNT);
1016                 s->dma_dac1.total_bytes += diff;
1017                 if (s->dma_dac1.mapped) {
1018                         s->dma_dac1.count += diff;
1019                         if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
1020                                 wake_up(&s->dma_dac1.wait);
1021                 } else {
1022                         s->dma_dac1.count -= diff;
1023                         if (s->dma_dac1.count <= 0) {
1024                                 s->ctrl &= ~CTRL_DAC1_EN;
1025                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1026                                 s->dma_dac1.error++;
1027                         } else if (s->dma_dac1.count <= (signed)s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
1028                                 clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
1029                                               s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
1030                                 s->dma_dac1.endcleared = 1;
1031                         }
1032                         if (s->dma_dac1.count + (signed)s->dma_dac1.fragsize <= (signed)s->dma_dac1.dmasize)
1033                                 wake_up(&s->dma_dac1.wait);
1034                 }
1035         }
1036         /* update DAC2 pointer */
1037         if (s->ctrl & CTRL_DAC2_EN) {
1038                 diff = get_hwptr(s, &s->dma_dac2, ES1371_REG_DAC2_FRAMECNT);
1039                 s->dma_dac2.total_bytes += diff;
1040                 if (s->dma_dac2.mapped) {
1041                         s->dma_dac2.count += diff;
1042                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1043                                 wake_up(&s->dma_dac2.wait);
1044                 } else {
1045                         s->dma_dac2.count -= diff;
1046                         if (s->dma_dac2.count <= 0) {
1047                                 s->ctrl &= ~CTRL_DAC2_EN;
1048                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1049                                 s->dma_dac2.error++;
1050                         } else if (s->dma_dac2.count <= (signed)s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
1051                                 clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
1052                                               s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
1053                                 s->dma_dac2.endcleared = 1;
1054                         }
1055                         if (s->dma_dac2.count + (signed)s->dma_dac2.fragsize <= (signed)s->dma_dac2.dmasize)
1056                                 wake_up(&s->dma_dac2.wait);
1057                 }
1058         }
1059 }
1060
1061 /* hold spinlock for the following! */
1062 static void es1371_handle_midi(struct es1371_state *s)
1063 {
1064         unsigned char ch;
1065         int wake;
1066
1067         if (!(s->ctrl & CTRL_UART_EN))
1068                 return;
1069         wake = 0;
1070         while (inb(s->io+ES1371_REG_UART_STATUS) & USTAT_RXRDY) {
1071                 ch = inb(s->io+ES1371_REG_UART_DATA);
1072                 if (s->midi.icnt < MIDIINBUF) {
1073                         s->midi.ibuf[s->midi.iwr] = ch;
1074                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1075                         s->midi.icnt++;
1076                 }
1077                 wake = 1;
1078         }
1079         if (wake)
1080                 wake_up(&s->midi.iwait);
1081         wake = 0;
1082         while ((inb(s->io+ES1371_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
1083                 outb(s->midi.obuf[s->midi.ord], s->io+ES1371_REG_UART_DATA);
1084                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1085                 s->midi.ocnt--;
1086                 if (s->midi.ocnt < MIDIOUTBUF-16)
1087                         wake = 1;
1088         }
1089         if (wake)
1090                 wake_up(&s->midi.owait);
1091         outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1371_REG_UART_CONTROL);
1092 }
1093
1094 static irqreturn_t es1371_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1095 {
1096         struct es1371_state *s = (struct es1371_state *)dev_id;
1097         unsigned int intsrc, sctl;
1098
1099         /* fastpath out, to ease interrupt sharing */
1100         intsrc = inl(s->io+ES1371_REG_STATUS);
1101         if (!(intsrc & 0x80000000))
1102                 return IRQ_NONE;
1103         spin_lock(&s->lock);
1104         /* clear audio interrupts first */
1105         sctl = s->sctrl;
1106         if (intsrc & STAT_ADC)
1107                 sctl &= ~SCTRL_R1INTEN;
1108         if (intsrc & STAT_DAC1)
1109                 sctl &= ~SCTRL_P1INTEN;
1110         if (intsrc & STAT_DAC2)
1111                 sctl &= ~SCTRL_P2INTEN;
1112         outl(sctl, s->io+ES1371_REG_SERIAL_CONTROL);
1113         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1114         es1371_update_ptr(s);
1115         es1371_handle_midi(s);
1116         spin_unlock(&s->lock);
1117         return IRQ_HANDLED;
1118 }
1119
1120 /* --------------------------------------------------------------------- */
1121
1122 static const char invalid_magic[] = KERN_CRIT PFX "invalid magic value\n";
1123
1124 #define VALIDATE_STATE(s)                         \
1125 ({                                                \
1126         if (!(s) || (s)->magic != ES1371_MAGIC) { \
1127                 printk(invalid_magic);            \
1128                 return -ENXIO;                    \
1129         }                                         \
1130 })
1131
1132 /* --------------------------------------------------------------------- */
1133
1134 /* Conversion table for S/PDIF PCM volume emulation through the SRC */
1135 /* dB-linear table of DAC vol values; -0dB to -46.5dB with mute */
1136 static const unsigned short DACVolTable[101] =
1137 {
1138         0x1000, 0x0f2a, 0x0e60, 0x0da0, 0x0cea, 0x0c3e, 0x0b9a, 0x0aff,
1139         0x0a6d, 0x09e1, 0x095e, 0x08e1, 0x086a, 0x07fa, 0x078f, 0x072a,
1140         0x06cb, 0x0670, 0x061a, 0x05c9, 0x057b, 0x0532, 0x04ed, 0x04ab,
1141         0x046d, 0x0432, 0x03fa, 0x03c5, 0x0392, 0x0363, 0x0335, 0x030b,
1142         0x02e2, 0x02bc, 0x0297, 0x0275, 0x0254, 0x0235, 0x0217, 0x01fb,
1143         0x01e1, 0x01c8, 0x01b0, 0x0199, 0x0184, 0x0170, 0x015d, 0x014b,
1144         0x0139, 0x0129, 0x0119, 0x010b, 0x00fd, 0x00f0, 0x00e3, 0x00d7,
1145         0x00cc, 0x00c1, 0x00b7, 0x00ae, 0x00a5, 0x009c, 0x0094, 0x008c,
1146         0x0085, 0x007e, 0x0077, 0x0071, 0x006b, 0x0066, 0x0060, 0x005b,
1147         0x0057, 0x0052, 0x004e, 0x004a, 0x0046, 0x0042, 0x003f, 0x003c,
1148         0x0038, 0x0036, 0x0033, 0x0030, 0x002e, 0x002b, 0x0029, 0x0027,
1149         0x0025, 0x0023, 0x0021, 0x001f, 0x001e, 0x001c, 0x001b, 0x0019,
1150         0x0018, 0x0017, 0x0016, 0x0014, 0x0000
1151 };
1152
1153 /*
1154  * when we are in S/PDIF mode, we want to disable any analog output so
1155  * we filter the mixer ioctls
1156  */
1157 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg)
1158 {
1159         struct es1371_state *s = (struct es1371_state *)codec->private_data;
1160         int val;
1161         unsigned long flags;
1162         unsigned int left, right;
1163
1164         VALIDATE_STATE(s);
1165         /* filter mixer ioctls to catch PCM and MASTER volume when in S/PDIF mode */
1166         if (s->spdif_volume == -1)
1167                 return codec->mixer_ioctl(codec, cmd, arg);
1168         switch (cmd) {
1169         case SOUND_MIXER_WRITE_VOLUME:
1170                 return 0;
1171
1172         case SOUND_MIXER_WRITE_PCM:   /* use SRC for PCM volume */
1173                 if (get_user(val, (int __user *)arg))
1174                         return -EFAULT;
1175                 right = ((val >> 8)  & 0xff);
1176                 left = (val  & 0xff);
1177                 if (right > 100)
1178                         right = 100;
1179                 if (left > 100)
1180                         left = 100;
1181                 s->spdif_volume = (right << 8) | left;
1182                 spin_lock_irqsave(&s->lock, flags);
1183                 src_write(s, SRCREG_VOL_DAC2, DACVolTable[100 - left]);
1184                 src_write(s, SRCREG_VOL_DAC2+1, DACVolTable[100 - right]);
1185                 spin_unlock_irqrestore(&s->lock, flags);
1186                 return 0;
1187
1188         case SOUND_MIXER_READ_PCM:
1189                 return put_user(s->spdif_volume, (int __user *)arg);
1190         }
1191         return codec->mixer_ioctl(codec, cmd, arg);
1192 }
1193
1194 /* --------------------------------------------------------------------- */
1195
1196 /*
1197  * AC97 Mixer Register to Connections mapping of the Concert 97 board
1198  *
1199  * AC97_MASTER_VOL_STEREO   Line Out
1200  * AC97_MASTER_VOL_MONO     TAD Output
1201  * AC97_PCBEEP_VOL          none
1202  * AC97_PHONE_VOL           TAD Input (mono)
1203  * AC97_MIC_VOL             MIC Input (mono)
1204  * AC97_LINEIN_VOL          Line Input (stereo)
1205  * AC97_CD_VOL              CD Input (stereo)
1206  * AC97_VIDEO_VOL           none
1207  * AC97_AUX_VOL             Aux Input (stereo)
1208  * AC97_PCMOUT_VOL          Wave Output (stereo)
1209  */
1210
1211 static int es1371_open_mixdev(struct inode *inode, struct file *file)
1212 {
1213         int minor = iminor(inode);
1214         struct list_head *list;
1215         struct es1371_state *s;
1216
1217         for (list = devs.next; ; list = list->next) {
1218                 if (list == &devs)
1219                         return -ENODEV;
1220                 s = list_entry(list, struct es1371_state, devs);
1221                 if (s->codec->dev_mixer == minor)
1222                         break;
1223         }
1224         VALIDATE_STATE(s);
1225         file->private_data = s;
1226         return nonseekable_open(inode, file);
1227 }
1228
1229 static int es1371_release_mixdev(struct inode *inode, struct file *file)
1230 {
1231         struct es1371_state *s = (struct es1371_state *)file->private_data;
1232
1233         VALIDATE_STATE(s);
1234         return 0;
1235 }
1236
1237 static int es1371_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1238 {
1239         struct es1371_state *s = (struct es1371_state *)file->private_data;
1240         struct ac97_codec *codec = s->codec;
1241
1242         return mixdev_ioctl(codec, cmd, arg);
1243 }
1244
1245 static /*const*/ struct file_operations es1371_mixer_fops = {
1246         .owner          = THIS_MODULE,
1247         .llseek         = no_llseek,
1248         .ioctl          = es1371_ioctl_mixdev,
1249         .open           = es1371_open_mixdev,
1250         .release        = es1371_release_mixdev,
1251 };
1252
1253 /* --------------------------------------------------------------------- */
1254
1255 static int drain_dac1(struct es1371_state *s, int nonblock)
1256 {
1257         DECLARE_WAITQUEUE(wait, current);
1258         unsigned long flags;
1259         int count, tmo;
1260
1261         if (s->dma_dac1.mapped || !s->dma_dac1.ready)
1262                 return 0;
1263         add_wait_queue(&s->dma_dac1.wait, &wait);
1264         for (;;) {
1265                 __set_current_state(TASK_INTERRUPTIBLE);
1266                 spin_lock_irqsave(&s->lock, flags);
1267                 count = s->dma_dac1.count;
1268                 spin_unlock_irqrestore(&s->lock, flags);
1269                 if (count <= 0)
1270                         break;
1271                 if (signal_pending(current))
1272                         break;
1273                 if (nonblock) {
1274                         remove_wait_queue(&s->dma_dac1.wait, &wait);
1275                         set_current_state(TASK_RUNNING);
1276                         return -EBUSY;
1277                 }
1278                 tmo = 3 * HZ * (count + s->dma_dac1.fragsize) / 2 / s->dac1rate;
1279                 tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
1280                 if (!schedule_timeout(tmo + 1))
1281                         DBG(printk(KERN_DEBUG PFX "dac1 dma timed out??\n");)
1282         }
1283         remove_wait_queue(&s->dma_dac1.wait, &wait);
1284         set_current_state(TASK_RUNNING);
1285         if (signal_pending(current))
1286                 return -ERESTARTSYS;
1287         return 0;
1288 }
1289
1290 static int drain_dac2(struct es1371_state *s, int nonblock)
1291 {
1292         DECLARE_WAITQUEUE(wait, current);
1293         unsigned long flags;
1294         int count, tmo;
1295
1296         if (s->dma_dac2.mapped || !s->dma_dac2.ready)
1297                 return 0;
1298         add_wait_queue(&s->dma_dac2.wait, &wait);
1299         for (;;) {
1300                 __set_current_state(TASK_UNINTERRUPTIBLE);
1301                 spin_lock_irqsave(&s->lock, flags);
1302                 count = s->dma_dac2.count;
1303                 spin_unlock_irqrestore(&s->lock, flags);
1304                 if (count <= 0)
1305                         break;
1306                 if (signal_pending(current))
1307                         break;
1308                 if (nonblock) {
1309                         remove_wait_queue(&s->dma_dac2.wait, &wait);
1310                         set_current_state(TASK_RUNNING);
1311                         return -EBUSY;
1312                 }
1313                 tmo = 3 * HZ * (count + s->dma_dac2.fragsize) / 2 / s->dac2rate;
1314                 tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
1315                 if (!schedule_timeout(tmo + 1))
1316                         DBG(printk(KERN_DEBUG PFX "dac2 dma timed out??\n");)
1317         }
1318         remove_wait_queue(&s->dma_dac2.wait, &wait);
1319         set_current_state(TASK_RUNNING);
1320         if (signal_pending(current))
1321                 return -ERESTARTSYS;
1322         return 0;
1323 }
1324
1325 /* --------------------------------------------------------------------- */
1326
1327 static ssize_t es1371_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1328 {
1329         struct es1371_state *s = (struct es1371_state *)file->private_data;
1330         DECLARE_WAITQUEUE(wait, current);
1331         ssize_t ret = 0;
1332         unsigned long flags;
1333         unsigned swptr;
1334         int cnt;
1335
1336         VALIDATE_STATE(s);
1337         if (s->dma_adc.mapped)
1338                 return -ENXIO;
1339         if (!access_ok(VERIFY_WRITE, buffer, count))
1340                 return -EFAULT;
1341         down(&s->sem);
1342         if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1343                 goto out2;
1344
1345         add_wait_queue(&s->dma_adc.wait, &wait);
1346         while (count > 0) {
1347                 spin_lock_irqsave(&s->lock, flags);
1348                 swptr = s->dma_adc.swptr;
1349                 cnt = s->dma_adc.dmasize-swptr;
1350                 if (s->dma_adc.count < cnt)
1351                         cnt = s->dma_adc.count;
1352                 if (cnt <= 0)
1353                         __set_current_state(TASK_INTERRUPTIBLE);
1354                 spin_unlock_irqrestore(&s->lock, flags);
1355                 if (cnt > count)
1356                         cnt = count;
1357                 if (cnt <= 0) {
1358                         if (s->dma_adc.enabled)
1359                                 start_adc(s);
1360                         if (file->f_flags & O_NONBLOCK) {
1361                                 if (!ret)
1362                                         ret = -EAGAIN;
1363                                 goto out;
1364                         }
1365                         up(&s->sem);
1366                         schedule();
1367                         if (signal_pending(current)) {
1368                                 if (!ret)
1369                                         ret = -ERESTARTSYS;
1370                                 goto out2;
1371                         }
1372                         down(&s->sem);
1373                         if (s->dma_adc.mapped)
1374                         {
1375                                 ret = -ENXIO;
1376                                 goto out;
1377                         }
1378                         continue;
1379                 }
1380                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1381                         if (!ret)
1382                                 ret = -EFAULT;
1383                         goto out;
1384                 }
1385                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1386                 spin_lock_irqsave(&s->lock, flags);
1387                 s->dma_adc.swptr = swptr;
1388                 s->dma_adc.count -= cnt;
1389                 spin_unlock_irqrestore(&s->lock, flags);
1390                 count -= cnt;
1391                 buffer += cnt;
1392                 ret += cnt;
1393                 if (s->dma_adc.enabled)
1394                         start_adc(s);
1395         }
1396 out:
1397         up(&s->sem);
1398 out2:
1399         remove_wait_queue(&s->dma_adc.wait, &wait);
1400         set_current_state(TASK_RUNNING);
1401         return ret;
1402 }
1403
1404 static ssize_t es1371_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1405 {
1406         struct es1371_state *s = (struct es1371_state *)file->private_data;
1407         DECLARE_WAITQUEUE(wait, current);
1408         ssize_t ret;
1409         unsigned long flags;
1410         unsigned swptr;
1411         int cnt;
1412
1413         VALIDATE_STATE(s);
1414         if (s->dma_dac2.mapped)
1415                 return -ENXIO;
1416         if (!access_ok(VERIFY_READ, buffer, count))
1417                 return -EFAULT;
1418         down(&s->sem);
1419         if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1420                 goto out3;
1421         ret = 0;
1422         add_wait_queue(&s->dma_dac2.wait, &wait);
1423         while (count > 0) {
1424                 spin_lock_irqsave(&s->lock, flags);
1425                 if (s->dma_dac2.count < 0) {
1426                         s->dma_dac2.count = 0;
1427                         s->dma_dac2.swptr = s->dma_dac2.hwptr;
1428                 }
1429                 swptr = s->dma_dac2.swptr;
1430                 cnt = s->dma_dac2.dmasize-swptr;
1431                 if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
1432                         cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
1433                 if (cnt <= 0)
1434                         __set_current_state(TASK_INTERRUPTIBLE);
1435                 spin_unlock_irqrestore(&s->lock, flags);
1436                 if (cnt > count)
1437                         cnt = count;
1438                 if (cnt <= 0) {
1439                         if (s->dma_dac2.enabled)
1440                                 start_dac2(s);
1441                         if (file->f_flags & O_NONBLOCK) {
1442                                 if (!ret)
1443                                         ret = -EAGAIN;
1444                                 goto out;
1445                         }
1446                         up(&s->sem);
1447                         schedule();
1448                         if (signal_pending(current)) {
1449                                 if (!ret)
1450                                         ret = -ERESTARTSYS;
1451                                 goto out2;
1452                         }
1453                         down(&s->sem);
1454                         if (s->dma_dac2.mapped)
1455                         {
1456                                 ret = -ENXIO;
1457                                 goto out;
1458                         }
1459                         continue;
1460                 }
1461                 if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt)) {
1462                         if (!ret)
1463                                 ret = -EFAULT;
1464                         goto out;
1465                 }
1466                 swptr = (swptr + cnt) % s->dma_dac2.dmasize;
1467                 spin_lock_irqsave(&s->lock, flags);
1468                 s->dma_dac2.swptr = swptr;
1469                 s->dma_dac2.count += cnt;
1470                 s->dma_dac2.endcleared = 0;
1471                 spin_unlock_irqrestore(&s->lock, flags);
1472                 count -= cnt;
1473                 buffer += cnt;
1474                 ret += cnt;
1475                 if (s->dma_dac2.enabled)
1476                         start_dac2(s);
1477         }
1478 out:
1479         up(&s->sem);
1480 out2:
1481         remove_wait_queue(&s->dma_dac2.wait, &wait);
1482 out3:
1483         set_current_state(TASK_RUNNING);
1484         return ret;
1485 }
1486
1487 /* No kernel lock - we have our own spinlock */
1488 static unsigned int es1371_poll(struct file *file, struct poll_table_struct *wait)
1489 {
1490         struct es1371_state *s = (struct es1371_state *)file->private_data;
1491         unsigned long flags;
1492         unsigned int mask = 0;
1493
1494         VALIDATE_STATE(s);
1495         if (file->f_mode & FMODE_WRITE) {
1496                 if (!s->dma_dac2.ready && prog_dmabuf_dac2(s))
1497                         return 0;
1498                 poll_wait(file, &s->dma_dac2.wait, wait);
1499         }
1500         if (file->f_mode & FMODE_READ) {
1501                 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1502                         return 0;
1503                 poll_wait(file, &s->dma_adc.wait, wait);
1504         }
1505         spin_lock_irqsave(&s->lock, flags);
1506         es1371_update_ptr(s);
1507         if (file->f_mode & FMODE_READ) {
1508                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1509                                 mask |= POLLIN | POLLRDNORM;
1510         }
1511         if (file->f_mode & FMODE_WRITE) {
1512                 if (s->dma_dac2.mapped) {
1513                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1514                                 mask |= POLLOUT | POLLWRNORM;
1515                 } else {
1516                         if ((signed)s->dma_dac2.dmasize >= s->dma_dac2.count + (signed)s->dma_dac2.fragsize)
1517                                 mask |= POLLOUT | POLLWRNORM;
1518                 }
1519         }
1520         spin_unlock_irqrestore(&s->lock, flags);
1521         return mask;
1522 }
1523
1524 static int es1371_mmap(struct file *file, struct vm_area_struct *vma)
1525 {
1526         struct es1371_state *s = (struct es1371_state *)file->private_data;
1527         struct dmabuf *db;
1528         int ret = 0;
1529         unsigned long size;
1530
1531         VALIDATE_STATE(s);
1532         lock_kernel();
1533         down(&s->sem);
1534
1535         if (vma->vm_flags & VM_WRITE) {
1536                 if ((ret = prog_dmabuf_dac2(s)) != 0) {
1537                         goto out;
1538                 }
1539                 db = &s->dma_dac2;
1540         } else if (vma->vm_flags & VM_READ) {
1541                 if ((ret = prog_dmabuf_adc(s)) != 0) {
1542                         goto out;
1543                 }
1544                 db = &s->dma_adc;
1545         } else {
1546                 ret = -EINVAL;
1547                 goto out;
1548         }
1549         if (vma->vm_pgoff != 0) {
1550                 ret = -EINVAL;
1551                 goto out;
1552         }
1553         size = vma->vm_end - vma->vm_start;
1554         if (size > (PAGE_SIZE << db->buforder)) {
1555                 ret = -EINVAL;
1556                 goto out;
1557         }
1558         if (remap_pfn_range(vma, vma->vm_start,
1559                                 virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
1560                                 size, vma->vm_page_prot)) {
1561                 ret = -EAGAIN;
1562                 goto out;
1563         }
1564         db->mapped = 1;
1565 out:
1566         up(&s->sem);
1567         unlock_kernel();
1568         return ret;
1569 }
1570
1571 static int es1371_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1572 {
1573         struct es1371_state *s = (struct es1371_state *)file->private_data;
1574         unsigned long flags;
1575         audio_buf_info abinfo;
1576         count_info cinfo;
1577         int count;
1578         int val, mapped, ret;
1579         void __user *argp = (void __user *)arg;
1580         int __user *p = argp;
1581
1582         VALIDATE_STATE(s);
1583         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
1584                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1585         switch (cmd) {
1586         case OSS_GETVERSION:
1587                 return put_user(SOUND_VERSION, p);
1588
1589         case SNDCTL_DSP_SYNC:
1590                 if (file->f_mode & FMODE_WRITE)
1591                         return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1592                 return 0;
1593
1594         case SNDCTL_DSP_SETDUPLEX:
1595                 return 0;
1596
1597         case SNDCTL_DSP_GETCAPS:
1598                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1599
1600         case SNDCTL_DSP_RESET:
1601                 if (file->f_mode & FMODE_WRITE) {
1602                         stop_dac2(s);
1603                         synchronize_irq(s->irq);
1604                         s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
1605                 }
1606                 if (file->f_mode & FMODE_READ) {
1607                         stop_adc(s);
1608                         synchronize_irq(s->irq);
1609                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1610                 }
1611                 return 0;
1612
1613         case SNDCTL_DSP_SPEED:
1614                 if (get_user(val, p))
1615                         return -EFAULT;
1616                 if (val >= 0) {
1617                         if (file->f_mode & FMODE_READ) {
1618                                 stop_adc(s);
1619                                 s->dma_adc.ready = 0;
1620                                 set_adc_rate(s, val);
1621                         }
1622                         if (file->f_mode & FMODE_WRITE) {
1623                                 stop_dac2(s);
1624                                 s->dma_dac2.ready = 0;
1625                                 set_dac2_rate(s, val);
1626                         }
1627                 }
1628                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, p);
1629
1630         case SNDCTL_DSP_STEREO:
1631                 if (get_user(val, p))
1632                         return -EFAULT;
1633                 if (file->f_mode & FMODE_READ) {
1634                         stop_adc(s);
1635                         s->dma_adc.ready = 0;
1636                         spin_lock_irqsave(&s->lock, flags);
1637                         if (val)
1638                                 s->sctrl |= SCTRL_R1SMB;
1639                         else
1640                                 s->sctrl &= ~SCTRL_R1SMB;
1641                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1642                         spin_unlock_irqrestore(&s->lock, flags);
1643                 }
1644                 if (file->f_mode & FMODE_WRITE) {
1645                         stop_dac2(s);
1646                         s->dma_dac2.ready = 0;
1647                         spin_lock_irqsave(&s->lock, flags);
1648                         if (val)
1649                                 s->sctrl |= SCTRL_P2SMB;
1650                         else
1651                                 s->sctrl &= ~SCTRL_P2SMB;
1652                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1653                         spin_unlock_irqrestore(&s->lock, flags);
1654                 }
1655                 return 0;
1656
1657         case SNDCTL_DSP_CHANNELS:
1658                 if (get_user(val, p))
1659                         return -EFAULT;
1660                 if (val != 0) {
1661                         if (file->f_mode & FMODE_READ) {
1662                                 stop_adc(s);
1663                                 s->dma_adc.ready = 0;
1664                                 spin_lock_irqsave(&s->lock, flags);
1665                                 if (val >= 2)
1666                                         s->sctrl |= SCTRL_R1SMB;
1667                                 else
1668                                         s->sctrl &= ~SCTRL_R1SMB;
1669                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1670                                 spin_unlock_irqrestore(&s->lock, flags);
1671                         }
1672                         if (file->f_mode & FMODE_WRITE) {
1673                                 stop_dac2(s);
1674                                 s->dma_dac2.ready = 0;
1675                                 spin_lock_irqsave(&s->lock, flags);
1676                                 if (val >= 2)
1677                                         s->sctrl |= SCTRL_P2SMB;
1678                                 else
1679                                         s->sctrl &= ~SCTRL_P2SMB;
1680                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1681                                 spin_unlock_irqrestore(&s->lock, flags);
1682                         }
1683                 }
1684                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, p);
1685
1686         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1687                 return put_user(AFMT_S16_LE|AFMT_U8, p);
1688
1689         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1690                 if (get_user(val, p))
1691                         return -EFAULT;
1692                 if (val != AFMT_QUERY) {
1693                         if (file->f_mode & FMODE_READ) {
1694                                 stop_adc(s);
1695                                 s->dma_adc.ready = 0;
1696                                 spin_lock_irqsave(&s->lock, flags);
1697                                 if (val == AFMT_S16_LE)
1698                                         s->sctrl |= SCTRL_R1SEB;
1699                                 else
1700                                         s->sctrl &= ~SCTRL_R1SEB;
1701                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1702                                 spin_unlock_irqrestore(&s->lock, flags);
1703                         }
1704                         if (file->f_mode & FMODE_WRITE) {
1705                                 stop_dac2(s);
1706                                 s->dma_dac2.ready = 0;
1707                                 spin_lock_irqsave(&s->lock, flags);
1708                                 if (val == AFMT_S16_LE)
1709                                         s->sctrl |= SCTRL_P2SEB;
1710                                 else
1711                                         s->sctrl &= ~SCTRL_P2SEB;
1712                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1713                                 spin_unlock_irqrestore(&s->lock, flags);
1714                         }
1715                 }
1716                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
1717                                 AFMT_S16_LE : AFMT_U8, p);
1718
1719         case SNDCTL_DSP_POST:
1720                 return 0;
1721
1722         case SNDCTL_DSP_GETTRIGGER:
1723                 val = 0;
1724                 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1725                         val |= PCM_ENABLE_INPUT;
1726                 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1727                         val |= PCM_ENABLE_OUTPUT;
1728                 return put_user(val, p);
1729
1730         case SNDCTL_DSP_SETTRIGGER:
1731                 if (get_user(val, p))
1732                         return -EFAULT;
1733                 if (file->f_mode & FMODE_READ) {
1734                         if (val & PCM_ENABLE_INPUT) {
1735                                 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1736                                         return ret;
1737                                 s->dma_adc.enabled = 1;
1738                                 start_adc(s);
1739                         } else {
1740                                 s->dma_adc.enabled = 0;
1741                                 stop_adc(s);
1742                         }
1743                 }
1744                 if (file->f_mode & FMODE_WRITE) {
1745                         if (val & PCM_ENABLE_OUTPUT) {
1746                                 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1747                                         return ret;
1748                                 s->dma_dac2.enabled = 1;
1749                                 start_dac2(s);
1750                         } else {
1751                                 s->dma_dac2.enabled = 0;
1752                                 stop_dac2(s);
1753                         }
1754                 }
1755                 return 0;
1756
1757         case SNDCTL_DSP_GETOSPACE:
1758                 if (!(file->f_mode & FMODE_WRITE))
1759                         return -EINVAL;
1760                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1761                         return val;
1762                 spin_lock_irqsave(&s->lock, flags);
1763                 es1371_update_ptr(s);
1764                 abinfo.fragsize = s->dma_dac2.fragsize;
1765                 count = s->dma_dac2.count;
1766                 if (count < 0)
1767                         count = 0;
1768                 abinfo.bytes = s->dma_dac2.dmasize - count;
1769                 abinfo.fragstotal = s->dma_dac2.numfrag;
1770                 abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
1771                 spin_unlock_irqrestore(&s->lock, flags);
1772                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1773
1774         case SNDCTL_DSP_GETISPACE:
1775                 if (!(file->f_mode & FMODE_READ))
1776                         return -EINVAL;
1777                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1778                         return val;
1779                 spin_lock_irqsave(&s->lock, flags);
1780                 es1371_update_ptr(s);
1781                 abinfo.fragsize = s->dma_adc.fragsize;
1782                 count = s->dma_adc.count;
1783                 if (count < 0)
1784                         count = 0;
1785                 abinfo.bytes = count;
1786                 abinfo.fragstotal = s->dma_adc.numfrag;
1787                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1788                 spin_unlock_irqrestore(&s->lock, flags);
1789                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1790
1791         case SNDCTL_DSP_NONBLOCK:
1792                 file->f_flags |= O_NONBLOCK;
1793                 return 0;
1794
1795         case SNDCTL_DSP_GETODELAY:
1796                 if (!(file->f_mode & FMODE_WRITE))
1797                         return -EINVAL;
1798                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1799                         return val;
1800                 spin_lock_irqsave(&s->lock, flags);
1801                 es1371_update_ptr(s);
1802                 count = s->dma_dac2.count;
1803                 spin_unlock_irqrestore(&s->lock, flags);
1804                 if (count < 0)
1805                         count = 0;
1806                 return put_user(count, p);
1807
1808         case SNDCTL_DSP_GETIPTR:
1809                 if (!(file->f_mode & FMODE_READ))
1810                         return -EINVAL;
1811                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1812                         return val;
1813                 spin_lock_irqsave(&s->lock, flags);
1814                 es1371_update_ptr(s);
1815                 cinfo.bytes = s->dma_adc.total_bytes;
1816                 count = s->dma_adc.count;
1817                 if (count < 0)
1818                         count = 0;
1819                 cinfo.blocks = count >> s->dma_adc.fragshift;
1820                 cinfo.ptr = s->dma_adc.hwptr;
1821                 if (s->dma_adc.mapped)
1822                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1823                 spin_unlock_irqrestore(&s->lock, flags);
1824                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1825                         return -EFAULT;
1826                 return 0;
1827
1828         case SNDCTL_DSP_GETOPTR:
1829                 if (!(file->f_mode & FMODE_WRITE))
1830                         return -EINVAL;
1831                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1832                         return val;
1833                 spin_lock_irqsave(&s->lock, flags);
1834                 es1371_update_ptr(s);
1835                 cinfo.bytes = s->dma_dac2.total_bytes;
1836                 count = s->dma_dac2.count;
1837                 if (count < 0)
1838                         count = 0;
1839                 cinfo.blocks = count >> s->dma_dac2.fragshift;
1840                 cinfo.ptr = s->dma_dac2.hwptr;
1841                 if (s->dma_dac2.mapped)
1842                         s->dma_dac2.count &= s->dma_dac2.fragsize-1;
1843                 spin_unlock_irqrestore(&s->lock, flags);
1844                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1845                         return -EFAULT;
1846                 return 0;
1847
1848         case SNDCTL_DSP_GETBLKSIZE:
1849                 if (file->f_mode & FMODE_WRITE) {
1850                         if ((val = prog_dmabuf_dac2(s)))
1851                                 return val;
1852                         return put_user(s->dma_dac2.fragsize, p);
1853                 }
1854                 if ((val = prog_dmabuf_adc(s)))
1855                         return val;
1856                 return put_user(s->dma_adc.fragsize, p);
1857
1858         case SNDCTL_DSP_SETFRAGMENT:
1859                 if (get_user(val, p))
1860                         return -EFAULT;
1861                 if (file->f_mode & FMODE_READ) {
1862                         s->dma_adc.ossfragshift = val & 0xffff;
1863                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1864                         if (s->dma_adc.ossfragshift < 4)
1865                                 s->dma_adc.ossfragshift = 4;
1866                         if (s->dma_adc.ossfragshift > 15)
1867                                 s->dma_adc.ossfragshift = 15;
1868                         if (s->dma_adc.ossmaxfrags < 4)
1869                                 s->dma_adc.ossmaxfrags = 4;
1870                 }
1871                 if (file->f_mode & FMODE_WRITE) {
1872                         s->dma_dac2.ossfragshift = val & 0xffff;
1873                         s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
1874                         if (s->dma_dac2.ossfragshift < 4)
1875                                 s->dma_dac2.ossfragshift = 4;
1876                         if (s->dma_dac2.ossfragshift > 15)
1877                                 s->dma_dac2.ossfragshift = 15;
1878                         if (s->dma_dac2.ossmaxfrags < 4)
1879                                 s->dma_dac2.ossmaxfrags = 4;
1880                 }
1881                 return 0;
1882
1883         case SNDCTL_DSP_SUBDIVIDE:
1884                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1885                     (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1886                         return -EINVAL;
1887                 if (get_user(val, p))
1888                         return -EFAULT;
1889                 if (val != 1 && val != 2 && val != 4)
1890                         return -EINVAL;
1891                 if (file->f_mode & FMODE_READ)
1892                         s->dma_adc.subdivision = val;
1893                 if (file->f_mode & FMODE_WRITE)
1894                         s->dma_dac2.subdivision = val;
1895                 return 0;
1896
1897         case SOUND_PCM_READ_RATE:
1898                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, p);
1899
1900         case SOUND_PCM_READ_CHANNELS:
1901                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, p);
1902
1903         case SOUND_PCM_READ_BITS:
1904                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ? 16 : 8, p);
1905
1906         case SOUND_PCM_WRITE_FILTER:
1907         case SNDCTL_DSP_SETSYNCRO:
1908         case SOUND_PCM_READ_FILTER:
1909                 return -EINVAL;
1910
1911         }
1912         return mixdev_ioctl(s->codec, cmd, arg);
1913 }
1914
1915 static int es1371_open(struct inode *inode, struct file *file)
1916 {
1917         int minor = iminor(inode);
1918         DECLARE_WAITQUEUE(wait, current);
1919         unsigned long flags;
1920         struct list_head *list;
1921         struct es1371_state *s;
1922
1923         for (list = devs.next; ; list = list->next) {
1924                 if (list == &devs)
1925                         return -ENODEV;
1926                 s = list_entry(list, struct es1371_state, devs);
1927                 if (!((s->dev_audio ^ minor) & ~0xf))
1928                         break;
1929         }
1930         VALIDATE_STATE(s);
1931         file->private_data = s;
1932         /* wait for device to become free */
1933         down(&s->open_sem);
1934         while (s->open_mode & file->f_mode) {
1935                 if (file->f_flags & O_NONBLOCK) {
1936                         up(&s->open_sem);
1937                         return -EBUSY;
1938                 }
1939                 add_wait_queue(&s->open_wait, &wait);
1940                 __set_current_state(TASK_INTERRUPTIBLE);
1941                 up(&s->open_sem);
1942                 schedule();
1943                 remove_wait_queue(&s->open_wait, &wait);
1944                 set_current_state(TASK_RUNNING);
1945                 if (signal_pending(current))
1946                         return -ERESTARTSYS;
1947                 down(&s->open_sem);
1948         }
1949         if (file->f_mode & FMODE_READ) {
1950                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1951                 s->dma_adc.enabled = 1;
1952                 set_adc_rate(s, 8000);
1953         }
1954         if (file->f_mode & FMODE_WRITE) {
1955                 s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
1956                 s->dma_dac2.enabled = 1;
1957                 set_dac2_rate(s, 8000);
1958         }
1959         spin_lock_irqsave(&s->lock, flags);
1960         if (file->f_mode & FMODE_READ) {
1961                 s->sctrl &= ~SCTRL_R1FMT;
1962                 if ((minor & 0xf) == SND_DEV_DSP16)
1963                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_R1FMT;
1964                 else
1965                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_R1FMT;
1966         }
1967         if (file->f_mode & FMODE_WRITE) {
1968                 s->sctrl &= ~SCTRL_P2FMT;
1969                 if ((minor & 0xf) == SND_DEV_DSP16)
1970                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P2FMT;
1971                 else
1972                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P2FMT;
1973         }
1974         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1975         spin_unlock_irqrestore(&s->lock, flags);
1976         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1977         up(&s->open_sem);
1978         init_MUTEX(&s->sem);
1979         return nonseekable_open(inode, file);
1980 }
1981
1982 static int es1371_release(struct inode *inode, struct file *file)
1983 {
1984         struct es1371_state *s = (struct es1371_state *)file->private_data;
1985
1986         VALIDATE_STATE(s);
1987         lock_kernel();
1988         if (file->f_mode & FMODE_WRITE)
1989                 drain_dac2(s, file->f_flags & O_NONBLOCK);
1990         down(&s->open_sem);
1991         if (file->f_mode & FMODE_WRITE) {
1992                 stop_dac2(s);
1993                 dealloc_dmabuf(s, &s->dma_dac2);
1994         }
1995         if (file->f_mode & FMODE_READ) {
1996                 stop_adc(s);
1997                 dealloc_dmabuf(s, &s->dma_adc);
1998         }
1999         s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
2000         up(&s->open_sem);
2001         wake_up(&s->open_wait);
2002         unlock_kernel();
2003         return 0;
2004 }
2005
2006 static /*const*/ struct file_operations es1371_audio_fops = {
2007         .owner          = THIS_MODULE,
2008         .llseek         = no_llseek,
2009         .read           = es1371_read,
2010         .write          = es1371_write,
2011         .poll           = es1371_poll,
2012         .ioctl          = es1371_ioctl,
2013         .mmap           = es1371_mmap,
2014         .open           = es1371_open,
2015         .release        = es1371_release,
2016 };
2017
2018 /* --------------------------------------------------------------------- */
2019
2020 static ssize_t es1371_write_dac(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2021 {
2022         struct es1371_state *s = (struct es1371_state *)file->private_data;
2023         DECLARE_WAITQUEUE(wait, current);
2024         ssize_t ret = 0;
2025         unsigned long flags;
2026         unsigned swptr;
2027         int cnt;
2028
2029         VALIDATE_STATE(s);
2030         if (s->dma_dac1.mapped)
2031                 return -ENXIO;
2032         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2033                 return ret;
2034         if (!access_ok(VERIFY_READ, buffer, count))
2035                 return -EFAULT;
2036         add_wait_queue(&s->dma_dac1.wait, &wait);
2037         while (count > 0) {
2038                 spin_lock_irqsave(&s->lock, flags);
2039                 if (s->dma_dac1.count < 0) {
2040                         s->dma_dac1.count = 0;
2041                         s->dma_dac1.swptr = s->dma_dac1.hwptr;
2042                 }
2043                 swptr = s->dma_dac1.swptr;
2044                 cnt = s->dma_dac1.dmasize-swptr;
2045                 if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
2046                         cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
2047                 if (cnt <= 0)
2048                         __set_current_state(TASK_INTERRUPTIBLE);
2049                 spin_unlock_irqrestore(&s->lock, flags);
2050                 if (cnt > count)
2051                         cnt = count;
2052                 if (cnt <= 0) {
2053                         if (s->dma_dac1.enabled)
2054                                 start_dac1(s);
2055                         if (file->f_flags & O_NONBLOCK) {
2056                                 if (!ret)
2057                                         ret = -EAGAIN;
2058                                 break;
2059                         }
2060                         schedule();
2061                         if (signal_pending(current)) {
2062                                 if (!ret)
2063                                         ret = -ERESTARTSYS;
2064                                 break;
2065                         }
2066                         continue;
2067                 }
2068                 if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt)) {
2069                         if (!ret)
2070                                 ret = -EFAULT;
2071                         break;
2072                 }
2073                 swptr = (swptr + cnt) % s->dma_dac1.dmasize;
2074                 spin_lock_irqsave(&s->lock, flags);
2075                 s->dma_dac1.swptr = swptr;
2076                 s->dma_dac1.count += cnt;
2077                 s->dma_dac1.endcleared = 0;
2078                 spin_unlock_irqrestore(&s->lock, flags);
2079                 count -= cnt;
2080                 buffer += cnt;
2081                 ret += cnt;
2082                 if (s->dma_dac1.enabled)
2083                         start_dac1(s);
2084         }
2085         remove_wait_queue(&s->dma_dac1.wait, &wait);
2086         set_current_state(TASK_RUNNING);
2087         return ret;
2088 }
2089
2090 /* No kernel lock - we have our own spinlock */
2091 static unsigned int es1371_poll_dac(struct file *file, struct poll_table_struct *wait)
2092 {
2093         struct es1371_state *s = (struct es1371_state *)file->private_data;
2094         unsigned long flags;
2095         unsigned int mask = 0;
2096
2097         VALIDATE_STATE(s);
2098         if (!s->dma_dac1.ready && prog_dmabuf_dac1(s))
2099                 return 0;
2100         poll_wait(file, &s->dma_dac1.wait, wait);
2101         spin_lock_irqsave(&s->lock, flags);
2102         es1371_update_ptr(s);
2103         if (s->dma_dac1.mapped) {
2104                 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
2105                         mask |= POLLOUT | POLLWRNORM;
2106         } else {
2107                 if ((signed)s->dma_dac1.dmasize >= s->dma_dac1.count + (signed)s->dma_dac1.fragsize)
2108                         mask |= POLLOUT | POLLWRNORM;
2109         }
2110         spin_unlock_irqrestore(&s->lock, flags);
2111         return mask;
2112 }
2113
2114 static int es1371_mmap_dac(struct file *file, struct vm_area_struct *vma)
2115 {
2116         struct es1371_state *s = (struct es1371_state *)file->private_data;
2117         int ret;
2118         unsigned long size;
2119
2120         VALIDATE_STATE(s);
2121         if (!(vma->vm_flags & VM_WRITE))
2122                 return -EINVAL;
2123         lock_kernel();
2124         if ((ret = prog_dmabuf_dac1(s)) != 0)
2125                 goto out;
2126         ret = -EINVAL;
2127         if (vma->vm_pgoff != 0)
2128                 goto out;
2129         size = vma->vm_end - vma->vm_start;
2130         if (size > (PAGE_SIZE << s->dma_dac1.buforder))
2131                 goto out;
2132         ret = -EAGAIN;
2133         if (remap_pfn_range(vma, vma->vm_start,
2134                         virt_to_phys(s->dma_dac1.rawbuf) >> PAGE_SHIFT,
2135                         size, vma->vm_page_prot))
2136                 goto out;
2137         s->dma_dac1.mapped = 1;
2138         ret = 0;
2139 out:
2140         unlock_kernel();
2141         return ret;
2142 }
2143
2144 static int es1371_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2145 {
2146         struct es1371_state *s = (struct es1371_state *)file->private_data;
2147         unsigned long flags;
2148         audio_buf_info abinfo;
2149         count_info cinfo;
2150         int count;
2151         int val, ret;
2152         int __user *p = (int __user *)arg;
2153
2154         VALIDATE_STATE(s);
2155         switch (cmd) {
2156         case OSS_GETVERSION:
2157                 return put_user(SOUND_VERSION, p);
2158
2159         case SNDCTL_DSP_SYNC:
2160                 return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
2161
2162         case SNDCTL_DSP_SETDUPLEX:
2163                 return -EINVAL;
2164
2165         case SNDCTL_DSP_GETCAPS:
2166                 return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
2167
2168         case SNDCTL_DSP_RESET:
2169                 stop_dac1(s);
2170                 synchronize_irq(s->irq);
2171                 s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
2172                 return 0;
2173
2174         case SNDCTL_DSP_SPEED:
2175                 if (get_user(val, p))
2176                         return -EFAULT;
2177                 if (val >= 0) {
2178                         stop_dac1(s);
2179                         s->dma_dac1.ready = 0;
2180                         set_dac1_rate(s, val);
2181                 }
2182                 return put_user(s->dac1rate, p);
2183
2184         case SNDCTL_DSP_STEREO:
2185                 if (get_user(val, p))
2186                         return -EFAULT;
2187                 stop_dac1(s);
2188                 s->dma_dac1.ready = 0;
2189                 spin_lock_irqsave(&s->lock, flags);
2190                 if (val)
2191                         s->sctrl |= SCTRL_P1SMB;
2192                 else
2193                         s->sctrl &= ~SCTRL_P1SMB;
2194                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2195                 spin_unlock_irqrestore(&s->lock, flags);
2196                 return 0;
2197
2198         case SNDCTL_DSP_CHANNELS:
2199                 if (get_user(val, p))
2200                         return -EFAULT;
2201                 if (val != 0) {
2202                         stop_dac1(s);
2203                         s->dma_dac1.ready = 0;
2204                         spin_lock_irqsave(&s->lock, flags);
2205                         if (val >= 2)
2206                                 s->sctrl |= SCTRL_P1SMB;
2207                         else
2208                                 s->sctrl &= ~SCTRL_P1SMB;
2209                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2210                         spin_unlock_irqrestore(&s->lock, flags);
2211                 }
2212                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
2213
2214         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2215                 return put_user(AFMT_S16_LE|AFMT_U8, p);
2216
2217         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2218                 if (get_user(val, p))
2219                         return -EFAULT;
2220                 if (val != AFMT_QUERY) {
2221                         stop_dac1(s);
2222                         s->dma_dac1.ready = 0;
2223                         spin_lock_irqsave(&s->lock, flags);
2224                         if (val == AFMT_S16_LE)
2225                                 s->sctrl |= SCTRL_P1SEB;
2226                         else
2227                                 s->sctrl &= ~SCTRL_P1SEB;
2228                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2229                         spin_unlock_irqrestore(&s->lock, flags);
2230                 }
2231                 return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, p);
2232
2233         case SNDCTL_DSP_POST:
2234                 return 0;
2235
2236         case SNDCTL_DSP_GETTRIGGER:
2237                 return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, p);
2238
2239         case SNDCTL_DSP_SETTRIGGER:
2240                 if (get_user(val, p))
2241                         return -EFAULT;
2242                 if (val & PCM_ENABLE_OUTPUT) {
2243                         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2244                                 return ret;
2245                         s->dma_dac1.enabled = 1;
2246                         start_dac1(s);
2247                 } else {
2248                         s->dma_dac1.enabled = 0;
2249                         stop_dac1(s);
2250                 }
2251                 return 0;
2252
2253         case SNDCTL_DSP_GETOSPACE:
2254                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2255                         return val;
2256                 spin_lock_irqsave(&s->lock, flags);
2257                 es1371_update_ptr(s);
2258                 abinfo.fragsize = s->dma_dac1.fragsize;
2259                 count = s->dma_dac1.count;
2260                 if (count < 0)
2261                         count = 0;
2262                 abinfo.bytes = s->dma_dac1.dmasize - count;
2263                 abinfo.fragstotal = s->dma_dac1.numfrag;
2264                 abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
2265                 spin_unlock_irqrestore(&s->lock, flags);
2266                 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2267
2268         case SNDCTL_DSP_NONBLOCK:
2269                 file->f_flags |= O_NONBLOCK;
2270                 return 0;
2271
2272         case SNDCTL_DSP_GETODELAY:
2273                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2274                         return val;
2275                 spin_lock_irqsave(&s->lock, flags);
2276                 es1371_update_ptr(s);
2277                 count = s->dma_dac1.count;
2278                 spin_unlock_irqrestore(&s->lock, flags);
2279                 if (count < 0)
2280                         count = 0;
2281                 return put_user(count, p);
2282
2283         case SNDCTL_DSP_GETOPTR:
2284                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2285                         return val;
2286                 spin_lock_irqsave(&s->lock, flags);
2287                 es1371_update_ptr(s);
2288                 cinfo.bytes = s->dma_dac1.total_bytes;
2289                 count = s->dma_dac1.count;
2290                 if (count < 0)
2291                         count = 0;
2292                 cinfo.blocks = count >> s->dma_dac1.fragshift;
2293                 cinfo.ptr = s->dma_dac1.hwptr;
2294                 if (s->dma_dac1.mapped)
2295                         s->dma_dac1.count &= s->dma_dac1.fragsize-1;
2296                 spin_unlock_irqrestore(&s->lock, flags);
2297                 if (copy_to_user((void __user *)arg, &cinfo, sizeof(cinfo)))
2298                         return -EFAULT;
2299                 return 0;
2300
2301         case SNDCTL_DSP_GETBLKSIZE:
2302                 if ((val = prog_dmabuf_dac1(s)))
2303                         return val;
2304                 return put_user(s->dma_dac1.fragsize, p);
2305
2306         case SNDCTL_DSP_SETFRAGMENT:
2307                 if (get_user(val, p))
2308                         return -EFAULT;
2309                 s->dma_dac1.ossfragshift = val & 0xffff;
2310                 s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
2311                 if (s->dma_dac1.ossfragshift < 4)
2312                         s->dma_dac1.ossfragshift = 4;
2313                 if (s->dma_dac1.ossfragshift > 15)
2314                         s->dma_dac1.ossfragshift = 15;
2315                 if (s->dma_dac1.ossmaxfrags < 4)
2316                         s->dma_dac1.ossmaxfrags = 4;
2317                 return 0;
2318
2319         case SNDCTL_DSP_SUBDIVIDE:
2320                 if (s->dma_dac1.subdivision)
2321                         return -EINVAL;
2322                 if (get_user(val, p))
2323                         return -EFAULT;
2324                 if (val != 1 && val != 2 && val != 4)
2325                         return -EINVAL;
2326                 s->dma_dac1.subdivision = val;
2327                 return 0;
2328
2329         case SOUND_PCM_READ_RATE:
2330                 return put_user(s->dac1rate, p);
2331
2332         case SOUND_PCM_READ_CHANNELS:
2333                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
2334
2335         case SOUND_PCM_READ_BITS:
2336                 return put_user((s->sctrl & SCTRL_P1SEB) ? 16 : 8, p);
2337
2338         case SOUND_PCM_WRITE_FILTER:
2339         case SNDCTL_DSP_SETSYNCRO:
2340         case SOUND_PCM_READ_FILTER:
2341                 return -EINVAL;
2342
2343         }
2344         return mixdev_ioctl(s->codec, cmd, arg);
2345 }
2346
2347 static int es1371_open_dac(struct inode *inode, struct file *file)
2348 {
2349         int minor = iminor(inode);
2350         DECLARE_WAITQUEUE(wait, current);
2351         unsigned long flags;
2352         struct list_head *list;
2353         struct es1371_state *s;
2354
2355         for (list = devs.next; ; list = list->next) {
2356                 if (list == &devs)
2357                         return -ENODEV;
2358                 s = list_entry(list, struct es1371_state, devs);
2359                 if (!((s->dev_dac ^ minor) & ~0xf))
2360                         break;
2361         }
2362         VALIDATE_STATE(s);
2363         /* we allow opening with O_RDWR, most programs do it although they will only write */
2364 #if 0
2365         if (file->f_mode & FMODE_READ)
2366                 return -EPERM;
2367 #endif
2368         if (!(file->f_mode & FMODE_WRITE))
2369                 return -EINVAL;
2370         file->private_data = s;
2371         /* wait for device to become free */
2372         down(&s->open_sem);
2373         while (s->open_mode & FMODE_DAC) {
2374                 if (file->f_flags & O_NONBLOCK) {
2375                         up(&s->open_sem);
2376                         return -EBUSY;
2377                 }
2378                 add_wait_queue(&s->open_wait, &wait);
2379                 __set_current_state(TASK_INTERRUPTIBLE);
2380                 up(&s->open_sem);
2381                 schedule();
2382                 remove_wait_queue(&s->open_wait, &wait);
2383                 set_current_state(TASK_RUNNING);
2384                 if (signal_pending(current))
2385                         return -ERESTARTSYS;
2386                 down(&s->open_sem);
2387         }
2388         s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
2389         s->dma_dac1.enabled = 1;
2390         set_dac1_rate(s, 8000);
2391         spin_lock_irqsave(&s->lock, flags);
2392         s->sctrl &= ~SCTRL_P1FMT;
2393         if ((minor & 0xf) == SND_DEV_DSP16)
2394                 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P1FMT;
2395         else
2396                 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P1FMT;
2397         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2398         spin_unlock_irqrestore(&s->lock, flags);
2399         s->open_mode |= FMODE_DAC;
2400         up(&s->open_sem);
2401         return nonseekable_open(inode, file);
2402 }
2403
2404 static int es1371_release_dac(struct inode *inode, struct file *file)
2405 {
2406         struct es1371_state *s = (struct es1371_state *)file->private_data;
2407
2408         VALIDATE_STATE(s);
2409         lock_kernel();
2410         drain_dac1(s, file->f_flags & O_NONBLOCK);
2411         down(&s->open_sem);
2412         stop_dac1(s);
2413         dealloc_dmabuf(s, &s->dma_dac1);
2414         s->open_mode &= ~FMODE_DAC;
2415         up(&s->open_sem);
2416         wake_up(&s->open_wait);
2417         unlock_kernel();
2418         return 0;
2419 }
2420
2421 static /*const*/ struct file_operations es1371_dac_fops = {
2422         .owner          = THIS_MODULE,
2423         .llseek         = no_llseek,
2424         .write          = es1371_write_dac,
2425         .poll           = es1371_poll_dac,
2426         .ioctl          = es1371_ioctl_dac,
2427         .mmap           = es1371_mmap_dac,
2428         .open           = es1371_open_dac,
2429         .release        = es1371_release_dac,
2430 };
2431
2432 /* --------------------------------------------------------------------- */
2433
2434 static ssize_t es1371_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2435 {
2436         struct es1371_state *s = (struct es1371_state *)file->private_data;
2437         DECLARE_WAITQUEUE(wait, current);
2438         ssize_t ret;
2439         unsigned long flags;
2440         unsigned ptr;
2441         int cnt;
2442
2443         VALIDATE_STATE(s);
2444         if (!access_ok(VERIFY_WRITE, buffer, count))
2445                 return -EFAULT;
2446         if (count == 0)
2447                 return 0;
2448         ret = 0;
2449         add_wait_queue(&s->midi.iwait, &wait);
2450         while (count > 0) {
2451                 spin_lock_irqsave(&s->lock, flags);
2452                 ptr = s->midi.ird;
2453                 cnt = MIDIINBUF - ptr;
2454                 if (s->midi.icnt < cnt)
2455                         cnt = s->midi.icnt;
2456                 if (cnt <= 0)
2457                         __set_current_state(TASK_INTERRUPTIBLE);
2458                 spin_unlock_irqrestore(&s->lock, flags);
2459                 if (cnt > count)
2460                         cnt = count;
2461                 if (cnt <= 0) {
2462                         if (file->f_flags & O_NONBLOCK) {
2463                                 if (!ret)
2464                                         ret = -EAGAIN;
2465                                 break;
2466                         }
2467                         schedule();
2468                         if (signal_pending(current)) {
2469                                 if (!ret)
2470                                         ret = -ERESTARTSYS;
2471                                 break;
2472                         }
2473                         continue;
2474                 }
2475                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2476                         if (!ret)
2477                                 ret = -EFAULT;
2478                         break;
2479                 }
2480                 ptr = (ptr + cnt) % MIDIINBUF;
2481                 spin_lock_irqsave(&s->lock, flags);
2482                 s->midi.ird = ptr;
2483                 s->midi.icnt -= cnt;
2484                 spin_unlock_irqrestore(&s->lock, flags);
2485                 count -= cnt;
2486                 buffer += cnt;
2487                 ret += cnt;
2488                 break;
2489         }
2490         __set_current_state(TASK_RUNNING);
2491         remove_wait_queue(&s->midi.iwait, &wait);
2492         return ret;
2493 }
2494
2495 static ssize_t es1371_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2496 {
2497         struct es1371_state *s = (struct es1371_state *)file->private_data;
2498         DECLARE_WAITQUEUE(wait, current);
2499         ssize_t ret;
2500         unsigned long flags;
2501         unsigned ptr;
2502         int cnt;
2503
2504         VALIDATE_STATE(s);
2505         if (!access_ok(VERIFY_READ, buffer, count))
2506                 return -EFAULT;
2507         if (count == 0)
2508                 return 0;
2509         ret = 0;
2510         add_wait_queue(&s->midi.owait, &wait);
2511         while (count > 0) {
2512                 spin_lock_irqsave(&s->lock, flags);
2513                 ptr = s->midi.owr;
2514                 cnt = MIDIOUTBUF - ptr;
2515                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2516                         cnt = MIDIOUTBUF - s->midi.ocnt;
2517                 if (cnt <= 0) {
2518                         __set_current_state(TASK_INTERRUPTIBLE);
2519                         es1371_handle_midi(s);
2520                 }
2521                 spin_unlock_irqrestore(&s->lock, flags);
2522                 if (cnt > count)
2523                         cnt = count;
2524                 if (cnt <= 0) {
2525                         if (file->f_flags & O_NONBLOCK) {
2526                                 if (!ret)
2527                                         ret = -EAGAIN;
2528                                 break;
2529                         }
2530                         schedule();
2531                         if (signal_pending(current)) {
2532                                 if (!ret)
2533                                         ret = -ERESTARTSYS;
2534                                 break;
2535                         }
2536                         continue;
2537                 }
2538                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2539                         if (!ret)
2540                                 ret = -EFAULT;
2541                         break;
2542                 }
2543                 ptr = (ptr + cnt) % MIDIOUTBUF;
2544                 spin_lock_irqsave(&s->lock, flags);
2545                 s->midi.owr = ptr;
2546                 s->midi.ocnt += cnt;
2547                 spin_unlock_irqrestore(&s->lock, flags);
2548                 count -= cnt;
2549                 buffer += cnt;
2550                 ret += cnt;
2551                 spin_lock_irqsave(&s->lock, flags);
2552                 es1371_handle_midi(s);
2553                 spin_unlock_irqrestore(&s->lock, flags);
2554         }
2555         __set_current_state(TASK_RUNNING);
2556         remove_wait_queue(&s->midi.owait, &wait);
2557         return ret;
2558 }
2559
2560 /* No kernel lock - we have our own spinlock */
2561 static unsigned int es1371_midi_poll(struct file *file, struct poll_table_struct *wait)
2562 {
2563         struct es1371_state *s = (struct es1371_state *)file->private_data;
2564         unsigned long flags;
2565         unsigned int mask = 0;
2566
2567         VALIDATE_STATE(s);
2568         if (file->f_mode & FMODE_WRITE)
2569                 poll_wait(file, &s->midi.owait, wait);
2570         if (file->f_mode & FMODE_READ)
2571                 poll_wait(file, &s->midi.iwait, wait);
2572         spin_lock_irqsave(&s->lock, flags);
2573         if (file->f_mode & FMODE_READ) {
2574                 if (s->midi.icnt > 0)
2575                         mask |= POLLIN | POLLRDNORM;
2576         }
2577         if (file->f_mode & FMODE_WRITE) {
2578                 if (s->midi.ocnt < MIDIOUTBUF)
2579                         mask |= POLLOUT | POLLWRNORM;
2580         }
2581         spin_unlock_irqrestore(&s->lock, flags);
2582         return mask;
2583 }
2584
2585 static int es1371_midi_open(struct inode *inode, struct file *file)
2586 {
2587         int minor = iminor(inode);
2588         DECLARE_WAITQUEUE(wait, current);
2589         unsigned long flags;
2590         struct list_head *list;
2591         struct es1371_state *s;
2592
2593         for (list = devs.next; ; list = list->next) {
2594                 if (list == &devs)
2595                         return -ENODEV;
2596                 s = list_entry(list, struct es1371_state, devs);
2597                 if (s->dev_midi == minor)
2598                         break;
2599         }
2600         VALIDATE_STATE(s);
2601         file->private_data = s;
2602         /* wait for device to become free */
2603         down(&s->open_sem);
2604         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2605                 if (file->f_flags & O_NONBLOCK) {
2606                         up(&s->open_sem);
2607                         return -EBUSY;
2608                 }
2609                 add_wait_queue(&s->open_wait, &wait);
2610                 __set_current_state(TASK_INTERRUPTIBLE);
2611                 up(&s->open_sem);
2612                 schedule();
2613                 remove_wait_queue(&s->open_wait, &wait);
2614                 set_current_state(TASK_RUNNING);
2615                 if (signal_pending(current))
2616                         return -ERESTARTSYS;
2617                 down(&s->open_sem);
2618         }
2619         spin_lock_irqsave(&s->lock, flags);
2620         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2621                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2622                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2623                 outb(UCTRL_CNTRL_SWR, s->io+ES1371_REG_UART_CONTROL);
2624                 outb(0, s->io+ES1371_REG_UART_CONTROL);
2625                 outb(0, s->io+ES1371_REG_UART_TEST);
2626         }
2627         if (file->f_mode & FMODE_READ) {
2628                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2629         }
2630         if (file->f_mode & FMODE_WRITE) {
2631                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2632         }
2633         s->ctrl |= CTRL_UART_EN;
2634         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2635         es1371_handle_midi(s);
2636         spin_unlock_irqrestore(&s->lock, flags);
2637         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2638         up(&s->open_sem);
2639         return nonseekable_open(inode, file);
2640 }
2641
2642 static int es1371_midi_release(struct inode *inode, struct file *file)
2643 {
2644         struct es1371_state *s = (struct es1371_state *)file->private_data;
2645         DECLARE_WAITQUEUE(wait, current);
2646         unsigned long flags;
2647         unsigned count, tmo;
2648
2649         VALIDATE_STATE(s);
2650         lock_kernel();
2651         if (file->f_mode & FMODE_WRITE) {
2652                 add_wait_queue(&s->midi.owait, &wait);
2653                 for (;;) {
2654                         __set_current_state(TASK_INTERRUPTIBLE);
2655                         spin_lock_irqsave(&s->lock, flags);
2656                         count = s->midi.ocnt;
2657                         spin_unlock_irqrestore(&s->lock, flags);
2658                         if (count <= 0)
2659                                 break;
2660                         if (signal_pending(current))
2661                                 break;
2662                         if (file->f_flags & O_NONBLOCK)
2663                                 break;
2664                         tmo = (count * HZ) / 3100;
2665                         if (!schedule_timeout(tmo ? : 1) && tmo)
2666                                 printk(KERN_DEBUG PFX "midi timed out??\n");
2667                 }
2668                 remove_wait_queue(&s->midi.owait, &wait);
2669                 set_current_state(TASK_RUNNING);
2670         }
2671         down(&s->open_sem);
2672         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2673         spin_lock_irqsave(&s->lock, flags);
2674         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2675                 s->ctrl &= ~CTRL_UART_EN;
2676                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2677         }
2678         spin_unlock_irqrestore(&s->lock, flags);
2679         up(&s->open_sem);
2680         wake_up(&s->open_wait);
2681         unlock_kernel();
2682         return 0;
2683 }
2684
2685 static /*const*/ struct file_operations es1371_midi_fops = {
2686         .owner          = THIS_MODULE,
2687         .llseek         = no_llseek,
2688         .read           = es1371_midi_read,
2689         .write          = es1371_midi_write,
2690         .poll           = es1371_midi_poll,
2691         .open           = es1371_midi_open,
2692         .release        = es1371_midi_release,
2693 };
2694
2695 /* --------------------------------------------------------------------- */
2696
2697 /*
2698  * for debugging purposes, we'll create a proc device that dumps the
2699  * CODEC chipstate
2700  */
2701
2702 #ifdef ES1371_DEBUG
2703 static int proc_es1371_dump (char *buf, char **start, off_t fpos, int length, int *eof, void *data)
2704 {
2705         struct es1371_state *s;
2706         int cnt, len = 0;
2707
2708         if (list_empty(&devs))
2709                 return 0;
2710         s = list_entry(devs.next, struct es1371_state, devs);
2711         /* print out header */
2712         len += sprintf(buf + len, "\t\tCreative ES137x Debug Dump-o-matic\n");
2713
2714         /* print out CODEC state */
2715         len += sprintf (buf + len, "AC97 CODEC state\n");
2716         for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
2717                 len+= sprintf (buf + len, "reg:0x%02x  val:0x%04x\n", cnt, rdcodec(s->codec, cnt));
2718
2719         if (fpos >=len){
2720                 *start = buf;
2721                 *eof =1;
2722                 return 0;
2723         }
2724         *start = buf + fpos;
2725         if ((len -= fpos) > length)
2726                 return length;
2727         *eof =1;
2728         return len;
2729
2730 }
2731 #endif /* ES1371_DEBUG */
2732
2733 /* --------------------------------------------------------------------- */
2734
2735 /* maximum number of devices; only used for command line params */
2736 #define NR_DEVICE 5
2737
2738 static int spdif[NR_DEVICE];
2739 static int nomix[NR_DEVICE];
2740 static int amplifier[NR_DEVICE];
2741
2742 static unsigned int devindex;
2743
2744 module_param_array(spdif, bool, NULL, 0);
2745 MODULE_PARM_DESC(spdif, "if 1 the output is in S/PDIF digital mode");
2746 module_param_array(nomix, bool, NULL, 0);
2747 MODULE_PARM_DESC(nomix, "if 1 no analog audio is mixed to the digital output");
2748 module_param_array(amplifier, bool, NULL, 0);
2749 MODULE_PARM_DESC(amplifier, "Set to 1 if the machine needs the amp control enabling (many laptops)");
2750
2751 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2752 MODULE_DESCRIPTION("ES1371 AudioPCI97 Driver");
2753 MODULE_LICENSE("GPL");
2754
2755
2756 /* --------------------------------------------------------------------- */
2757
2758 static struct initvol {
2759         int mixch;
2760         int vol;
2761 } initvol[] __devinitdata = {
2762         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2763         { SOUND_MIXER_WRITE_CD, 0x4040 },
2764         { MIXER_WRITE(SOUND_MIXER_VIDEO), 0x4040 },
2765         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2766         { SOUND_MIXER_WRITE_PCM, 0x4040 },
2767         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2768         { MIXER_WRITE(SOUND_MIXER_PHONEOUT), 0x4040 },
2769         { SOUND_MIXER_WRITE_OGAIN, 0x4040 },
2770         { MIXER_WRITE(SOUND_MIXER_PHONEIN), 0x4040 },
2771         { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2772         { SOUND_MIXER_WRITE_MIC, 0x4040 },
2773         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2774         { SOUND_MIXER_WRITE_IGAIN, 0x4040 }
2775 };
2776
2777 static struct
2778 {
2779         short svid, sdid;
2780 } amplifier_needed[] =
2781 {
2782         { 0x107B, 0x2150 },             /* Gateway Solo 2150 */
2783         { 0x13BD, 0x100C },             /* Mebius PC-MJ100V */
2784         { 0x1102, 0x5938 },             /* Targa Xtender 300 */
2785         { 0x1102, 0x8938 },             /* IPC notebook */
2786         { PCI_ANY_ID, PCI_ANY_ID }
2787 };
2788
2789 static int __devinit es1371_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2790 {
2791         struct es1371_state *s;
2792         struct gameport *gp;
2793         mm_segment_t fs;
2794         int i, gpio, val, res = -1;
2795         int idx;
2796         unsigned long tmo;
2797         signed long tmo2;
2798         unsigned int cssr;
2799
2800         if ((res=pci_enable_device(pcidev)))
2801                 return res;
2802
2803         if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO))
2804                 return -ENODEV;
2805         if (pcidev->irq == 0)
2806                 return -ENODEV;
2807         i = pci_set_dma_mask(pcidev, 0xffffffff);
2808         if (i) {
2809                 printk(KERN_WARNING "es1371: architecture does not support 32bit PCI busmaster DMA\n");
2810                 return i;
2811         }
2812         if (!(s = kmalloc(sizeof(struct es1371_state), GFP_KERNEL))) {
2813                 printk(KERN_WARNING PFX "out of memory\n");
2814                 return -ENOMEM;
2815         }
2816         memset(s, 0, sizeof(struct es1371_state));
2817
2818         s->codec = ac97_alloc_codec();
2819         if(s->codec == NULL)
2820                 goto err_codec;
2821
2822         init_waitqueue_head(&s->dma_adc.wait);
2823         init_waitqueue_head(&s->dma_dac1.wait);
2824         init_waitqueue_head(&s->dma_dac2.wait);
2825         init_waitqueue_head(&s->open_wait);
2826         init_waitqueue_head(&s->midi.iwait);
2827         init_waitqueue_head(&s->midi.owait);
2828         init_MUTEX(&s->open_sem);
2829         spin_lock_init(&s->lock);
2830         s->magic = ES1371_MAGIC;
2831         s->dev = pcidev;
2832         s->io = pci_resource_start(pcidev, 0);
2833         s->irq = pcidev->irq;
2834         s->vendor = pcidev->vendor;
2835         s->device = pcidev->device;
2836         pci_read_config_byte(pcidev, PCI_REVISION_ID, &s->rev);
2837         s->codec->private_data = s;
2838         s->codec->id = 0;
2839         s->codec->codec_read = rdcodec;
2840         s->codec->codec_write = wrcodec;
2841         printk(KERN_INFO PFX "found chip, vendor id 0x%04x device id 0x%04x revision 0x%02x\n",
2842                s->vendor, s->device, s->rev);
2843         if (!request_region(s->io, ES1371_EXTENT, "es1371")) {
2844                 printk(KERN_ERR PFX "io ports %#lx-%#lx in use\n", s->io, s->io+ES1371_EXTENT-1);
2845                 res = -EBUSY;
2846                 goto err_region;
2847         }
2848         if ((res=request_irq(s->irq, es1371_interrupt, SA_SHIRQ, "es1371",s))) {
2849                 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
2850                 goto err_irq;
2851         }
2852         printk(KERN_INFO PFX "found es1371 rev %d at io %#lx irq %u\n",
2853                s->rev, s->io, s->irq);
2854         /* register devices */
2855         if ((res=(s->dev_audio = register_sound_dsp(&es1371_audio_fops,-1)))<0)
2856                 goto err_dev1;
2857         if ((res=(s->codec->dev_mixer = register_sound_mixer(&es1371_mixer_fops, -1))) < 0)
2858                 goto err_dev2;
2859         if ((res=(s->dev_dac = register_sound_dsp(&es1371_dac_fops, -1))) < 0)
2860                 goto err_dev3;
2861         if ((res=(s->dev_midi = register_sound_midi(&es1371_midi_fops, -1)))<0 )
2862                 goto err_dev4;
2863 #ifdef ES1371_DEBUG
2864         /* initialize the debug proc device */
2865         s->ps = create_proc_read_entry("es1371",0,NULL,proc_es1371_dump,NULL);
2866 #endif /* ES1371_DEBUG */
2867
2868         /* initialize codec registers */
2869         s->ctrl = 0;
2870
2871         /* Check amplifier requirements */
2872
2873         if (amplifier[devindex])
2874                 s->ctrl |= CTRL_GPIO_OUT0;
2875         else for(idx = 0; amplifier_needed[idx].svid != PCI_ANY_ID; idx++)
2876         {
2877                 if(pcidev->subsystem_vendor == amplifier_needed[idx].svid &&
2878                    pcidev->subsystem_device == amplifier_needed[idx].sdid)
2879                 {
2880                         s->ctrl |= CTRL_GPIO_OUT0;   /* turn internal amplifier on */
2881                         printk(KERN_INFO PFX "Enabling internal amplifier.\n");
2882                 }
2883         }
2884
2885         for (gpio = 0x218; gpio >= 0x200; gpio -= 0x08)
2886                 if (request_region(gpio, JOY_EXTENT, "es1371"))
2887                         break;
2888
2889         if (gpio < 0x200) {
2890                 printk(KERN_ERR PFX "no free joystick address found\n");
2891         } else if (!(s->gameport = gp = gameport_allocate_port())) {
2892                 printk(KERN_ERR PFX "can not allocate memory for gameport\n");
2893                 release_region(gpio, JOY_EXTENT);
2894         } else {
2895                 gameport_set_name(gp, "ESS1371 Gameport");
2896                 gameport_set_phys(gp, "isa%04x/gameport0", gpio);
2897                 gp->dev.parent = &s->dev->dev;
2898                 gp->io = gpio;
2899                 s->ctrl |= CTRL_JYSTK_EN | (((gpio >> 3) & CTRL_JOY_MASK) << CTRL_JOY_SHIFT);
2900         }
2901
2902         s->sctrl = 0;
2903         cssr = 0;
2904         s->spdif_volume = -1;
2905         /* check to see if s/pdif mode is being requested */
2906         if (spdif[devindex]) {
2907                 if (s->rev >= 4) {
2908                         printk(KERN_INFO PFX "enabling S/PDIF output\n");
2909                         s->spdif_volume = 0;
2910                         cssr |= STAT_EN_SPDIF;
2911                         s->ctrl |= CTRL_SPDIFEN_B;
2912                         if (nomix[devindex]) /* don't mix analog inputs to s/pdif output */
2913                                 s->ctrl |= CTRL_RECEN_B;
2914                 } else {
2915                         printk(KERN_ERR PFX "revision %d does not support S/PDIF\n", s->rev);
2916                 }
2917         }
2918         /* initialize the chips */
2919         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2920         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2921         outl(LEGACY_JFAST, s->io+ES1371_REG_LEGACY);
2922         pci_set_master(pcidev);  /* enable bus mastering */
2923         /* if we are a 5880 turn on the AC97 */
2924         if (s->vendor == PCI_VENDOR_ID_ENSONIQ &&
2925             ((s->device == PCI_DEVICE_ID_ENSONIQ_CT5880 && s->rev >= CT5880REV_CT5880_C) ||
2926              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_CT5880_A) ||
2927              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_ES1373_8))) {
2928                 cssr |= CSTAT_5880_AC97_RST;
2929                 outl(cssr, s->io+ES1371_REG_STATUS);
2930                 /* need to delay around 20ms(bleech) to give
2931                    some CODECs enough time to wakeup */
2932                 tmo = jiffies + (HZ / 50) + 1;
2933                 for (;;) {
2934                         tmo2 = tmo - jiffies;
2935                         if (tmo2 <= 0)
2936                                 break;
2937                         schedule_timeout(tmo2);
2938                 }
2939         }
2940         /* AC97 warm reset to start the bitclk */
2941         outl(s->ctrl | CTRL_SYNCRES, s->io+ES1371_REG_CONTROL);
2942         udelay(2);
2943         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2944         /* init the sample rate converter */
2945         src_init(s);
2946         /* codec init */
2947         if (!ac97_probe_codec(s->codec)) {
2948                 res = -ENODEV;
2949                 goto err_gp;
2950         }
2951         /* set default values */
2952
2953         fs = get_fs();
2954         set_fs(KERNEL_DS);
2955         val = SOUND_MASK_LINE;
2956         mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2957         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2958                 val = initvol[i].vol;
2959                 mixdev_ioctl(s->codec, initvol[i].mixch, (unsigned long)&val);
2960         }
2961         /* mute master and PCM when in S/PDIF mode */
2962         if (s->spdif_volume != -1) {
2963                 val = 0x0000;
2964                 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_VOLUME, (unsigned long)&val);
2965                 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_PCM, (unsigned long)&val);
2966         }
2967         set_fs(fs);
2968         /* turn on S/PDIF output driver if requested */
2969         outl(cssr, s->io+ES1371_REG_STATUS);
2970
2971         /* register gameport */
2972         if (s->gameport)
2973                 gameport_register_port(s->gameport);
2974
2975         /* store it in the driver field */
2976         pci_set_drvdata(pcidev, s);
2977         /* put it into driver list */
2978         list_add_tail(&s->devs, &devs);
2979         /* increment devindex */
2980         if (devindex < NR_DEVICE-1)
2981                 devindex++;
2982         return 0;
2983
2984  err_gp:
2985         if (s->gameport) {
2986                 release_region(s->gameport->io, JOY_EXTENT);
2987                 gameport_free_port(s->gameport);
2988         }
2989 #ifdef ES1371_DEBUG
2990         if (s->ps)
2991                 remove_proc_entry("es1371", NULL);
2992 #endif
2993         unregister_sound_midi(s->dev_midi);
2994  err_dev4:
2995         unregister_sound_dsp(s->dev_dac);
2996  err_dev3:
2997         unregister_sound_mixer(s->codec->dev_mixer);
2998  err_dev2:
2999         unregister_sound_dsp(s->dev_audio);
3000  err_dev1:
3001         printk(KERN_ERR PFX "cannot register misc device\n");
3002         free_irq(s->irq, s);
3003  err_irq:
3004         release_region(s->io, ES1371_EXTENT);
3005  err_region:
3006  err_codec:
3007         ac97_release_codec(s->codec);
3008         kfree(s);
3009         return res;
3010 }
3011
3012 static void __devexit es1371_remove(struct pci_dev *dev)
3013 {
3014         struct es1371_state *s = pci_get_drvdata(dev);
3015
3016         if (!s)
3017                 return;
3018         list_del(&s->devs);
3019 #ifdef ES1371_DEBUG
3020         if (s->ps)
3021                 remove_proc_entry("es1371", NULL);
3022 #endif /* ES1371_DEBUG */
3023         outl(0, s->io+ES1371_REG_CONTROL); /* switch everything off */
3024         outl(0, s->io+ES1371_REG_SERIAL_CONTROL); /* clear serial interrupts */
3025         synchronize_irq(s->irq);
3026         free_irq(s->irq, s);
3027         if (s->gameport) {
3028                 int gpio = s->gameport->io;
3029                 gameport_unregister_port(s->gameport);
3030                 release_region(gpio, JOY_EXTENT);
3031         }
3032         release_region(s->io, ES1371_EXTENT);
3033         unregister_sound_dsp(s->dev_audio);
3034         unregister_sound_mixer(s->codec->dev_mixer);
3035         unregister_sound_dsp(s->dev_dac);
3036         unregister_sound_midi(s->dev_midi);
3037         ac97_release_codec(s->codec);
3038         kfree(s);
3039         pci_set_drvdata(dev, NULL);
3040 }
3041
3042 static struct pci_device_id id_table[] = {
3043         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3044         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3045         { PCI_VENDOR_ID_ECTIVA, PCI_DEVICE_ID_ECTIVA_EV1938, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3046         { 0, }
3047 };
3048
3049 MODULE_DEVICE_TABLE(pci, id_table);
3050
3051 static struct pci_driver es1371_driver = {
3052         .name           = "es1371",
3053         .id_table       = id_table,
3054         .probe          = es1371_probe,
3055         .remove         = __devexit_p(es1371_remove),
3056 };
3057
3058 static int __init init_es1371(void)
3059 {
3060         printk(KERN_INFO PFX "version v0.32 time " __TIME__ " " __DATE__ "\n");
3061         return pci_module_init(&es1371_driver);
3062 }
3063
3064 static void __exit cleanup_es1371(void)
3065 {
3066         printk(KERN_INFO PFX "unloading\n");
3067         pci_unregister_driver(&es1371_driver);
3068 }
3069
3070 module_init(init_es1371);
3071 module_exit(cleanup_es1371);
3072
3073 /* --------------------------------------------------------------------- */
3074
3075 #ifndef MODULE
3076
3077 /* format is: es1371=[spdif,[nomix,[amplifier]]] */
3078
3079 static int __init es1371_setup(char *str)
3080 {
3081         static unsigned __initdata nr_dev = 0;
3082
3083         if (nr_dev >= NR_DEVICE)
3084                 return 0;
3085
3086         (void)
3087         ((get_option(&str, &spdif[nr_dev]) == 2)
3088          && (get_option(&str, &nomix[nr_dev]) == 2)
3089          && (get_option(&str, &amplifier[nr_dev])));
3090
3091         nr_dev++;
3092         return 1;
3093 }
3094
3095 __setup("es1371=", es1371_setup);
3096
3097 #endif /* MODULE */