sound/oss/es1371.c

   1 /*****************************************************************************/
   2
   3 /*
   4  *      es1371.c  --  Creative Ensoniq ES1371.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Special thanks to Ensoniq
  23  *
  24  *  Supported devices:
  25  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  26  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  27  *  /dev/dsp1   additional DAC, like /dev/dsp, but outputs to mixer "SYNTH" setting
  28  *  /dev/midi   simple MIDI UART interface, no ioctl
  29  *
  30  *  NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
  31  *  to be done in software. That is what /dev/dac is for. By now (Q2 1998)
  32  *  there are several MIDI to PCM (WAV) packages, one of them is timidity.
  33  *
  34  *  Revision history
  35  *    04.06.1998   0.1   Initial release
  36  *                       Mixer stuff should be overhauled; especially optional AC97 mixer bits
  37  *                       should be detected. This results in strange behaviour of some mixer
  38  *                       settings, like master volume and mic.
  39  *    08.06.1998   0.2   First release using Alan Cox' soundcore instead of miscdevice
  40  *    03.08.1998   0.3   Do not include modversions.h
  41  *                       Now mixer behaviour can basically be selected between
  42  *                       "OSS documented" and "OSS actual" behaviour
  43  *    31.08.1998   0.4   Fix realplayer problems - dac.count issues
  44  *    27.10.1998   0.5   Fix joystick support
  45  *                       -- Oliver Neukum (c188@org.chemie.uni-muenchen.de)
  46  *    10.12.1998   0.6   Fix drain_dac trying to wait on not yet initialized DMA
  47  *    23.12.1998   0.7   Fix a few f_file & FMODE_ bugs
  48  *                       Don't wake up app until there are fragsize bytes to read/write
  49  *    06.01.1999   0.8   remove the silly SA_INTERRUPT flag.
  50  *                       hopefully killed the egcs section type conflict
  51  *    12.03.1999   0.9   cinfo.blocks should be reset after GETxPTR ioctl.
  52  *                       reported by Johan Maes <joma@telindus.be>
  53  *    22.03.1999   0.10  return EAGAIN instead of EBUSY when O_NONBLOCK
  54  *                       read/write cannot be executed
  55  *    07.04.1999   0.11  implemented the following ioctl's: SOUND_PCM_READ_RATE,
  56  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  57  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  58  *                       Another Alpha fix (wait_src_ready in init routine)
  59  *                       reported by "Ivan N. Kokshaysky" <ink@jurassic.park.msu.ru>
  60  *                       Note: joystick address handling might still be wrong on archs
  61  *                       other than i386
  62  *    15.06.1999   0.12  Fix bad allocation bug.
  63  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  64  *    28.06.1999   0.13  Add pci_set_master
  65  *    03.08.1999   0.14  adapt to Linus' new __setup/__initcall
  66  *                       added kernel command line option "es1371=joystickaddr"
  67  *                       removed CONFIG_SOUND_ES1371_JOYPORT_BOOT kludge
  68  *    10.08.1999   0.15  (Re)added S/PDIF module option for cards revision >= 4.
  69  *                       Initial version by Dave Platt <dplatt@snulbug.mtview.ca.us>.
  70  *                       module_init/__setup fixes
  71  *    08.16.1999   0.16  Joe Cotellese <joec@ensoniq.com>
  72  *                       Added detection for ES1371 revision ID so that we can
  73  *                       detect the ES1373 and later parts.
  74  *                       added AC97 #defines for readability
  75  *                       added a /proc file system for dumping hardware state
  76  *                       updated SRC and CODEC w/r functions to accommodate bugs
  77  *                       in some versions of the ES137x chips.
  78  *    31.08.1999   0.17  add spin_lock_init
  79  *                       replaced current->state = x with set_current_state(x)
  80  *    03.09.1999   0.18  change read semantics for MIDI to match
  81  *                       OSS more closely; remove possible wakeup race
  82  *    21.10.1999   0.19  Round sampling rates, requested by
  83  *                       Kasamatsu Kenichi <t29w0267@ip.media.kyoto-u.ac.jp>
  84  *    27.10.1999   0.20  Added SigmaTel 3D enhancement string
  85  *                       Codec ID printing changes
  86  *    28.10.1999   0.21  More waitqueue races fixed
  87  *                       Joe Cotellese <joec@ensoniq.com>
  88  *                       Changed PCI detection routine so we can more easily
  89  *                       detect ES137x chip and derivatives.
  90  *    05.01.2000   0.22  Should now work with rev7 boards; patch by
  91  *                       Eric Lemar, elemar@cs.washington.edu
  92  *    08.01.2000   0.23  Prevent some ioctl's from returning bad count values on underrun/overrun;
  93  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
  94  *    07.02.2000   0.24  Use pci_alloc_consistent and pci_register_driver
  95  *    07.02.2000   0.25  Use ac97_codec
  96  *    01.03.2000   0.26  SPDIF patch by Mikael Bouillot <mikael.bouillot@bigfoot.com>
  97  *                       Use pci_module_init
  98  *    21.11.2000   0.27  Initialize dma buffers in poll, otherwise poll may return a bogus mask
  99  *    12.12.2000   0.28  More dma buffer initializations, patch from
 100  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
 101  *    05.01.2001   0.29  Hopefully updates will not be required anymore when Creative bumps
 102  *                       the CT5880 revision.
 103  *                       suggested by Stephan Müller <smueller@chronox.de>
 104  *    31.01.2001   0.30  Register/Unregister gameport
 105  *                       Fix SETTRIGGER non OSS API conformity
 106  *    14.07.2001   0.31  Add list of laptops needing amplifier control
 107  *    03.01.2003   0.32  open_mode fixes from Georg Acher <acher@in.tum.de>
 108  */
 109
 110 /*****************************************************************************/
 111
 112 #include <linux/interrupt.h>
 113 #include <linux/module.h>
 114 #include <linux/string.h>
 115 #include <linux/ioport.h>
 116 #include <linux/sched.h>
 117 #include <linux/delay.h>
 118 #include <linux/sound.h>
 119 #include <linux/slab.h>
 120 #include <linux/soundcard.h>
 121 #include <linux/pci.h>
 122 #include <linux/init.h>
 123 #include <linux/poll.h>
 124 #include <linux/bitops.h>
 125 #include <linux/proc_fs.h>
 126 #include <linux/spinlock.h>
 127 #include <linux/smp_lock.h>
 128 #include <linux/ac97_codec.h>
 129 #include <linux/gameport.h>
 130 #include <linux/wait.h>
 131
 132 #include <asm/io.h>
 133 #include <asm/page.h>
 134 #include <asm/uaccess.h>
 135
 136 /* --------------------------------------------------------------------- */
 137
 138 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 139 #define ES1371_DEBUG
 140 #define DBG(x) {}
 141 /*#define DBG(x) {x}*/
 142
 143 /* --------------------------------------------------------------------- */
 144
 145 #ifndef PCI_VENDOR_ID_ENSONIQ
 146 #define PCI_VENDOR_ID_ENSONIQ        0x1274
 147 #endif
 148
 149 #ifndef PCI_VENDOR_ID_ECTIVA
 150 #define PCI_VENDOR_ID_ECTIVA         0x1102
 151 #endif
 152
 153 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371
 154 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371
 155 #endif
 156
 157 #ifndef PCI_DEVICE_ID_ENSONIQ_CT5880
 158 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
 159 #endif
 160
 161 #ifndef PCI_DEVICE_ID_ECTIVA_EV1938
 162 #define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938
 163 #endif
 164
 165 /* ES1371 chip ID */
 166 /* This is a little confusing because all ES1371 compatible chips have the
 167    same DEVICE_ID, the only thing differentiating them is the REV_ID field.
 168    This is only significant if you want to enable features on the later parts.
 169    Yes, I know it's stupid and why didn't we use the sub IDs?
 170 */
 171 #define ES1371REV_ES1373_A  0x04
 172 #define ES1371REV_ES1373_B  0x06
 173 #define ES1371REV_CT5880_A  0x07
 174 #define CT5880REV_CT5880_C  0x02
 175 #define CT5880REV_CT5880_D  0x03
 176 #define ES1371REV_ES1371_B  0x09
 177 #define EV1938REV_EV1938_A  0x00
 178 #define ES1371REV_ES1373_8  0x08
 179
 180 #define ES1371_MAGIC  ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1371)
 181
 182 #define ES1371_EXTENT             0x40
 183 #define JOY_EXTENT                8
 184
 185 #define ES1371_REG_CONTROL        0x00
 186 #define ES1371_REG_STATUS         0x04 /* on the 5880 it is control/status */
 187 #define ES1371_REG_UART_DATA      0x08
 188 #define ES1371_REG_UART_STATUS    0x09
 189 #define ES1371_REG_UART_CONTROL   0x09
 190 #define ES1371_REG_UART_TEST      0x0a
 191 #define ES1371_REG_MEMPAGE        0x0c
 192 #define ES1371_REG_SRCONV         0x10
 193 #define ES1371_REG_CODEC          0x14
 194 #define ES1371_REG_LEGACY         0x18
 195 #define ES1371_REG_SERIAL_CONTROL 0x20
 196 #define ES1371_REG_DAC1_SCOUNT    0x24
 197 #define ES1371_REG_DAC2_SCOUNT    0x28
 198 #define ES1371_REG_ADC_SCOUNT     0x2c
 199
 200 #define ES1371_REG_DAC1_FRAMEADR  0xc30
 201 #define ES1371_REG_DAC1_FRAMECNT  0xc34
 202 #define ES1371_REG_DAC2_FRAMEADR  0xc38
 203 #define ES1371_REG_DAC2_FRAMECNT  0xc3c
 204 #define ES1371_REG_ADC_FRAMEADR   0xd30
 205 #define ES1371_REG_ADC_FRAMECNT   0xd34
 206
 207 #define ES1371_FMT_U8_MONO     0
 208 #define ES1371_FMT_U8_STEREO   1
 209 #define ES1371_FMT_S16_MONO    2
 210 #define ES1371_FMT_S16_STEREO  3
 211 #define ES1371_FMT_STEREO      1
 212 #define ES1371_FMT_S16         2
 213 #define ES1371_FMT_MASK        3
 214
 215 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 216 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
 217
 218 #define CTRL_RECEN_B    0x08000000  /* 1 = don't mix analog in to digital out */
 219 #define CTRL_SPDIFEN_B  0x04000000
 220 #define CTRL_JOY_SHIFT  24
 221 #define CTRL_JOY_MASK   3
 222 #define CTRL_JOY_200    0x00000000  /* joystick base address */
 223 #define CTRL_JOY_208    0x01000000
 224 #define CTRL_JOY_210    0x02000000
 225 #define CTRL_JOY_218    0x03000000
 226 #define CTRL_GPIO_IN0   0x00100000  /* general purpose inputs/outputs */
 227 #define CTRL_GPIO_IN1   0x00200000
 228 #define CTRL_GPIO_IN2   0x00400000
 229 #define CTRL_GPIO_IN3   0x00800000
 230 #define CTRL_GPIO_OUT0  0x00010000
 231 #define CTRL_GPIO_OUT1  0x00020000
 232 #define CTRL_GPIO_OUT2  0x00040000
 233 #define CTRL_GPIO_OUT3  0x00080000
 234 #define CTRL_MSFMTSEL   0x00008000  /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
 235 #define CTRL_SYNCRES    0x00004000  /* AC97 warm reset */
 236 #define CTRL_ADCSTOP    0x00002000  /* stop ADC transfers */
 237 #define CTRL_PWR_INTRM  0x00001000  /* 1 = power level ints enabled */
 238 #define CTRL_M_CB       0x00000800  /* recording source: 0 = ADC, 1 = MPEG */
 239 #define CTRL_CCB_INTRM  0x00000400  /* 1 = CCB "voice" ints enabled */
 240 #define CTRL_PDLEV0     0x00000000  /* power down level */
 241 #define CTRL_PDLEV1     0x00000100
 242 #define CTRL_PDLEV2     0x00000200
 243 #define CTRL_PDLEV3     0x00000300
 244 #define CTRL_BREQ       0x00000080  /* 1 = test mode (internal mem test) */
 245 #define CTRL_DAC1_EN    0x00000040  /* enable DAC1 */
 246 #define CTRL_DAC2_EN    0x00000020  /* enable DAC2 */
 247 #define CTRL_ADC_EN     0x00000010  /* enable ADC */
 248 #define CTRL_UART_EN    0x00000008  /* enable MIDI uart */
 249 #define CTRL_JYSTK_EN   0x00000004  /* enable Joystick port */
 250 #define CTRL_XTALCLKDIS 0x00000002  /* 1 = disable crystal clock input */
 251 #define CTRL_PCICLKDIS  0x00000001  /* 1 = disable PCI clock distribution */
 252
 253
 254 #define STAT_INTR       0x80000000  /* wired or of all interrupt bits */
 255 #define CSTAT_5880_AC97_RST 0x20000000 /* CT5880 Reset bit */
 256 #define STAT_EN_SPDIF   0x00040000  /* enable S/PDIF circuitry */
 257 #define STAT_TS_SPDIF   0x00020000  /* test S/PDIF circuitry */
 258 #define STAT_TESTMODE   0x00010000  /* test ASIC */
 259 #define STAT_SYNC_ERR   0x00000100  /* 1 = codec sync error */
 260 #define STAT_VC         0x000000c0  /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
 261 #define STAT_SH_VC      6
 262 #define STAT_MPWR       0x00000020  /* power level interrupt */
 263 #define STAT_MCCB       0x00000010  /* CCB int pending */
 264 #define STAT_UART       0x00000008  /* UART int pending */
 265 #define STAT_DAC1       0x00000004  /* DAC1 int pending */
 266 #define STAT_DAC2       0x00000002  /* DAC2 int pending */
 267 #define STAT_ADC        0x00000001  /* ADC int pending */
 268
 269 #define USTAT_RXINT     0x80        /* UART rx int pending */
 270 #define USTAT_TXINT     0x04        /* UART tx int pending */
 271 #define USTAT_TXRDY     0x02        /* UART tx ready */
 272 #define USTAT_RXRDY     0x01        /* UART rx ready */
 273
 274 #define UCTRL_RXINTEN   0x80        /* 1 = enable RX ints */
 275 #define UCTRL_TXINTEN   0x60        /* TX int enable field mask */
 276 #define UCTRL_ENA_TXINT 0x20        /* enable TX int */
 277 #define UCTRL_CNTRL     0x03        /* control field */
 278 #define UCTRL_CNTRL_SWR 0x03        /* software reset command */
 279
 280 /* sample rate converter */
 281 #define SRC_OKSTATE        1
 282
 283 #define SRC_RAMADDR_MASK   0xfe000000
 284 #define SRC_RAMADDR_SHIFT  25
 285 #define SRC_DAC1FREEZE     (1UL << 21)
 286 #define SRC_DAC2FREEZE      (1UL << 20)
 287 #define SRC_ADCFREEZE      (1UL << 19)
 288
 289
 290 #define SRC_WE             0x01000000  /* read/write control for SRC RAM */
 291 #define SRC_BUSY           0x00800000  /* SRC busy */
 292 #define SRC_DIS            0x00400000  /* 1 = disable SRC */
 293 #define SRC_DDAC1          0x00200000  /* 1 = disable accum update for DAC1 */
 294 #define SRC_DDAC2          0x00100000  /* 1 = disable accum update for DAC2 */
 295 #define SRC_DADC           0x00080000  /* 1 = disable accum update for ADC2 */
 296 #define SRC_CTLMASK        0x00780000
 297 #define SRC_RAMDATA_MASK   0x0000ffff
 298 #define SRC_RAMDATA_SHIFT  0
 299
 300 #define SRCREG_ADC      0x78
 301 #define SRCREG_DAC1     0x70
 302 #define SRCREG_DAC2     0x74
 303 #define SRCREG_VOL_ADC  0x6c
 304 #define SRCREG_VOL_DAC1 0x7c
 305 #define SRCREG_VOL_DAC2 0x7e
 306
 307 #define SRCREG_TRUNC_N     0x00
 308 #define SRCREG_INT_REGS    0x01
 309 #define SRCREG_ACCUM_FRAC  0x02
 310 #define SRCREG_VFREQ_FRAC  0x03
 311
 312 #define CODEC_PIRD        0x00800000  /* 0 = write AC97 register */
 313 #define CODEC_PIADD_MASK  0x007f0000
 314 #define CODEC_PIADD_SHIFT 16
 315 #define CODEC_PIDAT_MASK  0x0000ffff
 316 #define CODEC_PIDAT_SHIFT 0
 317
 318 #define CODEC_RDY         0x80000000  /* AC97 read data valid */
 319 #define CODEC_WIP         0x40000000  /* AC97 write in progress */
 320 #define CODEC_PORD        0x00800000  /* 0 = write AC97 register */
 321 #define CODEC_POADD_MASK  0x007f0000
 322 #define CODEC_POADD_SHIFT 16
 323 #define CODEC_PODAT_MASK  0x0000ffff
 324 #define CODEC_PODAT_SHIFT 0
 325
 326
 327 #define LEGACY_JFAST      0x80000000  /* fast joystick timing */
 328 #define LEGACY_FIRQ       0x01000000  /* force IRQ */
 329
 330 #define SCTRL_DACTEST     0x00400000  /* 1 = DAC test, test vector generation purposes */
 331 #define SCTRL_P2ENDINC    0x00380000  /*  */
 332 #define SCTRL_SH_P2ENDINC 19
 333 #define SCTRL_P2STINC     0x00070000  /*  */
 334 #define SCTRL_SH_P2STINC  16
 335 #define SCTRL_R1LOOPSEL   0x00008000  /* 0 = loop mode */
 336 #define SCTRL_P2LOOPSEL   0x00004000  /* 0 = loop mode */
 337 #define SCTRL_P1LOOPSEL   0x00002000  /* 0 = loop mode */
 338 #define SCTRL_P2PAUSE     0x00001000  /* 1 = pause mode */
 339 #define SCTRL_P1PAUSE     0x00000800  /* 1 = pause mode */
 340 #define SCTRL_R1INTEN     0x00000400  /* enable interrupt */
 341 #define SCTRL_P2INTEN     0x00000200  /* enable interrupt */
 342 #define SCTRL_P1INTEN     0x00000100  /* enable interrupt */
 343 #define SCTRL_P1SCTRLD    0x00000080  /* reload sample count register for DAC1 */
 344 #define SCTRL_P2DACSEN    0x00000040  /* 1 = DAC2 play back last sample when disabled */
 345 #define SCTRL_R1SEB       0x00000020  /* 1 = 16bit */
 346 #define SCTRL_R1SMB       0x00000010  /* 1 = stereo */
 347 #define SCTRL_R1FMT       0x00000030  /* format mask */
 348 #define SCTRL_SH_R1FMT    4
 349 #define SCTRL_P2SEB       0x00000008  /* 1 = 16bit */
 350 #define SCTRL_P2SMB       0x00000004  /* 1 = stereo */
 351 #define SCTRL_P2FMT       0x0000000c  /* format mask */
 352 #define SCTRL_SH_P2FMT    2
 353 #define SCTRL_P1SEB       0x00000002  /* 1 = 16bit */
 354 #define SCTRL_P1SMB       0x00000001  /* 1 = stereo */
 355 #define SCTRL_P1FMT       0x00000003  /* format mask */
 356 #define SCTRL_SH_P1FMT    0
 357
 358
 359 /* misc stuff */
 360 #define POLL_COUNT   0x1000
 361 #define FMODE_DAC         4           /* slight misuse of mode_t */
 362
 363 /* MIDI buffer sizes */
 364
 365 #define MIDIINBUF  256
 366 #define MIDIOUTBUF 256
 367
 368 #define FMODE_MIDI_SHIFT 3
 369 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 370 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 371
 372 #define ES1371_MODULE_NAME "es1371"
 373 #define PFX ES1371_MODULE_NAME ": "
 374
 375 /* --------------------------------------------------------------------- */
 376
 377 struct es1371_state {
 378         /* magic */
 379         unsigned int magic;
 380
 381         /* list of es1371 devices */
 382         struct list_head devs;
 383
 384         /* the corresponding pci_dev structure */
 385         struct pci_dev *dev;
 386
 387         /* soundcore stuff */
 388         int dev_audio;
 389         int dev_dac;
 390         int dev_midi;
 391
 392         /* hardware resources */
 393         unsigned long io; /* long for SPARC */
 394         unsigned int irq;
 395
 396         /* PCI ID's */
 397         u16 vendor;
 398         u16 device;
 399         u8 rev; /* the chip revision */
 400
 401         /* options */
 402         int spdif_volume; /* S/PDIF output is enabled if != -1 */
 403
 404 #ifdef ES1371_DEBUG
 405         /* debug /proc entry */
 406         struct proc_dir_entry *ps;
 407 #endif /* ES1371_DEBUG */
 408
 409         struct ac97_codec *codec;
 410
 411         /* wave stuff */
 412         unsigned ctrl;
 413         unsigned sctrl;
 414         unsigned dac1rate, dac2rate, adcrate;
 415
 416         spinlock_t lock;
 417         struct semaphore open_sem;
 418         mode_t open_mode;
 419         wait_queue_head_t open_wait;
 420
 421         struct dmabuf {
 422                 void *rawbuf;
 423                 dma_addr_t dmaaddr;
 424                 unsigned buforder;
 425                 unsigned numfrag;
 426                 unsigned fragshift;
 427                 unsigned hwptr, swptr;
 428                 unsigned total_bytes;
 429                 int count;
 430                 unsigned error; /* over/underrun */
 431                 wait_queue_head_t wait;
 432                 /* redundant, but makes calculations easier */
 433                 unsigned fragsize;
 434                 unsigned dmasize;
 435                 unsigned fragsamples;
 436                 /* OSS stuff */
 437                 unsigned mapped:1;
 438                 unsigned ready:1;
 439                 unsigned endcleared:1;
 440                 unsigned enabled:1;
 441                 unsigned ossfragshift;
 442                 int ossmaxfrags;
 443                 unsigned subdivision;
 444         } dma_dac1, dma_dac2, dma_adc;
 445
 446         /* midi stuff */
 447         struct {
 448                 unsigned ird, iwr, icnt;
 449                 unsigned ord, owr, ocnt;
 450                 wait_queue_head_t iwait;
 451                 wait_queue_head_t owait;
 452                 unsigned char ibuf[MIDIINBUF];
 453                 unsigned char obuf[MIDIOUTBUF];
 454         } midi;
 455
 456         struct gameport gameport;
 457         struct semaphore sem;
 458 };
 459
 460 /* --------------------------------------------------------------------- */
 461
 462 static LIST_HEAD(devs);
 463
 464 /* --------------------------------------------------------------------- */
 465
 466 static inline unsigned ld2(unsigned int x)
 467 {
 468         unsigned r = 0;
 469
 470         if (x >= 0x10000) {
 471                 x >>= 16;
 472                 r += 16;
 473         }
 474         if (x >= 0x100) {
 475                 x >>= 8;
 476                 r += 8;
 477         }
 478         if (x >= 0x10) {
 479                 x >>= 4;
 480                 r += 4;
 481         }
 482         if (x >= 4) {
 483                 x >>= 2;
 484                 r += 2;
 485         }
 486         if (x >= 2)
 487                 r++;
 488         return r;
 489 }
 490
 491 /* --------------------------------------------------------------------- */
 492
 493 static unsigned wait_src_ready(struct es1371_state *s)
 494 {
 495         unsigned int t, r;
 496
 497         for (t = 0; t < POLL_COUNT; t++) {
 498                 if (!((r = inl(s->io + ES1371_REG_SRCONV)) & SRC_BUSY))
 499                         return r;
 500                 udelay(1);
 501         }
 502         printk(KERN_DEBUG PFX "sample rate converter timeout r = 0x%08x\n", r);
 503         return r;
 504 }
 505
 506 static unsigned src_read(struct es1371_state *s, unsigned reg)
 507 {
 508         unsigned int temp,i,orig;
 509
 510         /* wait for ready */
 511         temp = wait_src_ready (s);
 512
 513         /* we can only access the SRC at certain times, make sure
 514            we're allowed to before we read */
 515
 516         orig = temp;
 517         /* expose the SRC state bits */
 518         outl ( (temp & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT) | 0x10000UL,
 519                s->io + ES1371_REG_SRCONV);
 520
 521         /* now, wait for busy and the correct time to read */
 522         temp = wait_src_ready (s);
 523
 524         if ( (temp & 0x00870000UL ) != ( SRC_OKSTATE << 16 )){
 525                 /* wait for the right state */
 526                 for (i=0; i<POLL_COUNT; i++){
 527                         temp = inl (s->io + ES1371_REG_SRCONV);
 528                         if ( (temp & 0x00870000UL ) == ( SRC_OKSTATE << 16 ))
 529                                 break;
 530                 }
 531         }
 532
 533         /* hide the state bits */
 534         outl ((orig & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT), s->io + ES1371_REG_SRCONV);
 535         return temp;
 536
 537
 538 }
 539
 540 static void src_write(struct es1371_state *s, unsigned reg, unsigned data)
 541 {
 542
 543         unsigned int r;
 544
 545         r = wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC);
 546         r |= (reg << SRC_RAMADDR_SHIFT) & SRC_RAMADDR_MASK;
 547         r |= (data << SRC_RAMDATA_SHIFT) & SRC_RAMDATA_MASK;
 548         outl(r | SRC_WE, s->io + ES1371_REG_SRCONV);
 549
 550 }
 551
 552 /* --------------------------------------------------------------------- */
 553
 554 /* most of the following here is black magic */
 555 static void set_adc_rate(struct es1371_state *s, unsigned rate)
 556 {
 557         unsigned long flags;
 558         unsigned int n, truncm, freq;
 559
 560         if (rate > 48000)
 561                 rate = 48000;
 562         if (rate < 4000)
 563                 rate = 4000;
 564         n = rate / 3000;
 565         if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
 566                 n--;
 567         truncm = (21 * n - 1) | 1;
 568         freq = ((48000UL << 15) / rate) * n;
 569         s->adcrate = (48000UL << 15) / (freq / n);
 570         spin_lock_irqsave(&s->lock, flags);
 571         if (rate >= 24000) {
 572                 if (truncm > 239)
 573                         truncm = 239;
 574                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 575                           (((239 - truncm) >> 1) << 9) | (n << 4));
 576         } else {
 577                 if (truncm > 119)
 578                         truncm = 119;
 579                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 580                           0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
 581         }
 582         src_write(s, SRCREG_ADC+SRCREG_INT_REGS,
 583                   (src_read(s, SRCREG_ADC+SRCREG_INT_REGS) & 0x00ff) |
 584                   ((freq >> 5) & 0xfc00));
 585         src_write(s, SRCREG_ADC+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 586         src_write(s, SRCREG_VOL_ADC, n << 8);
 587         src_write(s, SRCREG_VOL_ADC+1, n << 8);
 588         spin_unlock_irqrestore(&s->lock, flags);
 589 }
 590
 591
 592 static void set_dac1_rate(struct es1371_state *s, unsigned rate)
 593 {
 594         unsigned long flags;
 595         unsigned int freq, r;
 596
 597         if (rate > 48000)
 598                 rate = 48000;
 599         if (rate < 4000)
 600                 rate = 4000;
 601         freq = ((rate << 15) + 1500) / 3000;
 602         s->dac1rate = (freq * 3000 + 16384) >> 15;
 603         spin_lock_irqsave(&s->lock, flags);
 604         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC)) | SRC_DDAC1;
 605         outl(r, s->io + ES1371_REG_SRCONV);
 606         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS,
 607                   (src_read(s, SRCREG_DAC1+SRCREG_INT_REGS) & 0x00ff) |
 608                   ((freq >> 5) & 0xfc00));
 609         src_write(s, SRCREG_DAC1+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 610         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC));
 611         outl(r, s->io + ES1371_REG_SRCONV);
 612         spin_unlock_irqrestore(&s->lock, flags);
 613 }
 614
 615 static void set_dac2_rate(struct es1371_state *s, unsigned rate)
 616 {
 617         unsigned long flags;
 618         unsigned int freq, r;
 619
 620         if (rate > 48000)
 621                 rate = 48000;
 622         if (rate < 4000)
 623                 rate = 4000;
 624         freq = ((rate << 15) + 1500) / 3000;
 625         s->dac2rate = (freq * 3000 + 16384) >> 15;
 626         spin_lock_irqsave(&s->lock, flags);
 627         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC)) | SRC_DDAC2;
 628         outl(r, s->io + ES1371_REG_SRCONV);
 629         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS,
 630                   (src_read(s, SRCREG_DAC2+SRCREG_INT_REGS) & 0x00ff) |
 631                   ((freq >> 5) & 0xfc00));
 632         src_write(s, SRCREG_DAC2+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 633         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC));
 634         outl(r, s->io + ES1371_REG_SRCONV);
 635         spin_unlock_irqrestore(&s->lock, flags);
 636 }
 637
 638 /* --------------------------------------------------------------------- */
 639
 640 static void __init src_init(struct es1371_state *s)
 641 {
 642         unsigned int i;
 643
 644         /* before we enable or disable the SRC we need
 645            to wait for it to become ready */
 646         wait_src_ready(s);
 647
 648         outl(SRC_DIS, s->io + ES1371_REG_SRCONV);
 649
 650         for (i = 0; i < 0x80; i++)
 651                 src_write(s, i, 0);
 652
 653         src_write(s, SRCREG_DAC1+SRCREG_TRUNC_N, 16 << 4);
 654         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS, 16 << 10);
 655         src_write(s, SRCREG_DAC2+SRCREG_TRUNC_N, 16 << 4);
 656         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS, 16 << 10);
 657         src_write(s, SRCREG_VOL_ADC, 1 << 12);
 658         src_write(s, SRCREG_VOL_ADC+1, 1 << 12);
 659         src_write(s, SRCREG_VOL_DAC1, 1 << 12);
 660         src_write(s, SRCREG_VOL_DAC1+1, 1 << 12);
 661         src_write(s, SRCREG_VOL_DAC2, 1 << 12);
 662         src_write(s, SRCREG_VOL_DAC2+1, 1 << 12);
 663         set_adc_rate(s, 22050);
 664         set_dac1_rate(s, 22050);
 665         set_dac2_rate(s, 22050);
 666
 667         /* WARNING:
 668          * enabling the sample rate converter without properly programming
 669          * its parameters causes the chip to lock up (the SRC busy bit will
 670          * be stuck high, and I've found no way to rectify this other than
 671          * power cycle)
 672          */
 673         wait_src_ready(s);
 674         outl(0, s->io+ES1371_REG_SRCONV);
 675 }
 676
 677 /* --------------------------------------------------------------------- */
 678
 679 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 680 {
 681         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 682         unsigned long flags;
 683         unsigned t, x;
 684
 685         spin_lock_irqsave(&s->lock, flags);
 686         for (t = 0; t < POLL_COUNT; t++)
 687                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 688                         break;
 689
 690         /* save the current state for later */
 691         x = wait_src_ready(s);
 692
 693         /* enable SRC state data in SRC mux */
 694         outl((x & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC)) | 0x00010000,
 695              s->io+ES1371_REG_SRCONV);
 696
 697         /* wait for not busy (state 0) first to avoid
 698            transition states */
 699         for (t=0; t<POLL_COUNT; t++){
 700                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 701                     break;
 702                 udelay(1);
 703         }
 704
 705         /* wait for a SAFE time to write addr/data and then do it, dammit */
 706         for (t=0; t<POLL_COUNT; t++){
 707                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 708                     break;
 709                 udelay(1);
 710         }
 711
 712         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
 713              ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), s->io+ES1371_REG_CODEC);
 714
 715         /* restore SRC reg */
 716         wait_src_ready(s);
 717         outl(x, s->io+ES1371_REG_SRCONV);
 718         spin_unlock_irqrestore(&s->lock, flags);
 719 }
 720
 721 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
 722 {
 723         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 724         unsigned long flags;
 725         unsigned t, x;
 726
 727         spin_lock_irqsave(&s->lock, flags);
 728
 729         /* wait for WIP to go away */
 730         for (t = 0; t < 0x1000; t++)
 731                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 732                         break;
 733
 734         /* save the current state for later */
 735         x = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC));
 736
 737         /* enable SRC state data in SRC mux */
 738         outl( x | 0x00010000,
 739               s->io+ES1371_REG_SRCONV);
 740
 741         /* wait for not busy (state 0) first to avoid
 742            transition states */
 743         for (t=0; t<POLL_COUNT; t++){
 744                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 745                     break;
 746                 udelay(1);
 747         }
 748
 749         /* wait for a SAFE time to write addr/data and then do it, dammit */
 750         for (t=0; t<POLL_COUNT; t++){
 751                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 752                     break;
 753                 udelay(1);
 754         }
 755
 756         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD, s->io+ES1371_REG_CODEC);
 757         /* restore SRC reg */
 758         wait_src_ready(s);
 759         outl(x, s->io+ES1371_REG_SRCONV);
 760
 761         /* wait for WIP again */
 762         for (t = 0; t < 0x1000; t++)
 763                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 764                         break;
 765
 766         /* now wait for the stinkin' data (RDY) */
 767         for (t = 0; t < POLL_COUNT; t++)
 768                 if ((x = inl(s->io+ES1371_REG_CODEC)) & CODEC_RDY)
 769                         break;
 770
 771         spin_unlock_irqrestore(&s->lock, flags);
 772         return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
 773 }
 774
 775 /* --------------------------------------------------------------------- */
 776
 777 static inline void stop_adc(struct es1371_state *s)
 778 {
 779         unsigned long flags;
 780
 781         spin_lock_irqsave(&s->lock, flags);
 782         s->ctrl &= ~CTRL_ADC_EN;
 783         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 784         spin_unlock_irqrestore(&s->lock, flags);
 785 }
 786
 787 static inline void stop_dac1(struct es1371_state *s)
 788 {
 789         unsigned long flags;
 790
 791         spin_lock_irqsave(&s->lock, flags);
 792         s->ctrl &= ~CTRL_DAC1_EN;
 793         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 794         spin_unlock_irqrestore(&s->lock, flags);
 795 }
 796
 797 static inline void stop_dac2(struct es1371_state *s)
 798 {
 799         unsigned long flags;
 800
 801         spin_lock_irqsave(&s->lock, flags);
 802         s->ctrl &= ~CTRL_DAC2_EN;
 803         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 804         spin_unlock_irqrestore(&s->lock, flags);
 805 }
 806
 807 static void start_dac1(struct es1371_state *s)
 808 {
 809         unsigned long flags;
 810         unsigned fragremain, fshift;
 811
 812         spin_lock_irqsave(&s->lock, flags);
 813         if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
 814             && s->dma_dac1.ready) {
 815                 s->ctrl |= CTRL_DAC1_EN;
 816                 s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
 817                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 818                 fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
 819                 fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
 820                 if (fragremain < 2*fshift)
 821                         fragremain = s->dma_dac1.fragsize;
 822                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 823                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 824                 outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 825         }
 826         spin_unlock_irqrestore(&s->lock, flags);
 827 }
 828
 829 static void start_dac2(struct es1371_state *s)
 830 {
 831         unsigned long flags;
 832         unsigned fragremain, fshift;
 833
 834         spin_lock_irqsave(&s->lock, flags);
 835         if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
 836             && s->dma_dac2.ready) {
 837                 s->ctrl |= CTRL_DAC2_EN;
 838                 s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
 839                                          SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
 840                         (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
 841                         (0 << SCTRL_SH_P2STINC);
 842                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 843                 fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
 844                 fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
 845                 if (fragremain < 2*fshift)
 846                         fragremain = s->dma_dac2.fragsize;
 847                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 848                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 849                 outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 850         }
 851         spin_unlock_irqrestore(&s->lock, flags);
 852 }
 853
 854 static void start_adc(struct es1371_state *s)
 855 {
 856         unsigned long flags;
 857         unsigned fragremain, fshift;
 858
 859         spin_lock_irqsave(&s->lock, flags);
 860         if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 861             && s->dma_adc.ready) {
 862                 s->ctrl |= CTRL_ADC_EN;
 863                 s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
 864                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 865                 fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
 866                 fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
 867                 if (fragremain < 2*fshift)
 868                         fragremain = s->dma_adc.fragsize;
 869                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 870                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 871                 outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 872         }
 873         spin_unlock_irqrestore(&s->lock, flags);
 874 }
 875
 876 /* --------------------------------------------------------------------- */
 877
 878 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
 879 #define DMABUF_MINORDER 1
 880
 881
 882 static inline void dealloc_dmabuf(struct es1371_state *s, struct dmabuf *db)
 883 {
 884         struct page *page, *pend;
 885
 886         if (db->rawbuf) {
 887                 /* undo marking the pages as reserved */
 888                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 889                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 890                         ClearPageReserved(page);
 891                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 892         }
 893         db->rawbuf = NULL;
 894         db->mapped = db->ready = 0;
 895 }
 896
 897 static int prog_dmabuf(struct es1371_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
 898 {
 899         int order;
 900         unsigned bytepersec;
 901         unsigned bufs;
 902         struct page *page, *pend;
 903
 904         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 905         if (!db->rawbuf) {
 906                 db->ready = db->mapped = 0;
 907                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 908                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 909                                 break;
 910                 if (!db->rawbuf)
 911                         return -ENOMEM;
 912                 db->buforder = order;
 913                 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 914                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 915                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 916                         SetPageReserved(page);
 917         }
 918         fmt &= ES1371_FMT_MASK;
 919         bytepersec = rate << sample_shift[fmt];
 920         bufs = PAGE_SIZE << db->buforder;
 921         if (db->ossfragshift) {
 922                 if ((1000 << db->ossfragshift) < bytepersec)
 923                         db->fragshift = ld2(bytepersec/1000);
 924                 else
 925                         db->fragshift = db->ossfragshift;
 926         } else {
 927                 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
 928                 if (db->fragshift < 3)
 929                         db->fragshift = 3;
 930         }
 931         db->numfrag = bufs >> db->fragshift;
 932         while (db->numfrag < 4 && db->fragshift > 3) {
 933                 db->fragshift--;
 934                 db->numfrag = bufs >> db->fragshift;
 935         }
 936         db->fragsize = 1 << db->fragshift;
 937         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 938                 db->numfrag = db->ossmaxfrags;
 939         db->fragsamples = db->fragsize >> sample_shift[fmt];
 940         db->dmasize = db->numfrag << db->fragshift;
 941         memset(db->rawbuf, (fmt & ES1371_FMT_S16) ? 0 : 0x80, db->dmasize);
 942         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 943         outl(db->dmaaddr, s->io+(reg & 0xff));
 944         outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
 945         db->enabled = 1;
 946         db->ready = 1;
 947         return 0;
 948 }
 949
 950 static inline int prog_dmabuf_adc(struct es1371_state *s)
 951 {
 952         stop_adc(s);
 953         return prog_dmabuf(s, &s->dma_adc, s->adcrate, (s->sctrl >> SCTRL_SH_R1FMT) & ES1371_FMT_MASK,
 954                            ES1371_REG_ADC_FRAMEADR);
 955 }
 956
 957 static inline int prog_dmabuf_dac2(struct es1371_state *s)
 958 {
 959         stop_dac2(s);
 960         return prog_dmabuf(s, &s->dma_dac2, s->dac2rate, (s->sctrl >> SCTRL_SH_P2FMT) & ES1371_FMT_MASK,
 961                            ES1371_REG_DAC2_FRAMEADR);
 962 }
 963
 964 static inline int prog_dmabuf_dac1(struct es1371_state *s)
 965 {
 966         stop_dac1(s);
 967         return prog_dmabuf(s, &s->dma_dac1, s->dac1rate, (s->sctrl >> SCTRL_SH_P1FMT) & ES1371_FMT_MASK,
 968                            ES1371_REG_DAC1_FRAMEADR);
 969 }
 970
 971 static inline unsigned get_hwptr(struct es1371_state *s, struct dmabuf *db, unsigned reg)
 972 {
 973         unsigned hwptr, diff;
 974
 975         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 976         hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
 977         diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
 978         db->hwptr = hwptr;
 979         return diff;
 980 }
 981
 982 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
 983 {
 984         if (bptr + len > bsize) {
 985                 unsigned x = bsize - bptr;
 986                 memset(((char *)buf) + bptr, c, x);
 987                 bptr = 0;
 988                 len -= x;
 989         }
 990         memset(((char *)buf) + bptr, c, len);
 991 }
 992
 993 /* call with spinlock held! */
 994 static void es1371_update_ptr(struct es1371_state *s)
 995 {
 996         int diff;
 997
 998         /* update ADC pointer */
 999         if (s->ctrl & CTRL_ADC_EN) {
1000                 diff = get_hwptr(s, &s->dma_adc, ES1371_REG_ADC_FRAMECNT);
1001                 s->dma_adc.total_bytes += diff;
1002                 s->dma_adc.count += diff;
1003                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1004                         wake_up(&s->dma_adc.wait);
1005                 if (!s->dma_adc.mapped) {
1006                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1007                                 s->ctrl &= ~CTRL_ADC_EN;
1008                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1009                                 s->dma_adc.error++;
1010                         }
1011                 }
1012         }
1013         /* update DAC1 pointer */
1014         if (s->ctrl & CTRL_DAC1_EN) {
1015                 diff = get_hwptr(s, &s->dma_dac1, ES1371_REG_DAC1_FRAMECNT);
1016                 s->dma_dac1.total_bytes += diff;
1017                 if (s->dma_dac1.mapped) {
1018                         s->dma_dac1.count += diff;
1019                         if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
1020                                 wake_up(&s->dma_dac1.wait);
1021                 } else {
1022                         s->dma_dac1.count -= diff;
1023                         if (s->dma_dac1.count <= 0) {
1024                                 s->ctrl &= ~CTRL_DAC1_EN;
1025                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1026                                 s->dma_dac1.error++;
1027                         } else if (s->dma_dac1.count <= (signed)s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
1028                                 clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
1029                                               s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
1030                                 s->dma_dac1.endcleared = 1;
1031                         }
1032                         if (s->dma_dac1.count + (signed)s->dma_dac1.fragsize <= (signed)s->dma_dac1.dmasize)
1033                                 wake_up(&s->dma_dac1.wait);
1034                 }
1035         }
1036         /* update DAC2 pointer */
1037         if (s->ctrl & CTRL_DAC2_EN) {
1038                 diff = get_hwptr(s, &s->dma_dac2, ES1371_REG_DAC2_FRAMECNT);
1039                 s->dma_dac2.total_bytes += diff;
1040                 if (s->dma_dac2.mapped) {
1041                         s->dma_dac2.count += diff;
1042                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1043                                 wake_up(&s->dma_dac2.wait);
1044                 } else {
1045                         s->dma_dac2.count -= diff;
1046                         if (s->dma_dac2.count <= 0) {
1047                                 s->ctrl &= ~CTRL_DAC2_EN;
1048                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1049                                 s->dma_dac2.error++;
1050                         } else if (s->dma_dac2.count <= (signed)s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
1051                                 clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
1052                                               s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
1053                                 s->dma_dac2.endcleared = 1;
1054                         }
1055                         if (s->dma_dac2.count + (signed)s->dma_dac2.fragsize <= (signed)s->dma_dac2.dmasize)
1056                                 wake_up(&s->dma_dac2.wait);
1057                 }
1058         }
1059 }
1060
1061 /* hold spinlock for the following! */
1062 static void es1371_handle_midi(struct es1371_state *s)
1063 {
1064         unsigned char ch;
1065         int wake;
1066
1067         if (!(s->ctrl & CTRL_UART_EN))
1068                 return;
1069         wake = 0;
1070         while (inb(s->io+ES1371_REG_UART_STATUS) & USTAT_RXRDY) {
1071                 ch = inb(s->io+ES1371_REG_UART_DATA);
1072                 if (s->midi.icnt < MIDIINBUF) {
1073                         s->midi.ibuf[s->midi.iwr] = ch;
1074                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1075                         s->midi.icnt++;
1076                 }
1077                 wake = 1;
1078         }
1079         if (wake)
1080                 wake_up(&s->midi.iwait);
1081         wake = 0;
1082         while ((inb(s->io+ES1371_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
1083                 outb(s->midi.obuf[s->midi.ord], s->io+ES1371_REG_UART_DATA);
1084                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1085                 s->midi.ocnt--;
1086                 if (s->midi.ocnt < MIDIOUTBUF-16)
1087                         wake = 1;
1088         }
1089         if (wake)
1090                 wake_up(&s->midi.owait);
1091         outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1371_REG_UART_CONTROL);
1092 }
1093
1094 static irqreturn_t es1371_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1095 {
1096         struct es1371_state *s = (struct es1371_state *)dev_id;
1097         unsigned int intsrc, sctl;
1098
1099         /* fastpath out, to ease interrupt sharing */
1100         intsrc = inl(s->io+ES1371_REG_STATUS);
1101         if (!(intsrc & 0x80000000))
1102                 return IRQ_NONE;
1103         spin_lock(&s->lock);
1104         /* clear audio interrupts first */
1105         sctl = s->sctrl;
1106         if (intsrc & STAT_ADC)
1107                 sctl &= ~SCTRL_R1INTEN;
1108         if (intsrc & STAT_DAC1)
1109                 sctl &= ~SCTRL_P1INTEN;
1110         if (intsrc & STAT_DAC2)
1111                 sctl &= ~SCTRL_P2INTEN;
1112         outl(sctl, s->io+ES1371_REG_SERIAL_CONTROL);
1113         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1114         es1371_update_ptr(s);
1115         es1371_handle_midi(s);
1116         spin_unlock(&s->lock);
1117         return IRQ_HANDLED;
1118 }
1119
1120 /* --------------------------------------------------------------------- */
1121
1122 static const char invalid_magic[] = KERN_CRIT PFX "invalid magic value\n";
1123
1124 #define VALIDATE_STATE(s)                         \
1125 ({                                                \
1126         if (!(s) || (s)->magic != ES1371_MAGIC) { \
1127                 printk(invalid_magic);            \
1128                 return -ENXIO;                    \
1129         }                                         \
1130 })
1131
1132 /* --------------------------------------------------------------------- */
1133
1134 /* Conversion table for S/PDIF PCM volume emulation through the SRC */
1135 /* dB-linear table of DAC vol values; -0dB to -46.5dB with mute */
1136 static const unsigned short DACVolTable[101] =
1137 {
1138         0x1000, 0x0f2a, 0x0e60, 0x0da0, 0x0cea, 0x0c3e, 0x0b9a, 0x0aff,
1139         0x0a6d, 0x09e1, 0x095e, 0x08e1, 0x086a, 0x07fa, 0x078f, 0x072a,
1140         0x06cb, 0x0670, 0x061a, 0x05c9, 0x057b, 0x0532, 0x04ed, 0x04ab,
1141         0x046d, 0x0432, 0x03fa, 0x03c5, 0x0392, 0x0363, 0x0335, 0x030b,
1142         0x02e2, 0x02bc, 0x0297, 0x0275, 0x0254, 0x0235, 0x0217, 0x01fb,
1143         0x01e1, 0x01c8, 0x01b0, 0x0199, 0x0184, 0x0170, 0x015d, 0x014b,
1144         0x0139, 0x0129, 0x0119, 0x010b, 0x00fd, 0x00f0, 0x00e3, 0x00d7,
1145         0x00cc, 0x00c1, 0x00b7, 0x00ae, 0x00a5, 0x009c, 0x0094, 0x008c,
1146         0x0085, 0x007e, 0x0077, 0x0071, 0x006b, 0x0066, 0x0060, 0x005b,
1147         0x0057, 0x0052, 0x004e, 0x004a, 0x0046, 0x0042, 0x003f, 0x003c,
1148         0x0038, 0x0036, 0x0033, 0x0030, 0x002e, 0x002b, 0x0029, 0x0027,
1149         0x0025, 0x0023, 0x0021, 0x001f, 0x001e, 0x001c, 0x001b, 0x0019,
1150         0x0018, 0x0017, 0x0016, 0x0014, 0x0000
1151 };
1152
1153 /*
1154  * when we are in S/PDIF mode, we want to disable any analog output so
1155  * we filter the mixer ioctls
1156  */
1157 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg)
1158 {
1159         struct es1371_state *s = (struct es1371_state *)codec->private_data;
1160         int val;
1161         unsigned long flags;
1162         unsigned int left, right;
1163
1164         VALIDATE_STATE(s);
1165         /* filter mixer ioctls to catch PCM and MASTER volume when in S/PDIF mode */
1166         if (s->spdif_volume == -1)
1167                 return codec->mixer_ioctl(codec, cmd, arg);
1168         switch (cmd) {
1169         case SOUND_MIXER_WRITE_VOLUME:
1170                 return 0;
1171
1172         case SOUND_MIXER_WRITE_PCM:   /* use SRC for PCM volume */
1173                 if (get_user(val, (int __user *)arg))
1174                         return -EFAULT;
1175                 right = ((val >> 8)  & 0xff);
1176                 left = (val  & 0xff);
1177                 if (right > 100)
1178                         right = 100;
1179                 if (left > 100)
1180                         left = 100;
1181                 s->spdif_volume = (right << 8) | left;
1182                 spin_lock_irqsave(&s->lock, flags);
1183                 src_write(s, SRCREG_VOL_DAC2, DACVolTable[100 - left]);
1184                 src_write(s, SRCREG_VOL_DAC2+1, DACVolTable[100 - right]);
1185                 spin_unlock_irqrestore(&s->lock, flags);
1186                 return 0;
1187
1188         case SOUND_MIXER_READ_PCM:
1189                 return put_user(s->spdif_volume, (int __user *)arg);
1190         }
1191         return codec->mixer_ioctl(codec, cmd, arg);
1192 }
1193
1194 /* --------------------------------------------------------------------- */
1195
1196 /*
1197  * AC97 Mixer Register to Connections mapping of the Concert 97 board
1198  *
1199  * AC97_MASTER_VOL_STEREO   Line Out
1200  * AC97_MASTER_VOL_MONO     TAD Output
1201  * AC97_PCBEEP_VOL          none
1202  * AC97_PHONE_VOL           TAD Input (mono)
1203  * AC97_MIC_VOL             MIC Input (mono)
1204  * AC97_LINEIN_VOL          Line Input (stereo)
1205  * AC97_CD_VOL              CD Input (stereo)
1206  * AC97_VIDEO_VOL           none
1207  * AC97_AUX_VOL             Aux Input (stereo)
1208  * AC97_PCMOUT_VOL          Wave Output (stereo)
1209  */
1210
1211 static int es1371_open_mixdev(struct inode *inode, struct file *file)
1212 {
1213         int minor = iminor(inode);
1214         struct list_head *list;
1215         struct es1371_state *s;
1216
1217         for (list = devs.next; ; list = list->next) {
1218                 if (list == &devs)
1219                         return -ENODEV;
1220                 s = list_entry(list, struct es1371_state, devs);
1221                 if (s->codec->dev_mixer == minor)
1222                         break;
1223         }
1224         VALIDATE_STATE(s);
1225         file->private_data = s;
1226         return nonseekable_open(inode, file);
1227 }
1228
1229 static int es1371_release_mixdev(struct inode *inode, struct file *file)
1230 {
1231         struct es1371_state *s = (struct es1371_state *)file->private_data;
1232
1233         VALIDATE_STATE(s);
1234         return 0;
1235 }
1236
1237 static int es1371_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1238 {
1239         struct es1371_state *s = (struct es1371_state *)file->private_data;
1240         struct ac97_codec *codec = s->codec;
1241
1242         return mixdev_ioctl(codec, cmd, arg);
1243 }
1244
1245 static /*const*/ struct file_operations es1371_mixer_fops = {
1246         .owner          = THIS_MODULE,
1247         .llseek         = no_llseek,
1248         .ioctl          = es1371_ioctl_mixdev,
1249         .open           = es1371_open_mixdev,
1250         .release        = es1371_release_mixdev,
1251 };
1252
1253 /* --------------------------------------------------------------------- */
1254
1255 static int drain_dac1(struct es1371_state *s, int nonblock)
1256 {
1257         DECLARE_WAITQUEUE(wait, current);
1258         unsigned long flags;
1259         int count, tmo;
1260
1261         if (s->dma_dac1.mapped || !s->dma_dac1.ready)
1262                 return 0;
1263         add_wait_queue(&s->dma_dac1.wait, &wait);
1264         for (;;) {
1265                 __set_current_state(TASK_INTERRUPTIBLE);
1266                 spin_lock_irqsave(&s->lock, flags);
1267                 count = s->dma_dac1.count;
1268                 spin_unlock_irqrestore(&s->lock, flags);
1269                 if (count <= 0)
1270                         break;
1271                 if (signal_pending(current))
1272                         break;
1273                 if (nonblock) {
1274                         remove_wait_queue(&s->dma_dac1.wait, &wait);
1275                         set_current_state(TASK_RUNNING);
1276                         return -EBUSY;
1277                 }
1278                 tmo = 3 * HZ * (count + s->dma_dac1.fragsize) / 2 / s->dac1rate;
1279                 tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
1280                 if (!schedule_timeout(tmo + 1))
1281                         DBG(printk(KERN_DEBUG PFX "dac1 dma timed out??\n");)
1282         }
1283         remove_wait_queue(&s->dma_dac1.wait, &wait);
1284         set_current_state(TASK_RUNNING);
1285         if (signal_pending(current))
1286                 return -ERESTARTSYS;
1287         return 0;
1288 }
1289
1290 static int drain_dac2(struct es1371_state *s, int nonblock)
1291 {
1292         DECLARE_WAITQUEUE(wait, current);
1293         unsigned long flags;
1294         int count, tmo;
1295
1296         if (s->dma_dac2.mapped || !s->dma_dac2.ready)
1297                 return 0;
1298         add_wait_queue(&s->dma_dac2.wait, &wait);
1299         for (;;) {
1300                 __set_current_state(TASK_UNINTERRUPTIBLE);
1301                 spin_lock_irqsave(&s->lock, flags);
1302                 count = s->dma_dac2.count;
1303                 spin_unlock_irqrestore(&s->lock, flags);
1304                 if (count <= 0)
1305                         break;
1306                 if (signal_pending(current))
1307                         break;
1308                 if (nonblock) {
1309                         remove_wait_queue(&s->dma_dac2.wait, &wait);
1310                         set_current_state(TASK_RUNNING);
1311                         return -EBUSY;
1312                 }
1313                 tmo = 3 * HZ * (count + s->dma_dac2.fragsize) / 2 / s->dac2rate;
1314                 tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
1315                 if (!schedule_timeout(tmo + 1))
1316                         DBG(printk(KERN_DEBUG PFX "dac2 dma timed out??\n");)
1317         }
1318         remove_wait_queue(&s->dma_dac2.wait, &wait);
1319         set_current_state(TASK_RUNNING);
1320         if (signal_pending(current))
1321                 return -ERESTARTSYS;
1322         return 0;
1323 }
1324
1325 /* --------------------------------------------------------------------- */
1326
1327 static ssize_t es1371_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1328 {
1329         struct es1371_state *s = (struct es1371_state *)file->private_data;
1330         DECLARE_WAITQUEUE(wait, current);
1331         ssize_t ret = 0;
1332         unsigned long flags;
1333         unsigned swptr;
1334         int cnt;
1335
1336         VALIDATE_STATE(s);
1337         if (s->dma_adc.mapped)
1338                 return -ENXIO;
1339         if (!access_ok(VERIFY_WRITE, buffer, count))
1340                 return -EFAULT;
1341         down(&s->sem);
1342         if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1343                 goto out2;
1344
1345         add_wait_queue(&s->dma_adc.wait, &wait);
1346         while (count > 0) {
1347                 spin_lock_irqsave(&s->lock, flags);
1348                 swptr = s->dma_adc.swptr;
1349                 cnt = s->dma_adc.dmasize-swptr;
1350                 if (s->dma_adc.count < cnt)
1351                         cnt = s->dma_adc.count;
1352                 if (cnt <= 0)
1353                         __set_current_state(TASK_INTERRUPTIBLE);
1354                 spin_unlock_irqrestore(&s->lock, flags);
1355                 if (cnt > count)
1356                         cnt = count;
1357                 if (cnt <= 0) {
1358                         if (s->dma_adc.enabled)
1359                                 start_adc(s);
1360                         if (file->f_flags & O_NONBLOCK) {
1361                                 if (!ret)
1362                                         ret = -EAGAIN;
1363                                 goto out;
1364                         }
1365                         up(&s->sem);
1366                         schedule();
1367                         if (signal_pending(current)) {
1368                                 if (!ret)
1369                                         ret = -ERESTARTSYS;
1370                                 goto out2;
1371                         }
1372                         down(&s->sem);
1373                         if (s->dma_adc.mapped)
1374                         {
1375                                 ret = -ENXIO;
1376                                 goto out;
1377                         }
1378                         continue;
1379                 }
1380                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1381                         if (!ret)
1382                                 ret = -EFAULT;
1383                         goto out;
1384                 }
1385                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1386                 spin_lock_irqsave(&s->lock, flags);
1387                 s->dma_adc.swptr = swptr;
1388                 s->dma_adc.count -= cnt;
1389                 spin_unlock_irqrestore(&s->lock, flags);
1390                 count -= cnt;
1391                 buffer += cnt;
1392                 ret += cnt;
1393                 if (s->dma_adc.enabled)
1394                         start_adc(s);
1395         }
1396 out:
1397         up(&s->sem);
1398 out2:
1399         remove_wait_queue(&s->dma_adc.wait, &wait);
1400         set_current_state(TASK_RUNNING);
1401         return ret;
1402 }
1403
1404 static ssize_t es1371_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1405 {
1406         struct es1371_state *s = (struct es1371_state *)file->private_data;
1407         DECLARE_WAITQUEUE(wait, current);
1408         ssize_t ret;
1409         unsigned long flags;
1410         unsigned swptr;
1411         int cnt;
1412
1413         VALIDATE_STATE(s);
1414         if (s->dma_dac2.mapped)
1415                 return -ENXIO;
1416         if (!access_ok(VERIFY_READ, buffer, count))
1417                 return -EFAULT;
1418         down(&s->sem);
1419         if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1420                 goto out3;
1421         ret = 0;
1422         add_wait_queue(&s->dma_dac2.wait, &wait);
1423         while (count > 0) {
1424                 spin_lock_irqsave(&s->lock, flags);
1425                 if (s->dma_dac2.count < 0) {
1426                         s->dma_dac2.count = 0;
1427                         s->dma_dac2.swptr = s->dma_dac2.hwptr;
1428                 }
1429                 swptr = s->dma_dac2.swptr;
1430                 cnt = s->dma_dac2.dmasize-swptr;
1431                 if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
1432                         cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
1433                 if (cnt <= 0)
1434                         __set_current_state(TASK_INTERRUPTIBLE);
1435                 spin_unlock_irqrestore(&s->lock, flags);
1436                 if (cnt > count)
1437                         cnt = count;
1438                 if (cnt <= 0) {
1439                         if (s->dma_dac2.enabled)
1440                                 start_dac2(s);
1441                         if (file->f_flags & O_NONBLOCK) {
1442                                 if (!ret)
1443                                         ret = -EAGAIN;
1444                                 goto out;
1445                         }
1446                         up(&s->sem);
1447                         schedule();
1448                         if (signal_pending(current)) {
1449                                 if (!ret)
1450                                         ret = -ERESTARTSYS;
1451                                 goto out2;
1452                         }
1453                         down(&s->sem);
1454                         if (s->dma_dac2.mapped)
1455                         {
1456                                 ret = -ENXIO;
1457                                 goto out;
1458                         }
1459                         continue;
1460                 }
1461                 if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt)) {
1462                         if (!ret)
1463                                 ret = -EFAULT;
1464                         goto out;
1465                 }
1466                 swptr = (swptr + cnt) % s->dma_dac2.dmasize;
1467                 spin_lock_irqsave(&s->lock, flags);
1468                 s->dma_dac2.swptr = swptr;
1469                 s->dma_dac2.count += cnt;
1470                 s->dma_dac2.endcleared = 0;
1471                 spin_unlock_irqrestore(&s->lock, flags);
1472                 count -= cnt;
1473                 buffer += cnt;
1474                 ret += cnt;
1475                 if (s->dma_dac2.enabled)
1476                         start_dac2(s);
1477         }
1478 out:
1479         up(&s->sem);
1480 out2:
1481         remove_wait_queue(&s->dma_dac2.wait, &wait);
1482 out3:
1483         set_current_state(TASK_RUNNING);
1484         return ret;
1485 }
1486
1487 /* No kernel lock - we have our own spinlock */
1488 static unsigned int es1371_poll(struct file *file, struct poll_table_struct *wait)
1489 {
1490         struct es1371_state *s = (struct es1371_state *)file->private_data;
1491         unsigned long flags;
1492         unsigned int mask = 0;
1493
1494         VALIDATE_STATE(s);
1495         if (file->f_mode & FMODE_WRITE) {
1496                 if (!s->dma_dac2.ready && prog_dmabuf_dac2(s))
1497                         return 0;
1498                 poll_wait(file, &s->dma_dac2.wait, wait);
1499         }
1500         if (file->f_mode & FMODE_READ) {
1501                 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1502                         return 0;
1503                 poll_wait(file, &s->dma_adc.wait, wait);
1504         }
1505         spin_lock_irqsave(&s->lock, flags);
1506         es1371_update_ptr(s);
1507         if (file->f_mode & FMODE_READ) {
1508                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1509                                 mask |= POLLIN | POLLRDNORM;
1510         }
1511         if (file->f_mode & FMODE_WRITE) {
1512                 if (s->dma_dac2.mapped) {
1513                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1514                                 mask |= POLLOUT | POLLWRNORM;
1515                 } else {
1516                         if ((signed)s->dma_dac2.dmasize >= s->dma_dac2.count + (signed)s->dma_dac2.fragsize)
1517                                 mask |= POLLOUT | POLLWRNORM;
1518                 }
1519         }
1520         spin_unlock_irqrestore(&s->lock, flags);
1521         return mask;
1522 }
1523
1524 static int es1371_mmap(struct file *file, struct vm_area_struct *vma)
1525 {
1526         struct es1371_state *s = (struct es1371_state *)file->private_data;
1527         struct dmabuf *db;
1528         int ret = 0;
1529         unsigned long size;
1530
1531         VALIDATE_STATE(s);
1532         lock_kernel();
1533         down(&s->sem);
1534
1535         if (vma->vm_flags & VM_WRITE) {
1536                 if ((ret = prog_dmabuf_dac2(s)) != 0) {
1537                         goto out;
1538                 }
1539                 db = &s->dma_dac2;
1540         } else if (vma->vm_flags & VM_READ) {
1541                 if ((ret = prog_dmabuf_adc(s)) != 0) {
1542                         goto out;
1543                 }
1544                 db = &s->dma_adc;
1545         } else {
1546                 ret = -EINVAL;
1547                 goto out;
1548         }
1549         if (vma->vm_pgoff != 0) {
1550                 ret = -EINVAL;
1551                 goto out;
1552         }
1553         size = vma->vm_end - vma->vm_start;
1554         if (size > (PAGE_SIZE << db->buforder)) {
1555                 ret = -EINVAL;
1556                 goto out;
1557         }
1558         if (remap_page_range(vma, vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot)) {
1559                 ret = -EAGAIN;
1560                 goto out;
1561         }
1562         db->mapped = 1;
1563 out:
1564         up(&s->sem);
1565         unlock_kernel();
1566         return ret;
1567 }
1568
1569 static int es1371_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1570 {
1571         struct es1371_state *s = (struct es1371_state *)file->private_data;
1572         unsigned long flags;
1573         audio_buf_info abinfo;
1574         count_info cinfo;
1575         int count;
1576         int val, mapped, ret;
1577         void __user *argp = (void __user *)arg;
1578         int __user *p = argp;
1579
1580         VALIDATE_STATE(s);
1581         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
1582                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1583         switch (cmd) {
1584         case OSS_GETVERSION:
1585                 return put_user(SOUND_VERSION, p);
1586
1587         case SNDCTL_DSP_SYNC:
1588                 if (file->f_mode & FMODE_WRITE)
1589                         return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1590                 return 0;
1591
1592         case SNDCTL_DSP_SETDUPLEX:
1593                 return 0;
1594
1595         case SNDCTL_DSP_GETCAPS:
1596                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1597
1598         case SNDCTL_DSP_RESET:
1599                 if (file->f_mode & FMODE_WRITE) {
1600                         stop_dac2(s);
1601                         synchronize_irq(s->irq);
1602                         s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
1603                 }
1604                 if (file->f_mode & FMODE_READ) {
1605                         stop_adc(s);
1606                         synchronize_irq(s->irq);
1607                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1608                 }
1609                 return 0;
1610
1611         case SNDCTL_DSP_SPEED:
1612                 if (get_user(val, p))
1613                         return -EFAULT;
1614                 if (val >= 0) {
1615                         if (file->f_mode & FMODE_READ) {
1616                                 stop_adc(s);
1617                                 s->dma_adc.ready = 0;
1618                                 set_adc_rate(s, val);
1619                         }
1620                         if (file->f_mode & FMODE_WRITE) {
1621                                 stop_dac2(s);
1622                                 s->dma_dac2.ready = 0;
1623                                 set_dac2_rate(s, val);
1624                         }
1625                 }
1626                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, p);
1627
1628         case SNDCTL_DSP_STEREO:
1629                 if (get_user(val, p))
1630                         return -EFAULT;
1631                 if (file->f_mode & FMODE_READ) {
1632                         stop_adc(s);
1633                         s->dma_adc.ready = 0;
1634                         spin_lock_irqsave(&s->lock, flags);
1635                         if (val)
1636                                 s->sctrl |= SCTRL_R1SMB;
1637                         else
1638                                 s->sctrl &= ~SCTRL_R1SMB;
1639                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1640                         spin_unlock_irqrestore(&s->lock, flags);
1641                 }
1642                 if (file->f_mode & FMODE_WRITE) {
1643                         stop_dac2(s);
1644                         s->dma_dac2.ready = 0;
1645                         spin_lock_irqsave(&s->lock, flags);
1646                         if (val)
1647                                 s->sctrl |= SCTRL_P2SMB;
1648                         else
1649                                 s->sctrl &= ~SCTRL_P2SMB;
1650                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1651                         spin_unlock_irqrestore(&s->lock, flags);
1652                 }
1653                 return 0;
1654
1655         case SNDCTL_DSP_CHANNELS:
1656                 if (get_user(val, p))
1657                         return -EFAULT;
1658                 if (val != 0) {
1659                         if (file->f_mode & FMODE_READ) {
1660                                 stop_adc(s);
1661                                 s->dma_adc.ready = 0;
1662                                 spin_lock_irqsave(&s->lock, flags);
1663                                 if (val >= 2)
1664                                         s->sctrl |= SCTRL_R1SMB;
1665                                 else
1666                                         s->sctrl &= ~SCTRL_R1SMB;
1667                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1668                                 spin_unlock_irqrestore(&s->lock, flags);
1669                         }
1670                         if (file->f_mode & FMODE_WRITE) {
1671                                 stop_dac2(s);
1672                                 s->dma_dac2.ready = 0;
1673                                 spin_lock_irqsave(&s->lock, flags);
1674                                 if (val >= 2)
1675                                         s->sctrl |= SCTRL_P2SMB;
1676                                 else
1677                                         s->sctrl &= ~SCTRL_P2SMB;
1678                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1679                                 spin_unlock_irqrestore(&s->lock, flags);
1680                         }
1681                 }
1682                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, p);
1683
1684         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1685                 return put_user(AFMT_S16_LE|AFMT_U8, p);
1686
1687         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1688                 if (get_user(val, p))
1689                         return -EFAULT;
1690                 if (val != AFMT_QUERY) {
1691                         if (file->f_mode & FMODE_READ) {
1692                                 stop_adc(s);
1693                                 s->dma_adc.ready = 0;
1694                                 spin_lock_irqsave(&s->lock, flags);
1695                                 if (val == AFMT_S16_LE)
1696                                         s->sctrl |= SCTRL_R1SEB;
1697                                 else
1698                                         s->sctrl &= ~SCTRL_R1SEB;
1699                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1700                                 spin_unlock_irqrestore(&s->lock, flags);
1701                         }
1702                         if (file->f_mode & FMODE_WRITE) {
1703                                 stop_dac2(s);
1704                                 s->dma_dac2.ready = 0;
1705                                 spin_lock_irqsave(&s->lock, flags);
1706                                 if (val == AFMT_S16_LE)
1707                                         s->sctrl |= SCTRL_P2SEB;
1708                                 else
1709                                         s->sctrl &= ~SCTRL_P2SEB;
1710                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1711                                 spin_unlock_irqrestore(&s->lock, flags);
1712                         }
1713                 }
1714                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
1715                                 AFMT_S16_LE : AFMT_U8, p);
1716
1717         case SNDCTL_DSP_POST:
1718                 return 0;
1719
1720         case SNDCTL_DSP_GETTRIGGER:
1721                 val = 0;
1722                 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1723                         val |= PCM_ENABLE_INPUT;
1724                 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1725                         val |= PCM_ENABLE_OUTPUT;
1726                 return put_user(val, p);
1727
1728         case SNDCTL_DSP_SETTRIGGER:
1729                 if (get_user(val, p))
1730                         return -EFAULT;
1731                 if (file->f_mode & FMODE_READ) {
1732                         if (val & PCM_ENABLE_INPUT) {
1733                                 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1734                                         return ret;
1735                                 s->dma_adc.enabled = 1;
1736                                 start_adc(s);
1737                         } else {
1738                                 s->dma_adc.enabled = 0;
1739                                 stop_adc(s);
1740                         }
1741                 }
1742                 if (file->f_mode & FMODE_WRITE) {
1743                         if (val & PCM_ENABLE_OUTPUT) {
1744                                 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1745                                         return ret;
1746                                 s->dma_dac2.enabled = 1;
1747                                 start_dac2(s);
1748                         } else {
1749                                 s->dma_dac2.enabled = 0;
1750                                 stop_dac2(s);
1751                         }
1752                 }
1753                 return 0;
1754
1755         case SNDCTL_DSP_GETOSPACE:
1756                 if (!(file->f_mode & FMODE_WRITE))
1757                         return -EINVAL;
1758                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1759                         return val;
1760                 spin_lock_irqsave(&s->lock, flags);
1761                 es1371_update_ptr(s);
1762                 abinfo.fragsize = s->dma_dac2.fragsize;
1763                 count = s->dma_dac2.count;
1764                 if (count < 0)
1765                         count = 0;
1766                 abinfo.bytes = s->dma_dac2.dmasize - count;
1767                 abinfo.fragstotal = s->dma_dac2.numfrag;
1768                 abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
1769                 spin_unlock_irqrestore(&s->lock, flags);
1770                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1771
1772         case SNDCTL_DSP_GETISPACE:
1773                 if (!(file->f_mode & FMODE_READ))
1774                         return -EINVAL;
1775                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1776                         return val;
1777                 spin_lock_irqsave(&s->lock, flags);
1778                 es1371_update_ptr(s);
1779                 abinfo.fragsize = s->dma_adc.fragsize;
1780                 count = s->dma_adc.count;
1781                 if (count < 0)
1782                         count = 0;
1783                 abinfo.bytes = count;
1784                 abinfo.fragstotal = s->dma_adc.numfrag;
1785                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1786                 spin_unlock_irqrestore(&s->lock, flags);
1787                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1788
1789         case SNDCTL_DSP_NONBLOCK:
1790                 file->f_flags |= O_NONBLOCK;
1791                 return 0;
1792
1793         case SNDCTL_DSP_GETODELAY:
1794                 if (!(file->f_mode & FMODE_WRITE))
1795                         return -EINVAL;
1796                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1797                         return val;
1798                 spin_lock_irqsave(&s->lock, flags);
1799                 es1371_update_ptr(s);
1800                 count = s->dma_dac2.count;
1801                 spin_unlock_irqrestore(&s->lock, flags);
1802                 if (count < 0)
1803                         count = 0;
1804                 return put_user(count, p);
1805
1806         case SNDCTL_DSP_GETIPTR:
1807                 if (!(file->f_mode & FMODE_READ))
1808                         return -EINVAL;
1809                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1810                         return val;
1811                 spin_lock_irqsave(&s->lock, flags);
1812                 es1371_update_ptr(s);
1813                 cinfo.bytes = s->dma_adc.total_bytes;
1814                 count = s->dma_adc.count;
1815                 if (count < 0)
1816                         count = 0;
1817                 cinfo.blocks = count >> s->dma_adc.fragshift;
1818                 cinfo.ptr = s->dma_adc.hwptr;
1819                 if (s->dma_adc.mapped)
1820                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1821                 spin_unlock_irqrestore(&s->lock, flags);
1822                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1823                         return -EFAULT;
1824                 return 0;
1825
1826         case SNDCTL_DSP_GETOPTR:
1827                 if (!(file->f_mode & FMODE_WRITE))
1828                         return -EINVAL;
1829                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1830                         return val;
1831                 spin_lock_irqsave(&s->lock, flags);
1832                 es1371_update_ptr(s);
1833                 cinfo.bytes = s->dma_dac2.total_bytes;
1834                 count = s->dma_dac2.count;
1835                 if (count < 0)
1836                         count = 0;
1837                 cinfo.blocks = count >> s->dma_dac2.fragshift;
1838                 cinfo.ptr = s->dma_dac2.hwptr;
1839                 if (s->dma_dac2.mapped)
1840                         s->dma_dac2.count &= s->dma_dac2.fragsize-1;
1841                 spin_unlock_irqrestore(&s->lock, flags);
1842                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1843                         return -EFAULT;
1844                 return 0;
1845
1846         case SNDCTL_DSP_GETBLKSIZE:
1847                 if (file->f_mode & FMODE_WRITE) {
1848                         if ((val = prog_dmabuf_dac2(s)))
1849                                 return val;
1850                         return put_user(s->dma_dac2.fragsize, p);
1851                 }
1852                 if ((val = prog_dmabuf_adc(s)))
1853                         return val;
1854                 return put_user(s->dma_adc.fragsize, p);
1855
1856         case SNDCTL_DSP_SETFRAGMENT:
1857                 if (get_user(val, p))
1858                         return -EFAULT;
1859                 if (file->f_mode & FMODE_READ) {
1860                         s->dma_adc.ossfragshift = val & 0xffff;
1861                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1862                         if (s->dma_adc.ossfragshift < 4)
1863                                 s->dma_adc.ossfragshift = 4;
1864                         if (s->dma_adc.ossfragshift > 15)
1865                                 s->dma_adc.ossfragshift = 15;
1866                         if (s->dma_adc.ossmaxfrags < 4)
1867                                 s->dma_adc.ossmaxfrags = 4;
1868                 }
1869                 if (file->f_mode & FMODE_WRITE) {
1870                         s->dma_dac2.ossfragshift = val & 0xffff;
1871                         s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
1872                         if (s->dma_dac2.ossfragshift < 4)
1873                                 s->dma_dac2.ossfragshift = 4;
1874                         if (s->dma_dac2.ossfragshift > 15)
1875                                 s->dma_dac2.ossfragshift = 15;
1876                         if (s->dma_dac2.ossmaxfrags < 4)
1877                                 s->dma_dac2.ossmaxfrags = 4;
1878                 }
1879                 return 0;
1880
1881         case SNDCTL_DSP_SUBDIVIDE:
1882                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1883                     (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1884                         return -EINVAL;
1885                 if (get_user(val, p))
1886                         return -EFAULT;
1887                 if (val != 1 && val != 2 && val != 4)
1888                         return -EINVAL;
1889                 if (file->f_mode & FMODE_READ)
1890                         s->dma_adc.subdivision = val;
1891                 if (file->f_mode & FMODE_WRITE)
1892                         s->dma_dac2.subdivision = val;
1893                 return 0;
1894
1895         case SOUND_PCM_READ_RATE:
1896                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, p);
1897
1898         case SOUND_PCM_READ_CHANNELS:
1899                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, p);
1900
1901         case SOUND_PCM_READ_BITS:
1902                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ? 16 : 8, p);
1903
1904         case SOUND_PCM_WRITE_FILTER:
1905         case SNDCTL_DSP_SETSYNCRO:
1906         case SOUND_PCM_READ_FILTER:
1907                 return -EINVAL;
1908
1909         }
1910         return mixdev_ioctl(s->codec, cmd, arg);
1911 }
1912
1913 static int es1371_open(struct inode *inode, struct file *file)
1914 {
1915         int minor = iminor(inode);
1916         DECLARE_WAITQUEUE(wait, current);
1917         unsigned long flags;
1918         struct list_head *list;
1919         struct es1371_state *s;
1920
1921         for (list = devs.next; ; list = list->next) {
1922                 if (list == &devs)
1923                         return -ENODEV;
1924                 s = list_entry(list, struct es1371_state, devs);
1925                 if (!((s->dev_audio ^ minor) & ~0xf))
1926                         break;
1927         }
1928         VALIDATE_STATE(s);
1929         file->private_data = s;
1930         /* wait for device to become free */
1931         down(&s->open_sem);
1932         while (s->open_mode & file->f_mode) {
1933                 if (file->f_flags & O_NONBLOCK) {
1934                         up(&s->open_sem);
1935                         return -EBUSY;
1936                 }
1937                 add_wait_queue(&s->open_wait, &wait);
1938                 __set_current_state(TASK_INTERRUPTIBLE);
1939                 up(&s->open_sem);
1940                 schedule();
1941                 remove_wait_queue(&s->open_wait, &wait);
1942                 set_current_state(TASK_RUNNING);
1943                 if (signal_pending(current))
1944                         return -ERESTARTSYS;
1945                 down(&s->open_sem);
1946         }
1947         if (file->f_mode & FMODE_READ) {
1948                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1949                 s->dma_adc.enabled = 1;
1950                 set_adc_rate(s, 8000);
1951         }
1952         if (file->f_mode & FMODE_WRITE) {
1953                 s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
1954                 s->dma_dac2.enabled = 1;
1955                 set_dac2_rate(s, 8000);
1956         }
1957         spin_lock_irqsave(&s->lock, flags);
1958         if (file->f_mode & FMODE_READ) {
1959                 s->sctrl &= ~SCTRL_R1FMT;
1960                 if ((minor & 0xf) == SND_DEV_DSP16)
1961                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_R1FMT;
1962                 else
1963                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_R1FMT;
1964         }
1965         if (file->f_mode & FMODE_WRITE) {
1966                 s->sctrl &= ~SCTRL_P2FMT;
1967                 if ((minor & 0xf) == SND_DEV_DSP16)
1968                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P2FMT;
1969                 else
1970                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P2FMT;
1971         }
1972         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1973         spin_unlock_irqrestore(&s->lock, flags);
1974         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1975         up(&s->open_sem);
1976         init_MUTEX(&s->sem);
1977         return nonseekable_open(inode, file);
1978 }
1979
1980 static int es1371_release(struct inode *inode, struct file *file)
1981 {
1982         struct es1371_state *s = (struct es1371_state *)file->private_data;
1983
1984         VALIDATE_STATE(s);
1985         lock_kernel();
1986         if (file->f_mode & FMODE_WRITE)
1987                 drain_dac2(s, file->f_flags & O_NONBLOCK);
1988         down(&s->open_sem);
1989         if (file->f_mode & FMODE_WRITE) {
1990                 stop_dac2(s);
1991                 dealloc_dmabuf(s, &s->dma_dac2);
1992         }
1993         if (file->f_mode & FMODE_READ) {
1994                 stop_adc(s);
1995                 dealloc_dmabuf(s, &s->dma_adc);
1996         }
1997         s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
1998         up(&s->open_sem);
1999         wake_up(&s->open_wait);
2000         unlock_kernel();
2001         return 0;
2002 }
2003
2004 static /*const*/ struct file_operations es1371_audio_fops = {
2005         .owner          = THIS_MODULE,
2006         .llseek         = no_llseek,
2007         .read           = es1371_read,
2008         .write          = es1371_write,
2009         .poll           = es1371_poll,
2010         .ioctl          = es1371_ioctl,
2011         .mmap           = es1371_mmap,
2012         .open           = es1371_open,
2013         .release        = es1371_release,
2014 };
2015
2016 /* --------------------------------------------------------------------- */
2017
2018 static ssize_t es1371_write_dac(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2019 {
2020         struct es1371_state *s = (struct es1371_state *)file->private_data;
2021         DECLARE_WAITQUEUE(wait, current);
2022         ssize_t ret = 0;
2023         unsigned long flags;
2024         unsigned swptr;
2025         int cnt;
2026
2027         VALIDATE_STATE(s);
2028         if (s->dma_dac1.mapped)
2029                 return -ENXIO;
2030         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2031                 return ret;
2032         if (!access_ok(VERIFY_READ, buffer, count))
2033                 return -EFAULT;
2034         add_wait_queue(&s->dma_dac1.wait, &wait);
2035         while (count > 0) {
2036                 spin_lock_irqsave(&s->lock, flags);
2037                 if (s->dma_dac1.count < 0) {
2038                         s->dma_dac1.count = 0;
2039                         s->dma_dac1.swptr = s->dma_dac1.hwptr;
2040                 }
2041                 swptr = s->dma_dac1.swptr;
2042                 cnt = s->dma_dac1.dmasize-swptr;
2043                 if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
2044                         cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
2045                 if (cnt <= 0)
2046                         __set_current_state(TASK_INTERRUPTIBLE);
2047                 spin_unlock_irqrestore(&s->lock, flags);
2048                 if (cnt > count)
2049                         cnt = count;
2050                 if (cnt <= 0) {
2051                         if (s->dma_dac1.enabled)
2052                                 start_dac1(s);
2053                         if (file->f_flags & O_NONBLOCK) {
2054                                 if (!ret)
2055                                         ret = -EAGAIN;
2056                                 break;
2057                         }
2058                         schedule();
2059                         if (signal_pending(current)) {
2060                                 if (!ret)
2061                                         ret = -ERESTARTSYS;
2062                                 break;
2063                         }
2064                         continue;
2065                 }
2066                 if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt)) {
2067                         if (!ret)
2068                                 ret = -EFAULT;
2069                         break;
2070                 }
2071                 swptr = (swptr + cnt) % s->dma_dac1.dmasize;
2072                 spin_lock_irqsave(&s->lock, flags);
2073                 s->dma_dac1.swptr = swptr;
2074                 s->dma_dac1.count += cnt;
2075                 s->dma_dac1.endcleared = 0;
2076                 spin_unlock_irqrestore(&s->lock, flags);
2077                 count -= cnt;
2078                 buffer += cnt;
2079                 ret += cnt;
2080                 if (s->dma_dac1.enabled)
2081                         start_dac1(s);
2082         }
2083         remove_wait_queue(&s->dma_dac1.wait, &wait);
2084         set_current_state(TASK_RUNNING);
2085         return ret;
2086 }
2087
2088 /* No kernel lock - we have our own spinlock */
2089 static unsigned int es1371_poll_dac(struct file *file, struct poll_table_struct *wait)
2090 {
2091         struct es1371_state *s = (struct es1371_state *)file->private_data;
2092         unsigned long flags;
2093         unsigned int mask = 0;
2094
2095         VALIDATE_STATE(s);
2096         if (!s->dma_dac1.ready && prog_dmabuf_dac1(s))
2097                 return 0;
2098         poll_wait(file, &s->dma_dac1.wait, wait);
2099         spin_lock_irqsave(&s->lock, flags);
2100         es1371_update_ptr(s);
2101         if (s->dma_dac1.mapped) {
2102                 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
2103                         mask |= POLLOUT | POLLWRNORM;
2104         } else {
2105                 if ((signed)s->dma_dac1.dmasize >= s->dma_dac1.count + (signed)s->dma_dac1.fragsize)
2106                         mask |= POLLOUT | POLLWRNORM;
2107         }
2108         spin_unlock_irqrestore(&s->lock, flags);
2109         return mask;
2110 }
2111
2112 static int es1371_mmap_dac(struct file *file, struct vm_area_struct *vma)
2113 {
2114         struct es1371_state *s = (struct es1371_state *)file->private_data;
2115         int ret;
2116         unsigned long size;
2117
2118         VALIDATE_STATE(s);
2119         if (!(vma->vm_flags & VM_WRITE))
2120                 return -EINVAL;
2121         lock_kernel();
2122         if ((ret = prog_dmabuf_dac1(s)) != 0)
2123                 goto out;
2124         ret = -EINVAL;
2125         if (vma->vm_pgoff != 0)
2126                 goto out;
2127         size = vma->vm_end - vma->vm_start;
2128         if (size > (PAGE_SIZE << s->dma_dac1.buforder))
2129                 goto out;
2130         ret = -EAGAIN;
2131         if (remap_page_range(vma, vma->vm_start, virt_to_phys(s->dma_dac1.rawbuf), size, vma->vm_page_prot))
2132                 goto out;
2133         s->dma_dac1.mapped = 1;
2134         ret = 0;
2135 out:
2136         unlock_kernel();
2137         return ret;
2138 }
2139
2140 static int es1371_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2141 {
2142         struct es1371_state *s = (struct es1371_state *)file->private_data;
2143         unsigned long flags;
2144         audio_buf_info abinfo;
2145         count_info cinfo;
2146         int count;
2147         int val, ret;
2148         int __user *p = (int __user *)arg;
2149
2150         VALIDATE_STATE(s);
2151         switch (cmd) {
2152         case OSS_GETVERSION:
2153                 return put_user(SOUND_VERSION, p);
2154
2155         case SNDCTL_DSP_SYNC:
2156                 return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
2157
2158         case SNDCTL_DSP_SETDUPLEX:
2159                 return -EINVAL;
2160
2161         case SNDCTL_DSP_GETCAPS:
2162                 return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
2163
2164         case SNDCTL_DSP_RESET:
2165                 stop_dac1(s);
2166                 synchronize_irq(s->irq);
2167                 s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
2168                 return 0;
2169
2170         case SNDCTL_DSP_SPEED:
2171                 if (get_user(val, p))
2172                         return -EFAULT;
2173                 if (val >= 0) {
2174                         stop_dac1(s);
2175                         s->dma_dac1.ready = 0;
2176                         set_dac1_rate(s, val);
2177                 }
2178                 return put_user(s->dac1rate, p);
2179
2180         case SNDCTL_DSP_STEREO:
2181                 if (get_user(val, p))
2182                         return -EFAULT;
2183                 stop_dac1(s);
2184                 s->dma_dac1.ready = 0;
2185                 spin_lock_irqsave(&s->lock, flags);
2186                 if (val)
2187                         s->sctrl |= SCTRL_P1SMB;
2188                 else
2189                         s->sctrl &= ~SCTRL_P1SMB;
2190                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2191                 spin_unlock_irqrestore(&s->lock, flags);
2192                 return 0;
2193
2194         case SNDCTL_DSP_CHANNELS:
2195                 if (get_user(val, p))
2196                         return -EFAULT;
2197                 if (val != 0) {
2198                         stop_dac1(s);
2199                         s->dma_dac1.ready = 0;
2200                         spin_lock_irqsave(&s->lock, flags);
2201                         if (val >= 2)
2202                                 s->sctrl |= SCTRL_P1SMB;
2203                         else
2204                                 s->sctrl &= ~SCTRL_P1SMB;
2205                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2206                         spin_unlock_irqrestore(&s->lock, flags);
2207                 }
2208                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
2209
2210         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2211                 return put_user(AFMT_S16_LE|AFMT_U8, p);
2212
2213         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2214                 if (get_user(val, p))
2215                         return -EFAULT;
2216                 if (val != AFMT_QUERY) {
2217                         stop_dac1(s);
2218                         s->dma_dac1.ready = 0;
2219                         spin_lock_irqsave(&s->lock, flags);
2220                         if (val == AFMT_S16_LE)
2221                                 s->sctrl |= SCTRL_P1SEB;
2222                         else
2223                                 s->sctrl &= ~SCTRL_P1SEB;
2224                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2225                         spin_unlock_irqrestore(&s->lock, flags);
2226                 }
2227                 return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, p);
2228
2229         case SNDCTL_DSP_POST:
2230                 return 0;
2231
2232         case SNDCTL_DSP_GETTRIGGER:
2233                 return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, p);
2234
2235         case SNDCTL_DSP_SETTRIGGER:
2236                 if (get_user(val, p))
2237                         return -EFAULT;
2238                 if (val & PCM_ENABLE_OUTPUT) {
2239                         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2240                                 return ret;
2241                         s->dma_dac1.enabled = 1;
2242                         start_dac1(s);
2243                 } else {
2244                         s->dma_dac1.enabled = 0;
2245                         stop_dac1(s);
2246                 }
2247                 return 0;
2248
2249         case SNDCTL_DSP_GETOSPACE:
2250                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2251                         return val;
2252                 spin_lock_irqsave(&s->lock, flags);
2253                 es1371_update_ptr(s);
2254                 abinfo.fragsize = s->dma_dac1.fragsize;
2255                 count = s->dma_dac1.count;
2256                 if (count < 0)
2257                         count = 0;
2258                 abinfo.bytes = s->dma_dac1.dmasize - count;
2259                 abinfo.fragstotal = s->dma_dac1.numfrag;
2260                 abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
2261                 spin_unlock_irqrestore(&s->lock, flags);
2262                 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2263
2264         case SNDCTL_DSP_NONBLOCK:
2265                 file->f_flags |= O_NONBLOCK;
2266                 return 0;
2267
2268         case SNDCTL_DSP_GETODELAY:
2269                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2270                         return val;
2271                 spin_lock_irqsave(&s->lock, flags);
2272                 es1371_update_ptr(s);
2273                 count = s->dma_dac1.count;
2274                 spin_unlock_irqrestore(&s->lock, flags);
2275                 if (count < 0)
2276                         count = 0;
2277                 return put_user(count, p);
2278
2279         case SNDCTL_DSP_GETOPTR:
2280                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2281                         return val;
2282                 spin_lock_irqsave(&s->lock, flags);
2283                 es1371_update_ptr(s);
2284                 cinfo.bytes = s->dma_dac1.total_bytes;
2285                 count = s->dma_dac1.count;
2286                 if (count < 0)
2287                         count = 0;
2288                 cinfo.blocks = count >> s->dma_dac1.fragshift;
2289                 cinfo.ptr = s->dma_dac1.hwptr;
2290                 if (s->dma_dac1.mapped)
2291                         s->dma_dac1.count &= s->dma_dac1.fragsize-1;
2292                 spin_unlock_irqrestore(&s->lock, flags);
2293                 if (copy_to_user((void __user *)arg, &cinfo, sizeof(cinfo)))
2294                         return -EFAULT;
2295                 return 0;
2296
2297         case SNDCTL_DSP_GETBLKSIZE:
2298                 if ((val = prog_dmabuf_dac1(s)))
2299                         return val;
2300                 return put_user(s->dma_dac1.fragsize, p);
2301
2302         case SNDCTL_DSP_SETFRAGMENT:
2303                 if (get_user(val, p))
2304                         return -EFAULT;
2305                 s->dma_dac1.ossfragshift = val & 0xffff;
2306                 s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
2307                 if (s->dma_dac1.ossfragshift < 4)
2308                         s->dma_dac1.ossfragshift = 4;
2309                 if (s->dma_dac1.ossfragshift > 15)
2310                         s->dma_dac1.ossfragshift = 15;
2311                 if (s->dma_dac1.ossmaxfrags < 4)
2312                         s->dma_dac1.ossmaxfrags = 4;
2313                 return 0;
2314
2315         case SNDCTL_DSP_SUBDIVIDE:
2316                 if (s->dma_dac1.subdivision)
2317                         return -EINVAL;
2318                 if (get_user(val, p))
2319                         return -EFAULT;
2320                 if (val != 1 && val != 2 && val != 4)
2321                         return -EINVAL;
2322                 s->dma_dac1.subdivision = val;
2323                 return 0;
2324
2325         case SOUND_PCM_READ_RATE:
2326                 return put_user(s->dac1rate, p);
2327
2328         case SOUND_PCM_READ_CHANNELS:
2329                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
2330
2331         case SOUND_PCM_READ_BITS:
2332                 return put_user((s->sctrl & SCTRL_P1SEB) ? 16 : 8, p);
2333
2334         case SOUND_PCM_WRITE_FILTER:
2335         case SNDCTL_DSP_SETSYNCRO:
2336         case SOUND_PCM_READ_FILTER:
2337                 return -EINVAL;
2338
2339         }
2340         return mixdev_ioctl(s->codec, cmd, arg);
2341 }
2342
2343 static int es1371_open_dac(struct inode *inode, struct file *file)
2344 {
2345         int minor = iminor(inode);
2346         DECLARE_WAITQUEUE(wait, current);
2347         unsigned long flags;
2348         struct list_head *list;
2349         struct es1371_state *s;
2350
2351         for (list = devs.next; ; list = list->next) {
2352                 if (list == &devs)
2353                         return -ENODEV;
2354                 s = list_entry(list, struct es1371_state, devs);
2355                 if (!((s->dev_dac ^ minor) & ~0xf))
2356                         break;
2357         }
2358         VALIDATE_STATE(s);
2359         /* we allow opening with O_RDWR, most programs do it although they will only write */
2360 #if 0
2361         if (file->f_mode & FMODE_READ)
2362                 return -EPERM;
2363 #endif
2364         if (!(file->f_mode & FMODE_WRITE))
2365                 return -EINVAL;
2366         file->private_data = s;
2367         /* wait for device to become free */
2368         down(&s->open_sem);
2369         while (s->open_mode & FMODE_DAC) {
2370                 if (file->f_flags & O_NONBLOCK) {
2371                         up(&s->open_sem);
2372                         return -EBUSY;
2373                 }
2374                 add_wait_queue(&s->open_wait, &wait);
2375                 __set_current_state(TASK_INTERRUPTIBLE);
2376                 up(&s->open_sem);
2377                 schedule();
2378                 remove_wait_queue(&s->open_wait, &wait);
2379                 set_current_state(TASK_RUNNING);
2380                 if (signal_pending(current))
2381                         return -ERESTARTSYS;
2382                 down(&s->open_sem);
2383         }
2384         s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
2385         s->dma_dac1.enabled = 1;
2386         set_dac1_rate(s, 8000);
2387         spin_lock_irqsave(&s->lock, flags);
2388         s->sctrl &= ~SCTRL_P1FMT;
2389         if ((minor & 0xf) == SND_DEV_DSP16)
2390                 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P1FMT;
2391         else
2392                 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P1FMT;
2393         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2394         spin_unlock_irqrestore(&s->lock, flags);
2395         s->open_mode |= FMODE_DAC;
2396         up(&s->open_sem);
2397         return nonseekable_open(inode, file);
2398 }
2399
2400 static int es1371_release_dac(struct inode *inode, struct file *file)
2401 {
2402         struct es1371_state *s = (struct es1371_state *)file->private_data;
2403
2404         VALIDATE_STATE(s);
2405         lock_kernel();
2406         drain_dac1(s, file->f_flags & O_NONBLOCK);
2407         down(&s->open_sem);
2408         stop_dac1(s);
2409         dealloc_dmabuf(s, &s->dma_dac1);
2410         s->open_mode &= ~FMODE_DAC;
2411         up(&s->open_sem);
2412         wake_up(&s->open_wait);
2413         unlock_kernel();
2414         return 0;
2415 }
2416
2417 static /*const*/ struct file_operations es1371_dac_fops = {
2418         .owner          = THIS_MODULE,
2419         .llseek         = no_llseek,
2420         .write          = es1371_write_dac,
2421         .poll           = es1371_poll_dac,
2422         .ioctl          = es1371_ioctl_dac,
2423         .mmap           = es1371_mmap_dac,
2424         .open           = es1371_open_dac,
2425         .release        = es1371_release_dac,
2426 };
2427
2428 /* --------------------------------------------------------------------- */
2429
2430 static ssize_t es1371_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2431 {
2432         struct es1371_state *s = (struct es1371_state *)file->private_data;
2433         DECLARE_WAITQUEUE(wait, current);
2434         ssize_t ret;
2435         unsigned long flags;
2436         unsigned ptr;
2437         int cnt;
2438
2439         VALIDATE_STATE(s);
2440         if (!access_ok(VERIFY_WRITE, buffer, count))
2441                 return -EFAULT;
2442         if (count == 0)
2443                 return 0;
2444         ret = 0;
2445         add_wait_queue(&s->midi.iwait, &wait);
2446         while (count > 0) {
2447                 spin_lock_irqsave(&s->lock, flags);
2448                 ptr = s->midi.ird;
2449                 cnt = MIDIINBUF - ptr;
2450                 if (s->midi.icnt < cnt)
2451                         cnt = s->midi.icnt;
2452                 if (cnt <= 0)
2453                         __set_current_state(TASK_INTERRUPTIBLE);
2454                 spin_unlock_irqrestore(&s->lock, flags);
2455                 if (cnt > count)
2456                         cnt = count;
2457                 if (cnt <= 0) {
2458                         if (file->f_flags & O_NONBLOCK) {
2459                                 if (!ret)
2460                                         ret = -EAGAIN;
2461                                 break;
2462                         }
2463                         schedule();
2464                         if (signal_pending(current)) {
2465                                 if (!ret)
2466                                         ret = -ERESTARTSYS;
2467                                 break;
2468                         }
2469                         continue;
2470                 }
2471                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2472                         if (!ret)
2473                                 ret = -EFAULT;
2474                         break;
2475                 }
2476                 ptr = (ptr + cnt) % MIDIINBUF;
2477                 spin_lock_irqsave(&s->lock, flags);
2478                 s->midi.ird = ptr;
2479                 s->midi.icnt -= cnt;
2480                 spin_unlock_irqrestore(&s->lock, flags);
2481                 count -= cnt;
2482                 buffer += cnt;
2483                 ret += cnt;
2484                 break;
2485         }
2486         __set_current_state(TASK_RUNNING);
2487         remove_wait_queue(&s->midi.iwait, &wait);
2488         return ret;
2489 }
2490
2491 static ssize_t es1371_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2492 {
2493         struct es1371_state *s = (struct es1371_state *)file->private_data;
2494         DECLARE_WAITQUEUE(wait, current);
2495         ssize_t ret;
2496         unsigned long flags;
2497         unsigned ptr;
2498         int cnt;
2499
2500         VALIDATE_STATE(s);
2501         if (!access_ok(VERIFY_READ, buffer, count))
2502                 return -EFAULT;
2503         if (count == 0)
2504                 return 0;
2505         ret = 0;
2506         add_wait_queue(&s->midi.owait, &wait);
2507         while (count > 0) {
2508                 spin_lock_irqsave(&s->lock, flags);
2509                 ptr = s->midi.owr;
2510                 cnt = MIDIOUTBUF - ptr;
2511                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2512                         cnt = MIDIOUTBUF - s->midi.ocnt;
2513                 if (cnt <= 0) {
2514                         __set_current_state(TASK_INTERRUPTIBLE);
2515                         es1371_handle_midi(s);
2516                 }
2517                 spin_unlock_irqrestore(&s->lock, flags);
2518                 if (cnt > count)
2519                         cnt = count;
2520                 if (cnt <= 0) {
2521                         if (file->f_flags & O_NONBLOCK) {
2522                                 if (!ret)
2523                                         ret = -EAGAIN;
2524                                 break;
2525                         }
2526                         schedule();
2527                         if (signal_pending(current)) {
2528                                 if (!ret)
2529                                         ret = -ERESTARTSYS;
2530                                 break;
2531                         }
2532                         continue;
2533                 }
2534                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2535                         if (!ret)
2536                                 ret = -EFAULT;
2537                         break;
2538                 }
2539                 ptr = (ptr + cnt) % MIDIOUTBUF;
2540                 spin_lock_irqsave(&s->lock, flags);
2541                 s->midi.owr = ptr;
2542                 s->midi.ocnt += cnt;
2543                 spin_unlock_irqrestore(&s->lock, flags);
2544                 count -= cnt;
2545                 buffer += cnt;
2546                 ret += cnt;
2547                 spin_lock_irqsave(&s->lock, flags);
2548                 es1371_handle_midi(s);
2549                 spin_unlock_irqrestore(&s->lock, flags);
2550         }
2551         __set_current_state(TASK_RUNNING);
2552         remove_wait_queue(&s->midi.owait, &wait);
2553         return ret;
2554 }
2555
2556 /* No kernel lock - we have our own spinlock */
2557 static unsigned int es1371_midi_poll(struct file *file, struct poll_table_struct *wait)
2558 {
2559         struct es1371_state *s = (struct es1371_state *)file->private_data;
2560         unsigned long flags;
2561         unsigned int mask = 0;
2562
2563         VALIDATE_STATE(s);
2564         if (file->f_mode & FMODE_WRITE)
2565                 poll_wait(file, &s->midi.owait, wait);
2566         if (file->f_mode & FMODE_READ)
2567                 poll_wait(file, &s->midi.iwait, wait);
2568         spin_lock_irqsave(&s->lock, flags);
2569         if (file->f_mode & FMODE_READ) {
2570                 if (s->midi.icnt > 0)
2571                         mask |= POLLIN | POLLRDNORM;
2572         }
2573         if (file->f_mode & FMODE_WRITE) {
2574                 if (s->midi.ocnt < MIDIOUTBUF)
2575                         mask |= POLLOUT | POLLWRNORM;
2576         }
2577         spin_unlock_irqrestore(&s->lock, flags);
2578         return mask;
2579 }
2580
2581 static int es1371_midi_open(struct inode *inode, struct file *file)
2582 {
2583         int minor = iminor(inode);
2584         DECLARE_WAITQUEUE(wait, current);
2585         unsigned long flags;
2586         struct list_head *list;
2587         struct es1371_state *s;
2588
2589         for (list = devs.next; ; list = list->next) {
2590                 if (list == &devs)
2591                         return -ENODEV;
2592                 s = list_entry(list, struct es1371_state, devs);
2593                 if (s->dev_midi == minor)
2594                         break;
2595         }
2596         VALIDATE_STATE(s);
2597         file->private_data = s;
2598         /* wait for device to become free */
2599         down(&s->open_sem);
2600         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2601                 if (file->f_flags & O_NONBLOCK) {
2602                         up(&s->open_sem);
2603                         return -EBUSY;
2604                 }
2605                 add_wait_queue(&s->open_wait, &wait);
2606                 __set_current_state(TASK_INTERRUPTIBLE);
2607                 up(&s->open_sem);
2608                 schedule();
2609                 remove_wait_queue(&s->open_wait, &wait);
2610                 set_current_state(TASK_RUNNING);
2611                 if (signal_pending(current))
2612                         return -ERESTARTSYS;
2613                 down(&s->open_sem);
2614         }
2615         spin_lock_irqsave(&s->lock, flags);
2616         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2617                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2618                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2619                 outb(UCTRL_CNTRL_SWR, s->io+ES1371_REG_UART_CONTROL);
2620                 outb(0, s->io+ES1371_REG_UART_CONTROL);
2621                 outb(0, s->io+ES1371_REG_UART_TEST);
2622         }
2623         if (file->f_mode & FMODE_READ) {
2624                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2625         }
2626         if (file->f_mode & FMODE_WRITE) {
2627                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2628         }
2629         s->ctrl |= CTRL_UART_EN;
2630         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2631         es1371_handle_midi(s);
2632         spin_unlock_irqrestore(&s->lock, flags);
2633         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2634         up(&s->open_sem);
2635         return nonseekable_open(inode, file);
2636 }
2637
2638 static int es1371_midi_release(struct inode *inode, struct file *file)
2639 {
2640         struct es1371_state *s = (struct es1371_state *)file->private_data;
2641         DECLARE_WAITQUEUE(wait, current);
2642         unsigned long flags;
2643         unsigned count, tmo;
2644
2645         VALIDATE_STATE(s);
2646         lock_kernel();
2647         if (file->f_mode & FMODE_WRITE) {
2648                 add_wait_queue(&s->midi.owait, &wait);
2649                 for (;;) {
2650                         __set_current_state(TASK_INTERRUPTIBLE);
2651                         spin_lock_irqsave(&s->lock, flags);
2652                         count = s->midi.ocnt;
2653                         spin_unlock_irqrestore(&s->lock, flags);
2654                         if (count <= 0)
2655                                 break;
2656                         if (signal_pending(current))
2657                                 break;
2658                         if (file->f_flags & O_NONBLOCK)
2659                                 break;
2660                         tmo = (count * HZ) / 3100;
2661                         if (!schedule_timeout(tmo ? : 1) && tmo)
2662                                 printk(KERN_DEBUG PFX "midi timed out??\n");
2663                 }
2664                 remove_wait_queue(&s->midi.owait, &wait);
2665                 set_current_state(TASK_RUNNING);
2666         }
2667         down(&s->open_sem);
2668         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2669         spin_lock_irqsave(&s->lock, flags);
2670         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2671                 s->ctrl &= ~CTRL_UART_EN;
2672                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2673         }
2674         spin_unlock_irqrestore(&s->lock, flags);
2675         up(&s->open_sem);
2676         wake_up(&s->open_wait);
2677         unlock_kernel();
2678         return 0;
2679 }
2680
2681 static /*const*/ struct file_operations es1371_midi_fops = {
2682         .owner          = THIS_MODULE,
2683         .llseek         = no_llseek,
2684         .read           = es1371_midi_read,
2685         .write          = es1371_midi_write,
2686         .poll           = es1371_midi_poll,
2687         .open           = es1371_midi_open,
2688         .release        = es1371_midi_release,
2689 };
2690
2691 /* --------------------------------------------------------------------- */
2692
2693 /*
2694  * for debugging purposes, we'll create a proc device that dumps the
2695  * CODEC chipstate
2696  */
2697
2698 #ifdef ES1371_DEBUG
2699 static int proc_es1371_dump (char *buf, char **start, off_t fpos, int length, int *eof, void *data)
2700 {
2701         struct es1371_state *s;
2702         int cnt, len = 0;
2703
2704         if (list_empty(&devs))
2705                 return 0;
2706         s = list_entry(devs.next, struct es1371_state, devs);
2707         /* print out header */
2708         len += sprintf(buf + len, "\t\tCreative ES137x Debug Dump-o-matic\n");
2709
2710         /* print out CODEC state */
2711         len += sprintf (buf + len, "AC97 CODEC state\n");
2712         for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
2713                 len+= sprintf (buf + len, "reg:0x%02x  val:0x%04x\n", cnt, rdcodec(s->codec, cnt));
2714
2715         if (fpos >=len){
2716                 *start = buf;
2717                 *eof =1;
2718                 return 0;
2719         }
2720         *start = buf + fpos;
2721         if ((len -= fpos) > length)
2722                 return length;
2723         *eof =1;
2724         return len;
2725
2726 }
2727 #endif /* ES1371_DEBUG */
2728
2729 /* --------------------------------------------------------------------- */
2730
2731 /* maximum number of devices; only used for command line params */
2732 #define NR_DEVICE 5
2733
2734 static int spdif[NR_DEVICE];
2735 static int nomix[NR_DEVICE];
2736 static int amplifier[NR_DEVICE];
2737
2738 static unsigned int devindex;
2739
2740 MODULE_PARM(spdif, "1-" __MODULE_STRING(NR_DEVICE) "i");
2741 MODULE_PARM_DESC(spdif, "if 1 the output is in S/PDIF digital mode");
2742 MODULE_PARM(nomix, "1-" __MODULE_STRING(NR_DEVICE) "i");
2743 MODULE_PARM_DESC(nomix, "if 1 no analog audio is mixed to the digital output");
2744 MODULE_PARM(amplifier, "1-" __MODULE_STRING(NR_DEVICE) "i");
2745 MODULE_PARM_DESC(amplifier, "Set to 1 if the machine needs the amp control enabling (many laptops)");
2746
2747 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2748 MODULE_DESCRIPTION("ES1371 AudioPCI97 Driver");
2749 MODULE_LICENSE("GPL");
2750
2751
2752 /* --------------------------------------------------------------------- */
2753
2754 static struct initvol {
2755         int mixch;
2756         int vol;
2757 } initvol[] __initdata = {
2758         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2759         { SOUND_MIXER_WRITE_CD, 0x4040 },
2760         { MIXER_WRITE(SOUND_MIXER_VIDEO), 0x4040 },
2761         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2762         { SOUND_MIXER_WRITE_PCM, 0x4040 },
2763         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2764         { MIXER_WRITE(SOUND_MIXER_PHONEOUT), 0x4040 },
2765         { SOUND_MIXER_WRITE_OGAIN, 0x4040 },
2766         { MIXER_WRITE(SOUND_MIXER_PHONEIN), 0x4040 },
2767         { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2768         { SOUND_MIXER_WRITE_MIC, 0x4040 },
2769         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2770         { SOUND_MIXER_WRITE_IGAIN, 0x4040 }
2771 };
2772
2773 static struct
2774 {
2775         short svid, sdid;
2776 } amplifier_needed[] =
2777 {
2778         { 0x107B, 0x2150 },             /* Gateway Solo 2150 */
2779         { 0x13BD, 0x100C },             /* Mebius PC-MJ100V */
2780         { 0x1102, 0x5938 },             /* Targa Xtender 300 */
2781         { 0x1102, 0x8938 },             /* IPC notebook */
2782         { PCI_ANY_ID, PCI_ANY_ID }
2783 };
2784
2785
2786 static int __devinit es1371_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2787 {
2788         struct es1371_state *s;
2789         mm_segment_t fs;
2790         int i, val, res = -1;
2791         int idx;
2792         unsigned long tmo;
2793         signed long tmo2;
2794         unsigned int cssr;
2795
2796         if ((res=pci_enable_device(pcidev)))
2797                 return res;
2798
2799         if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO))
2800                 return -ENODEV;
2801         if (pcidev->irq == 0)
2802                 return -ENODEV;
2803         i = pci_set_dma_mask(pcidev, 0xffffffff);
2804         if (i) {
2805                 printk(KERN_WARNING "es1371: architecture does not support 32bit PCI busmaster DMA\n");
2806                 return i;
2807         }
2808         if (!(s = kmalloc(sizeof(struct es1371_state), GFP_KERNEL))) {
2809                 printk(KERN_WARNING PFX "out of memory\n");
2810                 return -ENOMEM;
2811         }
2812         memset(s, 0, sizeof(struct es1371_state));
2813
2814         s->codec = ac97_alloc_codec();
2815         if(s->codec == NULL)
2816                 goto err_codec;
2817
2818         init_waitqueue_head(&s->dma_adc.wait);
2819         init_waitqueue_head(&s->dma_dac1.wait);
2820         init_waitqueue_head(&s->dma_dac2.wait);
2821         init_waitqueue_head(&s->open_wait);
2822         init_waitqueue_head(&s->midi.iwait);
2823         init_waitqueue_head(&s->midi.owait);
2824         init_MUTEX(&s->open_sem);
2825         spin_lock_init(&s->lock);
2826         s->magic = ES1371_MAGIC;
2827         s->dev = pcidev;
2828         s->io = pci_resource_start(pcidev, 0);
2829         s->irq = pcidev->irq;
2830         s->vendor = pcidev->vendor;
2831         s->device = pcidev->device;
2832         pci_read_config_byte(pcidev, PCI_REVISION_ID, &s->rev);
2833         s->codec->private_data = s;
2834         s->codec->id = 0;
2835         s->codec->codec_read = rdcodec;
2836         s->codec->codec_write = wrcodec;
2837         printk(KERN_INFO PFX "found chip, vendor id 0x%04x device id 0x%04x revision 0x%02x\n",
2838                s->vendor, s->device, s->rev);
2839         if (!request_region(s->io, ES1371_EXTENT, "es1371")) {
2840                 printk(KERN_ERR PFX "io ports %#lx-%#lx in use\n", s->io, s->io+ES1371_EXTENT-1);
2841                 res = -EBUSY;
2842                 goto err_region;
2843         }
2844         if ((res=request_irq(s->irq, es1371_interrupt, SA_SHIRQ, "es1371",s))) {
2845                 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
2846                 goto err_irq;
2847         }
2848         printk(KERN_INFO PFX "found es1371 rev %d at io %#lx irq %u joystick %#x\n",
2849                s->rev, s->io, s->irq, s->gameport.io);
2850         /* register devices */
2851         if ((res=(s->dev_audio = register_sound_dsp(&es1371_audio_fops,-1)))<0)
2852                 goto err_dev1;
2853         if ((res=(s->codec->dev_mixer = register_sound_mixer(&es1371_mixer_fops, -1))) < 0)
2854                 goto err_dev2;
2855         if ((res=(s->dev_dac = register_sound_dsp(&es1371_dac_fops, -1))) < 0)
2856                 goto err_dev3;
2857         if ((res=(s->dev_midi = register_sound_midi(&es1371_midi_fops, -1)))<0 )
2858                 goto err_dev4;
2859 #ifdef ES1371_DEBUG
2860         /* initialize the debug proc device */
2861         s->ps = create_proc_read_entry("es1371",0,NULL,proc_es1371_dump,NULL);
2862 #endif /* ES1371_DEBUG */
2863
2864         /* initialize codec registers */
2865         s->ctrl = 0;
2866
2867         /* Check amplifier requirements */
2868
2869         if (amplifier[devindex])
2870                 s->ctrl |= CTRL_GPIO_OUT0;
2871         else for(idx = 0; amplifier_needed[idx].svid != PCI_ANY_ID; idx++)
2872         {
2873                 if(pcidev->subsystem_vendor == amplifier_needed[idx].svid &&
2874                    pcidev->subsystem_device == amplifier_needed[idx].sdid)
2875                 {
2876                         s->ctrl |= CTRL_GPIO_OUT0;   /* turn internal amplifier on */
2877                         printk(KERN_INFO PFX "Enabling internal amplifier.\n");
2878                 }
2879         }
2880         s->gameport.io = 0;
2881         for (i = 0x218; i >= 0x200; i -= 0x08) {
2882                 if (request_region(i, JOY_EXTENT, "es1371")) {
2883                         s->ctrl |= CTRL_JYSTK_EN | (((i >> 3) & CTRL_JOY_MASK) << CTRL_JOY_SHIFT);
2884                         s->gameport.io = i;
2885                         break;
2886                 }
2887         }
2888         if (!s->gameport.io)
2889                 printk(KERN_ERR PFX "no free joystick address found\n");
2890
2891         s->sctrl = 0;
2892         cssr = 0;
2893         s->spdif_volume = -1;
2894         /* check to see if s/pdif mode is being requested */
2895         if (spdif[devindex]) {
2896                 if (s->rev >= 4) {
2897                         printk(KERN_INFO PFX "enabling S/PDIF output\n");
2898                         s->spdif_volume = 0;
2899                         cssr |= STAT_EN_SPDIF;
2900                         s->ctrl |= CTRL_SPDIFEN_B;
2901                         if (nomix[devindex]) /* don't mix analog inputs to s/pdif output */
2902                                 s->ctrl |= CTRL_RECEN_B;
2903                 } else {
2904                         printk(KERN_ERR PFX "revision %d does not support S/PDIF\n", s->rev);
2905                 }
2906         }
2907         /* initialize the chips */
2908         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2909         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2910         outl(LEGACY_JFAST, s->io+ES1371_REG_LEGACY);
2911         pci_set_master(pcidev);  /* enable bus mastering */
2912         /* if we are a 5880 turn on the AC97 */
2913         if (s->vendor == PCI_VENDOR_ID_ENSONIQ &&
2914             ((s->device == PCI_DEVICE_ID_ENSONIQ_CT5880 && s->rev >= CT5880REV_CT5880_C) ||
2915              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_CT5880_A) ||
2916              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_ES1373_8))) {
2917                 cssr |= CSTAT_5880_AC97_RST;
2918                 outl(cssr, s->io+ES1371_REG_STATUS);
2919                 /* need to delay around 20ms(bleech) to give
2920                    some CODECs enough time to wakeup */
2921                 tmo = jiffies + (HZ / 50) + 1;
2922                 for (;;) {
2923                         tmo2 = tmo - jiffies;
2924                         if (tmo2 <= 0)
2925                                 break;
2926                         schedule_timeout(tmo2);
2927                 }
2928         }
2929         /* AC97 warm reset to start the bitclk */
2930         outl(s->ctrl | CTRL_SYNCRES, s->io+ES1371_REG_CONTROL);
2931         udelay(2);
2932         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2933         /* init the sample rate converter */
2934         src_init(s);
2935         /* codec init */
2936         if (!ac97_probe_codec(s->codec)) {
2937                 res = -ENODEV;
2938                 goto err_gp;
2939         }
2940         /* set default values */
2941
2942         fs = get_fs();
2943         set_fs(KERNEL_DS);
2944         val = SOUND_MASK_LINE;
2945         mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2946         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2947                 val = initvol[i].vol;
2948                 mixdev_ioctl(s->codec, initvol[i].mixch, (unsigned long)&val);
2949         }
2950         /* mute master and PCM when in S/PDIF mode */
2951         if (s->spdif_volume != -1) {
2952                 val = 0x0000;
2953                 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_VOLUME, (unsigned long)&val);
2954                 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_PCM, (unsigned long)&val);
2955         }
2956         set_fs(fs);
2957         /* turn on S/PDIF output driver if requested */
2958         outl(cssr, s->io+ES1371_REG_STATUS);
2959         /* register gameport */
2960         if (s->gameport.io)
2961                 gameport_register_port(&s->gameport);
2962         /* store it in the driver field */
2963         pci_set_drvdata(pcidev, s);
2964         /* put it into driver list */
2965         list_add_tail(&s->devs, &devs);
2966         /* increment devindex */
2967         if (devindex < NR_DEVICE-1)
2968                 devindex++;
2969         return 0;
2970
2971  err_gp:
2972         if (s->gameport.io)
2973                 release_region(s->gameport.io, JOY_EXTENT);
2974 #ifdef ES1371_DEBUG
2975         if (s->ps)
2976                 remove_proc_entry("es1371", NULL);
2977 #endif
2978         unregister_sound_midi(s->dev_midi);
2979  err_dev4:
2980         unregister_sound_dsp(s->dev_dac);
2981  err_dev3:
2982         unregister_sound_mixer(s->codec->dev_mixer);
2983  err_dev2:
2984         unregister_sound_dsp(s->dev_audio);
2985  err_dev1:
2986         printk(KERN_ERR PFX "cannot register misc device\n");
2987         free_irq(s->irq, s);
2988  err_irq:
2989         release_region(s->io, ES1371_EXTENT);
2990  err_region:
2991  err_codec:
2992         ac97_release_codec(s->codec);
2993         kfree(s);
2994         return res;
2995 }
2996
2997 static void __devexit es1371_remove(struct pci_dev *dev)
2998 {
2999         struct es1371_state *s = pci_get_drvdata(dev);
3000
3001         if (!s)
3002                 return;
3003         list_del(&s->devs);
3004 #ifdef ES1371_DEBUG
3005         if (s->ps)
3006                 remove_proc_entry("es1371", NULL);
3007 #endif /* ES1371_DEBUG */
3008         outl(0, s->io+ES1371_REG_CONTROL); /* switch everything off */
3009         outl(0, s->io+ES1371_REG_SERIAL_CONTROL); /* clear serial interrupts */
3010         synchronize_irq(s->irq);
3011         free_irq(s->irq, s);
3012         if (s->gameport.io) {
3013                 gameport_unregister_port(&s->gameport);
3014                 release_region(s->gameport.io, JOY_EXTENT);
3015         }
3016         release_region(s->io, ES1371_EXTENT);
3017         unregister_sound_dsp(s->dev_audio);
3018         unregister_sound_mixer(s->codec->dev_mixer);
3019         unregister_sound_dsp(s->dev_dac);
3020         unregister_sound_midi(s->dev_midi);
3021         ac97_release_codec(s->codec);
3022         kfree(s);
3023         pci_set_drvdata(dev, NULL);
3024 }
3025
3026 static struct pci_device_id id_table[] = {
3027         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3028         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3029         { PCI_VENDOR_ID_ECTIVA, PCI_DEVICE_ID_ECTIVA_EV1938, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3030         { 0, }
3031 };
3032
3033 MODULE_DEVICE_TABLE(pci, id_table);
3034
3035 static struct pci_driver es1371_driver = {
3036         .name           = "es1371",
3037         .id_table       = id_table,
3038         .probe          = es1371_probe,
3039         .remove         = __devexit_p(es1371_remove),
3040 };
3041
3042 static int __init init_es1371(void)
3043 {
3044         printk(KERN_INFO PFX "version v0.32 time " __TIME__ " " __DATE__ "\n");
3045         return pci_module_init(&es1371_driver);
3046 }
3047
3048 static void __exit cleanup_es1371(void)
3049 {
3050         printk(KERN_INFO PFX "unloading\n");
3051         pci_unregister_driver(&es1371_driver);
3052 }
3053
3054 module_init(init_es1371);
3055 module_exit(cleanup_es1371);
3056
3057 /* --------------------------------------------------------------------- */
3058
3059 #ifndef MODULE
3060
3061 /* format is: es1371=[spdif,[nomix,[amplifier]]] */
3062
3063 static int __init es1371_setup(char *str)
3064 {
3065         static unsigned __initdata nr_dev = 0;
3066
3067         if (nr_dev >= NR_DEVICE)
3068                 return 0;
3069
3070         (void)
3071         ((get_option(&str, &spdif[nr_dev]) == 2)
3072          && (get_option(&str, &nomix[nr_dev]) == 2)
3073          && (get_option(&str, &amplifier[nr_dev])));
3074
3075         nr_dev++;
3076         return 1;
3077 }
3078
3079 __setup("es1371=", es1371_setup);
3080
3081 #endif /* MODULE */