sound/oss/esssolo1.c

   1 /****************************************************************************/
   2
   3 /*
   4  *      esssolo1.c  --  ESS Technology Solo1 (ES1946) audio driver.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Module command line parameters:
  23  *   none so far
  24  *
  25  *  Supported devices:
  26  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  27  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  28  *  /dev/midi   simple MIDI UART interface, no ioctl
  29  *
  30  *  Revision history
  31  *    10.11.1998   0.1   Initial release (without any hardware)
  32  *    22.03.1999   0.2   cinfo.blocks should be reset after GETxPTR ioctl.
  33  *                       reported by Johan Maes <joma@telindus.be>
  34  *                       return EAGAIN instead of EBUSY when O_NONBLOCK
  35  *                       read/write cannot be executed
  36  *    07.04.1999   0.3   implemented the following ioctl's: SOUND_PCM_READ_RATE,
  37  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  38  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  39  *    15.06.1999   0.4   Fix bad allocation bug.
  40  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  41  *    28.06.1999   0.5   Add pci_set_master
  42  *    12.08.1999   0.6   Fix MIDI UART crashing the driver
  43  *                       Changed mixer semantics from OSS documented
  44  *                       behaviour to OSS "code behaviour".
  45  *                       Recording might actually work now.
  46  *                       The real DDMA controller address register is at PCI config
  47  *                       0x60, while the register at 0x18 is used as a placeholder
  48  *                       register for BIOS address allocation. This register
  49  *                       is supposed to be copied into 0x60, according
  50  *                       to the Solo1 datasheet. When I do that, I can access
  51  *                       the DDMA registers except the mask bit, which
  52  *                       is stuck at 1. When I copy the contents of 0x18 +0x10
  53  *                       to the DDMA base register, everything seems to work.
  54  *                       The fun part is that the Windows Solo1 driver doesn't
  55  *                       seem to do these tricks.
  56  *                       Bugs remaining: plops and clicks when starting/stopping playback
  57  *    31.08.1999   0.7   add spin_lock_init
  58  *                       replaced current->state = x with set_current_state(x)
  59  *    03.09.1999   0.8   change read semantics for MIDI to match
  60  *                       OSS more closely; remove possible wakeup race
  61  *    07.10.1999   0.9   Fix initialization; complain if sequencer writes time out
  62  *                       Revised resource grabbing for the FM synthesizer
  63  *    28.10.1999   0.10  More waitqueue races fixed
  64  *    09.12.1999   0.11  Work around stupid Alpha port issue (virt_to_bus(kmalloc(GFP_DMA)) > 16M)
  65  *                       Disabling recording on Alpha
  66  *    12.01.2000   0.12  Prevent some ioctl's from returning bad count values on underrun/overrun;
  67  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
  68  *                       Integrated (aka redid 8-)) APM support patch by Zach Brown
  69  *    07.02.2000   0.13  Use pci_alloc_consistent and pci_register_driver
  70  *    19.02.2000   0.14  Use pci_dma_supported to determine if recording should be disabled
  71  *    13.03.2000   0.15  Reintroduce initialization of a couple of PCI config space registers
  72  *    21.11.2000   0.16  Initialize dma buffers in poll, otherwise poll may return a bogus mask
  73  *    12.12.2000   0.17  More dma buffer initializations, patch from
  74  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
  75  *    31.01.2001   0.18  Register/Unregister gameport, original patch from
  76  *                       Nathaniel Daw <daw@cs.cmu.edu>
  77  *                       Fix SETTRIGGER non OSS API conformity
  78  *    10.03.2001         provide abs function, prevent picking up a bogus kernel macro
  79  *                       for abs. Bug report by Andrew Morton <andrewm@uow.edu.au>
  80  *    15.05.2001         pci_enable_device moved, return values in probe cleaned
  81  *                       up. Marcus Meissner <mm@caldera.de>
  82  *    22.05.2001   0.19  more cleanups, changed PM to PCI 2.4 style, got rid
  83  *                       of global list of devices, using pci device data.
  84  *                       Marcus Meissner <mm@caldera.de>
  85  *    03.01.2003   0.20  open_mode fixes from Georg Acher <acher@in.tum.de>
  86  */
  87
  88 /*****************************************************************************/
  89
  90 #include <linux/interrupt.h>
  91 #include <linux/module.h>
  92 #include <linux/string.h>
  93 #include <linux/ioport.h>
  94 #include <linux/sched.h>
  95 #include <linux/delay.h>
  96 #include <linux/sound.h>
  97 #include <linux/slab.h>
  98 #include <linux/soundcard.h>
  99 #include <linux/pci.h>
 100 #include <linux/bitops.h>
 101 #include <linux/init.h>
 102 #include <linux/poll.h>
 103 #include <linux/spinlock.h>
 104 #include <linux/smp_lock.h>
 105 #include <linux/gameport.h>
 106 #include <linux/wait.h>
 107
 108 #include <asm/io.h>
 109 #include <asm/page.h>
 110 #include <asm/uaccess.h>
 111
 112 #include "dm.h"
 113
 114 /* --------------------------------------------------------------------- */
 115
 116 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 117
 118 /* --------------------------------------------------------------------- */
 119
 120 #ifndef PCI_VENDOR_ID_ESS
 121 #define PCI_VENDOR_ID_ESS         0x125d
 122 #endif
 123 #ifndef PCI_DEVICE_ID_ESS_SOLO1
 124 #define PCI_DEVICE_ID_ESS_SOLO1   0x1969
 125 #endif
 126
 127 #define SOLO1_MAGIC  ((PCI_VENDOR_ID_ESS<<16)|PCI_DEVICE_ID_ESS_SOLO1)
 128
 129 #define DDMABASE_OFFSET           0    /* chip bug workaround kludge */
 130 #define DDMABASE_EXTENT           16
 131
 132 #define IOBASE_EXTENT             16
 133 #define SBBASE_EXTENT             16
 134 #define VCBASE_EXTENT             (DDMABASE_EXTENT+DDMABASE_OFFSET)
 135 #define MPUBASE_EXTENT            4
 136 #define GPBASE_EXTENT             4
 137 #define GAMEPORT_EXTENT           4
 138
 139 #define FMSYNTH_EXTENT            4
 140
 141 /* MIDI buffer sizes */
 142
 143 #define MIDIINBUF  256
 144 #define MIDIOUTBUF 256
 145
 146 #define FMODE_MIDI_SHIFT 3
 147 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 148 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 149
 150 #define FMODE_DMFM 0x10
 151
 152 static struct pci_driver solo1_driver;
 153
 154 /* --------------------------------------------------------------------- */
 155
 156 struct solo1_state {
 157         /* magic */
 158         unsigned int magic;
 159
 160         /* the corresponding pci_dev structure */
 161         struct pci_dev *dev;
 162
 163         /* soundcore stuff */
 164         int dev_audio;
 165         int dev_mixer;
 166         int dev_midi;
 167         int dev_dmfm;
 168
 169         /* hardware resources */
 170         unsigned long iobase, sbbase, vcbase, ddmabase, mpubase; /* long for SPARC */
 171         unsigned int irq;
 172
 173         /* mixer registers */
 174         struct {
 175                 unsigned short vol[10];
 176                 unsigned int recsrc;
 177                 unsigned int modcnt;
 178                 unsigned short micpreamp;
 179         } mix;
 180
 181         /* wave stuff */
 182         unsigned fmt;
 183         unsigned channels;
 184         unsigned rate;
 185         unsigned char clkdiv;
 186         unsigned ena;
 187
 188         spinlock_t lock;
 189         struct semaphore open_sem;
 190         mode_t open_mode;
 191         wait_queue_head_t open_wait;
 192
 193         struct dmabuf {
 194                 void *rawbuf;
 195                 dma_addr_t dmaaddr;
 196                 unsigned buforder;
 197                 unsigned numfrag;
 198                 unsigned fragshift;
 199                 unsigned hwptr, swptr;
 200                 unsigned total_bytes;
 201                 int count;
 202                 unsigned error; /* over/underrun */
 203                 wait_queue_head_t wait;
 204                 /* redundant, but makes calculations easier */
 205                 unsigned fragsize;
 206                 unsigned dmasize;
 207                 unsigned fragsamples;
 208                 /* OSS stuff */
 209                 unsigned mapped:1;
 210                 unsigned ready:1;
 211                 unsigned endcleared:1;
 212                 unsigned enabled:1;
 213                 unsigned ossfragshift;
 214                 int ossmaxfrags;
 215                 unsigned subdivision;
 216         } dma_dac, dma_adc;
 217
 218         /* midi stuff */
 219         struct {
 220                 unsigned ird, iwr, icnt;
 221                 unsigned ord, owr, ocnt;
 222                 wait_queue_head_t iwait;
 223                 wait_queue_head_t owait;
 224                 struct timer_list timer;
 225                 unsigned char ibuf[MIDIINBUF];
 226                 unsigned char obuf[MIDIOUTBUF];
 227         } midi;
 228
 229         struct gameport gameport;
 230 };
 231
 232 /* --------------------------------------------------------------------- */
 233
 234 static inline void write_seq(struct solo1_state *s, unsigned char data)
 235 {
 236         int i;
 237         unsigned long flags;
 238
 239         /* the local_irq_save stunt is to send the data within the command window */
 240         for (i = 0; i < 0xffff; i++) {
 241                 local_irq_save(flags);
 242                 if (!(inb(s->sbbase+0xc) & 0x80)) {
 243                         outb(data, s->sbbase+0xc);
 244                         local_irq_restore(flags);
 245                         return;
 246                 }
 247                 local_irq_restore(flags);
 248         }
 249         printk(KERN_ERR "esssolo1: write_seq timeout\n");
 250         outb(data, s->sbbase+0xc);
 251 }
 252
 253 static inline int read_seq(struct solo1_state *s, unsigned char *data)
 254 {
 255         int i;
 256
 257         if (!data)
 258                 return 0;
 259         for (i = 0; i < 0xffff; i++)
 260                 if (inb(s->sbbase+0xe) & 0x80) {
 261                         *data = inb(s->sbbase+0xa);
 262                         return 1;
 263                 }
 264         printk(KERN_ERR "esssolo1: read_seq timeout\n");
 265         return 0;
 266 }
 267
 268 static inline int reset_ctrl(struct solo1_state *s)
 269 {
 270         int i;
 271
 272         outb(3, s->sbbase+6); /* clear sequencer and FIFO */
 273         udelay(10);
 274         outb(0, s->sbbase+6);
 275         for (i = 0; i < 0xffff; i++)
 276                 if (inb(s->sbbase+0xe) & 0x80)
 277                         if (inb(s->sbbase+0xa) == 0xaa) {
 278                                 write_seq(s, 0xc6); /* enter enhanced mode */
 279                                 return 1;
 280                         }
 281         return 0;
 282 }
 283
 284 static void write_ctrl(struct solo1_state *s, unsigned char reg, unsigned char data)
 285 {
 286         write_seq(s, reg);
 287         write_seq(s, data);
 288 }
 289
 290 #if 0 /* unused */
 291 static unsigned char read_ctrl(struct solo1_state *s, unsigned char reg)
 292 {
 293         unsigned char r;
 294
 295         write_seq(s, 0xc0);
 296         write_seq(s, reg);
 297         read_seq(s, &r);
 298         return r;
 299 }
 300 #endif /* unused */
 301
 302 static void write_mixer(struct solo1_state *s, unsigned char reg, unsigned char data)
 303 {
 304         outb(reg, s->sbbase+4);
 305         outb(data, s->sbbase+5);
 306 }
 307
 308 static unsigned char read_mixer(struct solo1_state *s, unsigned char reg)
 309 {
 310         outb(reg, s->sbbase+4);
 311         return inb(s->sbbase+5);
 312 }
 313
 314 /* --------------------------------------------------------------------- */
 315
 316 static inline unsigned ld2(unsigned int x)
 317 {
 318         unsigned r = 0;
 319
 320         if (x >= 0x10000) {
 321                 x >>= 16;
 322                 r += 16;
 323         }
 324         if (x >= 0x100) {
 325                 x >>= 8;
 326                 r += 8;
 327         }
 328         if (x >= 0x10) {
 329                 x >>= 4;
 330                 r += 4;
 331         }
 332         if (x >= 4) {
 333                 x >>= 2;
 334                 r += 2;
 335         }
 336         if (x >= 2)
 337                 r++;
 338         return r;
 339 }
 340
 341 /* --------------------------------------------------------------------- */
 342
 343 static inline void stop_dac(struct solo1_state *s)
 344 {
 345         unsigned long flags;
 346
 347         spin_lock_irqsave(&s->lock, flags);
 348         s->ena &= ~FMODE_WRITE;
 349         write_mixer(s, 0x78, 0x10);
 350         spin_unlock_irqrestore(&s->lock, flags);
 351 }
 352
 353 static void start_dac(struct solo1_state *s)
 354 {
 355         unsigned long flags;
 356
 357         spin_lock_irqsave(&s->lock, flags);
 358         if (!(s->ena & FMODE_WRITE) && (s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
 359                 s->ena |= FMODE_WRITE;
 360                 write_mixer(s, 0x78, 0x12);
 361                 udelay(10);
 362                 write_mixer(s, 0x78, 0x13);
 363         }
 364         spin_unlock_irqrestore(&s->lock, flags);
 365 }
 366
 367 static inline void stop_adc(struct solo1_state *s)
 368 {
 369         unsigned long flags;
 370
 371         spin_lock_irqsave(&s->lock, flags);
 372         s->ena &= ~FMODE_READ;
 373         write_ctrl(s, 0xb8, 0xe);
 374         spin_unlock_irqrestore(&s->lock, flags);
 375 }
 376
 377 static void start_adc(struct solo1_state *s)
 378 {
 379         unsigned long flags;
 380
 381         spin_lock_irqsave(&s->lock, flags);
 382         if (!(s->ena & FMODE_READ) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 383             && s->dma_adc.ready) {
 384                 s->ena |= FMODE_READ;
 385                 write_ctrl(s, 0xb8, 0xf);
 386 #if 0
 387                 printk(KERN_DEBUG "solo1: DMAbuffer: 0x%08lx\n", (long)s->dma_adc.rawbuf);
 388                 printk(KERN_DEBUG "solo1: DMA: mask: 0x%02x cnt: 0x%04x addr: 0x%08x  stat: 0x%02x\n",
 389                        inb(s->ddmabase+0xf), inw(s->ddmabase+4), inl(s->ddmabase), inb(s->ddmabase+8));
 390 #endif
 391                 outb(0, s->ddmabase+0xd); /* master reset */
 392                 outb(1, s->ddmabase+0xf);  /* mask */
 393                 outb(0x54/*0x14*/, s->ddmabase+0xb);  /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
 394                 outl(virt_to_bus(s->dma_adc.rawbuf), s->ddmabase);
 395                 outw(s->dma_adc.dmasize-1, s->ddmabase+4);
 396                 outb(0, s->ddmabase+0xf);
 397         }
 398         spin_unlock_irqrestore(&s->lock, flags);
 399 #if 0
 400         printk(KERN_DEBUG "solo1: start DMA: reg B8: 0x%02x  SBstat: 0x%02x\n"
 401                KERN_DEBUG "solo1: DMA: stat: 0x%02x  cnt: 0x%04x  mask: 0x%02x\n",
 402                read_ctrl(s, 0xb8), inb(s->sbbase+0xc),
 403                inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->ddmabase+0xf));
 404         printk(KERN_DEBUG "solo1: A1: 0x%02x  A2: 0x%02x  A4: 0x%02x  A5: 0x%02x  A8: 0x%02x\n"
 405                KERN_DEBUG "solo1: B1: 0x%02x  B2: 0x%02x  B4: 0x%02x  B7: 0x%02x  B8: 0x%02x  B9: 0x%02x\n",
 406                read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
 407                read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb4), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8),
 408                read_ctrl(s, 0xb9));
 409 #endif
 410 }
 411
 412 /* --------------------------------------------------------------------- */
 413
 414 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
 415 #define DMABUF_MINORDER 1
 416
 417 static inline void dealloc_dmabuf(struct solo1_state *s, struct dmabuf *db)
 418 {
 419         struct page *page, *pend;
 420
 421         if (db->rawbuf) {
 422                 /* undo marking the pages as reserved */
 423                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 424                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 425                         ClearPageReserved(page);
 426                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 427         }
 428         db->rawbuf = NULL;
 429         db->mapped = db->ready = 0;
 430 }
 431
 432 static int prog_dmabuf(struct solo1_state *s, struct dmabuf *db)
 433 {
 434         int order;
 435         unsigned bytespersec;
 436         unsigned bufs, sample_shift = 0;
 437         struct page *page, *pend;
 438
 439         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 440         if (!db->rawbuf) {
 441                 db->ready = db->mapped = 0;
 442                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 443                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 444                                 break;
 445                 if (!db->rawbuf)
 446                         return -ENOMEM;
 447                 db->buforder = order;
 448                 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 449                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 450                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 451                         SetPageReserved(page);
 452         }
 453         if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 454                 sample_shift++;
 455         if (s->channels > 1)
 456                 sample_shift++;
 457         bytespersec = s->rate << sample_shift;
 458         bufs = PAGE_SIZE << db->buforder;
 459         if (db->ossfragshift) {
 460                 if ((1000 << db->ossfragshift) < bytespersec)
 461                         db->fragshift = ld2(bytespersec/1000);
 462                 else
 463                         db->fragshift = db->ossfragshift;
 464         } else {
 465                 db->fragshift = ld2(bytespersec/100/(db->subdivision ? db->subdivision : 1));
 466                 if (db->fragshift < 3)
 467                         db->fragshift = 3;
 468         }
 469         db->numfrag = bufs >> db->fragshift;
 470         while (db->numfrag < 4 && db->fragshift > 3) {
 471                 db->fragshift--;
 472                 db->numfrag = bufs >> db->fragshift;
 473         }
 474         db->fragsize = 1 << db->fragshift;
 475         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 476                 db->numfrag = db->ossmaxfrags;
 477         db->fragsamples = db->fragsize >> sample_shift;
 478         db->dmasize = db->numfrag << db->fragshift;
 479         db->enabled = 1;
 480         return 0;
 481 }
 482
 483 static inline int prog_dmabuf_adc(struct solo1_state *s)
 484 {
 485         unsigned long va;
 486         int c;
 487
 488         stop_adc(s);
 489         /* check if PCI implementation supports 24bit busmaster DMA */
 490         if (s->dev->dma_mask > 0xffffff)
 491                 return -EIO;
 492         if ((c = prog_dmabuf(s, &s->dma_adc)))
 493                 return c;
 494         va = s->dma_adc.dmaaddr;
 495         if ((va & ~((1<<24)-1)))
 496                 panic("solo1: buffer above 16M boundary");
 497         outb(0, s->ddmabase+0xd);  /* clear */
 498         outb(1, s->ddmabase+0xf); /* mask */
 499         /*outb(0, s->ddmabase+8);*/  /* enable (enable is active low!) */
 500         outb(0x54, s->ddmabase+0xb);  /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
 501         outl(va, s->ddmabase);
 502         outw(s->dma_adc.dmasize-1, s->ddmabase+4);
 503         c = - s->dma_adc.fragsamples;
 504         write_ctrl(s, 0xa4, c);
 505         write_ctrl(s, 0xa5, c >> 8);
 506         outb(0, s->ddmabase+0xf);
 507         s->dma_adc.ready = 1;
 508         return 0;
 509 }
 510
 511 static inline int prog_dmabuf_dac(struct solo1_state *s)
 512 {
 513         unsigned long va;
 514         int c;
 515
 516         stop_dac(s);
 517         if ((c = prog_dmabuf(s, &s->dma_dac)))
 518                 return c;
 519         memset(s->dma_dac.rawbuf, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80, s->dma_dac.dmasize); /* almost correct for U16 */
 520         va = s->dma_dac.dmaaddr;
 521         if ((va ^ (va + s->dma_dac.dmasize - 1)) & ~((1<<20)-1))
 522                 panic("solo1: buffer crosses 1M boundary");
 523         outl(va, s->iobase);
 524         /* warning: s->dma_dac.dmasize & 0xffff must not be zero! i.e. this limits us to a 32k buffer */
 525         outw(s->dma_dac.dmasize, s->iobase+4);
 526         c = - s->dma_dac.fragsamples;
 527         write_mixer(s, 0x74, c);
 528         write_mixer(s, 0x76, c >> 8);
 529         outb(0xa, s->iobase+6);
 530         s->dma_dac.ready = 1;
 531         return 0;
 532 }
 533
 534 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
 535 {
 536         if (bptr + len > bsize) {
 537                 unsigned x = bsize - bptr;
 538                 memset(((char *)buf) + bptr, c, x);
 539                 bptr = 0;
 540                 len -= x;
 541         }
 542         memset(((char *)buf) + bptr, c, len);
 543 }
 544
 545 /* call with spinlock held! */
 546
 547 static void solo1_update_ptr(struct solo1_state *s)
 548 {
 549         int diff;
 550         unsigned hwptr;
 551
 552         /* update ADC pointer */
 553         if (s->ena & FMODE_READ) {
 554                 hwptr = (s->dma_adc.dmasize - 1 - inw(s->ddmabase+4)) % s->dma_adc.dmasize;
 555                 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
 556                 s->dma_adc.hwptr = hwptr;
 557                 s->dma_adc.total_bytes += diff;
 558                 s->dma_adc.count += diff;
 559 #if 0
 560                 printk(KERN_DEBUG "solo1: rd: hwptr %u swptr %u dmasize %u count %u\n",
 561                        s->dma_adc.hwptr, s->dma_adc.swptr, s->dma_adc.dmasize, s->dma_adc.count);
 562 #endif
 563                 if (s->dma_adc.mapped) {
 564                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
 565                                 wake_up(&s->dma_adc.wait);
 566                 } else {
 567                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
 568                                 s->ena &= ~FMODE_READ;
 569                                 write_ctrl(s, 0xb8, 0xe);
 570                                 s->dma_adc.error++;
 571                         }
 572                         if (s->dma_adc.count > 0)
 573                                 wake_up(&s->dma_adc.wait);
 574                 }
 575         }
 576         /* update DAC pointer */
 577         if (s->ena & FMODE_WRITE) {
 578                 hwptr = (s->dma_dac.dmasize - inw(s->iobase+4)) % s->dma_dac.dmasize;
 579                 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
 580                 s->dma_dac.hwptr = hwptr;
 581                 s->dma_dac.total_bytes += diff;
 582 #if 0
 583                 printk(KERN_DEBUG "solo1: wr: hwptr %u swptr %u dmasize %u count %u\n",
 584                        s->dma_dac.hwptr, s->dma_dac.swptr, s->dma_dac.dmasize, s->dma_dac.count);
 585 #endif
 586                 if (s->dma_dac.mapped) {
 587                         s->dma_dac.count += diff;
 588                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
 589                                 wake_up(&s->dma_dac.wait);
 590                 } else {
 591                         s->dma_dac.count -= diff;
 592                         if (s->dma_dac.count <= 0) {
 593                                 s->ena &= ~FMODE_WRITE;
 594                                 write_mixer(s, 0x78, 0x12);
 595                                 s->dma_dac.error++;
 596                         } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
 597                                 clear_advance(s->dma_dac.rawbuf, s->dma_dac.dmasize, s->dma_dac.swptr,
 598                                               s->dma_dac.fragsize, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80);
 599                                 s->dma_dac.endcleared = 1;
 600                         }
 601                         if (s->dma_dac.count < (signed)s->dma_dac.dmasize)
 602                                 wake_up(&s->dma_dac.wait);
 603                 }
 604         }
 605 }
 606
 607 /* --------------------------------------------------------------------- */
 608
 609 static void prog_codec(struct solo1_state *s)
 610 {
 611         unsigned long flags;
 612         int fdiv, filter;
 613         unsigned char c;
 614
 615         reset_ctrl(s);
 616         write_seq(s, 0xd3);
 617         /* program sampling rates */
 618         filter = s->rate * 9 / 20; /* Set filter roll-off to 90% of rate/2 */
 619         fdiv = 256 - 7160000 / (filter * 82);
 620         spin_lock_irqsave(&s->lock, flags);
 621         write_ctrl(s, 0xa1, s->clkdiv);
 622         write_ctrl(s, 0xa2, fdiv);
 623         write_mixer(s, 0x70, s->clkdiv);
 624         write_mixer(s, 0x72, fdiv);
 625         /* program ADC parameters */
 626         write_ctrl(s, 0xb8, 0xe);
 627         write_ctrl(s, 0xb9, /*0x1*/0);
 628         write_ctrl(s, 0xa8, (s->channels > 1) ? 0x11 : 0x12);
 629         c = 0xd0;
 630         if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 631                 c |= 0x04;
 632         if (s->fmt & (AFMT_S16_LE | AFMT_S8))
 633                 c |= 0x20;
 634         if (s->channels > 1)
 635                 c ^= 0x48;
 636         write_ctrl(s, 0xb7, (c & 0x70) | 1);
 637         write_ctrl(s, 0xb7, c);
 638         write_ctrl(s, 0xb1, 0x50);
 639         write_ctrl(s, 0xb2, 0x50);
 640         /* program DAC parameters */
 641         c = 0x40;
 642         if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 643                 c |= 1;
 644         if (s->fmt & (AFMT_S16_LE | AFMT_S8))
 645                 c |= 4;
 646         if (s->channels > 1)
 647                 c |= 2;
 648         write_mixer(s, 0x7a, c);
 649         write_mixer(s, 0x78, 0x10);
 650         s->ena = 0;
 651         spin_unlock_irqrestore(&s->lock, flags);
 652 }
 653
 654 /* --------------------------------------------------------------------- */
 655
 656 static const char invalid_magic[] = KERN_CRIT "solo1: invalid magic value\n";
 657
 658 #define VALIDATE_STATE(s)                         \
 659 ({                                                \
 660         if (!(s) || (s)->magic != SOLO1_MAGIC) { \
 661                 printk(invalid_magic);            \
 662                 return -ENXIO;                    \
 663         }                                         \
 664 })
 665
 666 /* --------------------------------------------------------------------- */
 667
 668 static int mixer_ioctl(struct solo1_state *s, unsigned int cmd, unsigned long arg)
 669 {
 670         static const unsigned int mixer_src[8] = {
 671                 SOUND_MASK_MIC, SOUND_MASK_MIC, SOUND_MASK_CD, SOUND_MASK_VOLUME,
 672                 SOUND_MASK_MIC, 0, SOUND_MASK_LINE, 0
 673         };
 674         static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
 675                 [SOUND_MIXER_PCM]     = 1,   /* voice */
 676                 [SOUND_MIXER_SYNTH]   = 2,   /* FM */
 677                 [SOUND_MIXER_CD]      = 3,   /* CD */
 678                 [SOUND_MIXER_LINE]    = 4,   /* Line */
 679                 [SOUND_MIXER_LINE1]   = 5,   /* AUX */
 680                 [SOUND_MIXER_MIC]     = 6,   /* Mic */
 681                 [SOUND_MIXER_LINE2]   = 7,   /* Mono in */
 682                 [SOUND_MIXER_SPEAKER] = 8,   /* Speaker */
 683                 [SOUND_MIXER_RECLEV]  = 9,   /* Recording level */
 684                 [SOUND_MIXER_VOLUME]  = 10   /* Master Volume */
 685         };
 686         static const unsigned char mixreg[] = {
 687                 0x7c,   /* voice */
 688                 0x36,   /* FM */
 689                 0x38,   /* CD */
 690                 0x3e,   /* Line */
 691                 0x3a,   /* AUX */
 692                 0x1a,   /* Mic */
 693                 0x6d    /* Mono in */
 694         };
 695         unsigned char l, r, rl, rr, vidx;
 696         int i, val;
 697         int __user *p = (int __user *)arg;
 698
 699         VALIDATE_STATE(s);
 700
 701         if (cmd == SOUND_MIXER_PRIVATE1) {
 702                 /* enable/disable/query mixer preamp */
 703                 if (get_user(val, p))
 704                         return -EFAULT;
 705                 if (val != -1) {
 706                         val = val ? 0xff : 0xf7;
 707                         write_mixer(s, 0x7d, (read_mixer(s, 0x7d) | 0x08) & val);
 708                 }
 709                 val = (read_mixer(s, 0x7d) & 0x08) ? 1 : 0;
 710                 return put_user(val, p);
 711         }
 712         if (cmd == SOUND_MIXER_PRIVATE2) {
 713                 /* enable/disable/query spatializer */
 714                 if (get_user(val, p))
 715                         return -EFAULT;
 716                 if (val != -1) {
 717                         val &= 0x3f;
 718                         write_mixer(s, 0x52, val);
 719                         write_mixer(s, 0x50, val ? 0x08 : 0);
 720                 }
 721                 return put_user(read_mixer(s, 0x52), p);
 722         }
 723         if (cmd == SOUND_MIXER_INFO) {
 724                 mixer_info info;
 725                 strncpy(info.id, "Solo1", sizeof(info.id));
 726                 strncpy(info.name, "ESS Solo1", sizeof(info.name));
 727                 info.modify_counter = s->mix.modcnt;
 728                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
 729                         return -EFAULT;
 730                 return 0;
 731         }
 732         if (cmd == SOUND_OLD_MIXER_INFO) {
 733                 _old_mixer_info info;
 734                 strncpy(info.id, "Solo1", sizeof(info.id));
 735                 strncpy(info.name, "ESS Solo1", sizeof(info.name));
 736                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
 737                         return -EFAULT;
 738                 return 0;
 739         }
 740         if (cmd == OSS_GETVERSION)
 741                 return put_user(SOUND_VERSION, p);
 742         if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
 743                 return -EINVAL;
 744         if (_SIOC_DIR(cmd) == _SIOC_READ) {
 745                 switch (_IOC_NR(cmd)) {
 746                 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
 747                         return put_user(mixer_src[read_mixer(s, 0x1c) & 7], p);
 748
 749                 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
 750                         return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
 751                                         SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
 752                                         SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV |
 753                                         SOUND_MASK_SPEAKER, p);
 754
 755                 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
 756                         return put_user(SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VOLUME, p);
 757
 758                 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
 759                         return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
 760                                         SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
 761                                         SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV, p);
 762
 763                 case SOUND_MIXER_CAPS:
 764                         return put_user(SOUND_CAP_EXCL_INPUT, p);
 765
 766                 default:
 767                         i = _IOC_NR(cmd);
 768                         if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
 769                                 return -EINVAL;
 770                         return put_user(s->mix.vol[vidx-1], p);
 771                 }
 772         }
 773         if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
 774                 return -EINVAL;
 775         s->mix.modcnt++;
 776         switch (_IOC_NR(cmd)) {
 777         case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
 778 #if 0
 779                 {
 780                         static const unsigned char regs[] = {
 781                                 0x1c, 0x1a, 0x36, 0x38, 0x3a, 0x3c, 0x3e, 0x60, 0x62, 0x6d, 0x7c
 782                         };
 783                         int i;
 784
 785                         for (i = 0; i < sizeof(regs); i++)
 786                                 printk(KERN_DEBUG "solo1: mixer reg 0x%02x: 0x%02x\n",
 787                                        regs[i], read_mixer(s, regs[i]));
 788                         printk(KERN_DEBUG "solo1: ctrl reg 0x%02x: 0x%02x\n",
 789                                0xb4, read_ctrl(s, 0xb4));
 790                 }
 791 #endif
 792                 if (get_user(val, p))
 793                         return -EFAULT;
 794                 i = hweight32(val);
 795                 if (i == 0)
 796                         return 0;
 797                 else if (i > 1)
 798                         val &= ~mixer_src[read_mixer(s, 0x1c) & 7];
 799                 for (i = 0; i < 8; i++) {
 800                         if (mixer_src[i] & val)
 801                                 break;
 802                 }
 803                 if (i > 7)
 804                         return 0;
 805                 write_mixer(s, 0x1c, i);
 806                 return 0;
 807
 808         case SOUND_MIXER_VOLUME:
 809                 if (get_user(val, p))
 810                         return -EFAULT;
 811                 l = val & 0xff;
 812                 if (l > 100)
 813                         l = 100;
 814                 r = (val >> 8) & 0xff;
 815                 if (r > 100)
 816                         r = 100;
 817                 if (l < 6) {
 818                         rl = 0x40;
 819                         l = 0;
 820                 } else {
 821                         rl = (l * 2 - 11) / 3;
 822                         l = (rl * 3 + 11) / 2;
 823                 }
 824                 if (r < 6) {
 825                         rr = 0x40;
 826                         r = 0;
 827                 } else {
 828                         rr = (r * 2 - 11) / 3;
 829                         r = (rr * 3 + 11) / 2;
 830                 }
 831                 write_mixer(s, 0x60, rl);
 832                 write_mixer(s, 0x62, rr);
 833 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 834                 s->mix.vol[9] = ((unsigned int)r << 8) | l;
 835 #else
 836                 s->mix.vol[9] = val;
 837 #endif
 838                 return put_user(s->mix.vol[9], p);
 839
 840         case SOUND_MIXER_SPEAKER:
 841                 if (get_user(val, p))
 842                         return -EFAULT;
 843                 l = val & 0xff;
 844                 if (l > 100)
 845                         l = 100;
 846                 else if (l < 2)
 847                         l = 2;
 848                 rl = (l - 2) / 14;
 849                 l = rl * 14 + 2;
 850                 write_mixer(s, 0x3c, rl);
 851 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 852                 s->mix.vol[7] = l * 0x101;
 853 #else
 854                 s->mix.vol[7] = val;
 855 #endif
 856                 return put_user(s->mix.vol[7], p);
 857
 858         case SOUND_MIXER_RECLEV:
 859                 if (get_user(val, p))
 860                         return -EFAULT;
 861                 l = (val << 1) & 0x1fe;
 862                 if (l > 200)
 863                         l = 200;
 864                 else if (l < 5)
 865                         l = 5;
 866                 r = (val >> 7) & 0x1fe;
 867                 if (r > 200)
 868                         r = 200;
 869                 else if (r < 5)
 870                         r = 5;
 871                 rl = (l - 5) / 13;
 872                 rr = (r - 5) / 13;
 873                 r = (rl * 13 + 5) / 2;
 874                 l = (rr * 13 + 5) / 2;
 875                 write_ctrl(s, 0xb4, (rl << 4) | rr);
 876 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 877                 s->mix.vol[8] = ((unsigned int)r << 8) | l;
 878 #else
 879                 s->mix.vol[8] = val;
 880 #endif
 881                 return put_user(s->mix.vol[8], p);
 882
 883         default:
 884                 i = _IOC_NR(cmd);
 885                 if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
 886                         return -EINVAL;
 887                 if (get_user(val, p))
 888                         return -EFAULT;
 889                 l = (val << 1) & 0x1fe;
 890                 if (l > 200)
 891                         l = 200;
 892                 else if (l < 5)
 893                         l = 5;
 894                 r = (val >> 7) & 0x1fe;
 895                 if (r > 200)
 896                         r = 200;
 897                 else if (r < 5)
 898                         r = 5;
 899                 rl = (l - 5) / 13;
 900                 rr = (r - 5) / 13;
 901                 r = (rl * 13 + 5) / 2;
 902                 l = (rr * 13 + 5) / 2;
 903                 write_mixer(s, mixreg[vidx-1], (rl << 4) | rr);
 904 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 905                 s->mix.vol[vidx-1] = ((unsigned int)r << 8) | l;
 906 #else
 907                 s->mix.vol[vidx-1] = val;
 908 #endif
 909                 return put_user(s->mix.vol[vidx-1], p);
 910         }
 911 }
 912
 913 /* --------------------------------------------------------------------- */
 914
 915 static int solo1_open_mixdev(struct inode *inode, struct file *file)
 916 {
 917         unsigned int minor = iminor(inode);
 918         struct solo1_state *s = NULL;
 919         struct pci_dev *pci_dev = NULL;
 920
 921         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
 922                 struct pci_driver *drvr;
 923                 drvr = pci_dev_driver (pci_dev);
 924                 if (drvr != &solo1_driver)
 925                         continue;
 926                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
 927                 if (!s)
 928                         continue;
 929                 if (s->dev_mixer == minor)
 930                         break;
 931         }
 932         if (!s)
 933                 return -ENODEV;
 934         VALIDATE_STATE(s);
 935         file->private_data = s;
 936         return 0;
 937 }
 938
 939 static int solo1_release_mixdev(struct inode *inode, struct file *file)
 940 {
 941         struct solo1_state *s = (struct solo1_state *)file->private_data;
 942
 943         VALIDATE_STATE(s);
 944         return 0;
 945 }
 946
 947 static int solo1_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
 948 {
 949         return mixer_ioctl((struct solo1_state *)file->private_data, cmd, arg);
 950 }
 951
 952 static /*const*/ struct file_operations solo1_mixer_fops = {
 953         .owner          = THIS_MODULE,
 954         .llseek         = no_llseek,
 955         .ioctl          = solo1_ioctl_mixdev,
 956         .open           = solo1_open_mixdev,
 957         .release        = solo1_release_mixdev,
 958 };
 959
 960 /* --------------------------------------------------------------------- */
 961
 962 static int drain_dac(struct solo1_state *s, int nonblock)
 963 {
 964         DECLARE_WAITQUEUE(wait, current);
 965         unsigned long flags;
 966         int count;
 967         unsigned tmo;
 968
 969         if (s->dma_dac.mapped)
 970                 return 0;
 971         add_wait_queue(&s->dma_dac.wait, &wait);
 972         for (;;) {
 973                 set_current_state(TASK_INTERRUPTIBLE);
 974                 spin_lock_irqsave(&s->lock, flags);
 975                 count = s->dma_dac.count;
 976                 spin_unlock_irqrestore(&s->lock, flags);
 977                 if (count <= 0)
 978                         break;
 979                 if (signal_pending(current))
 980                         break;
 981                 if (nonblock) {
 982                         remove_wait_queue(&s->dma_dac.wait, &wait);
 983                         set_current_state(TASK_RUNNING);
 984                         return -EBUSY;
 985                 }
 986                 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->rate;
 987                 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 988                         tmo >>= 1;
 989                 if (s->channels > 1)
 990                         tmo >>= 1;
 991                 if (!schedule_timeout(tmo + 1))
 992                         printk(KERN_DEBUG "solo1: dma timed out??\n");
 993         }
 994         remove_wait_queue(&s->dma_dac.wait, &wait);
 995         set_current_state(TASK_RUNNING);
 996         if (signal_pending(current))
 997                 return -ERESTARTSYS;
 998         return 0;
 999 }
1000
1001 /* --------------------------------------------------------------------- */
1002
1003 static ssize_t solo1_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1004 {
1005         struct solo1_state *s = (struct solo1_state *)file->private_data;
1006         DECLARE_WAITQUEUE(wait, current);
1007         ssize_t ret;
1008         unsigned long flags;
1009         unsigned swptr;
1010         int cnt;
1011
1012         VALIDATE_STATE(s);
1013         if (ppos != &file->f_pos)
1014                 return -ESPIPE;
1015         if (s->dma_adc.mapped)
1016                 return -ENXIO;
1017         if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1018                 return ret;
1019         if (!access_ok(VERIFY_WRITE, buffer, count))
1020                 return -EFAULT;
1021         ret = 0;
1022         add_wait_queue(&s->dma_adc.wait, &wait);
1023         while (count > 0) {
1024                 spin_lock_irqsave(&s->lock, flags);
1025                 swptr = s->dma_adc.swptr;
1026                 cnt = s->dma_adc.dmasize-swptr;
1027                 if (s->dma_adc.count < cnt)
1028                         cnt = s->dma_adc.count;
1029                 if (cnt <= 0)
1030                         __set_current_state(TASK_INTERRUPTIBLE);
1031                 spin_unlock_irqrestore(&s->lock, flags);
1032                 if (cnt > count)
1033                         cnt = count;
1034 #ifdef DEBUGREC
1035                 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x  DMAstat: 0x%02x  DMAcnt: 0x%04x  SBstat: 0x%02x  cnt: %u\n",
1036                        read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc), cnt);
1037 #endif
1038                 if (cnt <= 0) {
1039                         if (s->dma_adc.enabled)
1040                                 start_adc(s);
1041 #ifdef DEBUGREC
1042                         printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x  A2: 0x%02x  A4: 0x%02x  A5: 0x%02x  A8: 0x%02x\n"
1043                                KERN_DEBUG "solo1_read: regs: B1: 0x%02x  B2: 0x%02x  B7: 0x%02x  B8: 0x%02x  B9: 0x%02x\n"
1044                                KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1045                                KERN_DEBUG "solo1_read: SBstat: 0x%02x  cnt: %u\n",
1046                                read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1047                                read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1048                                inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1049 #endif
1050                         if (inb(s->ddmabase+15) & 1)
1051                                 printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1052                         if (file->f_flags & O_NONBLOCK) {
1053                                 if (!ret)
1054                                         ret = -EAGAIN;
1055                                 break;
1056                         }
1057                         schedule();
1058 #ifdef DEBUGREC
1059                         printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x  A2: 0x%02x  A4: 0x%02x  A5: 0x%02x  A8: 0x%02x\n"
1060                                KERN_DEBUG "solo1_read: regs: B1: 0x%02x  B2: 0x%02x  B7: 0x%02x  B8: 0x%02x  B9: 0x%02x\n"
1061                                KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1062                                KERN_DEBUG "solo1_read: SBstat: 0x%02x  cnt: %u\n",
1063                                read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1064                                read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1065                                inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1066 #endif
1067                         if (signal_pending(current)) {
1068                                 if (!ret)
1069                                         ret = -ERESTARTSYS;
1070                                 break;
1071                         }
1072                         continue;
1073                 }
1074                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1075                         if (!ret)
1076                                 ret = -EFAULT;
1077                         break;
1078                 }
1079                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1080                 spin_lock_irqsave(&s->lock, flags);
1081                 s->dma_adc.swptr = swptr;
1082                 s->dma_adc.count -= cnt;
1083                 spin_unlock_irqrestore(&s->lock, flags);
1084                 count -= cnt;
1085                 buffer += cnt;
1086                 ret += cnt;
1087                 if (s->dma_adc.enabled)
1088                         start_adc(s);
1089 #ifdef DEBUGREC
1090                 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x  DMAstat: 0x%02x  DMAcnt: 0x%04x  SBstat: 0x%02x\n",
1091                        read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc));
1092 #endif
1093         }
1094         remove_wait_queue(&s->dma_adc.wait, &wait);
1095         set_current_state(TASK_RUNNING);
1096         return ret;
1097 }
1098
1099 static ssize_t solo1_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1100 {
1101         struct solo1_state *s = (struct solo1_state *)file->private_data;
1102         DECLARE_WAITQUEUE(wait, current);
1103         ssize_t ret;
1104         unsigned long flags;
1105         unsigned swptr;
1106         int cnt;
1107
1108         VALIDATE_STATE(s);
1109         if (ppos != &file->f_pos)
1110                 return -ESPIPE;
1111         if (s->dma_dac.mapped)
1112                 return -ENXIO;
1113         if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1114                 return ret;
1115         if (!access_ok(VERIFY_READ, buffer, count))
1116                 return -EFAULT;
1117 #if 0
1118         printk(KERN_DEBUG "solo1_write: reg 70: 0x%02x  71: 0x%02x  72: 0x%02x  74: 0x%02x  76: 0x%02x  78: 0x%02x  7A: 0x%02x\n"
1119                KERN_DEBUG "solo1_write: DMA: addr: 0x%08x  cnt: 0x%04x  stat: 0x%02x  SBstat: 0x%02x\n",
1120                read_mixer(s, 0x70), read_mixer(s, 0x71), read_mixer(s, 0x72), read_mixer(s, 0x74), read_mixer(s, 0x76),
1121                read_mixer(s, 0x78), read_mixer(s, 0x7a), inl(s->iobase), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1122         printk(KERN_DEBUG "solo1_write: reg 78: 0x%02x  reg 7A: 0x%02x  DMAcnt: 0x%04x  DMAstat: 0x%02x  SBstat: 0x%02x\n",
1123                read_mixer(s, 0x78), read_mixer(s, 0x7a), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1124 #endif
1125         ret = 0;
1126         add_wait_queue(&s->dma_dac.wait, &wait);
1127         while (count > 0) {
1128                 spin_lock_irqsave(&s->lock, flags);
1129                 if (s->dma_dac.count < 0) {
1130                         s->dma_dac.count = 0;
1131                         s->dma_dac.swptr = s->dma_dac.hwptr;
1132                 }
1133                 swptr = s->dma_dac.swptr;
1134                 cnt = s->dma_dac.dmasize-swptr;
1135                 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1136                         cnt = s->dma_dac.dmasize - s->dma_dac.count;
1137                 if (cnt <= 0)
1138                         __set_current_state(TASK_INTERRUPTIBLE);
1139                 spin_unlock_irqrestore(&s->lock, flags);
1140                 if (cnt > count)
1141                         cnt = count;
1142                 if (cnt <= 0) {
1143                         if (s->dma_dac.enabled)
1144                                 start_dac(s);
1145                         if (file->f_flags & O_NONBLOCK) {
1146                                 if (!ret)
1147                                         ret = -EAGAIN;
1148                                 break;
1149                         }
1150                         schedule();
1151                         if (signal_pending(current)) {
1152                                 if (!ret)
1153                                         ret = -ERESTARTSYS;
1154                                 break;
1155                         }
1156                         continue;
1157                 }
1158                 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1159                         if (!ret)
1160                                 ret = -EFAULT;
1161                         break;
1162                 }
1163                 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1164                 spin_lock_irqsave(&s->lock, flags);
1165                 s->dma_dac.swptr = swptr;
1166                 s->dma_dac.count += cnt;
1167                 s->dma_dac.endcleared = 0;
1168                 spin_unlock_irqrestore(&s->lock, flags);
1169                 count -= cnt;
1170                 buffer += cnt;
1171                 ret += cnt;
1172                 if (s->dma_dac.enabled)
1173                         start_dac(s);
1174         }
1175         remove_wait_queue(&s->dma_dac.wait, &wait);
1176         set_current_state(TASK_RUNNING);
1177         return ret;
1178 }
1179
1180 /* No kernel lock - we have our own spinlock */
1181 static unsigned int solo1_poll(struct file *file, struct poll_table_struct *wait)
1182 {
1183         struct solo1_state *s = (struct solo1_state *)file->private_data;
1184         unsigned long flags;
1185         unsigned int mask = 0;
1186
1187         VALIDATE_STATE(s);
1188         if (file->f_mode & FMODE_WRITE) {
1189                 if (!s->dma_dac.ready && prog_dmabuf_dac(s))
1190                         return 0;
1191                 poll_wait(file, &s->dma_dac.wait, wait);
1192         }
1193         if (file->f_mode & FMODE_READ) {
1194                 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1195                         return 0;
1196                 poll_wait(file, &s->dma_adc.wait, wait);
1197         }
1198         spin_lock_irqsave(&s->lock, flags);
1199         solo1_update_ptr(s);
1200         if (file->f_mode & FMODE_READ) {
1201                 if (s->dma_adc.mapped) {
1202                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1203                                 mask |= POLLIN | POLLRDNORM;
1204                 } else {
1205                         if (s->dma_adc.count > 0)
1206                                 mask |= POLLIN | POLLRDNORM;
1207                 }
1208         }
1209         if (file->f_mode & FMODE_WRITE) {
1210                 if (s->dma_dac.mapped) {
1211                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1212                                 mask |= POLLOUT | POLLWRNORM;
1213                 } else {
1214                         if ((signed)s->dma_dac.dmasize > s->dma_dac.count)
1215                                 mask |= POLLOUT | POLLWRNORM;
1216                 }
1217         }
1218         spin_unlock_irqrestore(&s->lock, flags);
1219         return mask;
1220 }
1221
1222
1223 static int solo1_mmap(struct file *file, struct vm_area_struct *vma)
1224 {
1225         struct solo1_state *s = (struct solo1_state *)file->private_data;
1226         struct dmabuf *db;
1227         int ret = -EINVAL;
1228         unsigned long size;
1229
1230         VALIDATE_STATE(s);
1231         lock_kernel();
1232         if (vma->vm_flags & VM_WRITE) {
1233                 if ((ret = prog_dmabuf_dac(s)) != 0)
1234                         goto out;
1235                 db = &s->dma_dac;
1236         } else if (vma->vm_flags & VM_READ) {
1237                 if ((ret = prog_dmabuf_adc(s)) != 0)
1238                         goto out;
1239                 db = &s->dma_adc;
1240         } else
1241                 goto out;
1242         ret = -EINVAL;
1243         if (vma->vm_pgoff != 0)
1244                 goto out;
1245         size = vma->vm_end - vma->vm_start;
1246         if (size > (PAGE_SIZE << db->buforder))
1247                 goto out;
1248         ret = -EAGAIN;
1249         if (remap_page_range(vma, vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1250                 goto out;
1251         db->mapped = 1;
1252         ret = 0;
1253 out:
1254         unlock_kernel();
1255         return ret;
1256 }
1257
1258 static int solo1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1259 {
1260         struct solo1_state *s = (struct solo1_state *)file->private_data;
1261         unsigned long flags;
1262         audio_buf_info abinfo;
1263         count_info cinfo;
1264         int val, mapped, ret, count;
1265         int div1, div2;
1266         unsigned rate1, rate2;
1267         void __user *argp = (void __user *)arg;
1268         int __user *p = argp;
1269
1270         VALIDATE_STATE(s);
1271         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1272                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1273         switch (cmd) {
1274         case OSS_GETVERSION:
1275                 return put_user(SOUND_VERSION, p);
1276
1277         case SNDCTL_DSP_SYNC:
1278                 if (file->f_mode & FMODE_WRITE)
1279                         return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1280                 return 0;
1281
1282         case SNDCTL_DSP_SETDUPLEX:
1283                 return 0;
1284
1285         case SNDCTL_DSP_GETCAPS:
1286                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1287
1288         case SNDCTL_DSP_RESET:
1289                 if (file->f_mode & FMODE_WRITE) {
1290                         stop_dac(s);
1291                         synchronize_irq(s->irq);
1292                         s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1293                 }
1294                 if (file->f_mode & FMODE_READ) {
1295                         stop_adc(s);
1296                         synchronize_irq(s->irq);
1297                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1298                 }
1299                 prog_codec(s);
1300                 return 0;
1301
1302         case SNDCTL_DSP_SPEED:
1303                 if (get_user(val, p))
1304                         return -EFAULT;
1305                 if (val >= 0) {
1306                         stop_adc(s);
1307                         stop_dac(s);
1308                         s->dma_adc.ready = s->dma_dac.ready = 0;
1309                         /* program sampling rates */
1310                         if (val > 48000)
1311                                 val = 48000;
1312                         if (val < 6300)
1313                                 val = 6300;
1314                         div1 = (768000 + val / 2) / val;
1315                         rate1 = (768000 + div1 / 2) / div1;
1316                         div1 = -div1;
1317                         div2 = (793800 + val / 2) / val;
1318                         rate2 = (793800 + div2 / 2) / div2;
1319                         div2 = (-div2) & 0x7f;
1320                         if (abs(val - rate2) < abs(val - rate1)) {
1321                                 rate1 = rate2;
1322                                 div1 = div2;
1323                         }
1324                         s->rate = rate1;
1325                         s->clkdiv = div1;
1326                         prog_codec(s);
1327                 }
1328                 return put_user(s->rate, p);
1329
1330         case SNDCTL_DSP_STEREO:
1331                 if (get_user(val, p))
1332                         return -EFAULT;
1333                 stop_adc(s);
1334                 stop_dac(s);
1335                 s->dma_adc.ready = s->dma_dac.ready = 0;
1336                 /* program channels */
1337                 s->channels = val ? 2 : 1;
1338                 prog_codec(s);
1339                 return 0;
1340
1341         case SNDCTL_DSP_CHANNELS:
1342                 if (get_user(val, p))
1343                         return -EFAULT;
1344                 if (val != 0) {
1345                         stop_adc(s);
1346                         stop_dac(s);
1347                         s->dma_adc.ready = s->dma_dac.ready = 0;
1348                         /* program channels */
1349                         s->channels = (val >= 2) ? 2 : 1;
1350                         prog_codec(s);
1351                 }
1352                 return put_user(s->channels, p);
1353
1354         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1355                 return put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, p);
1356
1357         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1358                 if (get_user(val, p))
1359                         return -EFAULT;
1360                 if (val != AFMT_QUERY) {
1361                         stop_adc(s);
1362                         stop_dac(s);
1363                         s->dma_adc.ready = s->dma_dac.ready = 0;
1364                         /* program format */
1365                         if (val != AFMT_S16_LE && val != AFMT_U16_LE &&
1366                             val != AFMT_S8 && val != AFMT_U8)
1367                                 val = AFMT_U8;
1368                         s->fmt = val;
1369                         prog_codec(s);
1370                 }
1371                 return put_user(s->fmt, p);
1372
1373         case SNDCTL_DSP_POST:
1374                 return 0;
1375
1376         case SNDCTL_DSP_GETTRIGGER:
1377                 val = 0;
1378                 if (file->f_mode & s->ena & FMODE_READ)
1379                         val |= PCM_ENABLE_INPUT;
1380                 if (file->f_mode & s->ena & FMODE_WRITE)
1381                         val |= PCM_ENABLE_OUTPUT;
1382                 return put_user(val, p);
1383
1384         case SNDCTL_DSP_SETTRIGGER:
1385                 if (get_user(val, p))
1386                         return -EFAULT;
1387                 if (file->f_mode & FMODE_READ) {
1388                         if (val & PCM_ENABLE_INPUT) {
1389                                 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1390                                         return ret;
1391                                 s->dma_dac.enabled = 1;
1392                                 start_adc(s);
1393                                 if (inb(s->ddmabase+15) & 1)
1394                                         printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1395                         } else {
1396                                 s->dma_dac.enabled = 0;
1397                                 stop_adc(s);
1398                         }
1399                 }
1400                 if (file->f_mode & FMODE_WRITE) {
1401                         if (val & PCM_ENABLE_OUTPUT) {
1402                                 if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1403                                         return ret;
1404                                 s->dma_dac.enabled = 1;
1405                                 start_dac(s);
1406                         } else {
1407                                 s->dma_dac.enabled = 0;
1408                                 stop_dac(s);
1409                         }
1410                 }
1411                 return 0;
1412
1413         case SNDCTL_DSP_GETOSPACE:
1414                 if (!(file->f_mode & FMODE_WRITE))
1415                         return -EINVAL;
1416                 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1417                         return val;
1418                 spin_lock_irqsave(&s->lock, flags);
1419                 solo1_update_ptr(s);
1420                 abinfo.fragsize = s->dma_dac.fragsize;
1421                 count = s->dma_dac.count;
1422                 if (count < 0)
1423                         count = 0;
1424                 abinfo.bytes = s->dma_dac.dmasize - count;
1425                 abinfo.fragstotal = s->dma_dac.numfrag;
1426                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1427                 spin_unlock_irqrestore(&s->lock, flags);
1428                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1429
1430         case SNDCTL_DSP_GETISPACE:
1431                 if (!(file->f_mode & FMODE_READ))
1432                         return -EINVAL;
1433                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1434                         return val;
1435                 spin_lock_irqsave(&s->lock, flags);
1436                 solo1_update_ptr(s);
1437                 abinfo.fragsize = s->dma_adc.fragsize;
1438                 abinfo.bytes = s->dma_adc.count;
1439                 abinfo.fragstotal = s->dma_adc.numfrag;
1440                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1441                 spin_unlock_irqrestore(&s->lock, flags);
1442                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1443
1444         case SNDCTL_DSP_NONBLOCK:
1445                 file->f_flags |= O_NONBLOCK;
1446                 return 0;
1447
1448         case SNDCTL_DSP_GETODELAY:
1449                 if (!(file->f_mode & FMODE_WRITE))
1450                         return -EINVAL;
1451                 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1452                         return val;
1453                 spin_lock_irqsave(&s->lock, flags);
1454                 solo1_update_ptr(s);
1455                 count = s->dma_dac.count;
1456                 spin_unlock_irqrestore(&s->lock, flags);
1457                 if (count < 0)
1458                         count = 0;
1459                 return put_user(count, p);
1460
1461         case SNDCTL_DSP_GETIPTR:
1462                 if (!(file->f_mode & FMODE_READ))
1463                         return -EINVAL;
1464                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1465                         return val;
1466                 spin_lock_irqsave(&s->lock, flags);
1467                 solo1_update_ptr(s);
1468                 cinfo.bytes = s->dma_adc.total_bytes;
1469                 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1470                 cinfo.ptr = s->dma_adc.hwptr;
1471                 if (s->dma_adc.mapped)
1472                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1473                 spin_unlock_irqrestore(&s->lock, flags);
1474                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1475                         return -EFAULT;
1476                 return 0;
1477
1478         case SNDCTL_DSP_GETOPTR:
1479                 if (!(file->f_mode & FMODE_WRITE))
1480                         return -EINVAL;
1481                 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1482                         return val;
1483                 spin_lock_irqsave(&s->lock, flags);
1484                 solo1_update_ptr(s);
1485                 cinfo.bytes = s->dma_dac.total_bytes;
1486                 count = s->dma_dac.count;
1487                 if (count < 0)
1488                         count = 0;
1489                 cinfo.blocks = count >> s->dma_dac.fragshift;
1490                 cinfo.ptr = s->dma_dac.hwptr;
1491                 if (s->dma_dac.mapped)
1492                         s->dma_dac.count &= s->dma_dac.fragsize-1;
1493                 spin_unlock_irqrestore(&s->lock, flags);
1494 #if 0
1495                 printk(KERN_DEBUG "esssolo1: GETOPTR: bytes %u blocks %u ptr %u, buforder %u numfrag %u fragshift %u\n"
1496                        KERN_DEBUG "esssolo1: swptr %u count %u fragsize %u dmasize %u fragsamples %u\n",
1497                        cinfo.bytes, cinfo.blocks, cinfo.ptr, s->dma_dac.buforder, s->dma_dac.numfrag, s->dma_dac.fragshift,
1498                        s->dma_dac.swptr, s->dma_dac.count, s->dma_dac.fragsize, s->dma_dac.dmasize, s->dma_dac.fragsamples);
1499 #endif
1500                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1501                         return -EFAULT;
1502                 return 0;
1503
1504         case SNDCTL_DSP_GETBLKSIZE:
1505                 if (file->f_mode & FMODE_WRITE) {
1506                         if ((val = prog_dmabuf_dac(s)))
1507                                 return val;
1508                         return put_user(s->dma_dac.fragsize, p);
1509                 }
1510                 if ((val = prog_dmabuf_adc(s)))
1511                         return val;
1512                 return put_user(s->dma_adc.fragsize, p);
1513
1514         case SNDCTL_DSP_SETFRAGMENT:
1515                 if (get_user(val, p))
1516                         return -EFAULT;
1517                 if (file->f_mode & FMODE_READ) {
1518                         s->dma_adc.ossfragshift = val & 0xffff;
1519                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1520                         if (s->dma_adc.ossfragshift < 4)
1521                                 s->dma_adc.ossfragshift = 4;
1522                         if (s->dma_adc.ossfragshift > 15)
1523                                 s->dma_adc.ossfragshift = 15;
1524                         if (s->dma_adc.ossmaxfrags < 4)
1525                                 s->dma_adc.ossmaxfrags = 4;
1526                 }
1527                 if (file->f_mode & FMODE_WRITE) {
1528                         s->dma_dac.ossfragshift = val & 0xffff;
1529                         s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1530                         if (s->dma_dac.ossfragshift < 4)
1531                                 s->dma_dac.ossfragshift = 4;
1532                         if (s->dma_dac.ossfragshift > 15)
1533                                 s->dma_dac.ossfragshift = 15;
1534                         if (s->dma_dac.ossmaxfrags < 4)
1535                                 s->dma_dac.ossmaxfrags = 4;
1536                 }
1537                 return 0;
1538
1539         case SNDCTL_DSP_SUBDIVIDE:
1540                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1541                     (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1542                         return -EINVAL;
1543                 if (get_user(val, p))
1544                         return -EFAULT;
1545                 if (val != 1 && val != 2 && val != 4)
1546                         return -EINVAL;
1547                 if (file->f_mode & FMODE_READ)
1548                         s->dma_adc.subdivision = val;
1549                 if (file->f_mode & FMODE_WRITE)
1550                         s->dma_dac.subdivision = val;
1551                 return 0;
1552
1553         case SOUND_PCM_READ_RATE:
1554                 return put_user(s->rate, p);
1555
1556         case SOUND_PCM_READ_CHANNELS:
1557                 return put_user(s->channels, p);
1558
1559         case SOUND_PCM_READ_BITS:
1560                 return put_user((s->fmt & (AFMT_S8|AFMT_U8)) ? 8 : 16, p);
1561
1562         case SOUND_PCM_WRITE_FILTER:
1563         case SNDCTL_DSP_SETSYNCRO:
1564         case SOUND_PCM_READ_FILTER:
1565                 return -EINVAL;
1566
1567         }
1568         return mixer_ioctl(s, cmd, arg);
1569 }
1570
1571 static int solo1_release(struct inode *inode, struct file *file)
1572 {
1573         struct solo1_state *s = (struct solo1_state *)file->private_data;
1574
1575         VALIDATE_STATE(s);
1576         lock_kernel();
1577         if (file->f_mode & FMODE_WRITE)
1578                 drain_dac(s, file->f_flags & O_NONBLOCK);
1579         down(&s->open_sem);
1580         if (file->f_mode & FMODE_WRITE) {
1581                 stop_dac(s);
1582                 outb(0, s->iobase+6);  /* disable DMA */
1583                 dealloc_dmabuf(s, &s->dma_dac);
1584         }
1585         if (file->f_mode & FMODE_READ) {
1586                 stop_adc(s);
1587                 outb(1, s->ddmabase+0xf); /* mask DMA channel */
1588                 outb(0, s->ddmabase+0xd); /* DMA master clear */
1589                 dealloc_dmabuf(s, &s->dma_adc);
1590         }
1591         s->open_mode &= ~(FMODE_READ | FMODE_WRITE);
1592         wake_up(&s->open_wait);
1593         up(&s->open_sem);
1594         unlock_kernel();
1595         return 0;
1596 }
1597
1598 static int solo1_open(struct inode *inode, struct file *file)
1599 {
1600         unsigned int minor = iminor(inode);
1601         DECLARE_WAITQUEUE(wait, current);
1602         struct solo1_state *s = NULL;
1603         struct pci_dev *pci_dev = NULL;
1604
1605         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
1606                 struct pci_driver *drvr;
1607
1608                 drvr = pci_dev_driver(pci_dev);
1609                 if (drvr != &solo1_driver)
1610                         continue;
1611                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
1612                 if (!s)
1613                         continue;
1614                 if (!((s->dev_audio ^ minor) & ~0xf))
1615                         break;
1616         }
1617         if (!s)
1618                 return -ENODEV;
1619         VALIDATE_STATE(s);
1620         file->private_data = s;
1621         /* wait for device to become free */
1622         down(&s->open_sem);
1623         while (s->open_mode & (FMODE_READ | FMODE_WRITE)) {
1624                 if (file->f_flags & O_NONBLOCK) {
1625                         up(&s->open_sem);
1626                         return -EBUSY;
1627                 }
1628                 add_wait_queue(&s->open_wait, &wait);
1629                 __set_current_state(TASK_INTERRUPTIBLE);
1630                 up(&s->open_sem);
1631                 schedule();
1632                 remove_wait_queue(&s->open_wait, &wait);
1633                 set_current_state(TASK_RUNNING);
1634                 if (signal_pending(current))
1635                         return -ERESTARTSYS;
1636                 down(&s->open_sem);
1637         }
1638         s->fmt = AFMT_U8;
1639         s->channels = 1;
1640         s->rate = 8000;
1641         s->clkdiv = 96 | 0x80;
1642         s->ena = 0;
1643         s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1644         s->dma_adc.enabled = 1;
1645         s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1646         s->dma_dac.enabled = 1;
1647         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1648         up(&s->open_sem);
1649         prog_codec(s);
1650         return 0;
1651 }
1652
1653 static /*const*/ struct file_operations solo1_audio_fops = {
1654         .owner          = THIS_MODULE,
1655         .llseek         = no_llseek,
1656         .read           = solo1_read,
1657         .write          = solo1_write,
1658         .poll           = solo1_poll,
1659         .ioctl          = solo1_ioctl,
1660         .mmap           = solo1_mmap,
1661         .open           = solo1_open,
1662         .release        = solo1_release,
1663 };
1664
1665 /* --------------------------------------------------------------------- */
1666
1667 /* hold spinlock for the following! */
1668 static void solo1_handle_midi(struct solo1_state *s)
1669 {
1670         unsigned char ch;
1671         int wake;
1672
1673         if (!(s->mpubase))
1674                 return;
1675         wake = 0;
1676         while (!(inb(s->mpubase+1) & 0x80)) {
1677                 ch = inb(s->mpubase);
1678                 if (s->midi.icnt < MIDIINBUF) {
1679                         s->midi.ibuf[s->midi.iwr] = ch;
1680                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1681                         s->midi.icnt++;
1682                 }
1683                 wake = 1;
1684         }
1685         if (wake)
1686                 wake_up(&s->midi.iwait);
1687         wake = 0;
1688         while (!(inb(s->mpubase+1) & 0x40) && s->midi.ocnt > 0) {
1689                 outb(s->midi.obuf[s->midi.ord], s->mpubase);
1690                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1691                 s->midi.ocnt--;
1692                 if (s->midi.ocnt < MIDIOUTBUF-16)
1693                         wake = 1;
1694         }
1695         if (wake)
1696                 wake_up(&s->midi.owait);
1697 }
1698
1699 static irqreturn_t solo1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1700 {
1701         struct solo1_state *s = (struct solo1_state *)dev_id;
1702         unsigned int intsrc;
1703
1704         /* fastpath out, to ease interrupt sharing */
1705         intsrc = inb(s->iobase+7); /* get interrupt source(s) */
1706         if (!intsrc)
1707                 return IRQ_NONE;
1708         (void)inb(s->sbbase+0xe);  /* clear interrupt */
1709         spin_lock(&s->lock);
1710         /* clear audio interrupts first */
1711         if (intsrc & 0x20)
1712                 write_mixer(s, 0x7a, read_mixer(s, 0x7a) & 0x7f);
1713         solo1_update_ptr(s);
1714         solo1_handle_midi(s);
1715         spin_unlock(&s->lock);
1716         return IRQ_HANDLED;
1717 }
1718
1719 static void solo1_midi_timer(unsigned long data)
1720 {
1721         struct solo1_state *s = (struct solo1_state *)data;
1722         unsigned long flags;
1723
1724         spin_lock_irqsave(&s->lock, flags);
1725         solo1_handle_midi(s);
1726         spin_unlock_irqrestore(&s->lock, flags);
1727         s->midi.timer.expires = jiffies+1;
1728         add_timer(&s->midi.timer);
1729 }
1730
1731 /* --------------------------------------------------------------------- */
1732
1733 static ssize_t solo1_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1734 {
1735         struct solo1_state *s = (struct solo1_state *)file->private_data;
1736         DECLARE_WAITQUEUE(wait, current);
1737         ssize_t ret;
1738         unsigned long flags;
1739         unsigned ptr;
1740         int cnt;
1741
1742         VALIDATE_STATE(s);
1743         if (ppos != &file->f_pos)
1744                 return -ESPIPE;
1745         if (!access_ok(VERIFY_WRITE, buffer, count))
1746                 return -EFAULT;
1747         if (count == 0)
1748                 return 0;
1749         ret = 0;
1750         add_wait_queue(&s->midi.iwait, &wait);
1751         while (count > 0) {
1752                 spin_lock_irqsave(&s->lock, flags);
1753                 ptr = s->midi.ird;
1754                 cnt = MIDIINBUF - ptr;
1755                 if (s->midi.icnt < cnt)
1756                         cnt = s->midi.icnt;
1757                 if (cnt <= 0)
1758                         __set_current_state(TASK_INTERRUPTIBLE);
1759                 spin_unlock_irqrestore(&s->lock, flags);
1760                 if (cnt > count)
1761                         cnt = count;
1762                 if (cnt <= 0) {
1763                         if (file->f_flags & O_NONBLOCK) {
1764                                 if (!ret)
1765                                         ret = -EAGAIN;
1766                                 break;
1767                         }
1768                         schedule();
1769                         if (signal_pending(current)) {
1770                                 if (!ret)
1771                                         ret = -ERESTARTSYS;
1772                                 break;
1773                         }
1774                         continue;
1775                 }
1776                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
1777                         if (!ret)
1778                                 ret = -EFAULT;
1779                         break;
1780                 }
1781                 ptr = (ptr + cnt) % MIDIINBUF;
1782                 spin_lock_irqsave(&s->lock, flags);
1783                 s->midi.ird = ptr;
1784                 s->midi.icnt -= cnt;
1785                 spin_unlock_irqrestore(&s->lock, flags);
1786                 count -= cnt;
1787                 buffer += cnt;
1788                 ret += cnt;
1789                 break;
1790         }
1791         __set_current_state(TASK_RUNNING);
1792         remove_wait_queue(&s->midi.iwait, &wait);
1793         return ret;
1794 }
1795
1796 static ssize_t solo1_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1797 {
1798         struct solo1_state *s = (struct solo1_state *)file->private_data;
1799         DECLARE_WAITQUEUE(wait, current);
1800         ssize_t ret;
1801         unsigned long flags;
1802         unsigned ptr;
1803         int cnt;
1804
1805         VALIDATE_STATE(s);
1806         if (ppos != &file->f_pos)
1807                 return -ESPIPE;
1808         if (!access_ok(VERIFY_READ, buffer, count))
1809                 return -EFAULT;
1810         if (count == 0)
1811                 return 0;
1812         ret = 0;
1813         add_wait_queue(&s->midi.owait, &wait);
1814         while (count > 0) {
1815                 spin_lock_irqsave(&s->lock, flags);
1816                 ptr = s->midi.owr;
1817                 cnt = MIDIOUTBUF - ptr;
1818                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
1819                         cnt = MIDIOUTBUF - s->midi.ocnt;
1820                 if (cnt <= 0) {
1821                         __set_current_state(TASK_INTERRUPTIBLE);
1822                         solo1_handle_midi(s);
1823                 }
1824                 spin_unlock_irqrestore(&s->lock, flags);
1825                 if (cnt > count)
1826                         cnt = count;
1827                 if (cnt <= 0) {
1828                         if (file->f_flags & O_NONBLOCK) {
1829                                 if (!ret)
1830                                         ret = -EAGAIN;
1831                                 break;
1832                         }
1833                         schedule();
1834                         if (signal_pending(current)) {
1835                                 if (!ret)
1836                                         ret = -ERESTARTSYS;
1837                                 break;
1838                         }
1839                         continue;
1840                 }
1841                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
1842                         if (!ret)
1843                                 ret = -EFAULT;
1844                         break;
1845                 }
1846                 ptr = (ptr + cnt) % MIDIOUTBUF;
1847                 spin_lock_irqsave(&s->lock, flags);
1848                 s->midi.owr = ptr;
1849                 s->midi.ocnt += cnt;
1850                 spin_unlock_irqrestore(&s->lock, flags);
1851                 count -= cnt;
1852                 buffer += cnt;
1853                 ret += cnt;
1854                 spin_lock_irqsave(&s->lock, flags);
1855                 solo1_handle_midi(s);
1856                 spin_unlock_irqrestore(&s->lock, flags);
1857         }
1858         __set_current_state(TASK_RUNNING);
1859         remove_wait_queue(&s->midi.owait, &wait);
1860         return ret;
1861 }
1862
1863 /* No kernel lock - we have our own spinlock */
1864 static unsigned int solo1_midi_poll(struct file *file, struct poll_table_struct *wait)
1865 {
1866         struct solo1_state *s = (struct solo1_state *)file->private_data;
1867         unsigned long flags;
1868         unsigned int mask = 0;
1869
1870         VALIDATE_STATE(s);
1871         if (file->f_flags & FMODE_WRITE)
1872                 poll_wait(file, &s->midi.owait, wait);
1873         if (file->f_flags & FMODE_READ)
1874                 poll_wait(file, &s->midi.iwait, wait);
1875         spin_lock_irqsave(&s->lock, flags);
1876         if (file->f_flags & FMODE_READ) {
1877                 if (s->midi.icnt > 0)
1878                         mask |= POLLIN | POLLRDNORM;
1879         }
1880         if (file->f_flags & FMODE_WRITE) {
1881                 if (s->midi.ocnt < MIDIOUTBUF)
1882                         mask |= POLLOUT | POLLWRNORM;
1883         }
1884         spin_unlock_irqrestore(&s->lock, flags);
1885         return mask;
1886 }
1887
1888 static int solo1_midi_open(struct inode *inode, struct file *file)
1889 {
1890         unsigned int minor = iminor(inode);
1891         DECLARE_WAITQUEUE(wait, current);
1892         unsigned long flags;
1893         struct solo1_state *s = NULL;
1894         struct pci_dev *pci_dev = NULL;
1895
1896         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
1897                 struct pci_driver *drvr;
1898
1899                 drvr = pci_dev_driver(pci_dev);
1900                 if (drvr != &solo1_driver)
1901                         continue;
1902                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
1903                 if (!s)
1904                         continue;
1905                 if (s->dev_midi == minor)
1906                         break;
1907         }
1908         if (!s)
1909                 return -ENODEV;
1910         VALIDATE_STATE(s);
1911         file->private_data = s;
1912         /* wait for device to become free */
1913         down(&s->open_sem);
1914         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
1915                 if (file->f_flags & O_NONBLOCK) {
1916                         up(&s->open_sem);
1917                         return -EBUSY;
1918                 }
1919                 add_wait_queue(&s->open_wait, &wait);
1920                 __set_current_state(TASK_INTERRUPTIBLE);
1921                 up(&s->open_sem);
1922                 schedule();
1923                 remove_wait_queue(&s->open_wait, &wait);
1924                 set_current_state(TASK_RUNNING);
1925                 if (signal_pending(current))
1926                         return -ERESTARTSYS;
1927                 down(&s->open_sem);
1928         }
1929         spin_lock_irqsave(&s->lock, flags);
1930         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1931                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1932                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1933                 outb(0xff, s->mpubase+1); /* reset command */
1934                 outb(0x3f, s->mpubase+1); /* uart command */
1935                 if (!(inb(s->mpubase+1) & 0x80))
1936                         inb(s->mpubase);
1937                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1938                 outb(0xb0, s->iobase + 7); /* enable A1, A2, MPU irq's */
1939                 init_timer(&s->midi.timer);
1940                 s->midi.timer.expires = jiffies+1;
1941                 s->midi.timer.data = (unsigned long)s;
1942                 s->midi.timer.function = solo1_midi_timer;
1943                 add_timer(&s->midi.timer);
1944         }
1945         if (file->f_mode & FMODE_READ) {
1946                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1947         }
1948         if (file->f_mode & FMODE_WRITE) {
1949                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1950         }
1951         spin_unlock_irqrestore(&s->lock, flags);
1952         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
1953         up(&s->open_sem);
1954         return 0;
1955 }
1956
1957 static int solo1_midi_release(struct inode *inode, struct file *file)
1958 {
1959         struct solo1_state *s = (struct solo1_state *)file->private_data;
1960         DECLARE_WAITQUEUE(wait, current);
1961         unsigned long flags;
1962         unsigned count, tmo;
1963
1964         VALIDATE_STATE(s);
1965
1966         lock_kernel();
1967         if (file->f_mode & FMODE_WRITE) {
1968                 add_wait_queue(&s->midi.owait, &wait);
1969                 for (;;) {
1970                         __set_current_state(TASK_INTERRUPTIBLE);
1971                         spin_lock_irqsave(&s->lock, flags);
1972                         count = s->midi.ocnt;
1973                         spin_unlock_irqrestore(&s->lock, flags);
1974                         if (count <= 0)
1975                                 break;
1976                         if (signal_pending(current))
1977                                 break;
1978                         if (file->f_flags & O_NONBLOCK)
1979                                 break;
1980                         tmo = (count * HZ) / 3100;
1981                         if (!schedule_timeout(tmo ? : 1) && tmo)
1982                                 printk(KERN_DEBUG "solo1: midi timed out??\n");
1983                 }
1984                 remove_wait_queue(&s->midi.owait, &wait);
1985                 set_current_state(TASK_RUNNING);
1986         }
1987         down(&s->open_sem);
1988         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
1989         spin_lock_irqsave(&s->lock, flags);
1990         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1991                 outb(0x30, s->iobase + 7); /* enable A1, A2 irq's */
1992                 del_timer(&s->midi.timer);
1993         }
1994         spin_unlock_irqrestore(&s->lock, flags);
1995         wake_up(&s->open_wait);
1996         up(&s->open_sem);
1997         unlock_kernel();
1998         return 0;
1999 }
2000
2001 static /*const*/ struct file_operations solo1_midi_fops = {
2002         .owner          = THIS_MODULE,
2003         .llseek         = no_llseek,
2004         .read           = solo1_midi_read,
2005         .write          = solo1_midi_write,
2006         .poll           = solo1_midi_poll,
2007         .open           = solo1_midi_open,
2008         .release        = solo1_midi_release,
2009 };
2010
2011 /* --------------------------------------------------------------------- */
2012
2013 static int solo1_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2014 {
2015         static const unsigned char op_offset[18] = {
2016                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2017                 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2018                 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2019         };
2020         struct solo1_state *s = (struct solo1_state *)file->private_data;
2021         struct dm_fm_voice v;
2022         struct dm_fm_note n;
2023         struct dm_fm_params p;
2024         unsigned int io;
2025         unsigned int regb;
2026
2027         switch (cmd) {
2028         case FM_IOCTL_RESET:
2029                 for (regb = 0xb0; regb < 0xb9; regb++) {
2030                         outb(regb, s->sbbase);
2031                         outb(0, s->sbbase+1);
2032                         outb(regb, s->sbbase+2);
2033                         outb(0, s->sbbase+3);
2034                 }
2035                 return 0;
2036
2037         case FM_IOCTL_PLAY_NOTE:
2038                 if (copy_from_user(&n, (void __user *)arg, sizeof(n)))
2039                         return -EFAULT;
2040                 if (n.voice >= 18)
2041                         return -EINVAL;
2042                 if (n.voice >= 9) {
2043                         regb = n.voice - 9;
2044                         io = s->sbbase+2;
2045                 } else {
2046                         regb = n.voice;
2047                         io = s->sbbase;
2048                 }
2049                 outb(0xa0 + regb, io);
2050                 outb(n.fnum & 0xff, io+1);
2051                 outb(0xb0 + regb, io);
2052                 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2053                 return 0;
2054
2055         case FM_IOCTL_SET_VOICE:
2056                 if (copy_from_user(&v, (void __user *)arg, sizeof(v)))
2057                         return -EFAULT;
2058                 if (v.voice >= 18)
2059                         return -EINVAL;
2060                 regb = op_offset[v.voice];
2061                 io = s->sbbase + ((v.op & 1) << 1);
2062                 outb(0x20 + regb, io);
2063                 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2064                      ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2065                 outb(0x40 + regb, io);
2066                 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2067                 outb(0x60 + regb, io);
2068                 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2069                 outb(0x80 + regb, io);
2070                 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2071                 outb(0xe0 + regb, io);
2072                 outb(v.waveform & 0x7, io+1);
2073                 if (n.voice >= 9) {
2074                         regb = n.voice - 9;
2075                         io = s->sbbase+2;
2076                 } else {
2077                         regb = n.voice;
2078                         io = s->sbbase;
2079                 }
2080                 outb(0xc0 + regb, io);
2081                 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2082                      (v.connection & 1), io+1);
2083                 return 0;
2084
2085         case FM_IOCTL_SET_PARAMS:
2086                 if (copy_from_user(&p, (void __user *)arg, sizeof(p)))
2087                         return -EFAULT;
2088                 outb(0x08, s->sbbase);
2089                 outb((p.kbd_split & 1) << 6, s->sbbase+1);
2090                 outb(0xbd, s->sbbase);
2091                 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2092                      ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->sbbase+1);
2093                 return 0;
2094
2095         case FM_IOCTL_SET_OPL:
2096                 outb(4, s->sbbase+2);
2097                 outb(arg, s->sbbase+3);
2098                 return 0;
2099
2100         case FM_IOCTL_SET_MODE:
2101                 outb(5, s->sbbase+2);
2102                 outb(arg & 1, s->sbbase+3);
2103                 return 0;
2104
2105         default:
2106                 return -EINVAL;
2107         }
2108 }
2109
2110 static int solo1_dmfm_open(struct inode *inode, struct file *file)
2111 {
2112         unsigned int minor = iminor(inode);
2113         DECLARE_WAITQUEUE(wait, current);
2114         struct solo1_state *s = NULL;
2115         struct pci_dev *pci_dev = NULL;
2116
2117         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
2118                 struct pci_driver *drvr;
2119
2120                 drvr = pci_dev_driver(pci_dev);
2121                 if (drvr != &solo1_driver)
2122                         continue;
2123                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2124                 if (!s)
2125                         continue;
2126                 if (s->dev_dmfm == minor)
2127                         break;
2128         }
2129         if (!s)
2130                 return -ENODEV;
2131         VALIDATE_STATE(s);
2132         file->private_data = s;
2133         /* wait for device to become free */
2134         down(&s->open_sem);
2135         while (s->open_mode & FMODE_DMFM) {
2136                 if (file->f_flags & O_NONBLOCK) {
2137                         up(&s->open_sem);
2138                         return -EBUSY;
2139                 }
2140                 add_wait_queue(&s->open_wait, &wait);
2141                 __set_current_state(TASK_INTERRUPTIBLE);
2142                 up(&s->open_sem);
2143                 schedule();
2144                 remove_wait_queue(&s->open_wait, &wait);
2145                 set_current_state(TASK_RUNNING);
2146                 if (signal_pending(current))
2147                         return -ERESTARTSYS;
2148                 down(&s->open_sem);
2149         }
2150         if (!request_region(s->sbbase, FMSYNTH_EXTENT, "ESS Solo1")) {
2151                 up(&s->open_sem);
2152                 printk(KERN_ERR "solo1: FM synth io ports in use, opl3 loaded?\n");
2153                 return -EBUSY;
2154         }
2155         /* init the stuff */
2156         outb(1, s->sbbase);
2157         outb(0x20, s->sbbase+1); /* enable waveforms */
2158         outb(4, s->sbbase+2);
2159         outb(0, s->sbbase+3);  /* no 4op enabled */
2160         outb(5, s->sbbase+2);
2161         outb(1, s->sbbase+3);  /* enable OPL3 */
2162         s->open_mode |= FMODE_DMFM;
2163         up(&s->open_sem);
2164         return 0;
2165 }
2166
2167 static int solo1_dmfm_release(struct inode *inode, struct file *file)
2168 {
2169         struct solo1_state *s = (struct solo1_state *)file->private_data;
2170         unsigned int regb;
2171
2172         VALIDATE_STATE(s);
2173         lock_kernel();
2174         down(&s->open_sem);
2175         s->open_mode &= ~FMODE_DMFM;
2176         for (regb = 0xb0; regb < 0xb9; regb++) {
2177                 outb(regb, s->sbbase);
2178                 outb(0, s->sbbase+1);
2179                 outb(regb, s->sbbase+2);
2180                 outb(0, s->sbbase+3);
2181         }
2182         release_region(s->sbbase, FMSYNTH_EXTENT);
2183         wake_up(&s->open_wait);
2184         up(&s->open_sem);
2185         unlock_kernel();
2186         return 0;
2187 }
2188
2189 static /*const*/ struct file_operations solo1_dmfm_fops = {
2190         .owner          = THIS_MODULE,
2191         .llseek         = no_llseek,
2192         .ioctl          = solo1_dmfm_ioctl,
2193         .open           = solo1_dmfm_open,
2194         .release        = solo1_dmfm_release,
2195 };
2196
2197 /* --------------------------------------------------------------------- */
2198
2199 static struct initvol {
2200         int mixch;
2201         int vol;
2202 } initvol[] __initdata = {
2203         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2204         { SOUND_MIXER_WRITE_PCM, 0x4040 },
2205         { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2206         { SOUND_MIXER_WRITE_CD, 0x4040 },
2207         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2208         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2209         { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2210         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2211         { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2212         { SOUND_MIXER_WRITE_MIC, 0x4040 }
2213 };
2214
2215 static int setup_solo1(struct solo1_state *s)
2216 {
2217         struct pci_dev *pcidev = s->dev;
2218         mm_segment_t fs;
2219         int i, val;
2220
2221         /* initialize DDMA base address */
2222         printk(KERN_DEBUG "solo1: ddma base address: 0x%lx\n", s->ddmabase);
2223         pci_write_config_word(pcidev, 0x60, (s->ddmabase & (~0xf)) | 1);
2224         /* set DMA policy to DDMA, IRQ emulation off (CLKRUN disabled for now) */
2225         pci_write_config_dword(pcidev, 0x50, 0);
2226         /* disable legacy audio address decode */
2227         pci_write_config_word(pcidev, 0x40, 0x907f);
2228
2229         /* initialize the chips */
2230         if (!reset_ctrl(s)) {
2231                 printk(KERN_ERR "esssolo1: cannot reset controller\n");
2232                 return -1;
2233         }
2234         outb(0xb0, s->iobase+7); /* enable A1, A2, MPU irq's */
2235
2236         /* initialize mixer regs */
2237         write_mixer(s, 0x7f, 0); /* disable music digital recording */
2238         write_mixer(s, 0x7d, 0x0c); /* enable mic preamp, MONO_OUT is 2nd DAC right channel */
2239         write_mixer(s, 0x64, 0x45); /* volume control */
2240         write_mixer(s, 0x48, 0x10); /* enable music DAC/ES6xx interface */
2241         write_mixer(s, 0x50, 0);  /* disable spatializer */
2242         write_mixer(s, 0x52, 0);
2243         write_mixer(s, 0x14, 0);  /* DAC1 minimum volume */
2244         write_mixer(s, 0x71, 0x20); /* enable new 0xA1 reg format */
2245         outb(0, s->ddmabase+0xd); /* DMA master clear */
2246         outb(1, s->ddmabase+0xf); /* mask channel */
2247         /*outb(0, s->ddmabase+0x8);*/ /* enable controller (enable is low active!!) */
2248
2249         pci_set_master(pcidev);  /* enable bus mastering */
2250
2251         fs = get_fs();
2252         set_fs(KERNEL_DS);
2253         val = SOUND_MASK_LINE;
2254         mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2255         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2256                 val = initvol[i].vol;
2257                 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2258         }
2259         val = 1; /* enable mic preamp */
2260         mixer_ioctl(s, SOUND_MIXER_PRIVATE1, (unsigned long)&val);
2261         set_fs(fs);
2262         return 0;
2263 }
2264
2265 static int
2266 solo1_suspend(struct pci_dev *pci_dev, u32 state) {
2267         struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2268         if (!s)
2269                 return 1;
2270         outb(0, s->iobase+6);
2271         /* DMA master clear */
2272         outb(0, s->ddmabase+0xd);
2273         /* reset sequencer and FIFO */
2274         outb(3, s->sbbase+6);
2275         /* turn off DDMA controller address space */
2276         pci_write_config_word(s->dev, 0x60, 0);
2277         return 0;
2278 }
2279
2280 static int
2281 solo1_resume(struct pci_dev *pci_dev) {
2282         struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2283         if (!s)
2284                 return 1;
2285         setup_solo1(s);
2286         return 0;
2287 }
2288
2289 static int __devinit solo1_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2290 {
2291         struct solo1_state *s;
2292         int ret;
2293
2294         if ((ret=pci_enable_device(pcidev)))
2295                 return ret;
2296         if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO) ||
2297             !(pci_resource_flags(pcidev, 1) & IORESOURCE_IO) ||
2298             !(pci_resource_flags(pcidev, 2) & IORESOURCE_IO) ||
2299             !(pci_resource_flags(pcidev, 3) & IORESOURCE_IO))
2300                 return -ENODEV;
2301         if (pcidev->irq == 0)
2302                 return -ENODEV;
2303
2304         /* Recording requires 24-bit DMA, so attempt to set dma mask
2305          * to 24 bits first, then 32 bits (playback only) if that fails.
2306          */
2307         if (pci_set_dma_mask(pcidev, 0x00ffffff) &&
2308             pci_set_dma_mask(pcidev, 0xffffffff)) {
2309                 printk(KERN_WARNING "solo1: architecture does not support 24bit or 32bit PCI busmaster DMA\n");
2310                 return -ENODEV;
2311         }
2312
2313         if (!(s = kmalloc(sizeof(struct solo1_state), GFP_KERNEL))) {
2314                 printk(KERN_WARNING "solo1: out of memory\n");
2315                 return -ENOMEM;
2316         }
2317         memset(s, 0, sizeof(struct solo1_state));
2318         init_waitqueue_head(&s->dma_adc.wait);
2319         init_waitqueue_head(&s->dma_dac.wait);
2320         init_waitqueue_head(&s->open_wait);
2321         init_waitqueue_head(&s->midi.iwait);
2322         init_waitqueue_head(&s->midi.owait);
2323         init_MUTEX(&s->open_sem);
2324         spin_lock_init(&s->lock);
2325         s->magic = SOLO1_MAGIC;
2326         s->dev = pcidev;
2327         s->iobase = pci_resource_start(pcidev, 0);
2328         s->sbbase = pci_resource_start(pcidev, 1);
2329         s->vcbase = pci_resource_start(pcidev, 2);
2330         s->ddmabase = s->vcbase + DDMABASE_OFFSET;
2331         s->mpubase = pci_resource_start(pcidev, 3);
2332         s->gameport.io = pci_resource_start(pcidev, 4);
2333         s->irq = pcidev->irq;
2334         ret = -EBUSY;
2335         if (!request_region(s->iobase, IOBASE_EXTENT, "ESS Solo1")) {
2336                 printk(KERN_ERR "solo1: io ports in use\n");
2337                 goto err_region1;
2338         }
2339         if (!request_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT, "ESS Solo1")) {
2340                 printk(KERN_ERR "solo1: io ports in use\n");
2341                 goto err_region2;
2342         }
2343         if (!request_region(s->ddmabase, DDMABASE_EXTENT, "ESS Solo1")) {
2344                 printk(KERN_ERR "solo1: io ports in use\n");
2345                 goto err_region3;
2346         }
2347         if (!request_region(s->mpubase, MPUBASE_EXTENT, "ESS Solo1")) {
2348                 printk(KERN_ERR "solo1: io ports in use\n");
2349                 goto err_region4;
2350         }
2351         if (s->gameport.io && !request_region(s->gameport.io, GAMEPORT_EXTENT, "ESS Solo1")) {
2352                 printk(KERN_ERR "solo1: gameport io ports in use\n");
2353                 s->gameport.io = 0;
2354         }
2355         if ((ret=request_irq(s->irq,solo1_interrupt,SA_SHIRQ,"ESS Solo1",s))) {
2356                 printk(KERN_ERR "solo1: irq %u in use\n", s->irq);
2357                 goto err_irq;
2358         }
2359         printk(KERN_INFO "solo1: joystick port at %#x\n", s->gameport.io+1);
2360         /* register devices */
2361         if ((s->dev_audio = register_sound_dsp(&solo1_audio_fops, -1)) < 0) {
2362                 ret = s->dev_audio;
2363                 goto err_dev1;
2364         }
2365         if ((s->dev_mixer = register_sound_mixer(&solo1_mixer_fops, -1)) < 0) {
2366                 ret = s->dev_mixer;
2367                 goto err_dev2;
2368         }
2369         if ((s->dev_midi = register_sound_midi(&solo1_midi_fops, -1)) < 0) {
2370                 ret = s->dev_midi;
2371                 goto err_dev3;
2372         }
2373         if ((s->dev_dmfm = register_sound_special(&solo1_dmfm_fops, 15 /* ?? */)) < 0) {
2374                 ret = s->dev_dmfm;
2375                 goto err_dev4;
2376         }
2377         if (setup_solo1(s)) {
2378                 ret = -EIO;
2379                 goto err;
2380         }
2381         /* register gameport */
2382         gameport_register_port(&s->gameport);
2383         /* store it in the driver field */
2384         pci_set_drvdata(pcidev, s);
2385         return 0;
2386
2387  err:
2388         unregister_sound_special(s->dev_dmfm);
2389  err_dev4:
2390         unregister_sound_midi(s->dev_midi);
2391  err_dev3:
2392         unregister_sound_mixer(s->dev_mixer);
2393  err_dev2:
2394         unregister_sound_dsp(s->dev_audio);
2395  err_dev1:
2396         printk(KERN_ERR "solo1: initialisation error\n");
2397         free_irq(s->irq, s);
2398  err_irq:
2399         if (s->gameport.io)
2400                 release_region(s->gameport.io, GAMEPORT_EXTENT);
2401         release_region(s->mpubase, MPUBASE_EXTENT);
2402  err_region4:
2403         release_region(s->ddmabase, DDMABASE_EXTENT);
2404  err_region3:
2405         release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2406  err_region2:
2407         release_region(s->iobase, IOBASE_EXTENT);
2408  err_region1:
2409         kfree(s);
2410         return ret;
2411 }
2412
2413 static void __devexit solo1_remove(struct pci_dev *dev)
2414 {
2415         struct solo1_state *s = pci_get_drvdata(dev);
2416
2417         if (!s)
2418                 return;
2419         /* stop DMA controller */
2420         outb(0, s->iobase+6);
2421         outb(0, s->ddmabase+0xd); /* DMA master clear */
2422         outb(3, s->sbbase+6); /* reset sequencer and FIFO */
2423         synchronize_irq(s->irq);
2424         pci_write_config_word(s->dev, 0x60, 0); /* turn off DDMA controller address space */
2425         free_irq(s->irq, s);
2426         if (s->gameport.io) {
2427                 gameport_unregister_port(&s->gameport);
2428                 release_region(s->gameport.io, GAMEPORT_EXTENT);
2429         }
2430         release_region(s->iobase, IOBASE_EXTENT);
2431         release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2432         release_region(s->ddmabase, DDMABASE_EXTENT);
2433         release_region(s->mpubase, MPUBASE_EXTENT);
2434         unregister_sound_dsp(s->dev_audio);
2435         unregister_sound_mixer(s->dev_mixer);
2436         unregister_sound_midi(s->dev_midi);
2437         unregister_sound_special(s->dev_dmfm);
2438         kfree(s);
2439         pci_set_drvdata(dev, NULL);
2440 }
2441
2442 static struct pci_device_id id_table[] = {
2443         { PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_SOLO1, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2444         { 0, }
2445 };
2446
2447 MODULE_DEVICE_TABLE(pci, id_table);
2448
2449 static struct pci_driver solo1_driver = {
2450         .name           = "ESS Solo1",
2451         .id_table       = id_table,
2452         .probe          = solo1_probe,
2453         .remove         = __devexit_p(solo1_remove),
2454         .suspend        = solo1_suspend,
2455         .resume         = solo1_resume,
2456 };
2457
2458
2459 static int __init init_solo1(void)
2460 {
2461         printk(KERN_INFO "solo1: version v0.20 time " __TIME__ " " __DATE__ "\n");
2462         if (!pci_register_driver(&solo1_driver)) {
2463                 pci_unregister_driver(&solo1_driver);
2464                 return -ENODEV;
2465         }
2466         return 0;
2467 }
2468
2469 /* --------------------------------------------------------------------- */
2470
2471 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2472 MODULE_DESCRIPTION("ESS Solo1 Driver");
2473 MODULE_LICENSE("GPL");
2474
2475
2476 static void __exit cleanup_solo1(void)
2477 {
2478         printk(KERN_INFO "solo1: unloading\n");
2479         pci_unregister_driver(&solo1_driver);
2480 }
2481
2482 /* --------------------------------------------------------------------- */
2483
2484 module_init(init_solo1);
2485 module_exit(cleanup_solo1);
2486