sound/oss/i810_audio.c

   1 /*
   2  *      Intel i810 and friends ICH driver for Linux
   3  *      Alan Cox <alan@redhat.com>
   4  *
   5  *  Built from:
   6  *      Low level code:  Zach Brown (original nonworking i810 OSS driver)
   7  *                       Jaroslav Kysela <perex@suse.cz> (working ALSA driver)
   8  *
   9  *      Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
  10  *      Extended by: Zach Brown <zab@redhat.com>
  11  *                      and others..
  12  *
  13  *  Hardware Provided By:
  14  *      Analog Devices (A major AC97 codec maker)
  15  *      Intel Corp  (you've probably heard of them already)
  16  *
  17  *  AC97 clues and assistance provided by
  18  *      Analog Devices
  19  *      Zach 'Fufu' Brown
  20  *      Jeff Garzik
  21  *
  22  *      This program is free software; you can redistribute it and/or modify
  23  *      it under the terms of the GNU General Public License as published by
  24  *      the Free Software Foundation; either version 2 of the License, or
  25  *      (at your option) any later version.
  26  *
  27  *      This program is distributed in the hope that it will be useful,
  28  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  29  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  30  *      GNU General Public License for more details.
  31  *
  32  *      You should have received a copy of the GNU General Public License
  33  *      along with this program; if not, write to the Free Software
  34  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  35  *
  36  *
  37  *      Intel 810 theory of operation
  38  *
  39  *      The chipset provides three DMA channels that talk to an AC97
  40  *      CODEC (AC97 is a digital/analog mixer standard). At its simplest
  41  *      you get 48Khz audio with basic volume and mixer controls. At the
  42  *      best you get rate adaption in the codec. We set the card up so
  43  *      that we never take completion interrupts but instead keep the card
  44  *      chasing its tail around a ring buffer. This is needed for mmap
  45  *      mode audio and happens to work rather well for non-mmap modes too.
  46  *
  47  *      The board has one output channel for PCM audio (supported) and
  48  *      a stereo line in and mono microphone input. Again these are normally
  49  *      locked to 48Khz only. Right now recording is not finished.
  50  *
  51  *      There is no midi support, no synth support. Use timidity. To get
  52  *      esd working you need to use esd -r 48000 as it won't probe 48KHz
  53  *      by default. mpg123 can't handle 48Khz only audio so use xmms.
  54  *
  55  *      Fix The Sound On Dell
  56  *
  57  *      Not everyone uses 48KHz. We know of no way to detect this reliably
  58  *      and certainly not to get the right data. If your i810 audio sounds
  59  *      stupid you may need to investigate other speeds. According to Analog
  60  *      they tend to use a 14.318MHz clock which gives you a base rate of
  61  *      41194Hz.
  62  *
  63  *      This is available via the 'ftsodell=1' option.
  64  *
  65  *      If you need to force a specific rate set the clocking= option
  66  *
  67  *      This driver is cursed. (Ben LaHaise)
  68  *
  69  *  ICH 3 caveats
  70  *      Intel errata #7 for ICH3 IO. We need to disable SMI stuff
  71  *      when codec probing. [Not Yet Done]
  72  *
  73  *  ICH 4 caveats
  74  *
  75  *      The ICH4 has the feature, that the codec ID doesn't have to be
  76  *      congruent with the IO connection.
  77  *
  78  *      Therefore, from driver version 0.23 on, there is a "codec ID" <->
  79  *      "IO register base offset" mapping (card->ac97_id_map) field.
  80  *
  81  *      Juergen "George" Sawinski (jsaw)
  82  */
  83
  84 #include <linux/module.h>
  85 #include <linux/string.h>
  86 #include <linux/ctype.h>
  87 #include <linux/ioport.h>
  88 #include <linux/sched.h>
  89 #include <linux/delay.h>
  90 #include <linux/sound.h>
  91 #include <linux/slab.h>
  92 #include <linux/soundcard.h>
  93 #include <linux/pci.h>
  94 #include <linux/interrupt.h>
  95 #include <asm/io.h>
  96 #include <asm/dma.h>
  97 #include <linux/init.h>
  98 #include <linux/poll.h>
  99 #include <linux/spinlock.h>
 100 #include <linux/smp_lock.h>
 101 #include <linux/ac97_codec.h>
 102 #include <asm/uaccess.h>
 103 #include <asm/hardirq.h>
 104
 105 #ifndef PCI_DEVICE_ID_INTEL_82801
 106 #define PCI_DEVICE_ID_INTEL_82801       0x2415
 107 #endif
 108 #ifndef PCI_DEVICE_ID_INTEL_82901
 109 #define PCI_DEVICE_ID_INTEL_82901       0x2425
 110 #endif
 111 #ifndef PCI_DEVICE_ID_INTEL_ICH2
 112 #define PCI_DEVICE_ID_INTEL_ICH2        0x2445
 113 #endif
 114 #ifndef PCI_DEVICE_ID_INTEL_ICH3
 115 #define PCI_DEVICE_ID_INTEL_ICH3        0x2485
 116 #endif
 117 #ifndef PCI_DEVICE_ID_INTEL_ICH4
 118 #define PCI_DEVICE_ID_INTEL_ICH4        0x24c5
 119 #endif
 120 #ifndef PCI_DEVICE_ID_INTEL_ICH5
 121 #define PCI_DEVICE_ID_INTEL_ICH5        0x24d5
 122 #endif
 123 #ifndef PCI_DEVICE_ID_INTEL_ICH6_3
 124 #define PCI_DEVICE_ID_INTEL_ICH6_3      0x266e
 125 #endif
 126 #ifndef PCI_DEVICE_ID_INTEL_440MX
 127 #define PCI_DEVICE_ID_INTEL_440MX       0x7195
 128 #endif
 129 #ifndef PCI_DEVICE_ID_INTEL_ESB_5
 130 #define PCI_DEVICE_ID_INTEL_ESB_5       0x25a6
 131 #endif
 132 #ifndef PCI_DEVICE_ID_SI_7012
 133 #define PCI_DEVICE_ID_SI_7012           0x7012
 134 #endif
 135 #ifndef PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO
 136 #define PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO 0x01b1
 137 #endif
 138 #ifndef PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO
 139 #define PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO 0x006a
 140 #endif
 141 #ifndef PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO
 142 #define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da
 143 #endif
 144 #ifndef PCI_DEVICE_ID_AMD_768_AUDIO
 145 #define PCI_DEVICE_ID_AMD_768_AUDIO     0x7445
 146 #endif
 147 #ifndef PCI_DEVICE_ID_AMD_8111_AC97
 148 #define PCI_DEVICE_ID_AMD_8111_AC97     0x746d
 149 #endif
 150
 151 static int ftsodell;
 152 static int strict_clocking;
 153 static unsigned int clocking;
 154 static int spdif_locked;
 155
 156 //#define DEBUG
 157 //#define DEBUG2
 158 //#define DEBUG_INTERRUPTS
 159 //#define DEBUG_MMAP
 160 //#define DEBUG_MMIO
 161
 162 #define ADC_RUNNING     1
 163 #define DAC_RUNNING     2
 164
 165 #define I810_FMT_16BIT  1
 166 #define I810_FMT_STEREO 2
 167 #define I810_FMT_MASK   3
 168
 169 #define SPDIF_ON        0x0004
 170 #define SURR_ON         0x0010
 171 #define CENTER_LFE_ON   0x0020
 172 #define VOL_MUTED       0x8000
 173
 174 /* the 810's array of pointers to data buffers */
 175
 176 struct sg_item {
 177 #define BUSADDR_MASK    0xFFFFFFFE
 178         u32 busaddr;
 179 #define CON_IOC         0x80000000 /* interrupt on completion */
 180 #define CON_BUFPAD      0x40000000 /* pad underrun with last sample, else 0 */
 181 #define CON_BUFLEN_MASK 0x0000ffff /* buffer length in samples */
 182         u32 control;
 183 };
 184
 185 /* an instance of the i810 channel */
 186 #define SG_LEN 32
 187 struct i810_channel
 188 {
 189         /* these sg guys should probably be allocated
 190            separately as nocache. Must be 8 byte aligned */
 191         struct sg_item sg[SG_LEN];      /* 32*8 */
 192         u32 offset;                     /* 4 */
 193         u32 port;                       /* 4 */
 194         u32 used;
 195         u32 num;
 196 };
 197
 198 /*
 199  * we have 3 separate dma engines.  pcm in, pcm out, and mic.
 200  * each dma engine has controlling registers.  These goofy
 201  * names are from the datasheet, but make it easy to write
 202  * code while leafing through it.
 203  *
 204  * ICH4 has 6 dma engines, pcm in, pcm out, mic, pcm in 2,
 205  * mic in 2, s/pdif.   Of special interest is the fact that
 206  * the upper 3 DMA engines on the ICH4 *must* be accessed
 207  * via mmio access instead of pio access.
 208  */
 209
 210 #define ENUM_ENGINE(PRE,DIG)                                                                    \
 211 enum {                                                                                          \
 212         PRE##_BDBAR =   0x##DIG##0,             /* Buffer Descriptor list Base Address */       \
 213         PRE##_CIV =     0x##DIG##4,             /* Current Index Value */                       \
 214         PRE##_LVI =     0x##DIG##5,             /* Last Valid Index */                          \
 215         PRE##_SR =      0x##DIG##6,             /* Status Register */                           \
 216         PRE##_PICB =    0x##DIG##8,             /* Position In Current Buffer */                \
 217         PRE##_PIV =     0x##DIG##a,             /* Prefetched Index Value */                    \
 218         PRE##_CR =      0x##DIG##b              /* Control Register */                          \
 219 }
 220
 221 ENUM_ENGINE(OFF,0);     /* Offsets */
 222 ENUM_ENGINE(PI,0);      /* PCM In */
 223 ENUM_ENGINE(PO,1);      /* PCM Out */
 224 ENUM_ENGINE(MC,2);      /* Mic In */
 225
 226 enum {
 227         GLOB_CNT =      0x2c,                   /* Global Control */
 228         GLOB_STA =      0x30,                   /* Global Status */
 229         CAS      =      0x34                    /* Codec Write Semaphore Register */
 230 };
 231
 232 ENUM_ENGINE(MC2,4);     /* Mic In 2 */
 233 ENUM_ENGINE(PI2,5);     /* PCM In 2 */
 234 ENUM_ENGINE(SP,6);      /* S/PDIF */
 235
 236 enum {
 237         SDM =           0x80                    /* SDATA_IN Map Register */
 238 };
 239
 240 /* interrupts for a dma engine */
 241 #define DMA_INT_FIFO            (1<<4)  /* fifo under/over flow */
 242 #define DMA_INT_COMPLETE        (1<<3)  /* buffer read/write complete and ioc set */
 243 #define DMA_INT_LVI             (1<<2)  /* last valid done */
 244 #define DMA_INT_CELV            (1<<1)  /* last valid is current */
 245 #define DMA_INT_DCH             (1)     /* DMA Controller Halted (happens on LVI interrupts) */
 246 #define DMA_INT_MASK (DMA_INT_FIFO|DMA_INT_COMPLETE|DMA_INT_LVI)
 247
 248 /* interrupts for the whole chip */
 249 #define INT_SEC         (1<<11)
 250 #define INT_PRI         (1<<10)
 251 #define INT_MC          (1<<7)
 252 #define INT_PO          (1<<6)
 253 #define INT_PI          (1<<5)
 254 #define INT_MO          (1<<2)
 255 #define INT_NI          (1<<1)
 256 #define INT_GPI         (1<<0)
 257 #define INT_MASK (INT_SEC|INT_PRI|INT_MC|INT_PO|INT_PI|INT_MO|INT_NI|INT_GPI)
 258
 259 #define DRIVER_VERSION "0.24"
 260
 261 /* magic numbers to protect our data structures */
 262 #define I810_CARD_MAGIC         0x5072696E /* "Prin" */
 263 #define I810_STATE_MAGIC        0x63657373 /* "cess" */
 264 #define I810_DMA_MASK           0xffffffff /* DMA buffer mask for pci_alloc_consist */
 265 #define NR_HW_CH                3
 266
 267 /* maxinum number of AC97 codecs connected, AC97 2.0 defined 4 */
 268 #define NR_AC97                 4
 269
 270 /* Please note that an 8bit mono stream is not valid on this card, you must have a 16bit */
 271 /* stream at a minimum for this card to be happy */
 272 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 273 /* Samples are 16bit values, so we are shifting to a word, not to a byte, hence shift */
 274 /* values are one less than might be expected */
 275 static const unsigned sample_shift[] = { -1, 0, 0, 1 };
 276
 277 enum {
 278         ICH82801AA = 0,
 279         ICH82901AB,
 280         INTEL440MX,
 281         INTELICH2,
 282         INTELICH3,
 283         INTELICH4,
 284         INTELICH5,
 285         SI7012,
 286         NVIDIA_NFORCE,
 287         AMD768,
 288         AMD8111
 289 };
 290
 291 static char * card_names[] = {
 292         "Intel ICH 82801AA",
 293         "Intel ICH 82901AB",
 294         "Intel 440MX",
 295         "Intel ICH2",
 296         "Intel ICH3",
 297         "Intel ICH4",
 298         "Intel ICH5",
 299         "SiS 7012",
 300         "NVIDIA nForce Audio",
 301         "AMD 768",
 302         "AMD-8111 IOHub"
 303 };
 304
 305 /* These are capabilities (and bugs) the chipsets _can_ have */
 306 static struct {
 307         int16_t      nr_ac97;
 308 #define CAP_MMIO                 0x0001
 309 #define CAP_20BIT_AUDIO_SUPPORT  0x0002
 310         u_int16_t flags;
 311 } card_cap[] = {
 312         {  1, 0x0000 }, /* ICH82801AA */
 313         {  1, 0x0000 }, /* ICH82901AB */
 314         {  1, 0x0000 }, /* INTEL440MX */
 315         {  1, 0x0000 }, /* INTELICH2 */
 316         {  2, 0x0000 }, /* INTELICH3 */
 317         {  3, 0x0003 }, /* INTELICH4 */
 318         {  3, 0x0003 }, /* INTELICH5 */
 319         /*@FIXME to be verified*/       {  2, 0x0000 }, /* SI7012 */
 320         /*@FIXME to be verified*/       {  2, 0x0000 }, /* NVIDIA_NFORCE */
 321         /*@FIXME to be verified*/       {  2, 0x0000 }, /* AMD768 */
 322         /*@FIXME to be verified*/       {  3, 0x0001 }, /* AMD8111 */
 323 };
 324
 325 static struct pci_device_id i810_pci_tbl [] = {
 326         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801,
 327          PCI_ANY_ID, PCI_ANY_ID, 0, 0, ICH82801AA},
 328         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82901,
 329          PCI_ANY_ID, PCI_ANY_ID, 0, 0, ICH82901AB},
 330         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_440MX,
 331          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTEL440MX},
 332         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH2,
 333          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH2},
 334         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH3,
 335          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH3},
 336         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4,
 337          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH4},
 338         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH5,
 339          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH5},
 340         {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7012,
 341          PCI_ANY_ID, PCI_ANY_ID, 0, 0, SI7012},
 342         {PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO,
 343          PCI_ANY_ID, PCI_ANY_ID, 0, 0, NVIDIA_NFORCE},
 344         {PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO,
 345          PCI_ANY_ID, PCI_ANY_ID, 0, 0, NVIDIA_NFORCE},
 346         {PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO,
 347          PCI_ANY_ID, PCI_ANY_ID, 0, 0, NVIDIA_NFORCE},
 348         {PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_768_AUDIO,
 349          PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768},
 350         {PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_AC97,
 351          PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111},
 352         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_5,
 353          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH4},
 354         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_3,
 355          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH4},
 356
 357         {0,}
 358 };
 359
 360 MODULE_DEVICE_TABLE (pci, i810_pci_tbl);
 361
 362 #ifdef CONFIG_PM
 363 #define PM_SUSPENDED(card) (card->pm_suspended)
 364 #else
 365 #define PM_SUSPENDED(card) (0)
 366 #endif
 367
 368 /* "software" or virtual channel, an instance of opened /dev/dsp */
 369 struct i810_state {
 370         unsigned int magic;
 371         struct i810_card *card; /* Card info */
 372
 373         /* single open lock mechanism, only used for recording */
 374         struct semaphore open_sem;
 375         wait_queue_head_t open_wait;
 376
 377         /* file mode */
 378         mode_t open_mode;
 379
 380         /* virtual channel number */
 381         int virt;
 382
 383 #ifdef CONFIG_PM
 384         unsigned int pm_saved_dac_rate,pm_saved_adc_rate;
 385 #endif
 386         struct dmabuf {
 387                 /* wave sample stuff */
 388                 unsigned int rate;
 389                 unsigned char fmt, enable, trigger;
 390
 391                 /* hardware channel */
 392                 struct i810_channel *read_channel;
 393                 struct i810_channel *write_channel;
 394
 395                 /* OSS buffer management stuff */
 396                 void *rawbuf;
 397                 dma_addr_t dma_handle;
 398                 unsigned buforder;
 399                 unsigned numfrag;
 400                 unsigned fragshift;
 401
 402                 /* our buffer acts like a circular ring */
 403                 unsigned hwptr;         /* where dma last started, updated by update_ptr */
 404                 unsigned swptr;         /* where driver last clear/filled, updated by read/write */
 405                 int count;              /* bytes to be consumed or been generated by dma machine */
 406                 unsigned total_bytes;   /* total bytes dmaed by hardware */
 407
 408                 unsigned error;         /* number of over/underruns */
 409                 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
 410
 411                 /* redundant, but makes calculations easier */
 412                 /* what the hardware uses */
 413                 unsigned dmasize;
 414                 unsigned fragsize;
 415                 unsigned fragsamples;
 416
 417                 /* what we tell the user to expect */
 418                 unsigned userfrags;
 419                 unsigned userfragsize;
 420
 421                 /* OSS stuff */
 422                 unsigned mapped:1;
 423                 unsigned ready:1;
 424                 unsigned update_flag;
 425                 unsigned ossfragsize;
 426                 unsigned ossmaxfrags;
 427                 unsigned subdivision;
 428         } dmabuf;
 429 };
 430
 431
 432 struct i810_card {
 433         unsigned int magic;
 434
 435         /* We keep i810 cards in a linked list */
 436         struct i810_card *next;
 437
 438         /* The i810 has a certain amount of cross channel interaction
 439            so we use a single per card lock */
 440         spinlock_t lock;
 441
 442         /* Control AC97 access serialization */
 443         spinlock_t ac97_lock;
 444
 445         /* PCI device stuff */
 446         struct pci_dev * pci_dev;
 447         u16 pci_id;
 448         u16 pci_id_internal; /* used to access card_cap[] */
 449 #ifdef CONFIG_PM
 450         u16 pm_suspended;
 451         u32 pm_save_state[64/sizeof(u32)];
 452         int pm_saved_mixer_settings[SOUND_MIXER_NRDEVICES][NR_AC97];
 453 #endif
 454         /* soundcore stuff */
 455         int dev_audio;
 456
 457         /* structures for abstraction of hardware facilities, codecs, banks and channels*/
 458         u16    ac97_id_map[NR_AC97];
 459         struct ac97_codec *ac97_codec[NR_AC97];
 460         struct i810_state *states[NR_HW_CH];
 461         struct i810_channel *channel;   /* 1:1 to states[] but diff. lifetime */
 462         dma_addr_t chandma;
 463
 464         u16 ac97_features;
 465         u16 ac97_status;
 466         u16 channels;
 467
 468         /* hardware resources */
 469         unsigned long ac97base;
 470         unsigned long iobase;
 471         u32 irq;
 472
 473         unsigned long ac97base_mmio_phys;
 474         unsigned long iobase_mmio_phys;
 475         u_int8_t *ac97base_mmio;
 476         u_int8_t *iobase_mmio;
 477
 478         int           use_mmio;
 479
 480         /* Function support */
 481         struct i810_channel *(*alloc_pcm_channel)(struct i810_card *);
 482         struct i810_channel *(*alloc_rec_pcm_channel)(struct i810_card *);
 483         struct i810_channel *(*alloc_rec_mic_channel)(struct i810_card *);
 484         void (*free_pcm_channel)(struct i810_card *, int chan);
 485
 486         /* We have a *very* long init time possibly, so use this to block */
 487         /* attempts to open our devices before we are ready (stops oops'es) */
 488         int initializing;
 489 };
 490
 491 /* extract register offset from codec struct */
 492 #define IO_REG_OFF(codec) (((struct i810_card *) codec->private_data)->ac97_id_map[codec->id])
 493
 494 /* set LVI from CIV */
 495 #define CIV_TO_LVI(port, off) outb((inb(port+OFF_CIV)+off) & 31, port+OFF_LVI)
 496
 497 static struct i810_card *devs = NULL;
 498
 499 static int i810_open_mixdev(struct inode *inode, struct file *file);
 500 static int i810_ioctl_mixdev(struct inode *inode, struct file *file,
 501                              unsigned int cmd, unsigned long arg);
 502 static u16 i810_ac97_get(struct ac97_codec *dev, u8 reg);
 503 static void i810_ac97_set(struct ac97_codec *dev, u8 reg, u16 data);
 504 static u16 i810_ac97_get_mmio(struct ac97_codec *dev, u8 reg);
 505 static void i810_ac97_set_mmio(struct ac97_codec *dev, u8 reg, u16 data);
 506 static u16 i810_ac97_get_io(struct ac97_codec *dev, u8 reg);
 507 static void i810_ac97_set_io(struct ac97_codec *dev, u8 reg, u16 data);
 508
 509 static struct i810_channel *i810_alloc_pcm_channel(struct i810_card *card)
 510 {
 511         if(card->channel[1].used==1)
 512                 return NULL;
 513         card->channel[1].used=1;
 514         return &card->channel[1];
 515 }
 516
 517 static struct i810_channel *i810_alloc_rec_pcm_channel(struct i810_card *card)
 518 {
 519         if(card->channel[0].used==1)
 520                 return NULL;
 521         card->channel[0].used=1;
 522         return &card->channel[0];
 523 }
 524
 525 static struct i810_channel *i810_alloc_rec_mic_channel(struct i810_card *card)
 526 {
 527         if(card->channel[2].used==1)
 528                 return NULL;
 529         card->channel[2].used=1;
 530         return &card->channel[2];
 531 }
 532
 533 static void i810_free_pcm_channel(struct i810_card *card, int channel)
 534 {
 535         card->channel[channel].used=0;
 536 }
 537
 538 static int i810_valid_spdif_rate ( struct ac97_codec *codec, int rate )
 539 {
 540         unsigned long id = 0L;
 541
 542         id = (i810_ac97_get(codec, AC97_VENDOR_ID1) << 16);
 543         id |= i810_ac97_get(codec, AC97_VENDOR_ID2) & 0xffff;
 544 #ifdef DEBUG
 545         printk ( "i810_audio: codec = %s, codec_id = 0x%08lx\n", codec->name, id);
 546 #endif
 547         switch ( id ) {
 548                 case 0x41445361: /* AD1886 */
 549                         if (rate == 48000) {
 550                                 return 1;
 551                         }
 552                         break;
 553                 default: /* all other codecs, until we know otherwiae */
 554                         if (rate == 48000 || rate == 44100 || rate == 32000) {
 555                                 return 1;
 556                         }
 557                         break;
 558         }
 559         return (0);
 560 }
 561
 562 /* i810_set_spdif_output
 563  *
 564  *  Configure the S/PDIF output transmitter. When we turn on
 565  *  S/PDIF, we turn off the analog output. This may not be
 566  *  the right thing to do.
 567  *
 568  *  Assumptions:
 569  *     The DSP sample rate must already be set to a supported
 570  *     S/PDIF rate (32kHz, 44.1kHz, or 48kHz) or we abort.
 571  */
 572 static int i810_set_spdif_output(struct i810_state *state, int slots, int rate)
 573 {
 574         int     vol;
 575         int     aud_reg;
 576         int     r = 0;
 577         struct ac97_codec *codec = state->card->ac97_codec[0];
 578
 579         if(!codec->codec_ops->digital) {
 580                 state->card->ac97_status &= ~SPDIF_ON;
 581         } else {
 582                 if ( slots == -1 ) { /* Turn off S/PDIF */
 583                         codec->codec_ops->digital(codec, 0, 0, 0);
 584                         /* If the volume wasn't muted before we turned on S/PDIF, unmute it */
 585                         if ( !(state->card->ac97_status & VOL_MUTED) ) {
 586                                 aud_reg = i810_ac97_get(codec, AC97_MASTER_VOL_STEREO);
 587                                 i810_ac97_set(codec, AC97_MASTER_VOL_STEREO, (aud_reg & ~VOL_MUTED));
 588                         }
 589                         state->card->ac97_status &= ~(VOL_MUTED | SPDIF_ON);
 590                         return 0;
 591                 }
 592
 593                 vol = i810_ac97_get(codec, AC97_MASTER_VOL_STEREO);
 594                 state->card->ac97_status = vol & VOL_MUTED;
 595
 596                 r = codec->codec_ops->digital(codec, slots, rate, 0);
 597
 598                 if(r)
 599                         state->card->ac97_status |= SPDIF_ON;
 600                 else
 601                         state->card->ac97_status &= ~SPDIF_ON;
 602
 603                 /* Mute the analog output */
 604                 /* Should this only mute the PCM volume??? */
 605                 i810_ac97_set(codec, AC97_MASTER_VOL_STEREO, (vol | VOL_MUTED));
 606         }
 607         return r;
 608 }
 609
 610 /* i810_set_dac_channels
 611  *
 612  *  Configure the codec's multi-channel DACs
 613  *
 614  *  The logic is backwards. Setting the bit to 1 turns off the DAC.
 615  *
 616  *  What about the ICH? We currently configure it using the
 617  *  SNDCTL_DSP_CHANNELS ioctl.  If we're turnning on the DAC,
 618  *  does that imply that we want the ICH set to support
 619  *  these channels?
 620  *
 621  *  TODO:
 622  *    vailidate that the codec really supports these DACs
 623  *    before turning them on.
 624  */
 625 static void i810_set_dac_channels(struct i810_state *state, int channel)
 626 {
 627         int     aud_reg;
 628         struct ac97_codec *codec = state->card->ac97_codec[0];
 629
 630         /* No codec, no setup */
 631
 632         if(codec == NULL)
 633                 return;
 634
 635         aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
 636         aud_reg |= AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK;
 637         state->card->ac97_status &= ~(SURR_ON | CENTER_LFE_ON);
 638
 639         switch ( channel ) {
 640                 case 2: /* always enabled */
 641                         break;
 642                 case 4:
 643                         aud_reg &= ~AC97_EA_PRJ;
 644                         state->card->ac97_status |= SURR_ON;
 645                         break;
 646                 case 6:
 647                         aud_reg &= ~(AC97_EA_PRJ | AC97_EA_PRI | AC97_EA_PRK);
 648                         state->card->ac97_status |= SURR_ON | CENTER_LFE_ON;
 649                         break;
 650                 default:
 651                         break;
 652         }
 653         i810_ac97_set(codec, AC97_EXTENDED_STATUS, aud_reg);
 654
 655 }
 656
 657
 658 /* set playback sample rate */
 659 static unsigned int i810_set_dac_rate(struct i810_state * state, unsigned int rate)
 660 {
 661         struct dmabuf *dmabuf = &state->dmabuf;
 662         u32 new_rate;
 663         struct ac97_codec *codec=state->card->ac97_codec[0];
 664
 665         if(!(state->card->ac97_features&0x0001))
 666         {
 667                 dmabuf->rate = clocking;
 668 #ifdef DEBUG
 669                 printk("Asked for %d Hz, but ac97_features says we only do %dHz.  Sorry!\n",
 670                        rate,clocking);
 671 #endif
 672                 return clocking;
 673         }
 674
 675         if (rate > 48000)
 676                 rate = 48000;
 677         if (rate < 8000)
 678                 rate = 8000;
 679         dmabuf->rate = rate;
 680
 681         /*
 682          *      Adjust for misclocked crap
 683          */
 684         rate = ( rate * clocking)/48000;
 685         if(strict_clocking && rate < 8000) {
 686                 rate = 8000;
 687                 dmabuf->rate = (rate * 48000)/clocking;
 688         }
 689
 690         new_rate=ac97_set_dac_rate(codec, rate);
 691         if(new_rate != rate) {
 692                 dmabuf->rate = (new_rate * 48000)/clocking;
 693         }
 694 #ifdef DEBUG
 695         printk("i810_audio: called i810_set_dac_rate : asked for %d, got %d\n", rate, dmabuf->rate);
 696 #endif
 697         rate = new_rate;
 698         return dmabuf->rate;
 699 }
 700
 701 /* set recording sample rate */
 702 static unsigned int i810_set_adc_rate(struct i810_state * state, unsigned int rate)
 703 {
 704         struct dmabuf *dmabuf = &state->dmabuf;
 705         u32 new_rate;
 706         struct ac97_codec *codec=state->card->ac97_codec[0];
 707
 708         if(!(state->card->ac97_features&0x0001))
 709         {
 710                 dmabuf->rate = clocking;
 711                 return clocking;
 712         }
 713
 714         if (rate > 48000)
 715                 rate = 48000;
 716         if (rate < 8000)
 717                 rate = 8000;
 718         dmabuf->rate = rate;
 719
 720         /*
 721          *      Adjust for misclocked crap
 722          */
 723
 724         rate = ( rate * clocking)/48000;
 725         if(strict_clocking && rate < 8000) {
 726                 rate = 8000;
 727                 dmabuf->rate = (rate * 48000)/clocking;
 728         }
 729
 730         new_rate = ac97_set_adc_rate(codec, rate);
 731
 732         if(new_rate != rate) {
 733                 dmabuf->rate = (new_rate * 48000)/clocking;
 734                 rate = new_rate;
 735         }
 736 #ifdef DEBUG
 737         printk("i810_audio: called i810_set_adc_rate : rate = %d/%d\n", dmabuf->rate, rate);
 738 #endif
 739         return dmabuf->rate;
 740 }
 741
 742 /* get current playback/recording dma buffer pointer (byte offset from LBA),
 743    called with spinlock held! */
 744
 745 static inline unsigned i810_get_dma_addr(struct i810_state *state, int rec)
 746 {
 747         struct dmabuf *dmabuf = &state->dmabuf;
 748         unsigned int civ, offset, port, port_picb, bytes = 2;
 749
 750         if (!dmabuf->enable)
 751                 return 0;
 752
 753         if (rec)
 754                 port = state->card->iobase + dmabuf->read_channel->port;
 755         else
 756                 port = state->card->iobase + dmabuf->write_channel->port;
 757
 758         if(state->card->pci_id == PCI_DEVICE_ID_SI_7012) {
 759                 port_picb = port + OFF_SR;
 760                 bytes = 1;
 761         } else
 762                 port_picb = port + OFF_PICB;
 763
 764         do {
 765                 civ = inb(port+OFF_CIV) & 31;
 766                 offset = inw(port_picb);
 767                 /* Must have a delay here! */
 768                 if(offset == 0)
 769                         udelay(1);
 770                 /* Reread both registers and make sure that that total
 771                  * offset from the first reading to the second is 0.
 772                  * There is an issue with SiS hardware where it will count
 773                  * picb down to 0, then update civ to the next value,
 774                  * then set the new picb to fragsize bytes.  We can catch
 775                  * it between the civ update and the picb update, making
 776                  * it look as though we are 1 fragsize ahead of where we
 777                  * are.  The next to we get the address though, it will
 778                  * be back in the right place, and we will suddenly think
 779                  * we just went forward dmasize - fragsize bytes, causing
 780                  * totally stupid *huge* dma overrun messages.  We are
 781                  * assuming that the 1us delay is more than long enough
 782                  * that we won't have to worry about the chip still being
 783                  * out of sync with reality ;-)
 784                  */
 785         } while (civ != (inb(port+OFF_CIV) & 31) || offset != inw(port_picb));
 786
 787         return (((civ + 1) * dmabuf->fragsize - (bytes * offset))
 788                 % dmabuf->dmasize);
 789 }
 790
 791 /* Stop recording (lock held) */
 792 static inline void __stop_adc(struct i810_state *state)
 793 {
 794         struct dmabuf *dmabuf = &state->dmabuf;
 795         struct i810_card *card = state->card;
 796
 797         dmabuf->enable &= ~ADC_RUNNING;
 798         outb(0, card->iobase + PI_CR);
 799         // wait for the card to acknowledge shutdown
 800         while( inb(card->iobase + PI_CR) != 0 ) ;
 801         // now clear any latent interrupt bits (like the halt bit)
 802         if(card->pci_id == PCI_DEVICE_ID_SI_7012)
 803                 outb( inb(card->iobase + PI_PICB), card->iobase + PI_PICB );
 804         else
 805                 outb( inb(card->iobase + PI_SR), card->iobase + PI_SR );
 806         outl( inl(card->iobase + GLOB_STA) & INT_PI, card->iobase + GLOB_STA);
 807 }
 808
 809 static void stop_adc(struct i810_state *state)
 810 {
 811         struct i810_card *card = state->card;
 812         unsigned long flags;
 813
 814         spin_lock_irqsave(&card->lock, flags);
 815         __stop_adc(state);
 816         spin_unlock_irqrestore(&card->lock, flags);
 817 }
 818
 819 static inline void __start_adc(struct i810_state *state)
 820 {
 821         struct dmabuf *dmabuf = &state->dmabuf;
 822
 823         if (dmabuf->count < dmabuf->dmasize && dmabuf->ready && !dmabuf->enable &&
 824             (dmabuf->trigger & PCM_ENABLE_INPUT)) {
 825                 dmabuf->enable |= ADC_RUNNING;
 826                 // Interrupt enable, LVI enable, DMA enable
 827                 outb(0x10 | 0x04 | 0x01, state->card->iobase + PI_CR);
 828         }
 829 }
 830
 831 static void start_adc(struct i810_state *state)
 832 {
 833         struct i810_card *card = state->card;
 834         unsigned long flags;
 835
 836         spin_lock_irqsave(&card->lock, flags);
 837         __start_adc(state);
 838         spin_unlock_irqrestore(&card->lock, flags);
 839 }
 840
 841 /* stop playback (lock held) */
 842 static inline void __stop_dac(struct i810_state *state)
 843 {
 844         struct dmabuf *dmabuf = &state->dmabuf;
 845         struct i810_card *card = state->card;
 846
 847         dmabuf->enable &= ~DAC_RUNNING;
 848         outb(0, card->iobase + PO_CR);
 849         // wait for the card to acknowledge shutdown
 850         while( inb(card->iobase + PO_CR) != 0 ) ;
 851         // now clear any latent interrupt bits (like the halt bit)
 852         if(card->pci_id == PCI_DEVICE_ID_SI_7012)
 853                 outb( inb(card->iobase + PO_PICB), card->iobase + PO_PICB );
 854         else
 855                 outb( inb(card->iobase + PO_SR), card->iobase + PO_SR );
 856         outl( inl(card->iobase + GLOB_STA) & INT_PO, card->iobase + GLOB_STA);
 857 }
 858
 859 static void stop_dac(struct i810_state *state)
 860 {
 861         struct i810_card *card = state->card;
 862         unsigned long flags;
 863
 864         spin_lock_irqsave(&card->lock, flags);
 865         __stop_dac(state);
 866         spin_unlock_irqrestore(&card->lock, flags);
 867 }
 868
 869 static inline void __start_dac(struct i810_state *state)
 870 {
 871         struct dmabuf *dmabuf = &state->dmabuf;
 872
 873         if (dmabuf->count > 0 && dmabuf->ready && !dmabuf->enable &&
 874             (dmabuf->trigger & PCM_ENABLE_OUTPUT)) {
 875                 dmabuf->enable |= DAC_RUNNING;
 876                 // Interrupt enable, LVI enable, DMA enable
 877                 outb(0x10 | 0x04 | 0x01, state->card->iobase + PO_CR);
 878         }
 879 }
 880 static void start_dac(struct i810_state *state)
 881 {
 882         struct i810_card *card = state->card;
 883         unsigned long flags;
 884
 885         spin_lock_irqsave(&card->lock, flags);
 886         __start_dac(state);
 887         spin_unlock_irqrestore(&card->lock, flags);
 888 }
 889
 890 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
 891 #define DMABUF_MINORDER 1
 892
 893 /* allocate DMA buffer, playback and recording buffer should be allocated separately */
 894 static int alloc_dmabuf(struct i810_state *state)
 895 {
 896         struct dmabuf *dmabuf = &state->dmabuf;
 897         void *rawbuf= NULL;
 898         int order, size;
 899         struct page *page, *pend;
 900
 901         /* If we don't have any oss frag params, then use our default ones */
 902         if(dmabuf->ossmaxfrags == 0)
 903                 dmabuf->ossmaxfrags = 4;
 904         if(dmabuf->ossfragsize == 0)
 905                 dmabuf->ossfragsize = (PAGE_SIZE<<DMABUF_DEFAULTORDER)/dmabuf->ossmaxfrags;
 906         size = dmabuf->ossfragsize * dmabuf->ossmaxfrags;
 907
 908         if(dmabuf->rawbuf && (PAGE_SIZE << dmabuf->buforder) == size)
 909                 return 0;
 910         /* alloc enough to satisfy the oss params */
 911         for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--) {
 912                 if ( (PAGE_SIZE<<order) > size )
 913                         continue;
 914                 if ((rawbuf = pci_alloc_consistent(state->card->pci_dev,
 915                                                    PAGE_SIZE << order,
 916                                                    &dmabuf->dma_handle)))
 917                         break;
 918         }
 919         if (!rawbuf)
 920                 return -ENOMEM;
 921
 922
 923 #ifdef DEBUG
 924         printk("i810_audio: allocated %ld (order = %d) bytes at %p\n",
 925                PAGE_SIZE << order, order, rawbuf);
 926 #endif
 927
 928         dmabuf->ready  = dmabuf->mapped = 0;
 929         dmabuf->rawbuf = rawbuf;
 930         dmabuf->buforder = order;
 931
 932         /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 933         pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
 934         for (page = virt_to_page(rawbuf); page <= pend; page++)
 935                 SetPageReserved(page);
 936
 937         return 0;
 938 }
 939
 940 /* free DMA buffer */
 941 static void dealloc_dmabuf(struct i810_state *state)
 942 {
 943         struct dmabuf *dmabuf = &state->dmabuf;
 944         struct page *page, *pend;
 945
 946         if (dmabuf->rawbuf) {
 947                 /* undo marking the pages as reserved */
 948                 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
 949                 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
 950                         ClearPageReserved(page);
 951                 pci_free_consistent(state->card->pci_dev, PAGE_SIZE << dmabuf->buforder,
 952                                     dmabuf->rawbuf, dmabuf->dma_handle);
 953         }
 954         dmabuf->rawbuf = NULL;
 955         dmabuf->mapped = dmabuf->ready = 0;
 956 }
 957
 958 static int prog_dmabuf(struct i810_state *state, unsigned rec)
 959 {
 960         struct dmabuf *dmabuf = &state->dmabuf;
 961         struct i810_channel *c;
 962         struct sg_item *sg;
 963         unsigned long flags;
 964         int ret;
 965         unsigned fragint;
 966         int i;
 967
 968         spin_lock_irqsave(&state->card->lock, flags);
 969         if(dmabuf->enable & DAC_RUNNING)
 970                 __stop_dac(state);
 971         if(dmabuf->enable & ADC_RUNNING)
 972                 __stop_adc(state);
 973         dmabuf->total_bytes = 0;
 974         dmabuf->count = dmabuf->error = 0;
 975         dmabuf->swptr = dmabuf->hwptr = 0;
 976         spin_unlock_irqrestore(&state->card->lock, flags);
 977
 978         /* allocate DMA buffer, let alloc_dmabuf determine if we are already
 979          * allocated well enough or if we should replace the current buffer
 980          * (assuming one is already allocated, if it isn't, then allocate it).
 981          */
 982         if ((ret = alloc_dmabuf(state)))
 983                 return ret;
 984
 985         /* FIXME: figure out all this OSS fragment stuff */
 986         /* I did, it now does what it should according to the OSS API.  DL */
 987         /* We may not have realloced our dmabuf, but the fragment size to
 988          * fragment number ratio may have changed, so go ahead and reprogram
 989          * things
 990          */
 991         dmabuf->dmasize = PAGE_SIZE << dmabuf->buforder;
 992         dmabuf->numfrag = SG_LEN;
 993         dmabuf->fragsize = dmabuf->dmasize/dmabuf->numfrag;
 994         dmabuf->fragsamples = dmabuf->fragsize >> 1;
 995         dmabuf->userfragsize = dmabuf->ossfragsize;
 996         dmabuf->userfrags = dmabuf->dmasize/dmabuf->ossfragsize;
 997
 998         memset(dmabuf->rawbuf, 0, dmabuf->dmasize);
 999
1000         if(dmabuf->ossmaxfrags == 4) {
1001                 fragint = 8;
1002                 dmabuf->fragshift = 2;
1003         } else if (dmabuf->ossmaxfrags == 8) {
1004                 fragint = 4;
1005                 dmabuf->fragshift = 3;
1006         } else if (dmabuf->ossmaxfrags == 16) {
1007                 fragint = 2;
1008                 dmabuf->fragshift = 4;
1009         } else {
1010                 fragint = 1;
1011                 dmabuf->fragshift = 5;
1012         }
1013         /*
1014          *      Now set up the ring
1015          */
1016         if(dmabuf->read_channel)
1017                 c = dmabuf->read_channel;
1018         else
1019                 c = dmabuf->write_channel;
1020         while(c != NULL) {
1021                 sg=&c->sg[0];
1022                 /*
1023                  *      Load up 32 sg entries and take an interrupt at half
1024                  *      way (we might want more interrupts later..)
1025                  */
1026
1027                 for(i=0;i<dmabuf->numfrag;i++)
1028                 {
1029                         sg->busaddr=(u32)dmabuf->dma_handle+dmabuf->fragsize*i;
1030                         // the card will always be doing 16bit stereo
1031                         sg->control=dmabuf->fragsamples;
1032                         if(state->card->pci_id == PCI_DEVICE_ID_SI_7012)
1033                                 sg->control <<= 1;
1034                         sg->control|=CON_BUFPAD;
1035                         // set us up to get IOC interrupts as often as needed to
1036                         // satisfy numfrag requirements, no more
1037                         if( ((i+1) % fragint) == 0) {
1038                                 sg->control|=CON_IOC;
1039                         }
1040                         sg++;
1041                 }
1042                 spin_lock_irqsave(&state->card->lock, flags);
1043                 outb(2, state->card->iobase+c->port+OFF_CR);   /* reset DMA machine */
1044                 while( inb(state->card->iobase+c->port+OFF_CR) & 0x02 ) ;
1045                 outl((u32)state->card->chandma +
1046                     c->num*sizeof(struct i810_channel),
1047                     state->card->iobase+c->port+OFF_BDBAR);
1048                 CIV_TO_LVI(state->card->iobase+c->port, 0);
1049
1050                 spin_unlock_irqrestore(&state->card->lock, flags);
1051
1052                 if(c != dmabuf->write_channel)
1053                         c = dmabuf->write_channel;
1054                 else
1055                         c = NULL;
1056         }
1057
1058         /* set the ready flag for the dma buffer */
1059         dmabuf->ready = 1;
1060
1061 #ifdef DEBUG
1062         printk("i810_audio: prog_dmabuf, sample rate = %d, format = %d,\n\tnumfrag = %d, "
1063                "fragsize = %d dmasize = %d\n",
1064                dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1065                dmabuf->fragsize, dmabuf->dmasize);
1066 #endif
1067
1068         return 0;
1069 }
1070
1071 static void __i810_update_lvi(struct i810_state *state, int rec)
1072 {
1073         struct dmabuf *dmabuf = &state->dmabuf;
1074         int x, port;
1075
1076         port = state->card->iobase;
1077         if(rec)
1078                 port += dmabuf->read_channel->port;
1079         else
1080                 port += dmabuf->write_channel->port;
1081
1082         /* if we are currently stopped, then our CIV is actually set to our
1083          * *last* sg segment and we are ready to wrap to the next.  However,
1084          * if we set our LVI to the last sg segment, then it won't wrap to
1085          * the next sg segment, it won't even get a start.  So, instead, when
1086          * we are stopped, we set both the LVI value and also we increment
1087          * the CIV value to the next sg segment to be played so that when
1088          * we call start_{dac,adc}, things will operate properly
1089          */
1090         if (!dmabuf->enable && dmabuf->ready) {
1091                 if(rec && dmabuf->count < dmabuf->dmasize &&
1092                    (dmabuf->trigger & PCM_ENABLE_INPUT))
1093                 {
1094                         CIV_TO_LVI(port, 1);
1095                         __start_adc(state);
1096                         while( !(inb(port + OFF_CR) & ((1<<4) | (1<<2))) ) ;
1097                 } else if (!rec && dmabuf->count &&
1098                            (dmabuf->trigger & PCM_ENABLE_OUTPUT))
1099                 {
1100                         CIV_TO_LVI(port, 1);
1101                         __start_dac(state);
1102                         while( !(inb(port + OFF_CR) & ((1<<4) | (1<<2))) ) ;
1103                 }
1104         }
1105
1106         /* swptr - 1 is the tail of our transfer */
1107         x = (dmabuf->dmasize + dmabuf->swptr - 1) % dmabuf->dmasize;
1108         x /= dmabuf->fragsize;
1109         outb(x, port+OFF_LVI);
1110 }
1111
1112 static void i810_update_lvi(struct i810_state *state, int rec)
1113 {
1114         struct dmabuf *dmabuf = &state->dmabuf;
1115         unsigned long flags;
1116
1117         if(!dmabuf->ready)
1118                 return;
1119         spin_lock_irqsave(&state->card->lock, flags);
1120         __i810_update_lvi(state, rec);
1121         spin_unlock_irqrestore(&state->card->lock, flags);
1122 }
1123
1124 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
1125 static void i810_update_ptr(struct i810_state *state)
1126 {
1127         struct dmabuf *dmabuf = &state->dmabuf;
1128         unsigned hwptr;
1129         int diff;
1130
1131         /* error handling and process wake up for DAC */
1132         if (dmabuf->enable == ADC_RUNNING) {
1133                 /* update hardware pointer */
1134                 hwptr = i810_get_dma_addr(state, 1);
1135                 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1136 #if defined(DEBUG_INTERRUPTS) || defined(DEBUG_MMAP)
1137                 printk("ADC HWP %d,%d,%d\n", hwptr, dmabuf->hwptr, diff);
1138 #endif
1139                 dmabuf->hwptr = hwptr;
1140                 dmabuf->total_bytes += diff;
1141                 dmabuf->count += diff;
1142                 if (dmabuf->count > dmabuf->dmasize) {
1143                         /* buffer underrun or buffer overrun */
1144                         /* this is normal for the end of a read */
1145                         /* only give an error if we went past the */
1146                         /* last valid sg entry */
1147                         if((inb(state->card->iobase + PI_CIV) & 31) !=
1148                            (inb(state->card->iobase + PI_LVI) & 31)) {
1149                                 printk(KERN_WARNING "i810_audio: DMA overrun on read\n");
1150                                 dmabuf->error++;
1151                         }
1152                 }
1153                 if (dmabuf->count > dmabuf->userfragsize)
1154                         wake_up(&dmabuf->wait);
1155         }
1156         /* error handling and process wake up for DAC */
1157         if (dmabuf->enable == DAC_RUNNING) {
1158                 /* update hardware pointer */
1159                 hwptr = i810_get_dma_addr(state, 0);
1160                 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1161 #if defined(DEBUG_INTERRUPTS) || defined(DEBUG_MMAP)
1162                 printk("DAC HWP %d,%d,%d\n", hwptr, dmabuf->hwptr, diff);
1163 #endif
1164                 dmabuf->hwptr = hwptr;
1165                 dmabuf->total_bytes += diff;
1166                 dmabuf->count -= diff;
1167                 if (dmabuf->count < 0) {
1168                         /* buffer underrun or buffer overrun */
1169                         /* this is normal for the end of a write */
1170                         /* only give an error if we went past the */
1171                         /* last valid sg entry */
1172                         if((inb(state->card->iobase + PO_CIV) & 31) !=
1173                            (inb(state->card->iobase + PO_LVI) & 31)) {
1174                                 printk(KERN_WARNING "i810_audio: DMA overrun on write\n");
1175                                 printk("i810_audio: CIV %d, LVI %d, hwptr %x, "
1176                                         "count %d\n",
1177                                         inb(state->card->iobase + PO_CIV) & 31,
1178                                         inb(state->card->iobase + PO_LVI) & 31,
1179                                         dmabuf->hwptr, dmabuf->count);
1180                                 dmabuf->error++;
1181                         }
1182                 }
1183                 if (dmabuf->count < (dmabuf->dmasize-dmabuf->userfragsize))
1184                         wake_up(&dmabuf->wait);
1185         }
1186 }
1187
1188 static inline int i810_get_free_write_space(struct i810_state *state)
1189 {
1190         struct dmabuf *dmabuf = &state->dmabuf;
1191         int free;
1192
1193         i810_update_ptr(state);
1194         // catch underruns during playback
1195         if (dmabuf->count < 0) {
1196                 dmabuf->count = 0;
1197                 dmabuf->swptr = dmabuf->hwptr;
1198         }
1199         free = dmabuf->dmasize - dmabuf->count;
1200         free -= (dmabuf->hwptr % dmabuf->fragsize);
1201         if(free < 0)
1202                 return(0);
1203         return(free);
1204 }
1205
1206 static inline int i810_get_available_read_data(struct i810_state *state)
1207 {
1208         struct dmabuf *dmabuf = &state->dmabuf;
1209         int avail;
1210
1211         i810_update_ptr(state);
1212         // catch overruns during record
1213         if (dmabuf->count > dmabuf->dmasize) {
1214                 dmabuf->count = dmabuf->dmasize;
1215                 dmabuf->swptr = dmabuf->hwptr;
1216         }
1217         avail = dmabuf->count;
1218         avail -= (dmabuf->hwptr % dmabuf->fragsize);
1219         if(avail < 0)
1220                 return(0);
1221         return(avail);
1222 }
1223
1224 static int drain_dac(struct i810_state *state, int signals_allowed)
1225 {
1226         DECLARE_WAITQUEUE(wait, current);
1227         struct dmabuf *dmabuf = &state->dmabuf;
1228         unsigned long flags;
1229         unsigned long tmo;
1230         int count;
1231
1232         if (!dmabuf->ready)
1233                 return 0;
1234         if(dmabuf->mapped) {
1235                 stop_dac(state);
1236                 return 0;
1237         }
1238         add_wait_queue(&dmabuf->wait, &wait);
1239         for (;;) {
1240
1241                 spin_lock_irqsave(&state->card->lock, flags);
1242                 i810_update_ptr(state);
1243                 count = dmabuf->count;
1244                 spin_unlock_irqrestore(&state->card->lock, flags);
1245
1246                 if (count <= 0)
1247                         break;
1248
1249                 /*
1250                  * This will make sure that our LVI is correct, that our
1251                  * pointer is updated, and that the DAC is running.  We
1252                  * have to force the setting of dmabuf->trigger to avoid
1253                  * any possible deadlocks.
1254                  */
1255                 if(!dmabuf->enable) {
1256                         dmabuf->trigger = PCM_ENABLE_OUTPUT;
1257                         i810_update_lvi(state,0);
1258                 }
1259                 if (signal_pending(current) && signals_allowed) {
1260                         break;
1261                 }
1262
1263                 /* It seems that we have to set the current state to
1264                  * TASK_INTERRUPTIBLE every time to make the process
1265                  * really go to sleep.  This also has to be *after* the
1266                  * update_ptr() call because update_ptr is likely to
1267                  * do a wake_up() which will unset this before we ever
1268                  * try to sleep, resuling in a tight loop in this code
1269                  * instead of actually sleeping and waiting for an
1270                  * interrupt to wake us up!
1271                  */
1272                 set_current_state(TASK_INTERRUPTIBLE);
1273                 /*
1274                  * set the timeout to significantly longer than it *should*
1275                  * take for the DAC to drain the DMA buffer
1276                  */
1277                 tmo = (count * HZ) / (dmabuf->rate);
1278                 if (!schedule_timeout(tmo >= 2 ? tmo : 2)){
1279                         printk(KERN_ERR "i810_audio: drain_dac, dma timeout?\n");
1280                         count = 0;
1281                         break;
1282                 }
1283         }
1284         set_current_state(TASK_RUNNING);
1285         remove_wait_queue(&dmabuf->wait, &wait);
1286         if(count > 0 && signal_pending(current) && signals_allowed)
1287                 return -ERESTARTSYS;
1288         stop_dac(state);
1289         return 0;
1290 }
1291
1292 static void i810_channel_interrupt(struct i810_card *card)
1293 {
1294         int i, count;
1295
1296 #ifdef DEBUG_INTERRUPTS
1297         printk("CHANNEL ");
1298 #endif
1299         for(i=0;i<NR_HW_CH;i++)
1300         {
1301                 struct i810_state *state = card->states[i];
1302                 struct i810_channel *c;
1303                 struct dmabuf *dmabuf;
1304                 unsigned long port = card->iobase;
1305                 u16 status;
1306
1307                 if(!state)
1308                         continue;
1309                 if(!state->dmabuf.ready)
1310                         continue;
1311                 dmabuf = &state->dmabuf;
1312                 if(dmabuf->enable & DAC_RUNNING) {
1313                         c=dmabuf->write_channel;
1314                 } else if(dmabuf->enable & ADC_RUNNING) {
1315                         c=dmabuf->read_channel;
1316                 } else  /* This can occur going from R/W to close */
1317                         continue;
1318
1319                 port+=c->port;
1320
1321                 if(card->pci_id == PCI_DEVICE_ID_SI_7012)
1322                         status = inw(port + OFF_PICB);
1323                 else
1324                         status = inw(port + OFF_SR);
1325
1326 #ifdef DEBUG_INTERRUPTS
1327                 printk("NUM %d PORT %X IRQ ( ST%d ", c->num, c->port, status);
1328 #endif
1329                 if(status & DMA_INT_COMPLETE)
1330                 {
1331                         /* only wake_up() waiters if this interrupt signals
1332                          * us being beyond a userfragsize of data open or
1333                          * available, and i810_update_ptr() does that for
1334                          * us
1335                          */
1336                         i810_update_ptr(state);
1337 #ifdef DEBUG_INTERRUPTS
1338                         printk("COMP %d ", dmabuf->hwptr /
1339                                         dmabuf->fragsize);
1340 #endif
1341                 }
1342                 if(status & (DMA_INT_LVI | DMA_INT_DCH))
1343                 {
1344                         /* wake_up() unconditionally on LVI and DCH */
1345                         i810_update_ptr(state);
1346                         wake_up(&dmabuf->wait);
1347 #ifdef DEBUG_INTERRUPTS
1348                         if(status & DMA_INT_LVI)
1349                                 printk("LVI ");
1350                         if(status & DMA_INT_DCH)
1351                                 printk("DCH -");
1352 #endif
1353                         if(dmabuf->enable & DAC_RUNNING)
1354                                 count = dmabuf->count;
1355                         else
1356                                 count = dmabuf->dmasize - dmabuf->count;
1357                         if(count > 0) {
1358                                 outb(inb(port+OFF_CR) | 1, port+OFF_CR);
1359 #ifdef DEBUG_INTERRUPTS
1360                                 printk(" CONTINUE ");
1361 #endif
1362                         } else {
1363                                 if (dmabuf->enable & DAC_RUNNING)
1364                                         __stop_dac(state);
1365                                 if (dmabuf->enable & ADC_RUNNING)
1366                                         __stop_adc(state);
1367                                 dmabuf->enable = 0;
1368 #ifdef DEBUG_INTERRUPTS
1369                                 printk(" STOP ");
1370 #endif
1371                         }
1372                 }
1373                 if(card->pci_id == PCI_DEVICE_ID_SI_7012)
1374                         outw(status & DMA_INT_MASK, port + OFF_PICB);
1375                 else
1376                         outw(status & DMA_INT_MASK, port + OFF_SR);
1377         }
1378 #ifdef DEBUG_INTERRUPTS
1379         printk(")\n");
1380 #endif
1381 }
1382
1383 static irqreturn_t i810_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1384 {
1385         struct i810_card *card = (struct i810_card *)dev_id;
1386         u32 status;
1387
1388         spin_lock(&card->lock);
1389
1390         status = inl(card->iobase + GLOB_STA);
1391
1392         if(!(status & INT_MASK))
1393         {
1394                 spin_unlock(&card->lock);
1395                 return IRQ_NONE;  /* not for us */
1396         }
1397
1398         if(status & (INT_PO|INT_PI|INT_MC))
1399                 i810_channel_interrupt(card);
1400
1401         /* clear 'em */
1402         outl(status & INT_MASK, card->iobase + GLOB_STA);
1403         spin_unlock(&card->lock);
1404         return IRQ_HANDLED;
1405 }
1406
1407 /* in this loop, dmabuf.count signifies the amount of data that is
1408    waiting to be copied to the user's buffer.  It is filled by the dma
1409    machine and drained by this loop. */
1410
1411 static ssize_t i810_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1412 {
1413         struct i810_state *state = (struct i810_state *)file->private_data;
1414         struct i810_card *card=state ? state->card : 0;
1415         struct dmabuf *dmabuf = &state->dmabuf;
1416         ssize_t ret;
1417         unsigned long flags;
1418         unsigned int swptr;
1419         int cnt;
1420         DECLARE_WAITQUEUE(waita, current);
1421
1422 #ifdef DEBUG2
1423         printk("i810_audio: i810_read called, count = %d\n", count);
1424 #endif
1425
1426         if (ppos != &file->f_pos)
1427                 return -ESPIPE;
1428         if (dmabuf->mapped)
1429                 return -ENXIO;
1430         if (dmabuf->enable & DAC_RUNNING)
1431                 return -ENODEV;
1432         if (!dmabuf->read_channel) {
1433                 dmabuf->ready = 0;
1434                 dmabuf->read_channel = card->alloc_rec_pcm_channel(card);
1435                 if (!dmabuf->read_channel) {
1436                         return -EBUSY;
1437                 }
1438         }
1439         if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1440                 return ret;
1441         if (!access_ok(VERIFY_WRITE, buffer, count))
1442                 return -EFAULT;
1443         ret = 0;
1444
1445         add_wait_queue(&dmabuf->wait, &waita);
1446         while (count > 0) {
1447                 set_current_state(TASK_INTERRUPTIBLE);
1448                 spin_lock_irqsave(&card->lock, flags);
1449                 if (PM_SUSPENDED(card)) {
1450                         spin_unlock_irqrestore(&card->lock, flags);
1451                         schedule();
1452                         if (signal_pending(current)) {
1453                                 if (!ret) ret = -EAGAIN;
1454                                 break;
1455                         }
1456                         continue;
1457                 }
1458                 swptr = dmabuf->swptr;
1459                 cnt = i810_get_available_read_data(state);
1460                 // this is to make the copy_to_user simpler below
1461                 if(cnt > (dmabuf->dmasize - swptr))
1462                         cnt = dmabuf->dmasize - swptr;
1463                 spin_unlock_irqrestore(&card->lock, flags);
1464
1465                 if (cnt > count)
1466                         cnt = count;
1467                 /* Lop off the last two bits to force the code to always
1468                  * write in full samples.  This keeps software that sets
1469                  * O_NONBLOCK but doesn't check the return value of the
1470                  * write call from getting things out of state where they
1471                  * think a full 4 byte sample was written when really only
1472                  * a portion was, resulting in odd sound and stereo
1473                  * hysteresis.
1474                  */
1475                 cnt &= ~0x3;
1476                 if (cnt <= 0) {
1477                         unsigned long tmo;
1478                         /*
1479                          * Don't let us deadlock.  The ADC won't start if
1480                          * dmabuf->trigger isn't set.  A call to SETTRIGGER
1481                          * could have turned it off after we set it to on
1482                          * previously.
1483                          */
1484                         dmabuf->trigger = PCM_ENABLE_INPUT;
1485                         /*
1486                          * This does three things.  Updates LVI to be correct,
1487                          * makes sure the ADC is running, and updates the
1488                          * hwptr.
1489                          */
1490                         i810_update_lvi(state,1);
1491                         if (file->f_flags & O_NONBLOCK) {
1492                                 if (!ret) ret = -EAGAIN;
1493                                 goto done;
1494                         }
1495                         /* Set the timeout to how long it would take to fill
1496                          * two of our buffers.  If we haven't been woke up
1497                          * by then, then we know something is wrong.
1498                          */
1499                         tmo = (dmabuf->dmasize * HZ * 2) / (dmabuf->rate * 4);
1500                         /* There are two situations when sleep_on_timeout returns, one is when
1501                            the interrupt is serviced correctly and the process is waked up by
1502                            ISR ON TIME. Another is when timeout is expired, which means that
1503                            either interrupt is NOT serviced correctly (pending interrupt) or it
1504                            is TOO LATE for the process to be scheduled to run (scheduler latency)
1505                            which results in a (potential) buffer overrun. And worse, there is
1506                            NOTHING we can do to prevent it. */
1507                         if (!schedule_timeout(tmo >= 2 ? tmo : 2)) {
1508 #ifdef DEBUG
1509                                 printk(KERN_ERR "i810_audio: recording schedule timeout, "
1510                                        "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1511                                        dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1512                                        dmabuf->hwptr, dmabuf->swptr);
1513 #endif
1514                                 /* a buffer overrun, we delay the recovery until next time the
1515                                    while loop begin and we REALLY have space to record */
1516                         }
1517                         if (signal_pending(current)) {
1518                                 ret = ret ? ret : -ERESTARTSYS;
1519                                 goto done;
1520                         }
1521                         continue;
1522                 }
1523
1524                 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1525                         if (!ret) ret = -EFAULT;
1526                         goto done;
1527                 }
1528
1529                 swptr = (swptr + cnt) % dmabuf->dmasize;
1530
1531                 spin_lock_irqsave(&card->lock, flags);
1532
1533                 if (PM_SUSPENDED(card)) {
1534                         spin_unlock_irqrestore(&card->lock, flags);
1535                         continue;
1536                 }
1537                 dmabuf->swptr = swptr;
1538                 dmabuf->count -= cnt;
1539                 spin_unlock_irqrestore(&card->lock, flags);
1540
1541                 count -= cnt;
1542                 buffer += cnt;
1543                 ret += cnt;
1544         }
1545  done:
1546         i810_update_lvi(state,1);
1547         set_current_state(TASK_RUNNING);
1548         remove_wait_queue(&dmabuf->wait, &waita);
1549
1550         return ret;
1551 }
1552
1553 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1554    the soundcard.  it is drained by the dma machine and filled by this loop. */
1555 static ssize_t i810_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1556 {
1557         struct i810_state *state = (struct i810_state *)file->private_data;
1558         struct i810_card *card=state ? state->card : 0;
1559         struct dmabuf *dmabuf = &state->dmabuf;
1560         ssize_t ret;
1561         unsigned long flags;
1562         unsigned int swptr = 0;
1563         int cnt, x;
1564         DECLARE_WAITQUEUE(waita, current);
1565
1566 #ifdef DEBUG2
1567         printk("i810_audio: i810_write called, count = %d\n", count);
1568 #endif
1569
1570         if (ppos != &file->f_pos)
1571                 return -ESPIPE;
1572         if (dmabuf->mapped)
1573                 return -ENXIO;
1574         if (dmabuf->enable & ADC_RUNNING)
1575                 return -ENODEV;
1576         if (!dmabuf->write_channel) {
1577                 dmabuf->ready = 0;
1578                 dmabuf->write_channel = card->alloc_pcm_channel(card);
1579                 if(!dmabuf->write_channel)
1580                         return -EBUSY;
1581         }
1582         if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1583                 return ret;
1584         if (!access_ok(VERIFY_READ, buffer, count))
1585                 return -EFAULT;
1586         ret = 0;
1587
1588         add_wait_queue(&dmabuf->wait, &waita);
1589         while (count > 0) {
1590                 set_current_state(TASK_INTERRUPTIBLE);
1591                 spin_lock_irqsave(&state->card->lock, flags);
1592                 if (PM_SUSPENDED(card)) {
1593                         spin_unlock_irqrestore(&card->lock, flags);
1594                         schedule();
1595                         if (signal_pending(current)) {
1596                                 if (!ret) ret = -EAGAIN;
1597                                 break;
1598                         }
1599                         continue;
1600                 }
1601
1602                 swptr = dmabuf->swptr;
1603                 cnt = i810_get_free_write_space(state);
1604                 /* Bound the maximum size to how much we can copy to the
1605                  * dma buffer before we hit the end.  If we have more to
1606                  * copy then it will get done in a second pass of this
1607                  * loop starting from the beginning of the buffer.
1608                  */
1609                 if(cnt > (dmabuf->dmasize - swptr))
1610                         cnt = dmabuf->dmasize - swptr;
1611                 spin_unlock_irqrestore(&state->card->lock, flags);
1612
1613 #ifdef DEBUG2
1614                 printk(KERN_INFO "i810_audio: i810_write: %d bytes available space\n", cnt);
1615 #endif
1616                 if (cnt > count)
1617                         cnt = count;
1618                 /* Lop off the last two bits to force the code to always
1619                  * write in full samples.  This keeps software that sets
1620                  * O_NONBLOCK but doesn't check the return value of the
1621                  * write call from getting things out of state where they
1622                  * think a full 4 byte sample was written when really only
1623                  * a portion was, resulting in odd sound and stereo
1624                  * hysteresis.
1625                  */
1626                 cnt &= ~0x3;
1627                 if (cnt <= 0) {
1628                         unsigned long tmo;
1629                         // There is data waiting to be played
1630                         /*
1631                          * Force the trigger setting since we would
1632                          * deadlock with it set any other way
1633                          */
1634                         dmabuf->trigger = PCM_ENABLE_OUTPUT;
1635                         i810_update_lvi(state,0);
1636                         if (file->f_flags & O_NONBLOCK) {
1637                                 if (!ret) ret = -EAGAIN;
1638                                 goto ret;
1639                         }
1640                         /* Not strictly correct but works */
1641                         tmo = (dmabuf->dmasize * HZ * 2) / (dmabuf->rate * 4);
1642                         /* There are two situations when sleep_on_timeout returns, one is when
1643                            the interrupt is serviced correctly and the process is waked up by
1644                            ISR ON TIME. Another is when timeout is expired, which means that
1645                            either interrupt is NOT serviced correctly (pending interrupt) or it
1646                            is TOO LATE for the process to be scheduled to run (scheduler latency)
1647                            which results in a (potential) buffer underrun. And worse, there is
1648                            NOTHING we can do to prevent it. */
1649                         if (!schedule_timeout(tmo >= 2 ? tmo : 2)) {
1650 #ifdef DEBUG
1651                                 printk(KERN_ERR "i810_audio: playback schedule timeout, "
1652                                        "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1653                                        dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1654                                        dmabuf->hwptr, dmabuf->swptr);
1655 #endif
1656                                 /* a buffer underrun, we delay the recovery until next time the
1657                                    while loop begin and we REALLY have data to play */
1658                                 //return ret;
1659                         }
1660                         if (signal_pending(current)) {
1661                                 if (!ret) ret = -ERESTARTSYS;
1662                                 goto ret;
1663                         }
1664                         continue;
1665                 }
1666                 if (copy_from_user(dmabuf->rawbuf+swptr,buffer,cnt)) {
1667                         if (!ret) ret = -EFAULT;
1668                         goto ret;
1669                 }
1670
1671                 swptr = (swptr + cnt) % dmabuf->dmasize;
1672
1673                 spin_lock_irqsave(&state->card->lock, flags);
1674                 if (PM_SUSPENDED(card)) {
1675                         spin_unlock_irqrestore(&card->lock, flags);
1676                         continue;
1677                 }
1678
1679                 dmabuf->swptr = swptr;
1680                 dmabuf->count += cnt;
1681
1682                 count -= cnt;
1683                 buffer += cnt;
1684                 ret += cnt;
1685                 spin_unlock_irqrestore(&state->card->lock, flags);
1686         }
1687         if (swptr % dmabuf->fragsize) {
1688                 x = dmabuf->fragsize - (swptr % dmabuf->fragsize);
1689                 memset(dmabuf->rawbuf + swptr, '\0', x);
1690         }
1691 ret:
1692         i810_update_lvi(state,0);
1693         set_current_state(TASK_RUNNING);
1694         remove_wait_queue(&dmabuf->wait, &waita);
1695
1696         return ret;
1697 }
1698
1699 /* No kernel lock - we have our own spinlock */
1700 static unsigned int i810_poll(struct file *file, struct poll_table_struct *wait)
1701 {
1702         struct i810_state *state = (struct i810_state *)file->private_data;
1703         struct dmabuf *dmabuf = &state->dmabuf;
1704         unsigned long flags;
1705         unsigned int mask = 0;
1706
1707         if(!dmabuf->ready)
1708                 return 0;
1709         poll_wait(file, &dmabuf->wait, wait);
1710         spin_lock_irqsave(&state->card->lock, flags);
1711         if (dmabuf->enable & ADC_RUNNING ||
1712             dmabuf->trigger & PCM_ENABLE_INPUT) {
1713                 if (i810_get_available_read_data(state) >=
1714                     (signed)dmabuf->userfragsize)
1715                         mask |= POLLIN | POLLRDNORM;
1716         }
1717         if (dmabuf->enable & DAC_RUNNING ||
1718             dmabuf->trigger & PCM_ENABLE_OUTPUT) {
1719                 if (i810_get_free_write_space(state) >=
1720                     (signed)dmabuf->userfragsize)
1721                         mask |= POLLOUT | POLLWRNORM;
1722         }
1723         spin_unlock_irqrestore(&state->card->lock, flags);
1724         return mask;
1725 }
1726
1727 static int i810_mmap(struct file *file, struct vm_area_struct *vma)
1728 {
1729         struct i810_state *state = (struct i810_state *)file->private_data;
1730         struct dmabuf *dmabuf = &state->dmabuf;
1731         int ret = -EINVAL;
1732         unsigned long size;
1733
1734         lock_kernel();
1735         if (vma->vm_flags & VM_WRITE) {
1736                 if (!dmabuf->write_channel &&
1737                     (dmabuf->write_channel =
1738                      state->card->alloc_pcm_channel(state->card)) == NULL) {
1739                         ret = -EBUSY;
1740                         goto out;
1741                 }
1742         }
1743         if (vma->vm_flags & VM_READ) {
1744                 if (!dmabuf->read_channel &&
1745                     (dmabuf->read_channel =
1746                      state->card->alloc_rec_pcm_channel(state->card)) == NULL) {
1747                         ret = -EBUSY;
1748                         goto out;
1749                 }
1750         }
1751         if ((ret = prog_dmabuf(state, 0)) != 0)
1752                 goto out;
1753
1754         ret = -EINVAL;
1755         if (vma->vm_pgoff != 0)
1756                 goto out;
1757         size = vma->vm_end - vma->vm_start;
1758         if (size > (PAGE_SIZE << dmabuf->buforder))
1759                 goto out;
1760         ret = -EAGAIN;
1761         if (remap_page_range(vma, vma->vm_start, virt_to_phys(dmabuf->rawbuf),
1762                              size, vma->vm_page_prot))
1763                 goto out;
1764         dmabuf->mapped = 1;
1765         dmabuf->trigger = 0;
1766         ret = 0;
1767 #ifdef DEBUG_MMAP
1768         printk("i810_audio: mmap'ed %ld bytes of data space\n", size);
1769 #endif
1770 out:
1771         unlock_kernel();
1772         return ret;
1773 }
1774
1775 static int i810_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1776 {
1777         struct i810_state *state = (struct i810_state *)file->private_data;
1778         struct i810_channel *c = NULL;
1779         struct dmabuf *dmabuf = &state->dmabuf;
1780         unsigned long flags;
1781         audio_buf_info abinfo;
1782         count_info cinfo;
1783         unsigned int i_glob_cnt;
1784         int val = 0, ret;
1785         struct ac97_codec *codec = state->card->ac97_codec[0];
1786
1787 #ifdef DEBUG
1788         printk("i810_audio: i810_ioctl, arg=0x%x, cmd=", arg ? *(int *)arg : 0);
1789 #endif
1790
1791         switch (cmd)
1792         {
1793         case OSS_GETVERSION:
1794 #ifdef DEBUG
1795                 printk("OSS_GETVERSION\n");
1796 #endif
1797                 return put_user(SOUND_VERSION, (int *)arg);
1798
1799         case SNDCTL_DSP_RESET:
1800 #ifdef DEBUG
1801                 printk("SNDCTL_DSP_RESET\n");
1802 #endif
1803                 spin_lock_irqsave(&state->card->lock, flags);
1804                 if (dmabuf->enable == DAC_RUNNING) {
1805                         c = dmabuf->write_channel;
1806                         __stop_dac(state);
1807                 }
1808                 if (dmabuf->enable == ADC_RUNNING) {
1809                         c = dmabuf->read_channel;
1810                         __stop_adc(state);
1811                 }
1812                 if (c != NULL) {
1813                         outb(2, state->card->iobase+c->port+OFF_CR);   /* reset DMA machine */
1814                         while ( inb(state->card->iobase+c->port+OFF_CR) & 2 )
1815                                 cpu_relax();
1816                         outl((u32)state->card->chandma +
1817                             c->num*sizeof(struct i810_channel),
1818                             state->card->iobase+c->port+OFF_BDBAR);
1819                         CIV_TO_LVI(state->card->iobase+c->port, 0);
1820                 }
1821
1822                 spin_unlock_irqrestore(&state->card->lock, flags);
1823                 synchronize_irq(state->card->pci_dev->irq);
1824                 dmabuf->ready = 0;
1825                 dmabuf->swptr = dmabuf->hwptr = 0;
1826                 dmabuf->count = dmabuf->total_bytes = 0;
1827                 return 0;
1828
1829         case SNDCTL_DSP_SYNC:
1830 #ifdef DEBUG
1831                 printk("SNDCTL_DSP_SYNC\n");
1832 #endif
1833                 if (dmabuf->enable != DAC_RUNNING || file->f_flags & O_NONBLOCK)
1834                         return 0;
1835                 if((val = drain_dac(state, 1)))
1836                         return val;
1837                 dmabuf->total_bytes = 0;
1838                 return 0;
1839
1840         case SNDCTL_DSP_SPEED: /* set smaple rate */
1841 #ifdef DEBUG
1842                 printk("SNDCTL_DSP_SPEED\n");
1843 #endif
1844                 if (get_user(val, (int *)arg))
1845                         return -EFAULT;
1846                 if (val >= 0) {
1847                         if (file->f_mode & FMODE_WRITE) {
1848                                 if ( (state->card->ac97_status & SPDIF_ON) ) {  /* S/PDIF Enabled */
1849                                         /* AD1886 only supports 48000, need to check that */
1850                                         if ( i810_valid_spdif_rate ( codec, val ) ) {
1851                                                 /* Set DAC rate */
1852                                                 i810_set_spdif_output ( state, -1, 0 );
1853                                                 stop_dac(state);
1854                                                 dmabuf->ready = 0;
1855                                                 spin_lock_irqsave(&state->card->lock, flags);
1856                                                 i810_set_dac_rate(state, val);
1857                                                 spin_unlock_irqrestore(&state->card->lock, flags);
1858                                                 /* Set S/PDIF transmitter rate. */
1859                                                 i810_set_spdif_output ( state, AC97_EA_SPSA_3_4, val );
1860                                                 if ( ! (state->card->ac97_status & SPDIF_ON) ) {
1861                                                         val = dmabuf->rate;
1862                                                 }
1863                                         } else { /* Not a valid rate for S/PDIF, ignore it */
1864                                                 val = dmabuf->rate;
1865                                         }
1866                                 } else {
1867                                         stop_dac(state);
1868                                         dmabuf->ready = 0;
1869                                         spin_lock_irqsave(&state->card->lock, flags);
1870                                         i810_set_dac_rate(state, val);
1871                                         spin_unlock_irqrestore(&state->card->lock, flags);
1872                                 }
1873                         }
1874                         if (file->f_mode & FMODE_READ) {
1875                                 stop_adc(state);
1876                                 dmabuf->ready = 0;
1877                                 spin_lock_irqsave(&state->card->lock, flags);
1878                                 i810_set_adc_rate(state, val);
1879                                 spin_unlock_irqrestore(&state->card->lock, flags);
1880                         }
1881                 }
1882                 return put_user(dmabuf->rate, (int *)arg);
1883
1884         case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
1885 #ifdef DEBUG
1886                 printk("SNDCTL_DSP_STEREO\n");
1887 #endif
1888                 if (dmabuf->enable & DAC_RUNNING) {
1889                         stop_dac(state);
1890                 }
1891                 if (dmabuf->enable & ADC_RUNNING) {
1892                         stop_adc(state);
1893                 }
1894                 return put_user(1, (int *)arg);
1895
1896         case SNDCTL_DSP_GETBLKSIZE:
1897                 if (file->f_mode & FMODE_WRITE) {
1898                         if (!dmabuf->ready && (val = prog_dmabuf(state, 0)))
1899                                 return val;
1900                 }
1901                 if (file->f_mode & FMODE_READ) {
1902                         if (!dmabuf->ready && (val = prog_dmabuf(state, 1)))
1903                                 return val;
1904                 }
1905 #ifdef DEBUG
1906                 printk("SNDCTL_DSP_GETBLKSIZE %d\n", dmabuf->userfragsize);
1907 #endif
1908                 return put_user(dmabuf->userfragsize, (int *)arg);
1909
1910         case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
1911 #ifdef DEBUG
1912                 printk("SNDCTL_DSP_GETFMTS\n");
1913 #endif
1914                 return put_user(AFMT_S16_LE, (int *)arg);
1915
1916         case SNDCTL_DSP_SETFMT: /* Select sample format */
1917 #ifdef DEBUG
1918                 printk("SNDCTL_DSP_SETFMT\n");
1919 #endif
1920                 return put_user(AFMT_S16_LE, (int *)arg);
1921
1922         case SNDCTL_DSP_CHANNELS:
1923 #ifdef DEBUG
1924                 printk("SNDCTL_DSP_CHANNELS\n");
1925 #endif
1926                 if (get_user(val, (int *)arg))
1927                         return -EFAULT;
1928
1929                 if (val > 0) {
1930                         if (dmabuf->enable & DAC_RUNNING) {
1931                                 stop_dac(state);
1932                         }
1933                         if (dmabuf->enable & ADC_RUNNING) {
1934                                 stop_adc(state);
1935                         }
1936                 } else {
1937                         return put_user(state->card->channels, (int *)arg);
1938                 }
1939
1940                 /* ICH and ICH0 only support 2 channels */
1941                 if ( state->card->pci_id == PCI_DEVICE_ID_INTEL_82801
1942                      || state->card->pci_id == PCI_DEVICE_ID_INTEL_82901)
1943                         return put_user(2, (int *)arg);
1944
1945                 /* Multi-channel support was added with ICH2. Bits in */
1946                 /* Global Status and Global Control register are now  */
1947                 /* used to indicate this.                             */
1948
1949                 i_glob_cnt = inl(state->card->iobase + GLOB_CNT);
1950
1951                 /* Current # of channels enabled */
1952                 if ( i_glob_cnt & 0x0100000 )
1953                         ret = 4;
1954                 else if ( i_glob_cnt & 0x0200000 )
1955                         ret = 6;
1956                 else
1957                         ret = 2;
1958
1959                 switch ( val ) {
1960                         case 2: /* 2 channels is always supported */
1961                                 outl(i_glob_cnt & 0xffcfffff,
1962                                      state->card->iobase + GLOB_CNT);
1963                                 /* Do we need to change mixer settings????  */
1964                                 break;
1965                         case 4: /* Supported on some chipsets, better check first */
1966                                 if ( state->card->channels >= 4 ) {
1967                                         outl((i_glob_cnt & 0xffcfffff) | 0x100000,
1968                                               state->card->iobase + GLOB_CNT);
1969                                         /* Do we need to change mixer settings??? */
1970                                 } else {
1971                                         val = ret;
1972                                 }
1973                                 break;
1974                         case 6: /* Supported on some chipsets, better check first */
1975                                 if ( state->card->channels >= 6 ) {
1976                                         outl((i_glob_cnt & 0xffcfffff) | 0x200000,
1977                                               state->card->iobase + GLOB_CNT);
1978                                         /* Do we need to change mixer settings??? */
1979                                 } else {
1980                                         val = ret;
1981                                 }
1982                                 break;
1983                         default: /* nothing else is ever supported by the chipset */
1984                                 val = ret;
1985                                 break;
1986                 }
1987
1988                 return put_user(val, (int *)arg);
1989
1990         case SNDCTL_DSP_POST: /* the user has sent all data and is notifying us */
1991                 /* we update the swptr to the end of the last sg segment then return */
1992 #ifdef DEBUG
1993                 printk("SNDCTL_DSP_POST\n");
1994 #endif
1995                 if(!dmabuf->ready || (dmabuf->enable != DAC_RUNNING))
1996                         return 0;
1997                 if((dmabuf->swptr % dmabuf->fragsize) != 0) {
1998                         val = dmabuf->fragsize - (dmabuf->swptr % dmabuf->fragsize);
1999                         dmabuf->swptr += val;
2000                         dmabuf->count += val;
2001                 }
2002                 return 0;
2003
2004         case SNDCTL_DSP_SUBDIVIDE:
2005                 if (dmabuf->subdivision)
2006                         return -EINVAL;
2007                 if (get_user(val, (int *)arg))
2008                         return -EFAULT;
2009                 if (val != 1 && val != 2 && val != 4)
2010                         return -EINVAL;
2011 #ifdef DEBUG
2012                 printk("SNDCTL_DSP_SUBDIVIDE %d\n", val);
2013 #endif
2014                 dmabuf->subdivision = val;
2015                 dmabuf->ready = 0;
2016                 return 0;
2017
2018         case SNDCTL_DSP_SETFRAGMENT:
2019                 if (get_user(val, (int *)arg))
2020                         return -EFAULT;
2021
2022                 dmabuf->ossfragsize = 1<<(val & 0xffff);
2023                 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
2024                 if (!dmabuf->ossfragsize || !dmabuf->ossmaxfrags)
2025                         return -EINVAL;
2026                 /*
2027                  * Bound the frag size into our allowed range of 256 - 4096
2028                  */
2029                 if (dmabuf->ossfragsize < 256)
2030                         dmabuf->ossfragsize = 256;
2031                 else if (dmabuf->ossfragsize > 4096)
2032                         dmabuf->ossfragsize = 4096;
2033                 /*
2034                  * The numfrags could be something reasonable, or it could
2035                  * be 0xffff meaning "Give me as much as possible".  So,
2036                  * we check the numfrags * fragsize doesn't exceed our
2037                  * 64k buffer limit, nor is it less than our 8k minimum.
2038                  * If it fails either one of these checks, then adjust the
2039                  * number of fragments, not the size of them.  It's OK if
2040                  * our number of fragments doesn't equal 32 or anything
2041                  * like our hardware based number now since we are using
2042                  * a different frag count for the hardware.  Before we get
2043                  * into this though, bound the maxfrags to avoid overflow
2044                  * issues.  A reasonable bound would be 64k / 256 since our
2045                  * maximum buffer size is 64k and our minimum frag size is
2046                  * 256.  On the other end, our minimum buffer size is 8k and
2047                  * our maximum frag size is 4k, so the lower bound should
2048                  * be 2.
2049                  */
2050
2051                 if(dmabuf->ossmaxfrags > 256)
2052                         dmabuf->ossmaxfrags = 256;
2053                 else if (dmabuf->ossmaxfrags < 2)
2054                         dmabuf->ossmaxfrags = 2;
2055
2056                 val = dmabuf->ossfragsize * dmabuf->ossmaxfrags;
2057                 while (val < 8192) {
2058                     val <<= 1;
2059                     dmabuf->ossmaxfrags <<= 1;
2060                 }
2061                 while (val > 65536) {
2062                     val >>= 1;
2063                     dmabuf->ossmaxfrags >>= 1;
2064                 }
2065                 dmabuf->ready = 0;
2066 #ifdef DEBUG
2067                 printk("SNDCTL_DSP_SETFRAGMENT 0x%x, %d, %d\n", val,
2068                         dmabuf->ossfragsize, dmabuf->ossmaxfrags);
2069 #endif
2070
2071                 return 0;
2072
2073         case SNDCTL_DSP_GETOSPACE:
2074                 if (!(file->f_mode & FMODE_WRITE))
2075                         return -EINVAL;
2076                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2077                         return val;
2078                 spin_lock_irqsave(&state->card->lock, flags);
2079                 i810_update_ptr(state);
2080                 abinfo.fragsize = dmabuf->userfragsize;
2081                 abinfo.fragstotal = dmabuf->userfrags;
2082                 if (dmabuf->mapped)
2083                         abinfo.bytes = dmabuf->dmasize;
2084                 else
2085                         abinfo.bytes = i810_get_free_write_space(state);
2086                 abinfo.fragments = abinfo.bytes / dmabuf->userfragsize;
2087                 spin_unlock_irqrestore(&state->card->lock, flags);
2088 #if defined(DEBUG) || defined(DEBUG_MMAP)
2089                 printk("SNDCTL_DSP_GETOSPACE %d, %d, %d, %d\n", abinfo.bytes,
2090                         abinfo.fragsize, abinfo.fragments, abinfo.fragstotal);
2091 #endif
2092                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2093
2094         case SNDCTL_DSP_GETOPTR:
2095                 if (!(file->f_mode & FMODE_WRITE))
2096                         return -EINVAL;
2097                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2098                         return val;
2099                 spin_lock_irqsave(&state->card->lock, flags);
2100                 val = i810_get_free_write_space(state);
2101                 cinfo.bytes = dmabuf->total_bytes;
2102                 cinfo.ptr = dmabuf->hwptr;
2103                 cinfo.blocks = val/dmabuf->userfragsize;
2104                 if (dmabuf->mapped && (dmabuf->trigger & PCM_ENABLE_OUTPUT)) {
2105                         dmabuf->count += val;
2106                         dmabuf->swptr = (dmabuf->swptr + val) % dmabuf->dmasize;
2107                         __i810_update_lvi(state, 0);
2108                 }
2109                 spin_unlock_irqrestore(&state->card->lock, flags);
2110 #if defined(DEBUG) || defined(DEBUG_MMAP)
2111                 printk("SNDCTL_DSP_GETOPTR %d, %d, %d, %d\n", cinfo.bytes,
2112                         cinfo.blocks, cinfo.ptr, dmabuf->count);
2113 #endif
2114                 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
2115
2116         case SNDCTL_DSP_GETISPACE:
2117                 if (!(file->f_mode & FMODE_READ))
2118                         return -EINVAL;
2119                 if (!dmabuf->ready && (val = prog_dmabuf(state, 1)) != 0)
2120                         return val;
2121                 spin_lock_irqsave(&state->card->lock, flags);
2122                 abinfo.bytes = i810_get_available_read_data(state);
2123                 abinfo.fragsize = dmabuf->userfragsize;
2124                 abinfo.fragstotal = dmabuf->userfrags;
2125                 abinfo.fragments = abinfo.bytes / dmabuf->userfragsize;
2126                 spin_unlock_irqrestore(&state->card->lock, flags);
2127 #if defined(DEBUG) || defined(DEBUG_MMAP)
2128                 printk("SNDCTL_DSP_GETISPACE %d, %d, %d, %d\n", abinfo.bytes,
2129                         abinfo.fragsize, abinfo.fragments, abinfo.fragstotal);
2130 #endif
2131                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2132
2133         case SNDCTL_DSP_GETIPTR:
2134                 if (!(file->f_mode & FMODE_READ))
2135                         return -EINVAL;
2136                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2137                         return val;
2138                 spin_lock_irqsave(&state->card->lock, flags);
2139                 val = i810_get_available_read_data(state);
2140                 cinfo.bytes = dmabuf->total_bytes;
2141                 cinfo.blocks = val/dmabuf->userfragsize;
2142                 cinfo.ptr = dmabuf->hwptr;
2143                 if (dmabuf->mapped && (dmabuf->trigger & PCM_ENABLE_INPUT)) {
2144                         dmabuf->count -= val;
2145                         dmabuf->swptr = (dmabuf->swptr + val) % dmabuf->dmasize;
2146                         __i810_update_lvi(state, 1);
2147                 }
2148                 spin_unlock_irqrestore(&state->card->lock, flags);
2149 #if defined(DEBUG) || defined(DEBUG_MMAP)
2150                 printk("SNDCTL_DSP_GETIPTR %d, %d, %d, %d\n", cinfo.bytes,
2151                         cinfo.blocks, cinfo.ptr, dmabuf->count);
2152 #endif
2153                 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
2154
2155         case SNDCTL_DSP_NONBLOCK:
2156 #ifdef DEBUG
2157                 printk("SNDCTL_DSP_NONBLOCK\n");
2158 #endif
2159                 file->f_flags |= O_NONBLOCK;
2160                 return 0;
2161
2162         case SNDCTL_DSP_GETCAPS:
2163 #ifdef DEBUG
2164                 printk("SNDCTL_DSP_GETCAPS\n");
2165 #endif
2166             return put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP|DSP_CAP_BIND,
2167                             (int *)arg);
2168
2169         case SNDCTL_DSP_GETTRIGGER:
2170                 val = 0;
2171 #ifdef DEBUG
2172                 printk("SNDCTL_DSP_GETTRIGGER 0x%x\n", dmabuf->trigger);
2173 #endif
2174                 return put_user(dmabuf->trigger, (int *)arg);
2175
2176         case SNDCTL_DSP_SETTRIGGER:
2177                 if (get_user(val, (int *)arg))
2178                         return -EFAULT;
2179 #if defined(DEBUG) || defined(DEBUG_MMAP)
2180                 printk("SNDCTL_DSP_SETTRIGGER 0x%x\n", val);
2181 #endif
2182                 if((file->f_mode & FMODE_READ) && !(val & PCM_ENABLE_INPUT) && dmabuf->enable == ADC_RUNNING) {
2183                         stop_adc(state);
2184                 }
2185                 if((file->f_mode & FMODE_WRITE) && !(val & PCM_ENABLE_OUTPUT) && dmabuf->enable == DAC_RUNNING) {
2186                         stop_dac(state);
2187                 }
2188                 dmabuf->trigger = val;
2189                 if((file->f_mode & FMODE_WRITE) && (val & PCM_ENABLE_OUTPUT) && !(dmabuf->enable & DAC_RUNNING)) {
2190                         if (!dmabuf->write_channel) {
2191                                 dmabuf->ready = 0;
2192                                 dmabuf->write_channel = state->card->alloc_pcm_channel(state->card);
2193                                 if (!dmabuf->write_channel)
2194                                         return -EBUSY;
2195                         }
2196                         if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
2197                                 return ret;
2198                         if (dmabuf->mapped) {
2199                                 spin_lock_irqsave(&state->card->lock, flags);
2200                                 i810_update_ptr(state);
2201                                 dmabuf->count = 0;
2202                                 dmabuf->swptr = dmabuf->hwptr;
2203                                 dmabuf->count = i810_get_free_write_space(state);
2204                                 dmabuf->swptr = (dmabuf->swptr + dmabuf->count) % dmabuf->dmasize;
2205                                 __i810_update_lvi(state, 0);
2206                                 spin_unlock_irqrestore(&state->card->lock, flags);
2207                         } else
2208                                 start_dac(state);
2209                 }
2210                 if((file->f_mode & FMODE_READ) && (val & PCM_ENABLE_INPUT) && !(dmabuf->enable & ADC_RUNNING)) {
2211                         if (!dmabuf->read_channel) {
2212                                 dmabuf->ready = 0;
2213                                 dmabuf->read_channel = state->card->alloc_rec_pcm_channel(state->card);
2214                                 if (!dmabuf->read_channel)
2215                                         return -EBUSY;
2216                         }
2217                         if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
2218                                 return ret;
2219                         if (dmabuf->mapped) {
2220                                 spin_lock_irqsave(&state->card->lock, flags);
2221                                 i810_update_ptr(state);
2222                                 dmabuf->swptr = dmabuf->hwptr;
2223                                 dmabuf->count = 0;
2224                                 spin_unlock_irqrestore(&state->card->lock, flags);
2225                         }
2226                         i810_update_lvi(state, 1);
2227                         start_adc(state);
2228                 }
2229                 return 0;
2230
2231         case SNDCTL_DSP_SETDUPLEX:
2232 #ifdef DEBUG
2233                 printk("SNDCTL_DSP_SETDUPLEX\n");
2234 #endif
2235                 return -EINVAL;
2236
2237         case SNDCTL_DSP_GETODELAY:
2238                 if (!(file->f_mode & FMODE_WRITE))
2239                         return -EINVAL;
2240                 spin_lock_irqsave(&state->card->lock, flags);
2241                 i810_update_ptr(state);
2242                 val = dmabuf->count;
2243                 spin_unlock_irqrestore(&state->card->lock, flags);
2244 #ifdef DEBUG
2245                 printk("SNDCTL_DSP_GETODELAY %d\n", dmabuf->count);
2246 #endif
2247                 return put_user(val, (int *)arg);
2248
2249         case SOUND_PCM_READ_RATE:
2250 #ifdef DEBUG
2251                 printk("SOUND_PCM_READ_RATE %d\n", dmabuf->rate);
2252 #endif
2253                 return put_user(dmabuf->rate, (int *)arg);
2254
2255         case SOUND_PCM_READ_CHANNELS:
2256 #ifdef DEBUG
2257                 printk("SOUND_PCM_READ_CHANNELS\n");
2258 #endif
2259                 return put_user(2, (int *)arg);
2260
2261         case SOUND_PCM_READ_BITS:
2262 #ifdef DEBUG
2263                 printk("SOUND_PCM_READ_BITS\n");
2264 #endif
2265                 return put_user(AFMT_S16_LE, (int *)arg);
2266
2267         case SNDCTL_DSP_SETSPDIF: /* Set S/PDIF Control register */
2268 #ifdef DEBUG
2269                 printk("SNDCTL_DSP_SETSPDIF\n");
2270 #endif
2271                 if (get_user(val, (int *)arg))
2272                         return -EFAULT;
2273
2274                 /* Check to make sure the codec supports S/PDIF transmitter */
2275
2276                 if((state->card->ac97_features & 4)) {
2277                         /* mask out the transmitter speed bits so the user can't set them */
2278                         val &= ~0x3000;
2279
2280                         /* Add the current transmitter speed bits to the passed value */
2281                         ret = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
2282                         val |= (ret & 0x3000);
2283
2284                         i810_ac97_set(codec, AC97_SPDIF_CONTROL, val);
2285                         if(i810_ac97_get(codec, AC97_SPDIF_CONTROL) != val ) {
2286                                 printk(KERN_ERR "i810_audio: Unable to set S/PDIF configuration to 0x%04x.\n", val);
2287                                 return -EFAULT;
2288                         }
2289                 }
2290 #ifdef DEBUG
2291                 else
2292                         printk(KERN_WARNING "i810_audio: S/PDIF transmitter not avalible.\n");
2293 #endif
2294                 return put_user(val, (int *)arg);
2295
2296         case SNDCTL_DSP_GETSPDIF: /* Get S/PDIF Control register */
2297 #ifdef DEBUG
2298                 printk("SNDCTL_DSP_GETSPDIF\n");
2299 #endif
2300                 if (get_user(val, (int *)arg))
2301                         return -EFAULT;
2302
2303                 /* Check to make sure the codec supports S/PDIF transmitter */
2304
2305                 if(!(state->card->ac97_features & 4)) {
2306 #ifdef DEBUG
2307                         printk(KERN_WARNING "i810_audio: S/PDIF transmitter not avalible.\n");
2308 #endif
2309                         val = 0;
2310                 } else {
2311                         val = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
2312                 }
2313                 //return put_user((val & 0xcfff), (int *)arg);
2314                 return put_user(val, (int *)arg);
2315
2316         case SNDCTL_DSP_GETCHANNELMASK:
2317 #ifdef DEBUG
2318                 printk("SNDCTL_DSP_GETCHANNELMASK\n");
2319 #endif
2320                 if (get_user(val, (int *)arg))
2321                         return -EFAULT;
2322
2323                 /* Based on AC'97 DAC support, not ICH hardware */
2324                 val = DSP_BIND_FRONT;
2325                 if ( state->card->ac97_features & 0x0004 )
2326                         val |= DSP_BIND_SPDIF;
2327
2328                 if ( state->card->ac97_features & 0x0080 )
2329                         val |= DSP_BIND_SURR;
2330                 if ( state->card->ac97_features & 0x0140 )
2331                         val |= DSP_BIND_CENTER_LFE;
2332
2333                 return put_user(val, (int *)arg);
2334
2335         case SNDCTL_DSP_BIND_CHANNEL:
2336 #ifdef DEBUG
2337                 printk("SNDCTL_DSP_BIND_CHANNEL\n");
2338 #endif
2339                 if (get_user(val, (int *)arg))
2340                         return -EFAULT;
2341                 if ( val == DSP_BIND_QUERY ) {
2342                         val = DSP_BIND_FRONT; /* Always report this as being enabled */
2343                         if ( state->card->ac97_status & SPDIF_ON )
2344                                 val |= DSP_BIND_SPDIF;
2345                         else {
2346                                 if ( state->card->ac97_status & SURR_ON )
2347                                         val |= DSP_BIND_SURR;
2348                                 if ( state->card->ac97_status & CENTER_LFE_ON )
2349                                         val |= DSP_BIND_CENTER_LFE;
2350                         }
2351                 } else {  /* Not a query, set it */
2352                         if (!(file->f_mode & FMODE_WRITE))
2353                                 return -EINVAL;
2354                         if ( dmabuf->enable == DAC_RUNNING ) {
2355                                 stop_dac(state);
2356                         }
2357                         if ( val & DSP_BIND_SPDIF ) {  /* Turn on SPDIF */
2358                                 /*  Ok, this should probably define what slots
2359                                  *  to use. For now, we'll only set it to the
2360                                  *  defaults:
2361                                  *
2362                                  *   non multichannel codec maps to slots 3&4
2363                                  *   2 channel codec maps to slots 7&8
2364                                  *   4 channel codec maps to slots 6&9
2365                                  *   6 channel codec maps to slots 10&11
2366                                  *
2367                                  *  there should be some way for the app to
2368                                  *  select the slot assignment.
2369                                  */
2370
2371                                 i810_set_spdif_output ( state, AC97_EA_SPSA_3_4, dmabuf->rate );
2372                                 if ( !(state->card->ac97_status & SPDIF_ON) )
2373                                         val &= ~DSP_BIND_SPDIF;
2374                         } else {
2375                                 int mask;
2376                                 int channels;
2377
2378                                 /* Turn off S/PDIF if it was on */
2379                                 if ( state->card->ac97_status & SPDIF_ON )
2380                                         i810_set_spdif_output ( state, -1, 0 );
2381
2382                                 mask = val & (DSP_BIND_FRONT | DSP_BIND_SURR | DSP_BIND_CENTER_LFE);
2383                                 switch (mask) {
2384                                         case DSP_BIND_FRONT:
2385                                                 channels = 2;
2386                                                 break;
2387                                         case DSP_BIND_FRONT|DSP_BIND_SURR:
2388                                                 channels = 4;
2389                                                 break;
2390                                         case DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE:
2391                                                 channels = 6;
2392                                                 break;
2393                                         default:
2394                                                 val = DSP_BIND_FRONT;
2395                                                 channels = 2;
2396                                                 break;
2397                                 }
2398                                 i810_set_dac_channels ( state, channels );
2399
2400                                 /* check that they really got turned on */
2401                                 if (!(state->card->ac97_status & SURR_ON))
2402                                         val &= ~DSP_BIND_SURR;
2403                                 if (!(state->card->ac97_status & CENTER_LFE_ON))
2404                                         val &= ~DSP_BIND_CENTER_LFE;
2405                         }
2406                 }
2407                 return put_user(val, (int *)arg);
2408
2409         case SNDCTL_DSP_MAPINBUF:
2410         case SNDCTL_DSP_MAPOUTBUF:
2411         case SNDCTL_DSP_SETSYNCRO:
2412         case SOUND_PCM_WRITE_FILTER:
2413         case SOUND_PCM_READ_FILTER:
2414 #ifdef DEBUG
2415                 printk("SNDCTL_* -EINVAL\n");
2416 #endif
2417                 return -EINVAL;
2418         }
2419         return -EINVAL;
2420 }
2421
2422 static int i810_open(struct inode *inode, struct file *file)
2423 {
2424         int i = 0;
2425         struct i810_card *card = devs;
2426         struct i810_state *state = NULL;
2427         struct dmabuf *dmabuf = NULL;
2428
2429         /* find an avaiable virtual channel (instance of /dev/dsp) */
2430         while (card != NULL) {
2431                 /*
2432                  * If we are initializing and then fail, card could go
2433                  * away unuexpectedly while we are in the for() loop.
2434                  * So, check for card on each iteration before we check
2435                  * for card->initializing to avoid a possible oops.
2436                  * This usually only matters for times when the driver is
2437                  * autoloaded by kmod.
2438                  */
2439                 for (i = 0; i < 50 && card && card->initializing; i++) {
2440                         set_current_state(TASK_UNINTERRUPTIBLE);
2441                         schedule_timeout(HZ/20);
2442                 }
2443                 for (i = 0; i < NR_HW_CH && card && !card->initializing; i++) {
2444                         if (card->states[i] == NULL) {
2445                                 state = card->states[i] = (struct i810_state *)
2446                                         kmalloc(sizeof(struct i810_state), GFP_KERNEL);
2447                                 if (state == NULL)
2448                                         return -ENOMEM;
2449                                 memset(state, 0, sizeof(struct i810_state));
2450                                 dmabuf = &state->dmabuf;
2451                                 goto found_virt;
2452                         }
2453                 }
2454                 card = card->next;
2455         }
2456         /* no more virtual channel avaiable */
2457         if (!state)
2458                 return -ENODEV;
2459
2460 found_virt:
2461         /* initialize the virtual channel */
2462         state->virt = i;
2463         state->card = card;
2464         state->magic = I810_STATE_MAGIC;
2465         init_waitqueue_head(&dmabuf->wait);
2466         init_MUTEX(&state->open_sem);
2467         file->private_data = state;
2468         dmabuf->trigger = 0;
2469
2470         /* allocate hardware channels */
2471         if(file->f_mode & FMODE_READ) {
2472                 if((dmabuf->read_channel = card->alloc_rec_pcm_channel(card)) == NULL) {
2473                         kfree (card->states[i]);
2474                         card->states[i] = NULL;
2475                         return -EBUSY;
2476                 }
2477                 dmabuf->trigger |= PCM_ENABLE_INPUT;
2478                 i810_set_adc_rate(state, 8000);
2479         }
2480         if(file->f_mode & FMODE_WRITE) {
2481                 if((dmabuf->write_channel = card->alloc_pcm_channel(card)) == NULL) {
2482                         /* make sure we free the record channel allocated above */
2483                         if(file->f_mode & FMODE_READ)
2484                                 card->free_pcm_channel(card,dmabuf->read_channel->num);
2485                         kfree (card->states[i]);
2486                         card->states[i] = NULL;
2487                         return -EBUSY;
2488                 }
2489                 /* Initialize to 8kHz?  What if we don't support 8kHz? */
2490                 /*  Let's change this to check for S/PDIF stuff */
2491
2492                 dmabuf->trigger |= PCM_ENABLE_OUTPUT;
2493                 if ( spdif_locked ) {
2494                         i810_set_dac_rate(state, spdif_locked);
2495                         i810_set_spdif_output(state, AC97_EA_SPSA_3_4, spdif_locked);
2496                 } else {
2497                         i810_set_dac_rate(state, 8000);
2498                         /* Put the ACLink in 2 channel mode by default */
2499                         i = inl(card->iobase + GLOB_CNT);
2500                         outl(i & 0xffcfffff, card->iobase + GLOB_CNT);
2501                 }
2502         }
2503
2504         /* set default sample format. According to OSS Programmer's Guide  /dev/dsp
2505            should be default to unsigned 8-bits, mono, with sample rate 8kHz and
2506            /dev/dspW will accept 16-bits sample, but we don't support those so we
2507            set it immediately to stereo and 16bit, which is all we do support */
2508         dmabuf->fmt |= I810_FMT_16BIT | I810_FMT_STEREO;
2509         dmabuf->ossfragsize = 0;
2510         dmabuf->ossmaxfrags  = 0;
2511         dmabuf->subdivision  = 0;
2512
2513         state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2514
2515         return 0;
2516 }
2517
2518 static int i810_release(struct inode *inode, struct file *file)
2519 {
2520         struct i810_state *state = (struct i810_state *)file->private_data;
2521         struct i810_card *card = state->card;
2522         struct dmabuf *dmabuf = &state->dmabuf;
2523         unsigned long flags;
2524
2525         lock_kernel();
2526
2527         /* stop DMA state machine and free DMA buffers/channels */
2528         if(dmabuf->trigger & PCM_ENABLE_OUTPUT) {
2529                 drain_dac(state, 0);
2530         }
2531         if(dmabuf->trigger & PCM_ENABLE_INPUT) {
2532                 stop_adc(state);
2533         }
2534         spin_lock_irqsave(&card->lock, flags);
2535         dealloc_dmabuf(state);
2536         if (file->f_mode & FMODE_WRITE) {
2537                 state->card->free_pcm_channel(state->card, dmabuf->write_channel->num);
2538         }
2539         if (file->f_mode & FMODE_READ) {
2540                 state->card->free_pcm_channel(state->card, dmabuf->read_channel->num);
2541         }
2542
2543         state->card->states[state->virt] = NULL;
2544         kfree(state);
2545         spin_unlock_irqrestore(&card->lock, flags);
2546         unlock_kernel();
2547
2548         return 0;
2549 }
2550
2551 static /*const*/ struct file_operations i810_audio_fops = {
2552         .owner          = THIS_MODULE,
2553         .llseek         = no_llseek,
2554         .read           = i810_read,
2555         .write          = i810_write,
2556         .poll           = i810_poll,
2557         .ioctl          = i810_ioctl,
2558         .mmap           = i810_mmap,
2559         .open           = i810_open,
2560         .release        = i810_release,
2561 };
2562
2563 /* Write AC97 codec registers */
2564
2565 static u16 i810_ac97_get_mmio(struct ac97_codec *dev, u8 reg)
2566 {
2567         struct i810_card *card = dev->private_data;
2568         int count = 100;
2569         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2570
2571         while(count-- && (readb(card->iobase_mmio + CAS) & 1))
2572                 udelay(1);
2573
2574 #ifdef DEBUG_MMIO
2575         {
2576                 u16 ans = readw(card->ac97base_mmio + reg_set);
2577                 printk(KERN_DEBUG "i810_audio: ac97_get_mmio(%d) -> 0x%04X\n", ((int) reg_set) & 0xffff, (u32) ans);
2578                 return ans;
2579         }
2580 #else
2581         return readw(card->ac97base_mmio + reg_set);
2582 #endif
2583 }
2584
2585 static u16 i810_ac97_get_io(struct ac97_codec *dev, u8 reg)
2586 {
2587         struct i810_card *card = dev->private_data;
2588         int count = 100;
2589         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2590
2591         while(count-- && (inb(card->iobase + CAS) & 1))
2592                 udelay(1);
2593
2594         return inw(card->ac97base + reg_set);
2595 }
2596
2597 static void i810_ac97_set_mmio(struct ac97_codec *dev, u8 reg, u16 data)
2598 {
2599         struct i810_card *card = dev->private_data;
2600         int count = 100;
2601         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2602
2603         while(count-- && (readb(card->iobase_mmio + CAS) & 1))
2604                 udelay(1);
2605
2606         writew(data, card->ac97base_mmio + reg_set);
2607
2608 #ifdef DEBUG_MMIO
2609         printk(KERN_DEBUG "i810_audio: ac97_set_mmio(0x%04X, %d)\n", (u32) data, ((int) reg_set) & 0xffff);
2610 #endif
2611 }
2612
2613 static void i810_ac97_set_io(struct ac97_codec *dev, u8 reg, u16 data)
2614 {
2615         struct i810_card *card = dev->private_data;
2616         int count = 100;
2617         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2618
2619         while(count-- && (inb(card->iobase + CAS) & 1))
2620                 udelay(1);
2621
2622         outw(data, card->ac97base + reg_set);
2623 }
2624
2625 static u16 i810_ac97_get(struct ac97_codec *dev, u8 reg)
2626 {
2627         struct i810_card *card = dev->private_data;
2628         u16 ret;
2629
2630         spin_lock(&card->ac97_lock);
2631         if (card->use_mmio) {
2632                 ret = i810_ac97_get_mmio(dev, reg);
2633         }
2634         else {
2635                 ret = i810_ac97_get_io(dev, reg);
2636         }
2637         spin_unlock(&card->ac97_lock);
2638
2639         return ret;
2640 }
2641
2642 static void i810_ac97_set(struct ac97_codec *dev, u8 reg, u16 data)
2643 {
2644         struct i810_card *card = dev->private_data;
2645
2646         spin_lock(&card->ac97_lock);
2647         if (card->use_mmio) {
2648                 i810_ac97_set_mmio(dev, reg, data);
2649         }
2650         else {
2651                 i810_ac97_set_io(dev, reg, data);
2652         }
2653         spin_unlock(&card->ac97_lock);
2654 }
2655
2656
2657 /* OSS /dev/mixer file operation methods */
2658
2659 static int i810_open_mixdev(struct inode *inode, struct file *file)
2660 {
2661         int i;
2662         int minor = iminor(inode);
2663         struct i810_card *card = devs;
2664
2665         for (card = devs; card != NULL; card = card->next) {
2666                 /*
2667                  * If we are initializing and then fail, card could go
2668                  * away unuexpectedly while we are in the for() loop.
2669                  * So, check for card on each iteration before we check
2670                  * for card->initializing to avoid a possible oops.
2671                  * This usually only matters for times when the driver is
2672                  * autoloaded by kmod.
2673                  */
2674                 for (i = 0; i < 50 && card && card->initializing; i++) {
2675                         set_current_state(TASK_UNINTERRUPTIBLE);
2676                         schedule_timeout(HZ/20);
2677                 }
2678                 for (i = 0; i < NR_AC97 && card && !card->initializing; i++)
2679                         if (card->ac97_codec[i] != NULL &&
2680                             card->ac97_codec[i]->dev_mixer == minor) {
2681                                 file->private_data = card->ac97_codec[i];
2682                                 return 0;
2683                         }
2684         }
2685         return -ENODEV;
2686 }
2687
2688 static int i810_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
2689                                 unsigned long arg)
2690 {
2691         struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
2692
2693         return codec->mixer_ioctl(codec, cmd, arg);
2694 }
2695
2696 static /*const*/ struct file_operations i810_mixer_fops = {
2697         .owner          = THIS_MODULE,
2698         .llseek         = no_llseek,
2699         .ioctl          = i810_ioctl_mixdev,
2700         .open           = i810_open_mixdev,
2701 };
2702
2703 /* AC97 codec initialisation.  These small functions exist so we don't
2704    duplicate code between module init and apm resume */
2705
2706 static inline int i810_ac97_exists(struct i810_card *card, int ac97_number)
2707 {
2708         u32 reg = inl(card->iobase + GLOB_STA);
2709         switch (ac97_number) {
2710         case 0:
2711                 return reg & (1<<8);
2712         case 1:
2713                 return reg & (1<<9);
2714         case 2:
2715                 return reg & (1<<28);
2716         }
2717         return 0;
2718 }
2719
2720 static inline int i810_ac97_enable_variable_rate(struct ac97_codec *codec)
2721 {
2722         i810_ac97_set(codec, AC97_EXTENDED_STATUS, 9);
2723         i810_ac97_set(codec,AC97_EXTENDED_STATUS,
2724                       i810_ac97_get(codec, AC97_EXTENDED_STATUS)|0xE800);
2725
2726         return (i810_ac97_get(codec, AC97_EXTENDED_STATUS)&1);
2727 }
2728
2729
2730 static int i810_ac97_probe_and_powerup(struct i810_card *card,struct ac97_codec *codec)
2731 {
2732         /* Returns 0 on failure */
2733         int i;
2734
2735         if (ac97_probe_codec(codec) == 0) return 0;
2736
2737         /* power it all up */
2738         i810_ac97_set(codec, AC97_POWER_CONTROL,
2739                       i810_ac97_get(codec, AC97_POWER_CONTROL) & ~0x7f00);
2740
2741         /* wait for analog ready */
2742         for (i=100; i && ((i810_ac97_get(codec, AC97_POWER_CONTROL) & 0xf) != 0xf); i--)
2743         {
2744                 set_current_state(TASK_UNINTERRUPTIBLE);
2745                 schedule_timeout(HZ/20);
2746         }
2747         return i;
2748 }
2749
2750 /**
2751  *      i810_ac97_power_up_bus  -       bring up AC97 link
2752  *      @card : ICH audio device to power up
2753  *
2754  *      Bring up the ACLink AC97 codec bus
2755  */
2756
2757 static int i810_ac97_power_up_bus(struct i810_card *card)
2758 {
2759         u32 reg = inl(card->iobase + GLOB_CNT);
2760         int i;
2761         int primary_codec_id = 0;
2762
2763         if((reg&2)==0)  /* Cold required */
2764                 reg|=2;
2765         else
2766                 reg|=4; /* Warm */
2767
2768         reg&=~8;        /* ACLink on */
2769
2770         /* At this point we deassert AC_RESET # */
2771         outl(reg , card->iobase + GLOB_CNT);
2772
2773         /* We must now allow time for the Codec initialisation.
2774            600mS is the specified time */
2775
2776         for(i=0;i<10;i++)
2777         {
2778                 if((inl(card->iobase+GLOB_CNT)&4)==0)
2779                         break;
2780
2781                 set_current_state(TASK_UNINTERRUPTIBLE);
2782                 schedule_timeout(HZ/20);
2783         }
2784         if(i==10)
2785         {
2786                 printk(KERN_ERR "i810_audio: AC'97 reset failed.\n");
2787                 return 0;
2788         }
2789
2790         set_current_state(TASK_UNINTERRUPTIBLE);
2791         schedule_timeout(HZ/2);
2792
2793         /*
2794          *      See if the primary codec comes ready. This must happen
2795          *      before we start doing DMA stuff
2796          */
2797         /* see i810_ac97_init for the next 7 lines (jsaw) */
2798         inw(card->ac97base);
2799         if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH5 ||
2800              card->pci_id == PCI_DEVICE_ID_INTEL_ESB_5 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH6_3)
2801             && (card->use_mmio)) {
2802                 primary_codec_id = (int) readl(card->iobase_mmio + SDM) & 0x3;
2803                 printk(KERN_INFO "i810_audio: Primary codec has ID %d\n",
2804                        primary_codec_id);
2805         }
2806
2807         if(! i810_ac97_exists(card, primary_codec_id))
2808         {
2809                 printk(KERN_INFO "i810_audio: Codec not ready.. wait.. ");
2810                 set_current_state(TASK_UNINTERRUPTIBLE);
2811                 schedule_timeout(HZ);   /* actually 600mS by the spec */
2812
2813                 if(i810_ac97_exists(card, primary_codec_id))
2814                         printk("OK\n");
2815                 else
2816                         printk("no response.\n");
2817         }
2818         inw(card->ac97base);
2819         return 1;
2820 }
2821
2822 static int __devinit i810_ac97_init(struct i810_card *card)
2823 {
2824         int num_ac97 = 0;
2825         int ac97_id;
2826         int total_channels = 0;
2827         int nr_ac97_max = card_cap[card->pci_id_internal].nr_ac97;
2828         struct ac97_codec *codec;
2829         u16 eid;
2830         u32 reg;
2831
2832         if(!i810_ac97_power_up_bus(card)) return 0;
2833
2834         /* Number of channels supported */
2835         /* What about the codec?  Just because the ICH supports */
2836         /* multiple channels doesn't mean the codec does.       */
2837         /* we'll have to modify this in the codec section below */
2838         /* to reflect what the codec has.                       */
2839         /* ICH and ICH0 only support 2 channels so don't bother */
2840         /* to check....                                         */
2841
2842         card->channels = 2;
2843         reg = inl(card->iobase + GLOB_STA);
2844         if ( reg & 0x0200000 )
2845                 card->channels = 6;
2846         else if ( reg & 0x0100000 )
2847                 card->channels = 4;
2848         printk(KERN_INFO "i810_audio: Audio Controller supports %d channels.\n", card->channels);
2849         printk(KERN_INFO "i810_audio: Defaulting to base 2 channel mode.\n");
2850         reg = inl(card->iobase + GLOB_CNT);
2851         outl(reg & 0xffcfffff, card->iobase + GLOB_CNT);
2852
2853         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++)
2854                 card->ac97_codec[num_ac97] = NULL;
2855
2856         /*@FIXME I don't know, if I'm playing to safe here... (jsaw) */
2857         if ((nr_ac97_max > 2) && !card->use_mmio) nr_ac97_max = 2;
2858
2859         for (num_ac97 = 0; num_ac97 < nr_ac97_max; num_ac97++) {
2860                 /* codec reset */
2861                 printk(KERN_INFO "i810_audio: Resetting connection %d\n", num_ac97);
2862                 if (card->use_mmio) readw(card->ac97base_mmio + 0x80*num_ac97);
2863                 else inw(card->ac97base + 0x80*num_ac97);
2864
2865                 /* If we have the SDATA_IN Map Register, as on ICH4, we
2866                    do not loop thru all possible codec IDs but thru all
2867                    possible IO channels. Bit 0:1 of SDM then holds the
2868                    last codec ID spoken to.
2869                 */
2870                 if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH5 ||
2871                      card->pci_id == PCI_DEVICE_ID_INTEL_ESB_5 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH6_3)
2872                     && (card->use_mmio)) {
2873                         ac97_id = (int) readl(card->iobase_mmio + SDM) & 0x3;
2874                         printk(KERN_INFO "i810_audio: Connection %d with codec id %d\n",
2875                                num_ac97, ac97_id);
2876                 }
2877                 else {
2878                         ac97_id = num_ac97;
2879                 }
2880
2881                 /* The ICH programmer's reference says you should   */
2882                 /* check the ready status before probing. So we chk */
2883                 /*   What do we do if it's not ready?  Wait and try */
2884                 /*   again, or abort?                               */
2885                 if (!i810_ac97_exists(card, ac97_id)) {
2886                         if(num_ac97 == 0)
2887                                 printk(KERN_ERR "i810_audio: Primary codec not ready.\n");
2888                 }
2889
2890                 if ((codec = ac97_alloc_codec()) == NULL)
2891                         return -ENOMEM;
2892
2893                 /* initialize some basic codec information, other fields will be filled
2894                    in ac97_probe_codec */
2895                 codec->private_data = card;
2896                 codec->id = ac97_id;
2897                 card->ac97_id_map[ac97_id] = num_ac97 * 0x80;
2898
2899                 if (card->use_mmio) {
2900                         codec->codec_read = i810_ac97_get_mmio;
2901                         codec->codec_write = i810_ac97_set_mmio;
2902                 }
2903                 else {
2904                         codec->codec_read = i810_ac97_get_io;
2905                         codec->codec_write = i810_ac97_set_io;
2906                 }
2907
2908                 if(!i810_ac97_probe_and_powerup(card,codec)) {
2909                         printk(KERN_ERR "i810_audio: timed out waiting for codec %d analog ready.\n", ac97_id);
2910                         ac97_release_codec(codec);
2911                         break;  /* it didn't work */
2912                 }
2913                 /* Store state information about S/PDIF transmitter */
2914                 card->ac97_status = 0;
2915
2916                 /* Don't attempt to get eid until powerup is complete */
2917                 eid = i810_ac97_get(codec, AC97_EXTENDED_ID);
2918
2919                 if(eid==0xFFFF)
2920                 {
2921                         printk(KERN_WARNING "i810_audio: no codec attached ?\n");
2922                         ac97_release_codec(codec);
2923                         break;
2924                 }
2925
2926                 /* Check for an AC97 1.0 soft modem (ID1) */
2927
2928                 if(codec->modem)
2929                 {
2930                         printk(KERN_WARNING "i810_audio: codec %d is a softmodem - skipping.\n", ac97_id);
2931                         ac97_release_codec(codec);
2932                         continue;
2933                 }
2934
2935                 card->ac97_features = eid;
2936
2937                 /* Now check the codec for useful features to make up for
2938                    the dumbness of the 810 hardware engine */
2939
2940                 if(!(eid&0x0001))
2941                         printk(KERN_WARNING "i810_audio: only 48Khz playback available.\n");
2942                 else
2943                 {
2944                         if(!i810_ac97_enable_variable_rate(codec)) {
2945                                 printk(KERN_WARNING "i810_audio: Codec refused to allow VRA, using 48Khz only.\n");
2946                                 card->ac97_features&=~1;
2947                         }
2948                 }
2949
2950                 /* Turn on the amplifier */
2951
2952                 codec->codec_write(codec, AC97_POWER_CONTROL,
2953                          codec->codec_read(codec, AC97_POWER_CONTROL) & ~0x8000);
2954
2955                 /* Determine how many channels the codec(s) support   */
2956                 /*   - The primary codec always supports 2            */
2957                 /*   - If the codec supports AMAP, surround DACs will */
2958                 /*     automaticlly get assigned to slots.            */
2959                 /*     * Check for surround DACs and increment if     */
2960                 /*       found.                                       */
2961                 /*   - Else check if the codec is revision 2.2        */
2962                 /*     * If surround DACs exist, assign them to slots */
2963                 /*       and increment channel count.                 */
2964
2965                 /* All of this only applies to ICH2 and above. ICH    */
2966                 /* and ICH0 only support 2 channels.  ICH2 will only  */
2967                 /* support multiple codecs in a "split audio" config. */
2968                 /* as described above.                                */
2969
2970                 /* TODO: Remove all the debugging messages!           */
2971
2972                 if((eid & 0xc000) == 0) /* primary codec */
2973                         total_channels += 2;
2974
2975                 if(eid & 0x200) { /* GOOD, AMAP support */
2976                         if (eid & 0x0080) /* L/R Surround channels */
2977                                 total_channels += 2;
2978                         if (eid & 0x0140) /* LFE and Center channels */
2979                                 total_channels += 2;
2980                         printk("i810_audio: AC'97 codec %d supports AMAP, total channels = %d\n", ac97_id, total_channels);
2981                 } else if (eid & 0x0400) {  /* this only works on 2.2 compliant codecs */
2982                         eid &= 0xffcf;
2983                         if((eid & 0xc000) != 0) {
2984                                 switch ( total_channels ) {
2985                                         case 2:
2986                                                 /* Set dsa1, dsa0 to 01 */
2987                                                 eid |= 0x0010;
2988                                                 break;
2989                                         case 4:
2990                                                 /* Set dsa1, dsa0 to 10 */
2991                                                 eid |= 0x0020;
2992                                                 break;
2993                                         case 6:
2994                                                 /* Set dsa1, dsa0 to 11 */
2995                                                 eid |= 0x0030;
2996                                                 break;
2997                                 }
2998                                 total_channels += 2;
2999                         }
3000                         i810_ac97_set(codec, AC97_EXTENDED_ID, eid);
3001                         eid = i810_ac97_get(codec, AC97_EXTENDED_ID);
3002                         printk("i810_audio: AC'97 codec %d, new EID value = 0x%04x\n", ac97_id, eid);
3003                         if (eid & 0x0080) /* L/R Surround channels */
3004                                 total_channels += 2;
3005                         if (eid & 0x0140) /* LFE and Center channels */
3006                                 total_channels += 2;
3007                         printk("i810_audio: AC'97 codec %d, DAC map configured, total channels = %d\n", ac97_id, total_channels);
3008                 } else {
3009                         printk("i810_audio: AC'97 codec %d Unable to map surround DAC's (or DAC's not present), total channels = %d\n", ac97_id, total_channels);
3010                 }
3011
3012                 if ((codec->dev_mixer = register_sound_mixer(&i810_mixer_fops, -1)) < 0) {
3013                         printk(KERN_ERR "i810_audio: couldn't register mixer!\n");
3014                         ac97_release_codec(codec);
3015                         break;
3016                 }
3017
3018                 card->ac97_codec[num_ac97] = codec;
3019         }
3020
3021         /* pick the minimum of channels supported by ICHx or codec(s) */
3022         card->channels = (card->channels > total_channels)?total_channels:card->channels;
3023
3024         return num_ac97;
3025 }
3026
3027 static void __devinit i810_configure_clocking (void)
3028 {
3029         struct i810_card *card;
3030         struct i810_state *state;
3031         struct dmabuf *dmabuf;
3032         unsigned int i, offset, new_offset;
3033         unsigned long flags;
3034
3035         card = devs;
3036         /* We could try to set the clocking for multiple cards, but can you even have
3037          * more than one i810 in a machine?  Besides, clocking is global, so unless
3038          * someone actually thinks more than one i810 in a machine is possible and
3039          * decides to rewrite that little bit, setting the rate for more than one card
3040          * is a waste of time.
3041          */
3042         if(card != NULL) {
3043                 state = card->states[0] = (struct i810_state *)
3044                                         kmalloc(sizeof(struct i810_state), GFP_KERNEL);
3045                 if (state == NULL)
3046                         return;
3047                 memset(state, 0, sizeof(struct i810_state));
3048                 dmabuf = &state->dmabuf;
3049
3050                 dmabuf->write_channel = card->alloc_pcm_channel(card);
3051                 state->virt = 0;
3052                 state->card = card;
3053                 state->magic = I810_STATE_MAGIC;
3054                 init_waitqueue_head(&dmabuf->wait);
3055                 init_MUTEX(&state->open_sem);
3056                 dmabuf->fmt = I810_FMT_STEREO | I810_FMT_16BIT;
3057                 dmabuf->trigger = PCM_ENABLE_OUTPUT;
3058                 i810_set_spdif_output(state, -1, 0);
3059                 i810_set_dac_channels(state, 2);
3060                 i810_set_dac_rate(state, 48000);
3061                 if(prog_dmabuf(state, 0) != 0) {
3062                         goto config_out_nodmabuf;
3063                 }
3064                 if(dmabuf->dmasize < 16384) {
3065                         goto config_out;
3066                 }
3067                 dmabuf->count = dmabuf->dmasize;
3068                 CIV_TO_LVI(card->iobase+dmabuf->write_channel->port, 31);
3069                 local_irq_save(flags);
3070                 start_dac(state);
3071                 offset = i810_get_dma_addr(state, 0);
3072                 mdelay(50);
3073                 new_offset = i810_get_dma_addr(state, 0);
3074                 stop_dac(state);
3075                 local_irq_restore(flags);
3076                 i = new_offset - offset;
3077 #ifdef DEBUG_INTERRUPTS
3078                 printk("i810_audio: %d bytes in 50 milliseconds\n", i);
3079 #endif
3080                 if(i == 0)
3081                         goto config_out;
3082                 i = i / 4 * 20;
3083                 if (i > 48500 || i < 47500) {
3084                         clocking = clocking * clocking / i;
3085                         printk("i810_audio: setting clocking to %d\n", clocking);
3086                 }
3087 config_out:
3088                 dealloc_dmabuf(state);
3089 config_out_nodmabuf:
3090                 state->card->free_pcm_channel(state->card,state->dmabuf.write_channel->num);
3091                 kfree(state);
3092                 card->states[0] = NULL;
3093         }
3094 }
3095
3096 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered
3097    until "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
3098
3099 static int __devinit i810_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
3100 {
3101         struct i810_card *card;
3102
3103         if (pci_enable_device(pci_dev))
3104                 return -EIO;
3105
3106         if (pci_set_dma_mask(pci_dev, I810_DMA_MASK)) {
3107                 printk(KERN_ERR "i810_audio: architecture does not support"
3108                        " 32bit PCI busmaster DMA\n");
3109                 return -ENODEV;
3110         }
3111
3112         if( pci_resource_start(pci_dev, 1) == 0)
3113         {
3114                 /* MMIO only ICH5 .. here be dragons .. */
3115                 printk(KERN_ERR "i810_audio: Pure MMIO interfaces not yet supported.\n");
3116                 return -ENODEV;
3117         }
3118
3119         if ((card = kmalloc(sizeof(struct i810_card), GFP_KERNEL)) == NULL) {
3120                 printk(KERN_ERR "i810_audio: out of memory\n");
3121                 return -ENOMEM;
3122         }
3123         memset(card, 0, sizeof(*card));
3124
3125         card->initializing = 1;
3126         card->pci_dev = pci_dev;
3127         card->pci_id = pci_id->device;
3128         card->ac97base = pci_resource_start (pci_dev, 0);
3129         card->iobase = pci_resource_start (pci_dev, 1);
3130
3131         /* if chipset could have mmio capability, check it */
3132         if (card_cap[pci_id->driver_data].flags & CAP_MMIO) {
3133                 card->ac97base_mmio_phys = pci_resource_start (pci_dev, 2);
3134                 card->iobase_mmio_phys = pci_resource_start (pci_dev, 3);
3135
3136                 if ((card->ac97base_mmio_phys) && (card->iobase_mmio_phys)) {
3137                         card->use_mmio = 1;
3138                 }
3139                 else {
3140                         card->ac97base_mmio_phys = 0;
3141                         card->iobase_mmio_phys = 0;
3142                 }
3143         }
3144
3145         card->irq = pci_dev->irq;
3146         card->next = devs;
3147         card->magic = I810_CARD_MAGIC;
3148 #ifdef CONFIG_PM
3149         card->pm_suspended=0;
3150 #endif
3151         spin_lock_init(&card->lock);
3152         spin_lock_init(&card->ac97_lock);
3153         devs = card;
3154
3155         pci_set_master(pci_dev);
3156
3157         printk(KERN_INFO "i810: %s found at IO 0x%04lx and 0x%04lx, "
3158                "MEM 0x%04lx and 0x%04lx, IRQ %d\n",
3159                card_names[pci_id->driver_data],
3160                card->iobase, card->ac97base,
3161                card->ac97base_mmio_phys, card->iobase_mmio_phys,
3162                card->irq);
3163
3164         card->alloc_pcm_channel = i810_alloc_pcm_channel;
3165         card->alloc_rec_pcm_channel = i810_alloc_rec_pcm_channel;
3166         card->alloc_rec_mic_channel = i810_alloc_rec_mic_channel;
3167         card->free_pcm_channel = i810_free_pcm_channel;
3168
3169         if ((card->channel = pci_alloc_consistent(pci_dev,
3170             sizeof(struct i810_channel)*NR_HW_CH, &card->chandma)) == NULL) {
3171                 printk(KERN_ERR "i810: cannot allocate channel DMA memory\n");
3172                 goto out_mem;
3173         }
3174
3175         { /* We may dispose of this altogether some time soon, so... */
3176                 struct i810_channel *cp = card->channel;
3177
3178                 cp[0].offset = 0;
3179                 cp[0].port = 0x00;
3180                 cp[0].num = 0;
3181                 cp[1].offset = 0;
3182                 cp[1].port = 0x10;
3183                 cp[1].num = 1;
3184                 cp[2].offset = 0;
3185                 cp[2].port = 0x20;
3186                 cp[2].num = 2;
3187         }
3188
3189         /* claim our iospace and irq */
3190         request_region(card->iobase, 64, card_names[pci_id->driver_data]);
3191         request_region(card->ac97base, 256, card_names[pci_id->driver_data]);
3192
3193         if (request_irq(card->irq, &i810_interrupt, SA_SHIRQ,
3194                         card_names[pci_id->driver_data], card)) {
3195                 printk(KERN_ERR "i810_audio: unable to allocate irq %d\n", card->irq);
3196                 goto out_pio;
3197         }
3198
3199         if (card->use_mmio) {
3200                 if (request_mem_region(card->ac97base_mmio_phys, 512, "ich_audio MMBAR")) {
3201                         if ((card->ac97base_mmio = ioremap(card->ac97base_mmio_phys, 512))) { /*@FIXME can ioremap fail? don't know (jsaw) */
3202                                 if (request_mem_region(card->iobase_mmio_phys, 256, "ich_audio MBBAR")) {
3203                                         if ((card->iobase_mmio = ioremap(card->iobase_mmio_phys, 256))) {
3204                                                 printk(KERN_INFO "i810: %s mmio at 0x%04lx and 0x%04lx\n",
3205                                                        card_names[pci_id->driver_data],
3206                                                        (unsigned long) card->ac97base_mmio,
3207                                                        (unsigned long) card->iobase_mmio);
3208                                         }
3209                                         else {
3210                                                 iounmap(card->ac97base_mmio);
3211                                                 release_mem_region(card->ac97base_mmio_phys, 512);
3212                                                 release_mem_region(card->iobase_mmio_phys, 512);
3213                                                 card->use_mmio = 0;
3214                                         }
3215                                 }
3216                                 else {
3217                                         iounmap(card->ac97base_mmio);
3218                                         release_mem_region(card->ac97base_mmio_phys, 512);
3219                                         card->use_mmio = 0;
3220                                 }
3221                         }
3222                 }
3223                 else {
3224                         card->use_mmio = 0;
3225                 }
3226         }
3227
3228         /* initialize AC97 codec and register /dev/mixer */
3229         if (i810_ac97_init(card) <= 0) {
3230                 free_irq(card->irq, card);
3231                 goto out_iospace;
3232         }
3233         pci_set_drvdata(pci_dev, card);
3234
3235         if(clocking == 0) {
3236                 clocking = 48000;
3237                 i810_configure_clocking();
3238         }
3239
3240         /* register /dev/dsp */
3241         if ((card->dev_audio = register_sound_dsp(&i810_audio_fops, -1)) < 0) {
3242                 int i;
3243                 printk(KERN_ERR "i810_audio: couldn't register DSP device!\n");
3244                 free_irq(card->irq, card);
3245                 for (i = 0; i < NR_AC97; i++)
3246                 if (card->ac97_codec[i] != NULL) {
3247                         unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
3248                         ac97_release_codec(card->ac97_codec[i]);
3249                 }
3250                 goto out_iospace;
3251         }
3252
3253         card->initializing = 0;
3254         return 0;
3255
3256 out_iospace:
3257         if (card->use_mmio) {
3258                 iounmap(card->ac97base_mmio);
3259                 iounmap(card->iobase_mmio);
3260                 release_mem_region(card->ac97base_mmio_phys, 512);
3261                 release_mem_region(card->iobase_mmio_phys, 256);
3262         }
3263 out_pio:
3264         release_region(card->iobase, 64);
3265         release_region(card->ac97base, 256);
3266         pci_free_consistent(pci_dev, sizeof(struct i810_channel)*NR_HW_CH,
3267             card->channel, card->chandma);
3268 out_mem:
3269         kfree(card);
3270         return -ENODEV;
3271 }
3272
3273 static void __devexit i810_remove(struct pci_dev *pci_dev)
3274 {
3275         int i;
3276         struct i810_card *card = pci_get_drvdata(pci_dev);
3277         /* free hardware resources */
3278         free_irq(card->irq, devs);
3279         release_region(card->iobase, 64);
3280         release_region(card->ac97base, 256);
3281         pci_free_consistent(pci_dev, sizeof(struct i810_channel)*NR_HW_CH,
3282                             card->channel, card->chandma);
3283         if (card->use_mmio) {
3284                 iounmap(card->ac97base_mmio);
3285                 iounmap(card->iobase_mmio);
3286                 release_mem_region(card->ac97base_mmio_phys, 512);
3287                 release_mem_region(card->iobase_mmio_phys, 256);
3288         }
3289
3290         /* unregister audio devices */
3291         for (i = 0; i < NR_AC97; i++)
3292                 if (card->ac97_codec[i] != NULL) {
3293                         unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
3294                         ac97_release_codec(card->ac97_codec[i]);
3295                         card->ac97_codec[i] = NULL;
3296                 }
3297         unregister_sound_dsp(card->dev_audio);
3298         kfree(card);
3299 }
3300
3301 #ifdef CONFIG_PM
3302 static int i810_pm_suspend(struct pci_dev *dev, u32 pm_state)
3303 {
3304         struct i810_card *card = pci_get_drvdata(dev);
3305         struct i810_state *state;
3306         unsigned long flags;
3307         struct dmabuf *dmabuf;
3308         int i,num_ac97;
3309 #ifdef DEBUG
3310         printk("i810_audio: i810_pm_suspend called\n");
3311 #endif
3312         if(!card) return 0;
3313         spin_lock_irqsave(&card->lock, flags);
3314         card->pm_suspended=1;
3315         for(i=0;i<NR_HW_CH;i++) {
3316                 state = card->states[i];
3317                 if(!state) continue;
3318                 /* this happens only if there are open files */
3319                 dmabuf = &state->dmabuf;
3320                 if(dmabuf->enable & DAC_RUNNING ||
3321                    (dmabuf->count && (dmabuf->trigger & PCM_ENABLE_OUTPUT))) {
3322                         state->pm_saved_dac_rate=dmabuf->rate;
3323                         stop_dac(state);
3324                 } else {
3325                         state->pm_saved_dac_rate=0;
3326                 }
3327                 if(dmabuf->enable & ADC_RUNNING) {
3328                         state->pm_saved_adc_rate=dmabuf->rate;
3329                         stop_adc(state);
3330                 } else {
3331                         state->pm_saved_adc_rate=0;
3332                 }
3333                 dmabuf->ready = 0;
3334                 dmabuf->swptr = dmabuf->hwptr = 0;
3335                 dmabuf->count = dmabuf->total_bytes = 0;
3336         }
3337
3338         spin_unlock_irqrestore(&card->lock, flags);
3339
3340         /* save mixer settings */
3341         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
3342                 struct ac97_codec *codec = card->ac97_codec[num_ac97];
3343                 if(!codec) continue;
3344                 for(i=0;i< SOUND_MIXER_NRDEVICES ;i++) {
3345                         if((supported_mixer(codec,i)) &&
3346                            (codec->read_mixer)) {
3347                                 card->pm_saved_mixer_settings[i][num_ac97]=
3348                                         codec->read_mixer(codec,i);
3349                         }
3350                 }
3351         }
3352         pci_save_state(dev,card->pm_save_state); /* XXX do we need this? */
3353         pci_disable_device(dev); /* disable busmastering */
3354         pci_set_power_state(dev,3); /* Zzz. */
3355
3356         return 0;
3357 }
3358
3359
3360 static int i810_pm_resume(struct pci_dev *dev)
3361 {
3362         int num_ac97,i=0;
3363         struct i810_card *card=pci_get_drvdata(dev);
3364         pci_enable_device(dev);
3365         pci_restore_state (dev,card->pm_save_state);
3366
3367         /* observation of a toshiba portege 3440ct suggests that the
3368            hardware has to be more or less completely reinitialized from
3369            scratch after an apm suspend.  Works For Me.   -dan */
3370
3371         i810_ac97_power_up_bus(card);
3372
3373         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
3374                 struct ac97_codec *codec = card->ac97_codec[num_ac97];
3375                 /* check they haven't stolen the hardware while we were
3376                    away */
3377                 if(!codec || !i810_ac97_exists(card,num_ac97)) {
3378                         if(num_ac97) continue;
3379                         else BUG();
3380                 }
3381                 if(!i810_ac97_probe_and_powerup(card,codec)) BUG();
3382
3383                 if((card->ac97_features&0x0001)) {
3384                         /* at probe time we found we could do variable
3385                            rates, but APM suspend has made it forget
3386                            its magical powers */
3387                         if(!i810_ac97_enable_variable_rate(codec)) BUG();
3388                 }
3389                 /* we lost our mixer settings, so restore them */
3390                 for(i=0;i< SOUND_MIXER_NRDEVICES ;i++) {
3391                         if(supported_mixer(codec,i)){
3392                                 int val=card->
3393                                         pm_saved_mixer_settings[i][num_ac97];
3394                                 codec->mixer_state[i]=val;
3395                                 codec->write_mixer(codec,i,
3396                                                    (val  & 0xff) ,
3397                                                    ((val >> 8)  & 0xff) );
3398                         }
3399                 }
3400         }
3401
3402         /* we need to restore the sample rate from whatever it was */
3403         for(i=0;i<NR_HW_CH;i++) {
3404                 struct i810_state * state=card->states[i];
3405                 if(state) {
3406                         if(state->pm_saved_adc_rate)
3407                                 i810_set_adc_rate(state,state->pm_saved_adc_rate);
3408                         if(state->pm_saved_dac_rate)
3409                                 i810_set_dac_rate(state,state->pm_saved_dac_rate);
3410                 }
3411         }
3412
3413
3414         card->pm_suspended = 0;
3415
3416         /* any processes that were reading/writing during the suspend
3417            probably ended up here */
3418         for(i=0;i<NR_HW_CH;i++) {
3419                 struct i810_state *state = card->states[i];
3420                 if(state) wake_up(&state->dmabuf.wait);
3421         }
3422
3423         return 0;
3424 }
3425 #endif /* CONFIG_PM */
3426
3427 MODULE_AUTHOR("");
3428 MODULE_DESCRIPTION("Intel 810 audio support");
3429 MODULE_LICENSE("GPL");
3430 MODULE_PARM(ftsodell, "i");
3431 MODULE_PARM(clocking, "i");
3432 MODULE_PARM(strict_clocking, "i");
3433 MODULE_PARM(spdif_locked, "i");
3434
3435 #define I810_MODULE_NAME "intel810_audio"
3436
3437 static struct pci_driver i810_pci_driver = {
3438         .name           = I810_MODULE_NAME,
3439         .id_table       = i810_pci_tbl,
3440         .probe          = i810_probe,
3441         .remove         = __devexit_p(i810_remove),
3442 #ifdef CONFIG_PM
3443         .suspend        = i810_pm_suspend,
3444         .resume         = i810_pm_resume,
3445 #endif /* CONFIG_PM */
3446 };
3447
3448
3449 static int __init i810_init_module (void)
3450 {
3451         printk(KERN_INFO "Intel 810 + AC97 Audio, version "
3452                DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n");
3453
3454         if (!pci_register_driver(&i810_pci_driver)) {
3455                 pci_unregister_driver(&i810_pci_driver);
3456                 return -ENODEV;
3457         }
3458         if(ftsodell != 0) {
3459                 printk("i810_audio: ftsodell is now a deprecated option.\n");
3460         }
3461         if(spdif_locked > 0 ) {
3462                 if(spdif_locked == 32000 || spdif_locked == 44100 || spdif_locked == 48000) {
3463                         printk("i810_audio: Enabling S/PDIF at sample rate %dHz.\n", spdif_locked);
3464                 } else {
3465                         printk("i810_audio: S/PDIF can only be locked to 32000, 44100, or 48000Hz.\n");
3466                         spdif_locked = 0;
3467                 }
3468         }
3469
3470         return 0;
3471 }
3472
3473 static void __exit i810_cleanup_module (void)
3474 {
3475         pci_unregister_driver(&i810_pci_driver);
3476 }
3477
3478 module_init(i810_init_module);
3479 module_exit(i810_cleanup_module);
3480
3481 /*
3482 Local Variables:
3483 c-basic-offset: 8
3484 End:
3485 */